CN1148790C - Semiconductor device with waved deep slot and technology for preparing waved deep slot - Google Patents
Semiconductor device with waved deep slot and technology for preparing waved deep slot Download PDFInfo
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- CN1148790C CN1148790C CNB011107170A CN01110717A CN1148790C CN 1148790 C CN1148790 C CN 1148790C CN B011107170 A CNB011107170 A CN B011107170A CN 01110717 A CN01110717 A CN 01110717A CN 1148790 C CN1148790 C CN 1148790C
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Abstract
The present invention provides a semiconductor device provided with an undulate deep ditch, and a method for manufacturing the undulate deep ditch. The undulate deep ditch of the present invention is arranged on the surface of a substrate, and comprises a bottom edge and a side wall, wherein the side wall is arranged between the bottom edge and the surface of the substrate, and comprises a first side wall with a positive slope and a second side wall with a negative slope; the first side wall and the second side wall appear on the side wall in a staggered mode.
Description
Technical field
The invention relates to a kind of semiconductor device and waveform zanjon manufacture method with waveform zanjon, refer to especially a kind of zanjon that has a waveform sidewall with and preparation method thereof.
Background technology
Zanjon (deep-trench, DT) very general be applied to dynamic random memory (DRAM) and micro electromechanical structure (micro electro-mechanic structure, MEMS) in.
When being applied to DRAM, the purpose of DT is to provide an electric capacity, in order to store charge and memory document.See also the 1st figure, the 1st figure is a kind of existing DT schematic diagram that is used for DRAM.DT 10 is constituted with the substrate 12 of removing part.When having made electric capacity, the surface of DT 10 can form one deck dielectric layer (not shown), can insert the conducting objects (not shown) among the DT 10, and the upper/lower electrode of electric capacity just is conducting objects and substrate 12 respectively.If the capacitance of electric capacity is big more, then can not be subjected to electric capacity context electric leakage more and have influence on the data of being remembered, the blanking time of just upgrading (refresh) just can be longer, and comparatively speaking, the speed that data reads is also just fast more.Therefore, there are many effort all to be devoted to increase the area of DT to increase the capacitance of electric capacity.A kind of DT of increase Method for Area is to make a darker DT, but, depth-width ratio (aspectratio) is if the too high phenomenon (etch stop) that causes the etch process generation etching when making DT to stop easily on the other hand, produces difficulty when also making subsequent technique insert conducting objects.And the another kind of DT of increase Method for Area is to make an ampuliform (bottle-shaped) DT, shown in the 2nd figure.Yet the capacitance that ampuliform DT increased is also few, and making an ampuliform DT certainly will increase many technology to reach up-narrow and down-wide DT profile, and therefore, technologic cost can significantly increase.
DT also can be applied on the MEMS.Shown in the 3rd figure, the 3rd figure is the generalized section of vibrations/swing (shock/vibration) detector of a kind of MEMS.Vibrations/swing (shock/vibration) detector is with a DT 14 and middle 16 formations of a rocking bar (rod).When external environment vibrations or swing, rocking bar 16 rock and with contacting on the sidewall of DT 14 produces electrically.So trickle action just sees through electric current and flows through the contact point of the sidewall of DT 14 and rocking bar 16 and sensed arriving.The contact area of the degree of rocking of rocking bar 16 and rocking bar 16 and the sidewall of DT 14 is depended in the sensitivity of vibrations/swing detector, and the two all can utilize the degree of depth of deepening DT to reach.But this is the same with the problem of before being mentioned in DRAM, makes a darker DT and has the problem that etching stops.
Goal of the invention
In view of this, main purpose of the present invention, be to provide a kind of semiconductor device and waveform zanjon manufacture method with waveform zanjon, can be applicable among DRAM and the MEMS, the capacitance of electric capacity among the DRAM can be significantly increased on the one hand, the sensitivity of vibrations/swing detector can be increased on the other hand.
Purpose of the present invention reaches by following measure:
A kind of manufacture method of waveform zanjon is applicable to a substrate, it is characterized in that: this method includes the following step:
Formation one has the mask layer of an opening in this substrate;
Carry out one first etch process (first etch), use so that the substrate under the opening produces the first side wall of a positive slope (positive slope);
Carry out one second etch process (second etch), use so that the substrate under the opening produces second sidewall of a negative slope; And
Repeat this first etch process of carrying out and second etch process that interlock, remove the substrate of a predetermined thickness of this opening below, to form a waveform zanjon.
A kind of semiconductor device with zanjon is characterized in that: described zanjon is a kind of waveform zanjon, is located at the surface of a substrate, forms with the substrate of removing part, and this waveform zanjon includes:
One base; And
Sidewall is located between this base and this substrate surface, includes:
The first side wall of positive slope (positive slope) and second sidewall of negative slope, and this first side wall and interlaced the coming across on this sidewall of this second sidewall.
According to above-mentioned purpose, the present invention proposes a kind of waveform zanjon.Zanjon of the present invention is located at the surface of a substrate, forms with the substrate of removing part.Zanjon of the present invention includes a base and a sidewall.Sidewall is located between this base and this substrate surface, includes the first side wall of positive slope and second sidewall of negative slope.This first side wall and interlaced the coming across on this sidewall of this second sidewall.
The present invention provides a kind of manufacture method of waveform zanjon in addition.Manufacture method of the present invention is applicable to a substrate, and includes the following step.First step, formation one has the mask layer of an opening in this substrate.Second step is carried out one first etch process (first etch), uses so that the substrate under the opening produces the first side wall of a positive slope (positive slope).Third step carries out one second etch process (second etch), uses so that the substrate under the opening produces second sidewall of a negative slope.At last, repeat this first etch process of carrying out and second etch process that interlock, remove the substrate of a predetermined thickness of this opening below, to form a waveform zanjon.
This manufacture method comprises at least one sub-etch process in addition, be located between each first etch process and second etch process, with so that zanjon in the etching produces the transition sidewall of a predetermined transition slope (transitional slope), in order to being connected this first side wall and second sidewall, and make whole sidewall slyness.
The difference of this first etch process, second etch process and sub-etch process is one of them of source power (source power), substrate bias power (bias power) and oxygen flow, utilize the difference of source power, substrate bias power or oxygen flow, this first etch process, second etch process and sub-etch process can make the substrate in the etching produce different slopes, and the sidewall that makes forms wavy shaped configuration.
The invention has the advantages that capacitance that significantly increases electric capacity and the sensitivity that strengthens vibrations/swing detector.When waveform zanjon of the present invention was applied to electric capacity, because the existence of waveform sidewall, so the area of upper/lower electrode just can significantly increase, therefore, the mistake of the unnecessary making of zanjon deeply just can reach the demand of capacitance.And, as long as in a board, just can finish waveform zanjon of the present invention, can reduce technologic cost on the technology.When the present invention was applied to MEMS and goes up, waveform zanjon of the present invention had increased rocking bar in vibrations/swing detector and the touch opportunity between sidewall, thereby the sensitivity of vibrations/swing detector can strengthen.
Description of drawings
For above-mentioned purpose of the present invention, feature and advantage can be become apparent, a preferred embodiment cited below particularly, and cooperate appended graphicly, be described in detail below:
The 1st figure is a kind of existing DT schematic diagram that is used for DRAM;
The 2nd figure is the schematic diagram of a kind of ampuliform DT;
The 3rd figure is the generalized section of vibrations/swing (shock/vibration) detector of a kind of MEMS;
4A figure is the schematic diagram that waveform zanjon of the present invention is applied to the electric capacity of DRAM;
4B figure is the schematic diagram of waveform zanjon of the present invention vibrations/swing detector of being applied to MEMS;
4C figure is a kind of partial enlarged drawing of 4A figure or 4B figure;
4D figure is the another kind of partial enlarged drawing of 4A figure or 4B figure; And
5A figure and 5B are the chip profile schematic diagram when carrying out the manufacture method of waveform zanjon of the present invention.
Symbol description:
31 substrates of 30 waveform zanjons
32 bases, 34 sidewalls
36 the first side walls, 38 second sidewalls
40 vertical lines, 42 transition sidewalls
45 rocking bars, 50 mask layers
52 openings
Embodiment
See also 4A figure and 4B figure, 4A figure is the schematic diagram that waveform zanjon of the present invention is applied to the electric capacity of DRAM, and 4B figure is the schematic diagram of waveform zanjon of the present invention vibrations/swing detector of being applied to MEMS.The invention provides a kind of waveform zanjon 30, be located at the surface of a substrate 31, form with the substrate 31 of removing part.Waveform zanjon 30 of the present invention includes a base 32 and a sidewall 34, is located between base 32 and substrate 31 surfaces.Sidewall 34 includes the first side wall 36 of positive slope (positive slope) and second sidewall 38 of negative slope.The first side wall 36 and 38 interlaced the coming across on the sidewall 34 of second sidewall are as 4A figure and 4B figure.
See also 4C figure, 4C figure is the partial enlarged drawing of 4A figure or 4B figure.In order to make sidewall 34 comparatively slick and sly, so on the sidewall 34 transition sidewall 42 can be set, each transition sidewall 42 is located between a first side wall 36 and one second sidewall 38.Therefore, sidewall 34 just more can not form zigzag, can reduce point discharge effect between electric capacity power-on and power-off pole plate (point-discharge effect).Vertical line 40 among the 4C figure is the vertical line on substrate 31 surfaces.By among the figure as can be known, transition sidewall 42 is perpendicular to the surface of substrate 31.
Certain, between the first side wall 36 and second sidewall 38 more than one transition sidewall 42 can be set, shown in 4D figure.4D figure is the another kind of partial enlarged drawing of 4A figure or 4B figure.Be provided with the first transition sidewall 42a and the second transition sidewall 42b between the first side wall 36 and second sidewall 38.It is more smooth-going that the main purpose of the first transition sidewall 42a and the second transition sidewall 42b is to make the slope between the first side wall 36 and second sidewall 38 to change, thereby sidewall 34 can be more level and smooth, can reduce point discharge effect between electric capacity power-on and power-off pole plate.
Shown in 4A figure.When waveform zanjon 30 of the present invention was applied to electric capacity, because the existence of corrugated sidewall 34, so the coupling area of upper/lower electrode just can significantly increase, therefore, the mistake of waveform zanjon 30 unnecessary making deeply just can reach the demand of capacitance.
Shown in 4B figure.When the present invention was applied to MEMS and goes up, waveform zanjon 30 of the present invention had increased the touch opportunity of 34 of rocking bar 45 in vibrations/swing detector and sidewalls, thereby the sensitivity of vibrations/swing detector can strengthen.
The present invention provides the manufacture method of previously described waveform zanjon in addition.See also 5A figure.Manufacture method of the present invention is applicable to a substrate 31, for example the substrate that constitutes with silicon.The first step has the mask layer 50 of an opening 52 prior to formation one in the substrate 31.For example, mask layer 50 can be constituted with photoresist or silicon nitride, as the cover curtain of subsequent etch technology.
See also 5B figure.Second step was carried out an anisotropic etch process, removed the substrate 31 of a predetermined thickness of opening 52 belows, to form a waveform zanjon 30.
Please consult 4C figure and 1A table again, the 1A table is the content schematic diagram of the etch process program (recipe) of the waveform zanjon that is used to make 4C figure.
| In proper order | n | n+1 | n+2 | n+3 | n+4 | |
| Title | Second etch process | Sub-etch process | First etch process | Sub-etch process | Second etch process | |
| The etching control parameter | Oxygen flow | x-a％ | x | x+a％ | x | x-a％ |
| Source power | y | y | y | y | y | |
| Substrate bias power | z | z | z | z | z | |
| Remarks | Second sidewall | The transition sidewall | The first side wall | The transition sidewall | Second sidewall | |
The 1A table
Include a plurality of first etch processs (first etch recipes), second etch process (second etch recipes) and sub-etch process in the etching program.First etch process is used so that the zanjon in the etching produces the first side wall 36 of a positive slope (positive slope).Second etch process (second etch recipes) is used so that the zanjon in the etching produces second sidewall 38 of a negative slope.What first etch process and second etch process repeated to interlock comes across in the etch process.Sub-etch process is located at respectively between each first etch process and second etch process, shown in the 1A table, with so that zanjon in the etching produces the transition sidewall 42 of a predetermined transition slope (transitional slope), in order to be connected this first side wall 36 and second sidewall 38.
In plasma etch process technology now, the etching control parameter includes two kinds of different plasma powers (plasma power) mostly, is called source power (source) and substrate bias power (bias power) respectively.Briefly, source power is used for controlling the etch plasma volume density, therefore can determine the size of isotropic etching rate; And substrate bias power is used for controlling the Impact energy of the ion in the plasma, therefore can determine the size of anisotropic etching rate.And when being etched with the substrate that silicon constitutes, oxygen is used in substrate surface form cuticula (passivation film) mostly, and therefore, oxygen flow also can be one of etching control parameter.When oxygen flow was big more, the zanjon width that is etched just can be more little.Relative, less oxygen flow is thinner in the cuticula that the sidewall of zanjon forms, so the isotropic etching rate just can increase, so the zanjon width that etches just can be big more.Therefore, as long as the size of careful adjustment source power, substrate bias power and oxygen flow, the zanjon that just can control in the etching produces desirable slope.That is to say, the difference of first etch process, second etch process (second etch recipes) and sub-etch process is one of them of source power, substrate bias power and oxygen flow, even also can once change the demand that two etching control parameters reach slope.
Shown in the 1A table.If the value of the oxygen flow of sub-etch process, source power and substrate bias power is respectively x, y and z, and can produce among the corresponding 4C figure and transition sidewalls 42 substrate 31 Surface Vertical.According to the experience in the previous described and experiment, if the etching control parameter that increases by 10% oxygen flow and fix other, just can make the zanjon in the etching produce the sidewall that has positive slope, opposite, if the etching control parameter that reduces by 10% oxygen flow and fix other, just can make the zanjon in the etching produce the sidewall that has negative slope.For example, the oxygen flow of first etch process changes to x+a%, thereby produces the first side wall 36 that has positive slope among the corresponding 4C figure; The oxygen flow of second etch process changes to x-a%, thereby produces second sidewall 38 that has negative slope among the corresponding 4C figure.And when carrying out first etch process, defined on the sidewall of finishing and to have produced more cuticula, so when carrying out second technology, only have the substrate of close base section just can be etched, first etch process defines the first side wall 36 that has positive slope and can't be affected.So, as long as periodic second etch process, sub-etch process, first etch process, sub-etch process, second etch process carried out in the etch process just can obtain wavy zanjon of the present invention.Certain, the etching control parameter of change is oxygen flow not necessarily, also can be source power or substrate bias power.Even also can once change plural Control Parameter.
Please consult 4D figure and 1B table again, the 1B table is the content schematic diagram of the etch process program (recipe) of the waveform zanjon that is used to make 4D figure.
| In proper order | n | n+1 | n+2 | n+3 | n+4 | n+5 | n+6 | |
| Title | Second etch process | The first sub-etch process | The second sub-etch process | First etch process | The second sub-etch process | The first sub-etch process | Second etch process | |
| The etching control parameter | Oxygen flow | x-a％ | x-a/2％ | x+a/2％ | x+a％ | x+a/2％ | x-a/2％ | x-a％ |
| Source power | y | y | y | y | y | Y | y | |
| Substrate bias power | z | z | z | z | z | Z | z | |
| Remarks | Second sidewall | The first transition sidewall | The second transition sidewall | The first side wall | The second transition sidewall | The first transition sidewall | Second sidewall | |
The 1B table
Certain, for the sidewall 34 that makes waveform zanjon 30 more slick and sly, so can between first etch process and second etch process, add plural sub-etch process, the first sub-etch process and the second sub-etch process in showing as 1B.For example, the oxygen flow of the first sub-etch process and the second sub-etch process is respectively x-a%/2 and x+a%/2.That is to say that the first sub-etch process and the second sub-etch process increase oxygen flow gradually.Therefore, it is comparatively smooth-going that first transition sidewall 42a that manufactures and the slope of the second transition sidewall 42b just can change, so the sidewall 34 of waveform zanjon 30 is more slick and sly.If, there is more, thinner sub-etch process to be interspersed between first etch process and second etch process, the effect of sidewall slyness can be better certainly.
The largest benefit of the manufacture method of waveform zanjon of the present invention is the saving on the technology cost.As long as define etch process and order in the etch process, just in technology once, can form the waveform zanjon.
Compared to existing zanjon, the etch process in the fine adjustment of the present invention (fine tune) etch process is to produce a waveform zanjon.When if waveform zanjon of the present invention is applied to electric capacity, just then the area of upper/lower electrode can significantly increase.Therefore, the mistake of the unnecessary making of zanjon deeply just can reach the demand of capacitance.When the present invention was applied to MEMS and goes up, waveform zanjon of the present invention had increased rocking bar in vibrations/swing detector and the touch opportunity between sidewall, thereby the sensitivity of vibrations/swing detector can strengthen.And, as long as a step just can be finished waveform zanjon of the present invention, can reduce technologic cost on the technology.
Though the present invention discloses as above with a preferred embodiment; right its is not in order to limit the present invention; anyly have the knack of this skill person; without departing from the spirit and scope of the present invention; when can doing a little change and retouching, so protection scope of the present invention is when looking claim and being as the criterion in conjunction with specification and accompanying drawing.
Claims (12)
1. the manufacture method of a waveform zanjon is applicable to a substrate, it is characterized in that: this method includes the following step:
Formation one has the mask layer of an opening in this substrate;
Carry out one first etch process, use so that the substrate under the opening produces the first side wall of a positive slope;
Carry out one second etch process, use so that the substrate under the opening produces second sidewall of a negative slope; And
Repeat this first etch process of carrying out and second etch process that interlock, remove the substrate of a predetermined thickness of this opening below, to form a waveform zanjon.
2. manufacture method as claimed in claim 1, it is characterized in that: this method includes a plurality of sub-etch processs in addition, be located at respectively between each first etch process and second etch process, with so that zanjon in the etching produces the transition sidewall of a predetermined transition slope, in order to be connected this first side wall and second sidewall.
3. manufacture method as claimed in claim 2 is characterized in that: this transition sidewall is perpendicular to the surface of this substrate.
4. manufacture method as claimed in claim 1 is characterized in that: this first etch process and this second etch process all include the etching control parameter of source power, substrate bias power and oxygen flow.
5. manufacture method as claimed in claim 4 is characterized in that: the difference of this first etch process and this second etch process is one of them of source power, substrate bias power and oxygen flow.
6. as claim 2 or 5 described manufacture methods, it is characterized in that: the difference of this first etch process, second etch process and sub-etch process is one of them of source power, substrate bias power and oxygen flow.
7. manufacture method as claimed in claim 1 is characterized in that: this substrate is constituted with silicon.
8. manufacture method as claimed in claim 1 is characterized in that: this mask layer is constituted with photoresist.
9. manufacture method as claimed in claim 1 is characterized in that: this mask layer is constituted with silicon nitride.
10. semiconductor device with zanjon, it is characterized in that: described zanjon is a kind of waveform zanjon, is located at the surface of a substrate, forms with the substrate of removing part, this waveform zanjon includes:
One base; And
Sidewall is located between this base and this substrate surface, includes:
Second sidewall of the first side wall of positive slope and negative slope, and this first side wall and interlaced the coming across on this sidewall of this second sidewall.
11. the semiconductor device with zanjon as claimed in claim 10 is characterized in that: described sidewall includes a plurality of transition sidewalls in addition, and each transition sidewall is located between a first side wall and one second sidewall.
12. the semiconductor device with zanjon as claimed in claim 11 is characterized in that: described transition sidewall is perpendicular to the surface of this substrate.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNB011107170A CN1148790C (en) | 2001-04-13 | 2001-04-13 | Semiconductor device with waved deep slot and technology for preparing waved deep slot |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNB011107170A CN1148790C (en) | 2001-04-13 | 2001-04-13 | Semiconductor device with waved deep slot and technology for preparing waved deep slot |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN1381874A CN1381874A (en) | 2002-11-27 |
| CN1148790C true CN1148790C (en) | 2004-05-05 |
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CNB011107170A Expired - Lifetime CN1148790C (en) | 2001-04-13 | 2001-04-13 | Semiconductor device with waved deep slot and technology for preparing waved deep slot |
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| Country | Link |
|---|---|
| CN (1) | CN1148790C (en) |
Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR102116147B1 (en) * | 2014-03-06 | 2020-05-28 | 매그나칩 반도체 유한회사 | Buried Magnetic Sensor |
| CN109698274B (en) | 2017-10-23 | 2021-05-25 | 联华电子股份有限公司 | Method for manufacturing capacitor |
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2001
- 2001-04-13 CN CNB011107170A patent/CN1148790C/en not_active Expired - Lifetime
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| CN1381874A (en) | 2002-11-27 |
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