CN114863828A - Splicing screen - Google Patents
Splicing screen Download PDFInfo
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- CN114863828A CN114863828A CN202210612838.0A CN202210612838A CN114863828A CN 114863828 A CN114863828 A CN 114863828A CN 202210612838 A CN202210612838 A CN 202210612838A CN 114863828 A CN114863828 A CN 114863828A
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- motherboard
- edge routing
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09F—DISPLAYING; ADVERTISING; SIGNS; LABELS OR NAME-PLATES; SEALS
- G09F9/00—Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements
- G09F9/30—Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements in which the desired character or characters are formed by combining individual elements
- G09F9/302—Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements in which the desired character or characters are formed by combining individual elements characterised by the form or geometrical disposition of the individual elements
- G09F9/3026—Video wall, i.e. stackable semiconductor matrix display modules
Abstract
The application provides a concatenation screen, this concatenation screen includes the mother board and binds a plurality of display module assembly on the mother board, a plurality of display module assembly splice each other, every display module assembly is including attached on the mother board and the display panel who is connected with the mother board electricity, display panel includes the display area and is located the outlying edge of display area and walks the line district, at the concatenation department of two adjacent display module assemblies, the orthographic projection coincidence of the at least partial edge of two adjacent display panel walking the line district on the mother board, with the non-display area of the concatenation department that reduces the concatenation screen, and then reduce the concatenation seam of concatenation screen, the problem that there is great concatenation seam in the concatenation department of having solved current concatenation screen.
Description
Technical Field
The application relates to the technical field of display, in particular to a spliced screen.
Background
With the development of display technology, the application scenes of the display screen are more and more, and large screen display is one of the trends of future development. One of the ways to realize large screen is to splice a plurality of small-sized display screens to form an oversized spliced screen. However, the non-display area is arranged on the periphery of the display area of the existing display screen, and when the spliced screen is formed by splicing a plurality of existing display screens, the non-display areas of the adjacent display screens form a large splicing seam, so that the visual split feeling is caused, the continuity and the integrity of the display picture of the spliced screen are damaged, and the display effect of the spliced screen is reduced.
Disclosure of Invention
The application provides a splicing screen to alleviate the technical problem that there is great concatenation seam in the concatenation department of current splicing screen.
In order to solve the above problems, the technical solution provided by the present application is as follows:
the embodiment of the application provides a concatenation screen, it includes:
a motherboard;
the display module comprises a plurality of display modules, a plurality of display modules and a plurality of display modules, wherein the display modules are bound on the mother board and are spliced with one another, each display module comprises a display panel which is attached to the mother board and is electrically connected with the mother board, and each display panel comprises a display area and an edge wiring area which is positioned on the periphery of the display area;
and at the splicing position of two adjacent display modules, orthographic projections of at least part of the edge wiring areas of the two adjacent display panels on the motherboard are superposed.
In the concatenation screen that this application embodiment provided, adjacent two the display module assembly is first display module assembly and second display module assembly, first display module assembly includes first display panel, second display module assembly includes the second display panel concatenation department, first display panel includes first edge area of walking the line, the second display panel includes the second edge area of walking the line, first edge area of walking the line is located the second edge is walked the line and is distinguished and keep away from one side of mother board.
In the concatenation screen that this application embodiment provided, first edge routing area includes first subregion and is located first subregion is kept away from the second subregion of the display area one side of first display panel, second edge routing area includes third subregion and is located the third subregion is kept away from the fourth subregion of the display area one side of second display panel, the second subregion is in orthographic projection on the motherboard with the fourth subregion is in orthographic projection coincidence on the motherboard, first subregion with the motherboard is connected electrically, the third subregion with the motherboard is connected electrically.
In the concatenation screen that this application embodiment provided, first edge routing district is in orthographic projection on the mother board with second edge routing district is in orthographic projection coincidence on the mother board, first edge routing district passes through second edge routing district with the mother board electricity is connected.
In the concatenation screen that this application embodiment provided, the second edge is walked the line and is distinguished and be provided with the first line and the second of insulating each other and walk the line, first edge is walked the line and is distinguished and pass through first line with the motherboard electricity is connected, the second edge is walked the line and is distinguished and pass through the second walk the line with the motherboard electricity is connected.
In the concatenation screen that this application embodiment provided, second edge routing area is provided with and runs through second display panel's through-hole, first edge routing area passes through the through-hole with the motherboard electricity is connected.
In the concatenation screen that this application embodiment provided, the concatenation screen is still including being located a plurality ofly the display module assembly is kept away from the apron of mother board one side, first display module assembly through first tie coat in the apron, second display module assembly through the second tie coat in the apron, the thickness of second tie coat is greater than the thickness of first tie coat.
In the concatenation screen that this application embodiment provided, first display module assembly is still including being located first display panel keeps away from first polaroid and the first touch-control layer of mother board one side, second display module assembly is still including being located second display panel keeps away from second polaroid and the second touch-control layer of mother board one side, first touch-control layer passes through first tie coat is in the apron, the second touch-control layer passes through the second tie coat is in the apron.
In the spliced screen provided by the embodiment of the application, one side of the first polarizer, which is close to the second polarizer, is flush with the outer boundary of the first edge routing area; one side of the second polaroid, which is close to the first polaroid, is in contact with the first polaroid.
In the concatenation screen that this application embodiment provided, first display module assembly is still including being located first display panel is close to the layer that increases of mother board one side, increase the layer connect in first display panel with the mother board, just it is corresponding to increase the layer one side in first edge routing district is provided with the first district of keeping away, second edge routing district is located the first district of keeping away is interior.
The beneficial effect of this application does: in the concatenation screen that this application provided, the concatenation screen includes the mother board and binds a plurality of display module assembly on the mother board, it is a plurality of the mutual concatenation of display module assembly, every the display module assembly is including attached on the mother board and with the display panel that the mother board electricity is connected, display panel includes the display area and is located the outlying marginal line zone of walking of display area, adjacent two the concatenation department of display module assembly, adjacent two display panel's at least part the marginal line zone of walking is in orthographic projection coincidence on the mother board to reduce the non-display area of the concatenation department of concatenation screen, and then reduce the concatenation seam of concatenation screen, solved the concatenation department of current concatenation screen and had the problem of great concatenation seam.
Drawings
In order to illustrate the embodiments or the technical solutions in the prior art more clearly, the drawings needed to be used in the description of the embodiments or the prior art will be briefly described below, and it is obvious that the drawings in the following description are only some embodiments of the invention, and it is obvious for a person skilled in the art that other drawings can be obtained according to these drawings without creative efforts.
Fig. 1 is a schematic top view structure diagram of a tiled screen provided in an embodiment of the present application.
Fig. 2 is a schematic cross-sectional structure diagram of the spliced screen in fig. 1.
Fig. 3 is another schematic top view structure diagram of the tiled screen according to the embodiment of the present application.
Fig. 4 is a schematic cross-sectional structure diagram of the spliced screen in fig. 3.
Fig. 5 is a detailed structure diagram of the second edge routing area in fig. 4.
Fig. 6 is another detailed structure diagram of the second edge routing area in fig. 4.
Fig. 7 is a schematic cross-sectional view of another spliced screen provided in an embodiment of the present application.
Detailed Description
The following description of the various embodiments refers to the accompanying drawings, which are included to illustrate specific embodiments that can be implemented by the application. Directional phrases used in this application, such as [ upper ], [ lower ], [ front ], [ rear ], [ left ], [ right ], [ inner ], [ outer ], [ side ], etc., refer only to the directions of the attached drawings. Accordingly, the directional terminology is used for purposes of illustration and understanding, and is in no way limiting. In the drawings, elements having similar structures are denoted by the same reference numerals. In the drawings, the thickness of some layers and regions are exaggerated for clarity of understanding and ease of description. That is, the size and thickness of each component shown in the drawings are arbitrarily illustrated, but the present application is not limited thereto.
Referring to fig. 1 and fig. 2 in combination, fig. 1 is a schematic top view structure diagram of a tiled screen provided in an embodiment of the present application, and fig. 2 is a schematic cross-sectional structure diagram of the tiled screen in fig. 1. The tiled screen 1000 includes a motherboard 100 and a plurality of display modules (e.g., a first display module 201 and a second display module 202 shown in fig. 1 and 2) bound to the motherboard 100, and the plurality of display modules are tiled together to form a large-sized tiled screen 1000. Of course, the tiled display screen 1000 can further include a cover plate 300 located on a side of the plurality of display modules away from the motherboard 100, where the cover plate 300 is used to protect the plurality of display modules.
Optionally, the motherboard 100 includes a control layer 10 and a support member for supporting the control layer 10, where the support member includes a back plate 11 and a functional layer 12 located on a side of the back plate 11 away from the control layer 10. The back sheet 11 includes a polyethylene terephthalate (PET) substrate, and the like. The functional layer 12 includes a composite layer such as foam, copper foil, graphite, and the like, and is used for structural reinforcement of the back plate 11 and heat dissipation of the control layer 10.
The control layer 10 includes a binding terminal, a driving device, and a connection trace connecting the binding terminal and the driving device, where the driving device includes a driving IC and the like. The plurality of display modules are located on one side of the control layer 10 away from the backplane 11, and are bound to the binding terminals on the control layer 10, so as to electrically connect the display modules and the motherboard 100. Specifically, the driving signal on the driving device is transmitted to the corresponding display module through the connecting wire and the binding terminal in sequence, so that the corresponding display module can display the driving signal. Therefore, the driving device is arranged on the motherboard 100 and is electrically connected with the corresponding display module, so that the space for arranging the driving device on the display module can be saved, the frame of the display module is reduced, the frame area of the spliced part of the display module is reduced, and the splicing seam of the spliced part is reduced.
The following specifically describes how to electrically connect the display module and the motherboard 100 by taking two adjacent display modules spliced with each other as an example:
the two adjacent display modules are a first display module 201 and a second display module 202, each of the display modules includes a display area AA and a non-display area surrounding the display area AA, the non-display area includes a first frame area BD1 and a second frame area BD2 located at two opposite sides of the display area AA, and of course, the non-display area may further include a third frame area BD3 connected to the first frame area BD1 and the second frame area BD 2.
The first frame area BD1 of the first display module 201 and the first frame area BD1 of the second display module 202 are partially overlapped, that is, the orthographic projection of the first frame area BD1 of the first display module 201 on the motherboard 100 is overlapped with the orthographic projection of the first frame area BD1 of the second display module 202 on the motherboard 100, so that the frame area at the splicing position after the first display module 201 and the second display module 202 are spliced can be further reduced, and the splicing seam at the splicing position is reduced.
Specifically, each of the display modules includes a display panel attached to the motherboard 100 and electrically connected to the motherboard 100, for example, the first display module 201 includes a first display panel 21 attached to the motherboard 100 and electrically connected to the motherboard 100, and the second display module 202 includes a second display panel 22 attached to the motherboard 100 and electrically connected to the motherboard 100. Each display panel comprises a display area AA and an edge wiring area positioned on the periphery of the display area AA, and the display panel comprises a flexible OLED display panel and the like.
The display area AA of the display panel is a display area AA of the display module, and the edge routing area of the display panel is disposed corresponding to a non-display area of the display module, for example, the edge routing area of the display panel corresponds to the first frame area BD1 and the second frame area BD2 of the display module.
It can be understood that the edge routing area of the display panel is used for setting various binding wires, the binding wires are electrically connected to the control layer 10 on the motherboard 100 to electrically connect the edge routing area to the motherboard 100, and meanwhile, the binding wires are also electrically connected to a driving circuit in the display area AA of the display panel to electrically connect the display panel to the motherboard 100, so as to electrically connect the display module to the motherboard 100. It should be noted that, in the present application, the electrical connection between the edge routing area and the motherboard 100 refers to the electrical connection between the bonding trace in the edge routing area and the motherboard 100.
Furthermore, at the splicing position of two adjacent display modules, at least partial orthographic projections of the edge routing areas of the two adjacent display panels on the motherboard 100 are overlapped, so that partial frames of the splicing position of the two adjacent display modules are overlapped, and further the splicing seam of the splicing position is reduced.
Specifically, at the joint, the first display panel 21 includes a first edge routing area 211, the second display panel 22 includes a second edge routing area 221, and the first edge routing area 211 is located on a side of the second edge routing area 221 away from the motherboard 100, so that a height difference is formed between the first display panel 21 and the second display panel 22. Wherein the height difference means that a distance between the first display panel 21 and the motherboard 100 is different from a distance between the second display panel 22 and the motherboard 100 in a direction perpendicular to the motherboard 100.
The first edge routing area 211 corresponds to the first frame area BD1 of the first display module 201, and the second edge routing area 221 corresponds to the first frame area BD1 of the second display module 202. The orthographic projection of the first edge routing area 211 on the motherboard 100 is overlapped with the orthographic projection of the second edge routing area 221 on the motherboard 100, that is, the first edge routing area 211 and the second edge routing area 221 are partially overlapped in space, so that the orthographic projection of the first frame area BD1 of the first display module 201 on the motherboard 100 is overlapped with the orthographic projection of the first frame area BD1 of the second display module 202 on the motherboard 100, and further the frame area at the joint of the first display module 201 and the second display module 202 is reduced, so as to reduce the joint seam.
The first edge routing area 211 includes a first sub-area 2111 and a second sub-area 2112 located on a side of the first sub-area 2111 away from the display area AA of the first display panel 21, the second edge routing area 221 includes a third sub-area 2211 and a fourth sub-area 2212 located on a side of the third sub-area 2211 away from the display area AA of the second display panel 22, a forward projection of the second sub-area 2112 on the motherboard 100 coincides with a forward projection of the fourth sub-area 2212 on the motherboard 100, the first sub-area 2111 is electrically connected to the motherboard 100, and the third sub-area 2211 is electrically connected to the motherboard 100.
So that the first edge routing region 211 and the second edge routing region 221 partially coincide to reduce the splice seam; the non-overlapped portion of the first edge routing region 211 and the second edge routing region 221 is used for electrically connecting with the motherboard 100, so as to electrically connect the first display panel 21 and the second display panel 22 with the motherboard 100. For example, the first sub-region 2111 is electrically connected to the control layer 10 of the motherboard 100 through a first conductive layer 61, and the third sub-region 2211 is electrically connected to the control layer 10 of the motherboard 100 through a second conductive layer 62. Alternatively, the material of the first Conductive layer 61 and the second Conductive layer 62 may include at least one of a Conductive silver paste (ag paste), an Anisotropic Conductive Film (ACF), and the like.
Optionally, the first display panel 21 further includes a third edge routing area 212 disposed opposite to the first edge routing area 211, the third edge routing area 212 corresponds to the second frame area BD2 of the first display module 201, and the third edge routing area 212 is also electrically connected to the control layer 10 of the motherboard 100 through the first conductive layer 61. Correspondingly, the second display panel 22 further includes a fourth edge routing area 222 disposed opposite to the second edge routing area 221, the fourth edge routing area 222 corresponds to the second frame area BD2 of the second display module 202, and the fourth edge routing area 222 is also electrically connected to the control layer 10 of the motherboard 100 through the second conductive layer 62.
In order to achieve the partial overlapping of the first edge routing area 211 and the second edge routing area 221 in space, and further form a height difference between the first display panel 21 and the second display panel 22, the first display module 201 further includes a heightening layer 71 located on one side of the first display panel 21 close to the motherboard 100, and the heightening layer 71 is connected to the first display panel 21 and the motherboard 100. Specifically, the boosting layer 71 is connected to the first display panel 21 and the control layer 10 of the motherboard 100. Optionally, the material of the enhancing layer 71 includes an OCA, an OCR, or other adhesive material to bond the first display panel 21 and the control layer 10, so as to enhance the stability of the bonding between the first display panel 21 and the motherboard 100.
Further, the first space-avoiding area 711 is disposed on a side of the enhancement layer 71 corresponding to the first edge routing area 211, and the second edge routing area 221 is located in the first space-avoiding area 711, so that the first edge routing area 211 and the second edge routing area 221 are partially overlapped in a spatial direction perpendicular to the motherboard 100, so as to reduce a frame area at a joint of the first display module 201 and the second display module 202.
It can be understood that, due to the partial overlapping of the first edge routing area 211 and the second edge routing area 221 in space, a height difference is formed between the first display panel 21 and the second display panel 22, so that although a splicing seam at the splicing position of the first display module 201 and the second display module 202 is reduced, the height difference also makes the first display panel 21 and the second display panel 22 not in the same horizontal plane, which is easy to cause unevenness of the surface of the whole tiled screen 1000. This height difference needs to be filled up for this purpose:
specifically, the first display module 201 is attached to the cover plate 300 through a first adhesive layer 51, the second display module 202 is attached to the cover plate 300 through a second adhesive layer 52, and the thickness of the second adhesive layer 52 is greater than that of the first adhesive layer 51. The height difference between the first display panel 21 and the second display panel 22 is filled by increasing the thickness of the second adhesive layer 52, so that the surface of the whole spliced screen 1000 is flat.
Specifically, the first display module 201 further includes a first polarizer 31 and a first touch layer 41 located on one side of the first display panel 21 away from the motherboard 100, the second display module 202 further includes a second polarizer 32 and a second touch layer 42 located on one side of the second display panel 22 away from the motherboard 100, the first touch layer 41 is attached to the cover plate 300 through the first bonding layer 51, and the second touch layer 42 is attached to the cover plate 300 through the second bonding layer 52. Optionally, the material of the first adhesive layer 51 and the second adhesive layer 52 includes transparent optical glue or the like, such as OCA, OCR or the like.
Further, the first polarizer 31 is flush with the outer boundary of the first edge routing region 211 at the side close to the second polarizer 32; one side of the second polarizer 32 close to the first polarizer 31 is in contact with the first polarizer 31 to avoid a gap or interference between the first polarizer 31 and the second polarizer 32 due to the partial overlapping of the first display panel 21 and the second display panel 22 in space.
Correspondingly, the first touch layer 41 is flush with the outer boundary of the first edge routing area 211 at a side close to the second touch layer 42; a side of the second touch layer 42 close to the first touch layer 41 is in contact with the first touch layer 41 to avoid a gap or interference between the first touch layer 41 and the second touch layer 42 due to the spatial overlapping of the first display panel 21 and the second display panel 22.
It should be noted that, in the present application, the outer boundary of the edge routing area refers to a side of the edge routing area away from the display area, for example, the outer boundary of the first edge routing area 211 refers to a boundary of the first edge routing area 211 away from the display area AA of the first display panel 21.
In an embodiment, please refer to fig. 1 to 5, fig. 3 is another schematic top view structure diagram of a tiled screen provided in an embodiment of the present application, fig. 4 is a schematic cross-sectional structure diagram of the tiled screen in fig. 3, and fig. 5 is a schematic detail structure diagram of a second edge routing area in fig. 4. Unlike the above embodiments, in the tiled display 1001 of this embodiment, an orthogonal projection of the first edge routing area 211 on the motherboard 100 coincides with an orthogonal projection of the second edge routing area 221 on the motherboard 100, and the first edge routing area 211 is electrically connected to the motherboard 100 through the second edge routing area 221.
Specifically, an orthographic projection of the first edge routing area 211 on the motherboard 100 coincides with an orthographic projection of the second edge routing area 221 on the motherboard 100, so that the first frame area BD1 of the first display module 201 coincides with the first frame area BD1 of the second display module 202, so as to further reduce a frame area at a spliced position after splicing the first display module 201 and the second display module 202, and thus reduce a splicing seam at the spliced position.
Since the first edge routing region 211 completely overlaps the second edge routing region 221, the first edge routing region 211 has no extra space for electrical connection with the motherboard 100, and thus the first edge routing region 211 is electrically connected with the motherboard 100 through the second edge routing region 221. Specifically, the first edge routing region 211 is electrically connected to the second edge routing region 221 through a third conductive layer 63, and the second edge routing region 221 is electrically connected to the control layer 10 of the motherboard 100 through a fourth conductive layer 64. The material of each of the third conductive layer 63 and the fourth conductive layer 64 may be the same as that of the first conductive layer 61.
Specifically, the second edge routing area 221 is provided with a first routing 223 and a second routing 224 that are insulated from each other, the first edge routing area 211 is electrically connected to the motherboard 100 through the first routing 223, and the second edge routing area 221 is electrically connected to the motherboard 100 through the second routing 224. Specifically, the first traces 223 and the second traces 224 are alternately arranged in the second edge trace area 221, and the second traces 224 further extend from the second edge trace area 221 to the display area AA of the second display panel 22 to be connected to the driving circuit in the display area AA of the second display panel 22.
The first edge routing area 211 is electrically connected to the first routing 223 in the second edge routing area 221 through the third conductive layer 63, and the first routing 223 is electrically connected to the control layer 10 of the motherboard 100 through the fourth conductive layer 64, so as to electrically connect the first edge routing area 211 to the motherboard 100, and further electrically connect the first display panel 21 to the motherboard 100. The second trace 224 is electrically connected to the control layer 10 of the motherboard 100 through the fourth conductive layer 64, so as to electrically connect the second edge trace area 221 to the motherboard 100, and further electrically connect the second display panel 22 to the motherboard 100.
It should be noted that, although the first trace 223 and the second trace 224 are both electrically connected to the control layer 10 through the fourth conductive layer 64, there is no electrical connection relationship between the first trace 223 and the second trace 224. The fourth conductive layer 64 may include a plurality of conductive portions insulated from each other, and the first trace 223 and the second trace 224 are electrically connected to different conductive portions, respectively, or the fourth conductive layer 64 is made of an anisotropic conductive film and is only electrically connected in a direction perpendicular to the motherboard 100. For other descriptions, please refer to the above embodiments, which are not repeated herein.
In an embodiment, please refer to fig. 1 to 6, and fig. 6 is a schematic detail structure diagram of the second edge routing area in fig. 4. Unlike the above embodiments, the second edge routing region 221 is provided with a through hole 225 penetrating through the second display panel 22, and the first edge routing region 211 is electrically connected to the motherboard 100 through the through hole 225. For other descriptions, please refer to the above embodiments, which are not repeated herein.
In an embodiment, please refer to fig. 1 to 7, and fig. 7 is a schematic cross-sectional structure diagram of a splicing screen provided in an embodiment of the present application. Different from the above embodiment, the spliced screen 1002 in this embodiment takes three display modules as an example, the first display module 201 is spliced with the second display module 202, and the second display module 202 is further spliced with the third display module 203.
Specifically, the third display module 203 includes a third display panel 23 attached to the motherboard 100 and electrically connected to the motherboard 100, a third polarizer 33 and a third touch layer 43 disposed on one side of the motherboard 100 away from the third display panel 23, and a heightening layer 71 disposed between the third display panel 23 and the motherboard 100, wherein the third touch layer 43 is attached to the cover plate 300 through a third bonding layer 53, and the third display panel 23 is attached to the motherboard 100 through the heightening layer 71. The third display module 203 and the first display module 201 are axisymmetric with respect to the second display module 202, so that the frames of the second display module 202 and the third display module 203 at the splicing position are overlapped to reduce the splicing seam at the splicing position. For other descriptions, please refer to the above embodiments, which are not repeated herein.
According to the above embodiments:
the application provides a concatenation screen is pieced together, connect the screen to include the mother board and bind a plurality of display module assembly on the mother board, it is a plurality of display module assembly splices each other, every display module assembly including attached on the mother board and with the display panel that the mother board electricity is connected, display panel includes the display area and is located the outlying marginal wiring district of display area, adjacent two the concatenation department of display module assembly, adjacent two display panel's at least part the marginal wiring district is in orthographic projection coincidence on the mother board to reduce the non-display area of the concatenation department of concatenation screen, and then reduce the concatenation seam of concatenation screen, solved the problem that there is great concatenation seam in the concatenation department of current concatenation screen.
In the foregoing embodiments, the descriptions of the respective embodiments have respective emphasis, and for parts that are not described in detail in a certain embodiment, reference may be made to related descriptions of other embodiments.
The above embodiments of the present application are described in detail, and specific examples are applied in the present application to explain the principles and implementations of the present application, and the description of the above embodiments is only used to help understand the technical solutions and core ideas of the present application; those of ordinary skill in the art will understand that: the technical solutions described in the foregoing embodiments may still be modified, or some technical features may be equivalently replaced; such modifications or substitutions do not depart from the spirit and scope of the present disclosure as defined by the appended claims.
Claims (10)
1. A tiled screen, comprising:
a motherboard;
the display module comprises a plurality of display modules, a plurality of display modules and a plurality of display modules, wherein the display modules are bound on the mother board and are spliced with one another, each display module comprises a display panel which is attached to the mother board and is electrically connected with the mother board, and each display panel comprises a display area and an edge wiring area which is positioned on the periphery of the display area;
and at the splicing position of two adjacent display modules, orthographic projections of at least part of the edge wiring areas of the two adjacent display panels on the motherboard are superposed.
2. The spliced screen of claim 1, wherein two adjacent display modules are a first display module and a second display module, the first display module comprises a first display panel, the second display module comprises a second display panel, the first display panel comprises a first edge routing area and the second display panel comprises a second edge routing area at the splicing position, and the first edge routing area is located on one side, away from the mother board, of the second edge routing area.
3. The tiled screen of claim 2, wherein the first edge routing area comprises a first sub-area and a second sub-area located on a side of the first sub-area away from the display area of the first display panel, the second edge routing area comprises a third sub-area and a fourth sub-area located on a side of the third sub-area away from the display area of the second display panel, an orthographic projection of the second sub-area on the motherboard coincides with an orthographic projection of the fourth sub-area on the motherboard, the first sub-area is electrically connected to the motherboard, and the third sub-area is electrically connected to the motherboard.
4. The tiled screen of claim 2 wherein an orthographic projection of the first edge routing region on the motherboard is coincident with an orthographic projection of the second edge routing region on the motherboard, the first edge routing region being electrically connected to the motherboard through the second edge routing region.
5. The spliced screen of claim 4, wherein the second edge routing area is provided with a first trace and a second trace that are insulated from each other, the first edge routing area is electrically connected with the motherboard through the first trace, and the second edge routing area is electrically connected with the motherboard through the second trace.
6. The spliced screen of claim 4, wherein the second edge routing region is provided with a through hole penetrating through the second display panel, and the first edge routing region is electrically connected with the motherboard through the through hole.
7. The spliced screen of any one of claims 2 to 6, further comprising a cover plate positioned on one side of the plurality of display modules away from the motherboard, wherein the first display module is attached to the cover plate through a first bonding layer, the second display module is attached to the cover plate through a second bonding layer, and the thickness of the second bonding layer is greater than that of the first bonding layer.
8. The spliced screen of claim 7, wherein the first display module further comprises a first polarizer and a first touch layer on one side of the first display panel away from the mother board, the second display module further comprises a second polarizer and a second touch layer on one side of the second display panel away from the mother board, the first touch layer is attached to the cover plate through the first bonding layer, and the second touch layer is attached to the cover plate through the second bonding layer.
9. The spliced screen of claim 8, wherein the first polarizer is flush with the outer boundary of the first edge routing region on a side adjacent to the second polarizer; one side of the second polaroid, which is close to the first polaroid, is in contact with the first polaroid.
10. The spliced screen of any one of claims 2 to 6, wherein the first display module further comprises a heightening layer positioned on one side of the first display panel close to the mother board, the heightening layer is connected to the first display panel and the mother board, a first space avoiding area is arranged on one side of the heightening layer corresponding to the first edge routing area, and the second edge routing area is positioned in the first space avoiding area.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202210612838.0A CN114863828B (en) | 2022-05-31 | 2022-05-31 | Spliced screen |
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| Application Number | Priority Date | Filing Date | Title |
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| CN202210612838.0A CN114863828B (en) | 2022-05-31 | 2022-05-31 | Spliced screen |
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| CN114863828A true CN114863828A (en) | 2022-08-05 |
| CN114863828B CN114863828B (en) | 2023-07-25 |
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Citations (13)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20070001927A1 (en) * | 2005-07-01 | 2007-01-04 | Eastman Kodak Company | Tiled display for electronic signage |
| CN101159109A (en) * | 2006-09-25 | 2008-04-09 | 三星电子株式会社 | Multi-display apparatus and method for manufacturing the same |
| CN102034873A (en) * | 2009-09-30 | 2011-04-27 | 索尼公司 | Thin film transistor and method for manufacturing the same |
| CN103985324A (en) * | 2014-05-31 | 2014-08-13 | 深圳市华星光电技术有限公司 | Flexible tiled display device |
| CN104090405A (en) * | 2014-07-02 | 2014-10-08 | 京东方科技集团股份有限公司 | Tiled display panel and display device |
| US20180090556A1 (en) * | 2016-09-27 | 2018-03-29 | Lg Display Co., Ltd. | Organic Light Emitting Display Panel and Tiling Display Device Including the Same |
| CN111323952A (en) * | 2020-03-16 | 2020-06-23 | Tcl华星光电技术有限公司 | LCD mother board |
| CN113096547A (en) * | 2021-03-31 | 2021-07-09 | 京东方科技集团股份有限公司 | Spliced screen and preparation method thereof |
| CN214449807U (en) * | 2021-02-03 | 2021-10-22 | 江苏欧帝电子科技有限公司 | Extremely narrow concatenation blackboard of liquid crystal |
| CN113990209A (en) * | 2021-10-22 | 2022-01-28 | Tcl华星光电技术有限公司 | Display module assembly and seamless splicing display device |
| CN114255651A (en) * | 2020-09-22 | 2022-03-29 | 三星显示有限公司 | Display device |
| CN114442360A (en) * | 2022-01-29 | 2022-05-06 | Tcl华星光电技术有限公司 | Display device |
| CN114488620A (en) * | 2022-03-02 | 2022-05-13 | Tcl华星光电技术有限公司 | Display panel and lamp panel |
-
2022
- 2022-05-31 CN CN202210612838.0A patent/CN114863828B/en active Active
Patent Citations (13)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20070001927A1 (en) * | 2005-07-01 | 2007-01-04 | Eastman Kodak Company | Tiled display for electronic signage |
| CN101159109A (en) * | 2006-09-25 | 2008-04-09 | 三星电子株式会社 | Multi-display apparatus and method for manufacturing the same |
| CN102034873A (en) * | 2009-09-30 | 2011-04-27 | 索尼公司 | Thin film transistor and method for manufacturing the same |
| CN103985324A (en) * | 2014-05-31 | 2014-08-13 | 深圳市华星光电技术有限公司 | Flexible tiled display device |
| CN104090405A (en) * | 2014-07-02 | 2014-10-08 | 京东方科技集团股份有限公司 | Tiled display panel and display device |
| US20180090556A1 (en) * | 2016-09-27 | 2018-03-29 | Lg Display Co., Ltd. | Organic Light Emitting Display Panel and Tiling Display Device Including the Same |
| CN111323952A (en) * | 2020-03-16 | 2020-06-23 | Tcl华星光电技术有限公司 | LCD mother board |
| CN114255651A (en) * | 2020-09-22 | 2022-03-29 | 三星显示有限公司 | Display device |
| CN214449807U (en) * | 2021-02-03 | 2021-10-22 | 江苏欧帝电子科技有限公司 | Extremely narrow concatenation blackboard of liquid crystal |
| CN113096547A (en) * | 2021-03-31 | 2021-07-09 | 京东方科技集团股份有限公司 | Spliced screen and preparation method thereof |
| CN113990209A (en) * | 2021-10-22 | 2022-01-28 | Tcl华星光电技术有限公司 | Display module assembly and seamless splicing display device |
| CN114442360A (en) * | 2022-01-29 | 2022-05-06 | Tcl华星光电技术有限公司 | Display device |
| CN114488620A (en) * | 2022-03-02 | 2022-05-13 | Tcl华星光电技术有限公司 | Display panel and lamp panel |
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| CN114863828B (en) | 2023-07-25 |
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