CN114859772A - Matching mounting device for CAN bus terminal resistor - Google Patents

Matching mounting device for CAN bus terminal resistor Download PDF

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Publication number
CN114859772A
CN114859772A CN202210344193.7A CN202210344193A CN114859772A CN 114859772 A CN114859772 A CN 114859772A CN 202210344193 A CN202210344193 A CN 202210344193A CN 114859772 A CN114859772 A CN 114859772A
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pin
bus
resistor
bit line
can1
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富弘毅
杨来
朱逸武
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Zhuzhou Jiacheng Technology Development Co ltd
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Zhuzhou Jiacheng Technology Development Co ltd
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Priority to CN202210344193.7A priority Critical patent/CN114859772A/en
Publication of CN114859772A publication Critical patent/CN114859772A/en
Priority to CN202222156081.7U priority patent/CN217954948U/en
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    • GPHYSICS
    • G05CONTROLLING; REGULATING
    • G05BCONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
    • G05B19/00Programme-control systems
    • G05B19/02Programme-control systems electric
    • G05B19/04Programme control other than numerical control, i.e. in sequence controllers or logic controllers
    • G05B19/042Programme control other than numerical control, i.e. in sequence controllers or logic controllers using digital processors
    • G05B19/0423Input/output
    • GPHYSICS
    • G05CONTROLLING; REGULATING
    • G05BCONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
    • G05B2219/00Program-control systems
    • G05B2219/20Pc systems
    • G05B2219/21Pc I-O input output
    • G05B2219/21119Circuit for signal adaption, voltage level shift, filter noise
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02PCLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
    • Y02P90/00Enabling technologies with a potential contribution to greenhouse gas [GHG] emissions mitigation
    • Y02P90/02Total factory control, e.g. smart factories, flexible manufacturing systems [FMS] or integrated manufacturing systems [IMS]

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  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Automation & Control Theory (AREA)
  • Dc Digital Transmission (AREA)

Abstract

The invention provides a matching mounting device of CAN bus terminal resistance, relating to the technical field of CAN bus terminal resistance matching, wherein a first pin and a second pin of a first pair of external connectors P1 are in short circuit, a terminal resistance is mounted and accessed between a high bit line and a low bit line of a CAN bus, a fifth pin and a sixth pin of a second pair of external connectors P2 are suspended, a central controller unit automatically acquires high level input of the fifth pin and outputs low level, a contact of a relay is under the action of low level, the first end and the second end are not closed, the terminal resistance is not accessed into the CAN bus, the fifth pin and the sixth pin of a second pair of external connectors P2 are in short circuit, the central controller unit automatically acquires low level input of the fifth pin and outputs high level, the first end and the second end of the contact of the relay are closed under the action of high level, the terminal resistance is accessed into the bus, the rapid matching mounting of the terminal resistor is ensured, and the operation is simple and convenient.

Description

Matching mounting device for CAN bus terminal resistor
Technical Field
The invention relates to the technical field of CAN bus terminal resistor matching, in particular to a matching mounting device of a CAN bus terminal resistor.
Background
The CAN bus is one of the most widely used field buses internationally, a CAN bus network is mainly hung between a CAN _ H and a CAN _ L, the properties of CAN _ H and CAN _ L levels are different, two logic states of the CAN _ H level are a high-level state and a high-resistance state, two logic states of the CAN _ L are a low-level state and a high-resistance state, and the level of the high-resistance state is uncertain.
As shown in fig. 1, the terminal resistor of the CAN bus is configured between the CAN _ H and the CAN _ L, which CAN be realized only by hardware welding, and the change CAN be realized only by dismantling, if a plurality of IO modules are networked, the outer shell needs to be dismantled hard, and the redundant terminal resistor is removed by an electric iron, so that the terminal resistor mismatch phenomenon easily occurs, and once the terminal resistor mismatch phenomenon occurs, a great amount of communication faults occur on the CAN bus, which affect the normal communication, in order to overcome the defects, the prior art discloses a device for automatically matching the terminal resistor of the CAN bus, which calculates the optimal value of the resistor of the terminal resistor connected to the CAN bus by the cooperation of a control unit and a transceiver, does not need welding and dismantling operation, saves time and labor, but mainly focuses on the selection of the terminal resistor value, and aims at the problem of matching and hanging the terminal resistor when a CAN bus host and an IO module are networked, flexible processing is not possible.
Disclosure of Invention
In order to solve the problem of terminal resistor matching mounting when a CAN bus host and an IO module are networked, the invention provides the matching mounting device of the CAN bus terminal resistor, which ensures the rapid matching mounting of the terminal resistor when the CAN bus device host and the IO module are networked, and is simple and convenient to operate.
In order to solve the technical problems, the technical scheme of the invention is as follows:
a matching mounting device of CAN bus terminal resistors comprises: the CAN bus controller comprises a first pair of external connectors P1, a host machine connected with a CAN bus, a plurality of terminal resistors connected with the CAN bus, a second pair of external connectors P2, a plurality of IO devices, a voltage source unit, a central controller unit and a relay, wherein the host machine is sequentially connected with the CAN bus along the CAN bus, the first pair of external connectors P1 are provided with a first pin and a second pin, the first pin is connected with a high-bit line CAN1_ H of the CAN bus, and the second pin is connected with a low-bit line CAN1_ L of the CAN bus; the second pair of external connectors P2 is provided with a third pin, a fourth pin, a fifth pin and a sixth pin; the third pin is respectively connected with a high-bit line CAN1_ H of the CAN bus and a first end of the relay contact, the fourth pin is respectively connected with a low-bit line CAN1_ L of the CAN bus and a second end of the relay contact, and two ends of the terminal resistor are respectively connected with a high-bit line CAN1_ H and a low-bit line CAN1_ L of the CAN bus; the fifth pin is respectively connected with the voltage source unit and the input end of the central controller unit, and the output end of the central controller unit outputs high or low level to control the on-off of the relay; the first pin is in short circuit with the second pin, the terminal resistor of the host is mounted and connected, the fifth pin and the sixth pin are suspended, the terminal resistor of the IO device is not mounted and connected, the fifth pin is in short circuit with the sixth pin, and the terminal resistor of the IO device is mounted and connected.
In the technical scheme, for the IO equipment and the host arranged on the CAN bus, considering the terminal resistance matching requirement when the IO equipment and the host are networked, the matching mounting of the terminal resistance is realized by utilizing the matching among the first pair of external connectors P1, the second pair of external connectors P2 and the central controller unit, the first pin and the second pin of the first pair of external connectors P1 are in short circuit, the terminal resistance is mounted and accessed between the high-bit line CAN1_ H of the CAN bus and the low-bit line CAN1_ L of the CAN bus, the fifth pin and the sixth pin of the second pair of external connectors P2 are suspended, the central controller unit automatically acquires the high-level input of the fifth pin and outputs the low level, the contact of the relay is disconnected corresponding to the normally closed contact under the action of the low level, the first end and the second end are not closed, the terminal resistance is not accessed to the CAN bus, the fifth pin and the sixth pin of the second pair of external connectors P2 are in short circuit, the central controller unit automatically acquires the low level input of the fifth pin and outputs the high level, the contact of the relay does not act corresponding to the normally closed contact under the action of the high level, the first end and the second end are closed, the terminal resistor is connected into the CAN bus, the rapid matching and mounting of the terminal resistor are guaranteed, and the operation is simple and convenient.
Preferably, a termination resistor R1A is connected to the high bit line CAN1_ H of the CAN bus connected to the first pin, the maximum value of the termination resistor R1A is 128 Ω, the minimum value is 116 Ω, and the nominal value is 120 Ω, and a termination resistor R2A is connected to the low bit line CAN1_ L of the CAN bus connected to the second pin, and the resistance value is 0 Ω.
Preferably, the first pin is short-circuited with the second pin, and a terminal resistor R1A and a terminal resistor R2A are connected between a high bit line CAN1_ H of the CAN bus and a low bit line CAN1_ L of the CAN bus.
The first pin and the second pin of the first pair of external connectors P1 are in short circuit, an access terminal resistor is mounted between the high bit line CAN1_ H of the CAN bus and the low bit line CAN1_ L of the CAN bus, two pins of the first pair of external connectors P1 are selected by external wiring, and whether the terminal resistor is accessed during single host access is realized by short circuit or not, so that the method is simple and convenient.
Preferably, a terminal resistor R3A with a resistance of 0 Ω is connected to a high bit line CAN1_ H of the CAN bus connected to the third pin, and a resistor R5 is connected to a line connecting the third pin and the first end of the relay contact, where the maximum value of the resistor R5 is 128 Ω, the minimum value is 116 Ω, and the nominal value is 120 Ω.
Preferably, a termination resistor R4A with a resistance of 0 Ω is connected to the low bit line CAN1_ L of the CAN bus connected to the fourth pin.
Preferably, the voltage source unit includes a resistor R6 and a power source VCC1, the fifth pin is connected to the resistor R6, the resistor R6 is connected to the power source VCC1, and the sixth pin is grounded.
Preferably, the central controller unit comprises an and gate module, a resistor R7, an optocoupler, a resistor R8 and a central processing unit CPU, the AND gate module is provided with a pin B, a pin A, a grounding pin, a power supply pin and a pin Y, the fifth pin is respectively connected with the pin B and the pin A of the AND gate module, the grounding pin is grounded, the power supply pin is connected with a power supply VCC1, the power supply VCC1 is connected with one end of a resistor R7, the other end of the resistor R7 and the pin Y are respectively connected with a first input end and a second input end of an optocoupler, the output end of the optical coupler is a phototriode, the collector electrode of the phototriode is respectively connected with one end of a resistor R8 and the input end of a Central Processing Unit (CPU), the emitter electrode of the phototriode is grounded, the other end of the resistor R8 is connected with a 3.3v voltage source, the output end of the Central Processing Unit (CPU) is connected with one end of a relay, and the other end of the relay is connected with a power supply VCC 1.
Preferably, the central processing unit CPU is an STM32 microcomputer controller. The chip circuit of the STM32 microcomputer controller has input acquisition and output functions.
Preferably, the contact of the relay further comprises a suspension end, when a fifth pin and a sixth pin of the second external-to-external connector P2 are suspended, the STM32 microcomputer controller acquires a high level input by the fifth pin, the STM32 microcomputer controller outputs a low level, the first end and the second end of the contact of the relay are not closed, the first end is connected with the suspension end, the resistor R5 is not connected, and the terminal resistor of the IO device is not connected to the CAN bus in a mounted manner.
Preferably, when the fifth pin of the second external-to-external connector P2 is short-circuited with the sixth pin, the STM32 microcomputer controller acquires the low level input by the fifth pin, the STM32 microcomputer controller outputs the high level, the first end and the second end of the relay contact are closed, the resistor R5 is connected, and the terminal resistor of the IO device is connected to the CAN bus in a mounted manner.
Compared with the prior art, the technical scheme of the invention has the beneficial effects that:
the invention provides a matching mounting device of a CAN bus terminal resistor, which realizes the matching mounting of the terminal resistor by utilizing the matching of a first pair of external connectors P1, a second pair of external connectors P2 and a central controller unit, wherein a first pin and a second pin of a first pair of external connectors P1 are in short circuit, a terminal resistor is mounted and connected between a high-bit line CAN1_ H of a CAN bus and a low-bit line CAN1_ L of the CAN bus, a fifth pin and a sixth pin of a second pair of external connectors P2 are suspended, the central controller unit automatically acquires the high-level input of the fifth pin and outputs the low level, a contact of a relay is not closed under the action of the low level, the terminal resistor is not connected to the CAN bus, the fifth pin and the sixth pin of the second pair of external connectors P2 are in short circuit, the central controller unit automatically acquires the low-level input of the fifth pin and outputs the high level, the contact of relay under the effect of high level, first end and second end are closed, and terminal resistance inserts the CAN bus, has guaranteed terminal resistance's swift matching carry, and easy operation is convenient.
Drawings
Fig. 1 is a schematic diagram illustrating a terminal resistor of a CAN bus disposed between CAN _ H and CAN _ L according to the background art of the present invention;
fig. 2 shows a CAN network formed by networking a host and a plurality of IO devices according to embodiment 1 of the present invention;
fig. 3 is a circuit configuration diagram of a matching mounting device for a CAN bus termination resistor according to embodiment 1 of the present invention;
wherein, 1-a voltage source unit; 2-central controller unit.
Detailed Description
The drawings are for illustrative purposes only and are not to be construed as limiting the patent;
for the purpose of better illustrating the embodiments, certain features of the drawings may be omitted, enlarged or reduced, and do not represent the size of an actual product;
it will be understood by those skilled in the art that certain well-known structures in the drawings and descriptions thereof may be omitted.
The technical solution of the present invention is further described below with reference to the accompanying drawings and examples.
Example 1
In the CAN network shown in fig. 2, a frame line represents a terminal resistor, and when the terminal resistor is conventionally mounted and connected or disconnected, a welding or dismounting manner is generally adopted, which is quite inflexible, and in order to solve the problem that the terminal resistor matching and mounting problem cannot be solved when the CAN bus host and the IO module are networked flexibly, the embodiment provides a matching and mounting device for the terminal resistor of the CAN bus, and a circuit structure diagram of the device is shown in fig. 3, and referring to fig. 3, the device includes: the CAN bus line comprises a first pair of external connectors P1, a host machine (an intuitive host machine is connected with the CAN bus line and CAN be seen in figure 1), a plurality of terminal resistors connected with the CAN bus line, a second pair of external connectors P2, a plurality of IO devices (an intuitive IO device is connected with the CAN bus line and CAN be seen in figure 1) sequentially connected with the CAN bus line from the host machine along the CAN bus line, a voltage source unit 1, a central controller unit 2 and a relay, see figure 3, the terminal resistors connected with the CAN bus line comprise R1A, R2A, R3A, R4A and R5, two ends of the terminal resistors are respectively connected with a high-bit line CAN1_ H and a low-bit line CAN1_ L of the CAN bus line, and for the IO devices and the host machine arranged on the CAN bus line, reasonable hanging connection of R1A, R2A, R3A, R4A and R5 is realized according to the requirement of terminal resistor matching when the IO devices and the host machine are networked.
Referring to fig. 3, the first pair of external connectors P1 is provided with a first pin and a second pin, the first pin and the second pin correspond to a label "1" and a label "2" respectively in the first pair of external connectors P1 of fig. 3, the first pin is connected to a high bit line CAN1_ H of the CAN bus, the second pin is connected to a low bit line CAN1_ L of the CAN bus, the high bit line CAN1_ H is provided with a resistor R1A connected to the first pin, and the low bit line CAN1_ L is provided with a resistor R2A connected to the second pin; the CAN bus continues to extend and is sequentially provided with intermediate IO equipment and terminal IO equipment; the second pair of external connectors P2 is provided with a third pin, a fourth pin, a fifth pin and a sixth pin; in fig. 3, the third pin, the fourth pin, the fifth pin, and the sixth pin of the second pair of external connectors P2 correspond to the "1", "2", "3", and "4" marks of the second pair of external connectors P2, the third pin is respectively connected to the high bit line CAN1_ H of the CAN bus and the first end of the relay contact, the first end is marked with "9", the fourth pin is respectively connected to the low bit line CAN1_ L of the CAN bus and the second end of the relay contact, and the second end is marked with "10"; the fifth pin is respectively connected with the input ends of the voltage source unit 1 and the central controller unit 2, and the output end of the central controller unit 2 outputs high or low level to control the on-off of the relay;
on the whole: the first pin is in short circuit with the second pin, the terminal resistor of the host is mounted and connected, the fifth pin and the sixth pin are suspended, the terminal resistor of the IO device is not mounted and connected, the fifth pin is in short circuit with the sixth pin, and the terminal resistor of the IO device is mounted and connected. The first pin and the second pin of the first pair of external connectors P1 are in short circuit, an access terminal resistor is mounted between a high-bit line CAN1_ H of a CAN bus and a low-bit line CAN1_ L of the CAN bus, a fifth pin and a sixth pin of a second pair of external connectors P2 are suspended, a central controller unit automatically acquires high-level input of the fifth pin and outputs low level, a first end and a second end of a contact of a relay are not closed under the action of the low level, the terminal resistor is not connected to the CAN bus, the fifth pin and the sixth pin of the second pair of external connectors P2 are in short circuit, the central controller unit automatically acquires low-level input of the fifth pin and outputs high level, the first end and the second end of the contact of the relay are closed under the action of the high level, and the terminal resistor is connected to the CAN bus, so that quick matching and mounting of the terminal resistor is guaranteed, and operation is simple and convenient.
For the terminal resistor R1A, the terminal resistor R1A is connected to the high-bit line CAN1_ H of the CAN bus connected to the first pin, the maximum value of the terminal resistor R1A is 128 Ω, the minimum value is 116 Ω, and the nominal value is 120 Ω, in this embodiment, R1A is 120 Ω, the terminal resistor R2A is connected to the low-bit line CAN1_ L of the CAN bus connected to the second pin, the resistance value is 0 Ω, the first pin and the second pin are shorted, and the terminal resistor R1A and the terminal resistor R2A are connected between the high-bit line CAN1_ H of the CAN bus and the low-bit line CAN1_ L of the CAN bus. Namely, the first pin and the second pin of the first pair of external connectors P1 are in short circuit, an access terminal resistor is mounted between the high bit line CAN1_ H of the CAN bus and the low bit line CAN1_ L of the CAN bus, two pins of the first pair of external connectors P1 are selected by external wiring, and whether the terminal resistor is accessed when the single host is accessed is realized by short circuit or not, so that the method is simple and convenient.
In this embodiment, a terminal resistor R3A with a resistance value of 0 Ω is connected to a high bit line CAN1_ H of the CAN bus connected to the third pin, a resistor R5 is connected to a line connecting the third pin and the first end "9" of the relay contact, a maximum value of the resistor R5 is 128 Ω, a minimum value of the resistor R5 is 116 Ω, a nominal value of the resistor R5 is 120 Ω, and a terminal resistor R4A with a resistance value of 0 Ω is connected to a low bit line CAN1_ L of the CAN bus connected to the fourth pin.
Referring to fig. 3, the voltage source unit 1 includes a resistor R6 and a power source VCC1, a fifth pin is connected to the resistor R6, a resistor R6 is connected to the power source VCC1, a sixth pin is grounded, and the resistor R6 is used as an access resistor.
The central controller unit 2 comprises an AND gate module, a resistor R7, an optical coupler, a resistor R8 and a central processing unit CPU, the AND gate module is provided with a pin B, a pin A, a grounding pin, a power supply pin and a pin Y, the fifth pin is respectively connected with the pin B and the pin A of the AND gate module, the grounding pin is grounded, the power supply pin is connected with a power supply VCC1, the power supply VCC1 is connected with one end of a resistor R7, the other end of the resistor R7 and the pin Y are respectively connected with a first input end and a second input end of the optocoupler, the output end of the optical coupler is a phototriode, the collector electrode of the phototriode is respectively connected with one end of a resistor R8 and the input end of a Central Processing Unit (CPU), the emitter electrode of the phototriode is grounded, the other end of the resistor R8 is connected with a 3.3v voltage source, the output end of the Central Processing Unit (CPU) is connected with one end of a relay, and the other end of the relay is connected with a power supply VCC 1. In this embodiment, the CPU is an STM32 microcomputer controller, and a chip circuit of the STM32 microcomputer controller has input acquisition and output functions.
Referring to fig. 3, the contact of the relay further includes a free end, in fig. 3, the contact is denoted by K1, the free end is as corresponding to K1 "3" and "5" in fig. 3, when a fifth pin and a sixth pin of the second external connector P2 are free, the STM32 microcomputer controller acquires a high level input by the fifth pin, the STM32 microcomputer controller outputs a low level, the first end and the second end of the relay contact are not closed, the first end is connected with the free end, the resistor R5 is not connected, and the terminal resistor of the IO device is not connected with the CAN bus. The high and low level input, acquisition and output of the STM32 microcomputer controller are realized by the own input and output functions of the chip circuit.
Similarly, when the fifth pin of the second external-to-external connector P2 is short-circuited with the sixth pin, the STM32 microcomputer controller acquires the low level input by the fifth pin, the STM32 microcomputer controller outputs the high level, the first end and the second end of the relay contact are closed, the resistor R5 is connected, and the terminal resistor of the IO device is connected to the CAN bus in a mounted manner.
Example 2
Based on the circuit structure diagram shown in fig. 3, the following description is made from the aspect of networking of a single host and a single IO device, where the host is a head end of a CAN network, and is selected by using a first pair of external connectors P1 and external wiring, a first pin and a second pin of a first pair of external connectors P1 are shorted, a terminal resistor R1A and a terminal resistor R2A are connected between a high bit line CAN1_ H of a CAN bus and a low bit line CAN1_ L of the CAN bus, R1A is 120 Ω, a terminal resistor R2A is 0 Ω, and the host is connected to a 120 Ω terminal resistor in a mounted manner; and when the first pin and the second pin are not short-circuited, the 120 omega terminal resistor is not mounted and connected.
The IO equipment selects whether a terminal resistor is hung or not through a wiring plug outside pins of a second pair of external connectors P2, a fifth pin and a sixth pin of a second pair of external connectors P2 are in short circuit, the fifth pin inputs a low level, a central processing unit CPU acquires the low level input by the fifth pin, the central processing unit CPU outputs a high level through self setting, a first end 9 and a second end 10 of a relay contact are closed, a resistor R5 is connected into a CAN bus, and the purpose that the terminal resistor of the IO equipment is hung and connected into the CAN bus is achieved;
the fifth pin and the sixth pin of the second external connector P2 are suspended, the fifth pin inputs high level, the CPU collects low level input by the fifth pin, the CPU outputs low level through self setting, the first end 9 and the second end 10 of the relay contact are disconnected, the first end is connected with the suspended end, the resistor R5 is disconnected, and the terminal resistor of the IO device is not suspended and connected into the CAN bus.
In the process, the mounting of the terminal resistor can be realized only by matching the external wiring of the first pair of external connectors P1 and the second pair of external connectors P2 without dismounting or welding.
Example 3
Based on the circuit structure diagram shown in fig. 3, the following description is made from the aspect of networking of a single host and a plurality of IO devices, where the host is a CAN network head end, a first pair of external connectors P1 is used, external wiring is adopted for selection, a first pin and a second pin of a first pair of external connectors P1 are shorted, a terminal resistor R1A and a terminal resistor R2A are connected between a high bit line CAN1_ H of a CAN bus and a low bit line CAN1_ L of the CAN bus, R1A is 120 Ω, the terminal resistor R2A is 0 Ω, and the host is connected with a 120 Ω terminal resistor in a mounted manner; and when the first pin and the second pin are not short-circuited, the 120 omega terminal resistor is not mounted and connected.
Whether middle IO equipment hangs terminal resistor through the wiring plug selection of second external connector P2's pin outside, the fifth pin and the sixth pin of second external connector P2 are unsettled, the high level of fifth pin input, central processing unit CPU gathers the low level of fifth pin input, through self setting, central processing unit CPU outputs the low level, the disconnection of first end "9" and second end "10" of relay contact, first end is connected with the unsettled end, resistance R5 disconnection, the terminal resistor of IO equipment does not hang the load and inserts the CAN bus.
The terminal IO equipment is in short circuit with a sixth pin through a fifth pin and a sixth pin of a second external connector P2, the fifth pin inputs a low level, a Central Processing Unit (CPU) acquires the low level input by the fifth pin, the CPU outputs a high level through self setting, a first end 9 and a second end 10 of a relay contact are closed, a resistor R5 is connected into a CAN bus, and the fact that the terminal resistor of the IO equipment is mounted and connected into the CAN bus is achieved;
in the process, the mounting of the terminal resistor can be realized only by matching the external wiring of the first pair of external connectors P1 and the second pair of external connectors P2 without dismounting or welding.
It should be understood that the above-described embodiments of the present invention are merely examples for clearly illustrating the present invention, and are not intended to limit the embodiments of the present invention. Other variations and modifications will be apparent to persons skilled in the art in light of the above description. This need not be, nor should it be exhaustive of all embodiments. Any modification, equivalent replacement, and improvement made within the spirit and principle of the present invention should be included in the protection scope of the claims of the present invention.

Claims (10)

1. The utility model provides a matching mount device of CAN bus termination resistance which characterized in that includes: the CAN bus controller comprises a first pair of external connectors P1, a host machine connected with a CAN bus, a plurality of terminal resistors connected with the CAN bus, a second pair of external connectors P2, a plurality of IO devices, a voltage source unit, a central controller unit and a relay, wherein the host machine is sequentially connected with the CAN bus along the CAN bus, the first pair of external connectors P1 are provided with a first pin and a second pin, the first pin is connected with a high-bit line CAN1_ H of the CAN bus, and the second pin is connected with a low-bit line CAN1_ L of the CAN bus; the second pair of external connectors P2 is provided with a third pin, a fourth pin, a fifth pin and a sixth pin; the third pin is respectively connected with a high-bit line CAN1_ H of the CAN bus and a first end of the relay contact, the fourth pin is respectively connected with a low-bit line CAN1_ L of the CAN bus and a second end of the relay contact, and two ends of the terminal resistor are respectively connected with a high-bit line CAN1_ H and a low-bit line CAN1_ L of the CAN bus; the fifth pin is respectively connected with the voltage source unit and the input end of the central controller unit, and the output end of the central controller unit outputs high or low level to control the on-off of the relay; the first pin is in short circuit with the second pin, the terminal resistor of the host is mounted and connected, the fifth pin and the sixth pin are suspended, the terminal resistor of the IO device is not mounted and connected, the fifth pin is in short circuit with the sixth pin, and the terminal resistor of the IO device is mounted and connected.
2. The device of claim 1, wherein a termination resistor R1A is connected to a high-side CAN1_ H of the CAN bus connected to the first pin, wherein the termination resistor R1A has a maximum value of 128 Ω, a minimum value of 116 Ω and a nominal value of 120 Ω, and wherein a termination resistor R2A is connected to a low-side CAN1_ L of the CAN bus connected to the second pin, and wherein the resistance value is 0 Ω.
3. The device of claim 2, wherein the first pin is shorted to the second pin, and a termination resistor R1A and a termination resistor R2A are connected between a high bit line CAN1_ H of the CAN bus and a low bit line CAN1_ L of the CAN bus.
4. The device of claim 3, wherein a termination resistor R3A, having a resistance of 0 Ω, is connected to a high-side line CAN1_ H of the CAN bus connected to the third pin, and a resistor R5 is connected to a line connecting the third pin to the first end of the relay contact, wherein the resistor R5 has a maximum value of 128 Ω, a minimum value of 116 Ω and a nominal value of 120 Ω.
5. The device of claim 4, wherein a termination resistor R4A with a resistance of 0 Ω is connected to the lower CAN1_ L of the CAN bus connected to the fourth pin.
6. The device of claim 5, wherein the voltage source unit comprises a resistor R6 and a power source VCC1, the fifth pin is connected to a resistor R6, the resistor R6 is connected to a power source VCC1, and the sixth pin is grounded.
7. The device of claim 6, wherein the central controller unit comprises an AND gate module, a resistor R7, an optical coupler, a resistor R8 and a central processing unit CPU, the AND gate module is provided with a pin B, a pin A, a ground pin, a power pin and a pin Y, a fifth pin is respectively connected with the pin B and the pin A of the AND gate module, the ground pin is grounded, the power pin is connected with a power VCC1, the power VCC1 is connected with one end of the resistor R7, the other end of the resistor R7 and the pin Y are respectively connected with a first input end and a second input end of the optical coupler, the output end of the optical coupler is a phototriode, the collector of the phototriode is respectively connected with one end of the resistor R8 and the input end of the central processing unit CPU, the emitter of the phototriode is grounded, the other end of the resistor R8 is connected with a 3.3v voltage source, the output end of the CPU is connected with one end of a relay, and the other end of the relay is connected with a power supply VCC 1.
8. The device of claim 7 wherein the CPU is an STM32 microcomputer controller.
9. The device of claim 8, wherein the relay contacts further comprise a free end, when the fifth pin and the sixth pin of the second external-to-external connector P2 are free, the STM32 microcomputer controller collects a high level input by the fifth pin, the STM32 microcomputer controller outputs a low level, the first end and the second end of the relay contacts are not closed, the first end is connected with the free end, the resistor R5 is not connected, and the terminal resistor of the IO device is not connected to the CAN bus.
10. The device of claim 9, wherein when the fifth pin of the second external connector P2 is short-circuited with the sixth pin, the STM32 microcomputer controller acquires a low level input from the fifth pin, the STM32 microcomputer controller outputs a high level, the first end and the second end of the relay contact are closed, the resistor R5 is connected, and the terminal resistor of the IO device is connected to the CAN bus.
CN202210344193.7A 2022-04-02 2022-04-02 Matching mounting device for CAN bus terminal resistor Pending CN114859772A (en)

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN115996156A (en) * 2023-03-21 2023-04-21 国仪量子(合肥)技术有限公司 Bus network system and impedance matching method thereof

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN115996156A (en) * 2023-03-21 2023-04-21 国仪量子(合肥)技术有限公司 Bus network system and impedance matching method thereof
CN115996156B (en) * 2023-03-21 2023-06-06 国仪量子(合肥)技术有限公司 Bus network system and impedance matching method thereof

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Application publication date: 20220805