CN114839551A - SOC precision verification method, device and equipment and readable storage medium - Google Patents

SOC precision verification method, device and equipment and readable storage medium Download PDF

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CN114839551A
CN114839551A CN202210604841.8A CN202210604841A CN114839551A CN 114839551 A CN114839551 A CN 114839551A CN 202210604841 A CN202210604841 A CN 202210604841A CN 114839551 A CN114839551 A CN 114839551A
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value
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曹辉
陈英旗
侯敏
沈成宇
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Rept Battero Energy Co Ltd
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    • G—PHYSICS
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    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/36—Arrangements for testing, measuring or monitoring the electrical condition of accumulators or electric batteries, e.g. capacity or state of charge [SoC]
    • G01R31/385—Arrangements for measuring battery or accumulator variables
    • G01R31/387—Determining ampere-hour charge capacity or SoC
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/36—Arrangements for testing, measuring or monitoring the electrical condition of accumulators or electric batteries, e.g. capacity or state of charge [SoC]
    • G01R31/367—Software therefor, e.g. for battery testing using modelling or look-up tables
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/36—Arrangements for testing, measuring or monitoring the electrical condition of accumulators or electric batteries, e.g. capacity or state of charge [SoC]
    • G01R31/385—Arrangements for measuring battery or accumulator variables
    • G01R31/387—Determining ampere-hour charge capacity or SoC
    • G01R31/388—Determining ampere-hour charge capacity or SoC involving voltage measurements
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Abstract

The application relates to a method, a device, equipment and a readable storage medium for verifying SOC (system on chip) precision, relating to the technical field of battery management systems, and comprising the steps that an SOC integration model of hardware in a loop test system calculates and outputs a first SOC value based on a test current value, and a battery model of the hardware in the loop test system calculates and outputs a voltage value based on the first SOC value and the test current value; calculating and outputting a second SOC value by using an SOC algorithm to be tested in the battery management system to be tested based on the voltage value; and verifying the SOC precision of the SOC algorithm to be tested according to the first SOC value and the second SOC value. According to the method and the device, the SOC accuracy of the SOC algorithm to be tested is verified through the first SOC value output by the SOC integral model and the battery model and the second SOC value output by the SOC algorithm to be tested, the battery pack testing is not needed, the problem that the battery core is overcharged or overdischarged due to the defects of the SOC algorithm can be avoided, the testing safety is improved, and the risk that the battery pack is damaged is reduced.

Description

SOC precision verification method, device and equipment and readable storage medium
Technical Field
The present disclosure relates to the field of battery management systems, and in particular, to a method, an apparatus, a device and a readable storage medium for verifying SOC accuracy.
Background
A BMS (Battery Management System) is a System for intelligently managing and maintaining respective Battery cells, preventing overcharge and overdischarge of the Battery, extending the life span of the Battery, and monitoring the state of the Battery. Among them, SOC (State of charge) algorithm is one of the key technologies for BMS development and application, and people are continuously perfecting and improving SOC algorithm, so that SOC accuracy of newly developed or improved SOC algorithm needs to be verified to ensure accuracy of SOC algorithm.
In the related art, a newly developed or improved SOC algorithm is usually directly loaded on a BMS to perform a battery pack test to verify the SOC accuracy, and although the method is intuitive in effect, the risk of overcharge or overdischarge of a battery core caused by the algorithm defect exists, so that irreversible damage is caused to the battery pack, and the test safety is affected.
Disclosure of Invention
The application provides a method, a device and equipment for verifying SOC (system on chip) precision and a readable storage medium, which are used for solving the problem that in the related art, a battery pack has a risk of being damaged due to the fact that an improved SOC algorithm is directly loaded on a BMS (battery management system) to be tested to verify the SOC precision.
In a first aspect, a method for verifying SOC accuracy is provided, which includes the following steps:
inputting a test current value into a hardware-in-loop test system so that an SOC integration model of the hardware-in-loop test system can calculate and output a first SOC value based on the test current value, and a battery model of the hardware-in-loop test system can calculate and output a voltage value based on the first SOC value and the test current value;
inputting the voltage value to a battery management system to be tested so that a SOC algorithm to be tested in the battery management system to be tested can calculate and output a second SOC value based on the voltage value;
and verifying the SOC precision of the SOC algorithm to be tested according to the first SOC value and the second SOC value.
In some embodiments, the hardware SOC integration model in the loop test system calculates an output first SOC value based on the test current value, including:
substituting the test current value into a first calculation formula by an SOC integration model of the hardware in the loop test system to obtain a first SOC value, wherein the first calculation formula is as follows:
Figure BDA0003670301700000021
in the formula, SOC model A first SOC value, SOC, calculated for the SOC integration model Init To test the initial SOC value, I is the test current value, C cap The rated capacity of the battery.
In some embodiments, the verifying the SOC accuracy of the SOC algorithm under test according to the first SOC value and the second SOC value includes:
when the difference value between the first SOC value and the second SOC value is smaller than or equal to a preset threshold value, the SOC precision of the SOC algorithm to be tested meets the requirement;
and when the difference value between the first SOC value and the second SOC value is larger than a preset threshold value, the SOC precision of the SOC algorithm to be tested is not in line with the requirement.
In some embodiments, before the step of inputting the test current value to the hardware-in-the-loop test system, the method further comprises:
and updating the testing working conditions in the preset simulated working condition input document, wherein the testing working conditions comprise testing time and testing current values corresponding to the testing time.
In a second aspect, there is provided an SOC accuracy verification apparatus, including:
the first processing unit is used for inputting a test current value to the hardware-in-loop test system so that an SOC integration model in the hardware-in-loop test system can calculate and output a first SOC value based on the test current value, and a battery model in the hardware-in-loop test system can calculate and output a voltage value based on the first SOC value and the test current value;
the second processing unit is used for inputting the voltage value to a battery management system to be tested so that a SOC algorithm to be tested in the battery management system to be tested can calculate and output a second SOC value based on the voltage value;
and the precision verification unit is used for verifying the SOC precision of the SOC algorithm to be tested according to the first SOC value and the second SOC value.
In some embodiments, the SOC integration model of the hardware in the loop test system is used to substitute the test current value into a first calculation formula to obtain a first SOC value, where the first calculation formula is:
Figure BDA0003670301700000031
in the formula, SOC model A first SOC value, SOC, calculated for the SOC integration model Init To test the initial SOC value, I is the test current value, C cap The rated capacity of the battery.
In some embodiments, the precision verification unit is specifically configured to:
when the difference value between the first SOC value and the second SOC value is smaller than or equal to a preset threshold value, the SOC precision of the SOC algorithm to be tested meets the requirement;
and when the difference value between the first SOC value and the second SOC value is larger than a preset threshold value, the SOC precision of the SOC algorithm to be tested is not in line with the requirement.
In some embodiments, the first processing unit is further configured to:
and updating the testing working conditions in the preset simulated working condition input document, wherein the testing working conditions comprise testing time and testing current values corresponding to the testing time.
In a third aspect, there is provided an SOC accuracy verification apparatus including: the system comprises a memory and a processor, wherein at least one instruction is stored in the memory, and is loaded and executed by the processor to realize the SOC precision verification method.
In a fourth aspect, a computer-readable storage medium is provided, which stores a computer program that, when executed by a processor, implements the aforementioned SOC accuracy verification method.
The beneficial effect that technical scheme that this application provided brought includes: the test safety can be effectively improved, and the risk of damaging the battery pack is reduced.
The application provides a method, a device, equipment and a readable storage medium for verifying SOC (system on chip) precision, which comprises the steps of inputting a test current value into a hardware-in-loop test system so that an SOC integration model of the hardware-in-loop test system can calculate and output a first SOC value based on the test current value, and a battery model of the hardware-in-loop test system can calculate and output a voltage value based on the first SOC value and the test current value; inputting the voltage value to a battery management system to be tested so that a SOC algorithm to be tested in the battery management system to be tested can calculate and output a second SOC value based on the voltage value; and verifying the SOC precision of the SOC algorithm to be tested according to the first SOC value and the second SOC value. According to the method and the device, the SOC precision of the SOC algorithm to be tested is verified through the first SOC value output by the SOC integral model and the battery model and the second SOC value output by the SOC algorithm to be tested in the battery management system to be tested, the battery pack test is not needed, the problem that the battery cell is overcharged or overdischarged due to the defect of the SOC algorithm can be avoided, the test safety is improved, and the risk that the battery pack is damaged is effectively reduced.
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In order to more clearly illustrate the technical solutions in the embodiments of the present application, the drawings needed to be used in the description of the embodiments are briefly introduced below, and it is obvious that the drawings in the following description are only some embodiments of the present application, and it is obvious for those skilled in the art to obtain other drawings based on these drawings without creative efforts.
Fig. 1 is a schematic flowchart of a method for verifying SOC accuracy according to an embodiment of the present disclosure;
fig. 2 is a schematic structural diagram of an SOC precision verification apparatus provided in an embodiment of the present application;
fig. 3 is a schematic structural diagram of an SOC precision verification device according to an embodiment of the present application.
Detailed Description
In order to make the objects, technical solutions and advantages of the embodiments of the present application clearer, the technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application, and it is obvious that the described embodiments are some embodiments of the present application, but not all embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present application.
The embodiment of the application provides a method, a device and equipment for verifying SOC (system on chip) precision and a readable storage medium, which can solve the problem that in the related art, an improved SOC algorithm is directly loaded on a BMS (battery management system) to perform a battery pack test to verify the SOC precision of the battery pack, so that the battery pack has a risk of being damaged.
Fig. 1 is a SOC precision verification method provided in an embodiment of the present application, including the following steps:
step S10: inputting a test current value into a hardware-in-loop test system so that an SOC integration model of the hardware-in-loop test system can calculate and output a first SOC value based on the test current value, and a battery model of the hardware-in-loop test system can calculate and output a voltage value based on the first SOC value and the test current value;
exemplarily, in the embodiment, the test current value may be preset by a tester according to an actual test requirement before performing SOC precision verification; when the hardware-in-loop (HIL) test system needs to carry out SOC precision verification of the SOC algorithm to be tested, the test current value can be read by running a Python test script or other test scripts, and at the moment, the hardware-in-loop test system outputs the test current value to an SOC integration model and a battery model inside the hardware-in-loop test system; further, the SOC integration model can calculate and output a first SOC value based on the test current value, the first SOC value is a real SOC value and can be used for verifying the SOC precision of the SOC algorithm to be tested, and the first SOC value is input into the battery model; at this time, the voltage value in the battery model will change along with the change of the first SOC value and the test current value, that is, the voltage value output by the battery model will change according to the OCV-SOC curve and the polarization curve of the cell voltage affected by the current loaded by the model, so the battery model can calculate the output voltage value based on the first SOC value and the test current value. The battery model may be a first-order RC equivalent circuit model of the lithium battery, or may be other general models capable of realizing voltage value calculation, which is not limited herein.
Further, before the step of inputting the test current value to the hardware-in-loop test system, the method further includes:
and updating the testing working conditions in the preset simulated working condition input document, wherein the testing working conditions comprise testing time and testing current values corresponding to the testing time.
Exemplarily, in the embodiment, the test condition sent by the tester may be received, and the corresponding test condition may be added to the simulated condition input document, where the test condition may include test time, test current values at different test times, a test start SOC value, a test end SOC value, and the like. When the hardware runs the python test script on the upper computer of the ring test system, the test current value in the simulation working condition input document can be read, and the test current value is output to the SOC integration model and the battery model of the hardware in the ring test system.
Further, the SOC integration model of the hardware in the loop test system calculates an output first SOC value based on the test current value, including:
substituting the test current value into a first calculation formula by an SOC integration model of the hardware in the loop test system to obtain a first SOC value, wherein the first calculation formula is as follows:
Figure BDA0003670301700000061
in the formula, SOC model A first SOC value, SOC, calculated for the SOC integration model Init To test the initial SOCValue, I is the test current value, C cap The rated capacity of the battery.
In an exemplary embodiment, when the SOC integration model receives the test current value, the test is performed according to the test current value, and the first SOC value is calculated according to the test current value, the test start SOC value, and the battery rated capacity. Specifically, the test current value, the test starting SOC value and the battery rated capacity are substituted into a first calculation formula to obtain a first SOC value, where the first calculation formula is:
Figure BDA0003670301700000062
in the formula, SOC model A first SOC value, SOC, calculated for the SOC integration model Init To test the initial SOC value, I is the test current value, C cap The rated capacity of the battery.
It should be noted that the above is only an illustrative description of the first calculation formula, and the first SOC value may be calculated by other formulas on the basis of the test current value, the test starting SOC value, and the battery rated capacity.
Step S20: inputting the voltage value to a battery management system to be tested so that a SOC algorithm to be tested in the battery management system to be tested can calculate and output a second SOC value based on the voltage value;
exemplarily, in this embodiment, after the voltage value is calculated by the battery model, the voltage value is input to the battery management system to be tested, the battery management system to be tested starts a test based on the voltage value, meanwhile, the SOC algorithm to be tested in the battery management system to be tested performs calculation of a second SOC value based on the voltage value, when the second SOC value meets a test completion SCO value condition or a test time reaches a set time, the test is stopped, and the second SOC value is output, where the second SOC value is a real SOC value calculated by the SOC algorithm to be tested.
Step S30: and verifying the SOC precision of the SOC algorithm to be tested according to the first SOC value and the second SOC value.
Further, the verifying the SOC accuracy of the SOC algorithm to be tested according to the first SOC value and the second SOC value includes:
when the difference value between the first SOC value and the second SOC value is smaller than or equal to a preset threshold value, the SOC precision of the SOC algorithm to be tested meets the requirement;
and when the difference value between the first SOC value and the second SOC value is larger than a preset threshold value, the SOC precision of the SOC algorithm to be tested is not in line with the requirement.
In an exemplary embodiment, once the first SOC value output by the hardware-in-the-loop test system and the second SOC value output by the battery management system to be tested are received, the first SOC value and the second SOC value are compared to achieve the purpose of verifying the SOC accuracy: when the difference value between the first SOC value and the second SOC value is smaller than or equal to a preset threshold value, the SOC precision of the SOC algorithm to be tested is in accordance with the requirement, and when the difference value between the first SOC value and the second SOC value is larger than the preset threshold value, the SOC precision of the SOC algorithm to be tested is not in accordance with the requirement. The size of the preset threshold may be specifically set according to actual needs, and is not limited herein.
Therefore, in the embodiment, the SOC accuracy of the SOC algorithm to be tested is verified through the SOC integration model, the first SOC value output by the battery model and the second SOC value output by the SOC algorithm to be tested in the battery management system to be tested, the battery pack test is not required, the problem of overcharge or overdischarge of the battery core caused by the defect of the SOC algorithm can be avoided, the test safety is improved, and the risk of damage to the battery pack is effectively reduced; in addition, the hardware-in-loop test system is adopted to simulate actual current and automatically output analog quantity to test the actual precision of the SOC algorithm to be tested in the BMS, so that the safety is improved, the algorithm development process is shortened, the test time can be effectively shortened, the labor consumption can be reduced, and the output of wrong analog quantity caused by human errors can be prevented.
Referring to fig. 2, an embodiment of the present application further provides an SOC accuracy verification apparatus, including:
the first processing unit is used for inputting a test current value to the hardware-in-loop test system so that an SOC integration model in the hardware-in-loop test system can calculate and output a first SOC value based on the test current value, and a battery model in the hardware-in-loop test system can calculate and output a voltage value based on the first SOC value and the test current value;
the second processing unit is used for inputting the voltage value to a battery management system to be tested so that a SOC algorithm to be tested in the battery management system to be tested can calculate and output a second SOC value based on the voltage value;
and the precision verification unit is used for verifying the SOC precision of the SOC algorithm to be tested according to the first SOC value and the second SOC value.
In the embodiment, the SOC accuracy of the SOC algorithm to be tested is verified through the SOC integration model, the first SOC value output by the battery model and the second SOC value output by the SOC algorithm to be tested in the battery management system to be tested, a battery pack test is not needed, the problem of overcharge or overdischarge of a battery core caused by SOC algorithm defects can be avoided, the test safety is improved, and the risk of damage to the battery pack is effectively reduced; in addition, the hardware-in-loop test system is adopted to simulate actual current and automatically output analog quantity, so that the test time can be effectively shortened, the labor consumption can be reduced, and the output of wrong analog quantity caused by human errors can be prevented.
Further, in this embodiment, an SOC integration model of the hardware in the loop test system is used to substitute the test current value into a first calculation formula to obtain a first SOC value, where the first calculation formula is:
Figure BDA0003670301700000091
in the formula, SOC model A first SOC value, SOC, calculated for the SOC integration model Init To test the initial SOC value, I is the test current value, C cap The rated capacity of the battery.
Further, in this embodiment, the precision verification unit is specifically configured to:
when the difference value between the first SOC value and the second SOC value is smaller than or equal to a preset threshold value, the SOC precision of the SOC algorithm to be tested meets the requirement;
and when the difference value between the first SOC value and the second SOC value is larger than a preset threshold value, the SOC precision of the SOC algorithm to be tested is not in line with the requirement.
Further, in this embodiment, the first processing unit is further configured to:
and updating the testing working conditions in the preset simulated working condition input document, wherein the testing working conditions comprise testing time and testing current values corresponding to the testing time.
It should be clearly understood by those skilled in the art that, for convenience and brevity of description, the specific working processes of the apparatus and the units described above may refer to the corresponding processes in the foregoing embodiment of the SOC precision verification method, and are not described herein again.
The apparatus provided by the above-described embodiment may be implemented in the form of a computer program that can be run on the SOC accuracy verification device as shown in fig. 3.
An embodiment of the present application further provides an SOC accuracy verification apparatus, including: the system comprises a memory, a processor and a network interface which are connected through a system bus, wherein at least one instruction is stored in the memory, and the at least one instruction is loaded and executed by the processor so as to realize all steps or partial steps of the SOC precision verification method.
The network interface is used for performing network communication, such as sending distributed tasks. Those skilled in the art will appreciate that the architecture shown in fig. 3 is merely a block diagram of some of the structures associated with the disclosed aspects and is not intended to limit the computing devices to which the disclosed aspects apply, as particular computing devices may include more or less components than those shown, or may combine certain components, or have a different arrangement of components.
The Processor may be a CPU, other general purpose Processor, a Digital Signal Processor (DSP), an Application Specific Integrated Circuit (ASIC), a Field Programmable Gate Array (FPGA) or other programmable logic device, discrete gate or transistor logic device discrete hardware components, etc. The general purpose processor may be a microprocessor or the processor may be any conventional processor or the like, the processor being the control center of the computer device and the various interfaces and lines connecting the various parts of the overall computer device.
The memory may be used to store computer programs and/or modules, and the processor may implement various functions of the computer device by executing or executing the computer programs and/or modules stored in the memory, as well as by invoking data stored in the memory. The memory may mainly include a storage program area and a storage data area, wherein the storage program area may store an operating system, an application program required by at least one function (such as a video playing function, an image playing function, etc.), and the like; the storage data area may store data (such as video data, image data, etc.) created according to the use of the cellular phone, etc. Further, the memory may include high speed random access memory, and may also include non-volatile memory, such as a hard disk, a memory, a plug-in hard disk, a smart memory card, a secure digital card, a flash memory card, at least one magnetic disk storage device, a flash memory device, or other volatile solid state storage device.
The embodiment of the present application further provides a computer-readable storage medium, on which a computer program is stored, and when the computer program is executed by a processor, all or part of the steps of the foregoing SOC precision verification method are implemented.
The embodiments of the present application may implement all or part of the foregoing processes, or may be implemented by a computer program to instruct related hardware, where the computer program may be stored in a computer-readable storage medium, and when the computer program is executed by a processor, the computer program may implement the steps of the foregoing methods. Wherein the computer program comprises computer program code, which may be in the form of source code, object code, an executable file or some intermediate form, etc. The computer readable medium may include: any entity or device capable of carrying computer program code, recording medium, U-disk, removable hard disk, magnetic disk, optical disk, computer memory, Read-Only memory (ROM), Random Access Memory (RAM), electrical carrier wave signals, telecommunications signals, software distribution media, and the like. It should be noted that the computer readable medium may contain other components which may be suitably increased or decreased as required by legislation and patent practice in jurisdictions, for example, in some jurisdictions, in accordance with legislation and patent practice, the computer readable medium does not include electrical carrier signals and telecommunications signals.
As will be appreciated by one skilled in the art, embodiments of the present application may be provided as a method, system, server, or computer program product. Accordingly, the present application may take the form of an entirely hardware embodiment, an entirely software embodiment or an embodiment combining software and hardware aspects. Furthermore, the present application may take the form of a computer program product embodied on one or more computer-usable storage media (including, but not limited to, disk storage, optical storage, and the like) having computer-usable program code embodied therein.
The present application is described with reference to flowchart illustrations and/or block diagrams of methods, apparatus (systems) and computer program products according to embodiments of the application. It will be understood that each flow and/or block of the flow diagrams and/or block diagrams, and combinations of flows and/or blocks in the flow diagrams and/or block diagrams, can be implemented by computer program instructions. These computer program instructions may be provided to a processor of a general purpose computer, special purpose computer, embedded processor, or other programmable data processing apparatus to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing apparatus, create means for implementing the functions specified in the flowchart flow or flows and/or block diagram block or blocks.
It should be noted that, in this document, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or system that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or system. Without further limitation, an element defined by the phrase "comprising an … …" does not exclude the presence of other like elements in a process, method, article, or system that comprises the element.
The above description is merely exemplary of the present application and is presented to enable those skilled in the art to understand and practice the present application. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the generic principles defined herein may be applied to other embodiments without departing from the spirit or scope of the application. Thus, the present application is not intended to be limited to the embodiments shown herein but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.

Claims (10)

1. An SOC accuracy verification method is characterized by comprising the following steps:
inputting a test current value into a hardware-in-loop test system so that an SOC integration model of the hardware-in-loop test system can calculate and output a first SOC value based on the test current value, and a battery model of the hardware-in-loop test system can calculate and output a voltage value based on the first SOC value and the test current value;
inputting the voltage value to a battery management system to be tested so that a SOC algorithm to be tested in the battery management system to be tested can calculate and output a second SOC value based on the voltage value;
and verifying the SOC precision of the SOC algorithm to be tested according to the first SOC value and the second SOC value.
2. The SOC accuracy verification method of claim 1, wherein the hardware SOC integration model in a loop test system computing an output first SOC value based on the test current value comprises:
substituting the test current value into a first calculation formula by an SOC integration model of the hardware in the loop test system to obtain a first SOC value, wherein the first calculation formula is as follows:
Figure FDA0003670301690000011
in the formula, SOC model A first SOC value, SOC, calculated for the SOC integration model Init To test the initial SOC value, I is the test current value, C cap The rated capacity of the battery.
3. The method for verifying SOC accuracy of claim 1, wherein the verifying SOC accuracy of the SOC algorithm under test based on the first SOC value and the second SOC value comprises:
when the difference value between the first SOC value and the second SOC value is smaller than or equal to a preset threshold value, the SOC precision of the SOC algorithm to be tested meets the requirement;
and when the difference value between the first SOC value and the second SOC value is larger than a preset threshold value, the SOC precision of the SOC algorithm to be tested is not in line with the requirement.
4. The SOC accuracy verification method of claim 1, further comprising, prior to the step of inputting the test current value to the hardware-in-the-loop test system:
and updating the testing working conditions in the preset simulated working condition input document, wherein the testing working conditions comprise testing time and testing current values corresponding to the testing time.
5. An SOC accuracy verification apparatus, comprising:
the first processing unit is used for inputting a test current value to the hardware-in-loop test system so that an SOC integration model in the hardware-in-loop test system can calculate and output a first SOC value based on the test current value, and a battery model in the hardware-in-loop test system can calculate and output a voltage value based on the first SOC value and the test current value;
the second processing unit is used for inputting the voltage value to a battery management system to be tested so that a SOC algorithm to be tested in the battery management system to be tested can calculate and output a second SOC value based on the voltage value;
and the precision verification unit is used for verifying the SOC precision of the SOC algorithm to be tested according to the first SOC value and the second SOC value.
6. The SOC accuracy verification apparatus according to claim 5, wherein:
and the SOC integration model of the hardware in the loop test system is used for substituting the test current value into a first calculation formula to obtain a first SOC value, wherein the first calculation formula is as follows:
Figure FDA0003670301690000021
in the formula, SOC model A first SOC value, SOC, calculated for the SOC integration model Init To test the initial SOC value, I is the test current value, C cap The rated capacity of the battery.
7. The SOC accuracy verification apparatus of claim 5, wherein the accuracy verification unit is specifically configured to:
when the difference value between the first SOC value and the second SOC value is smaller than or equal to a preset threshold value, the SOC precision of the SOC algorithm to be tested meets the requirement;
and when the difference value between the first SOC value and the second SOC value is larger than a preset threshold value, the SOC precision of the SOC algorithm to be tested is not in line with the requirement.
8. The SOC accuracy verification apparatus of claim 5, wherein the first processing unit is further configured to:
and updating the testing working conditions in the preset simulated working condition input document, wherein the testing working conditions comprise testing time and testing current values corresponding to the testing time.
9. An SOC accuracy verification apparatus, comprising: a memory and a processor, the memory having stored therein at least one instruction that is loaded and executed by the processor to implement the SOC accuracy verification method of any of claims 1-4.
10. A computer-readable storage medium characterized by: the computer storage medium stores a computer program that, when executed by a processor, implements the SOC accuracy verification method of any one of claims 1 to 4.
CN202210604841.8A 2022-05-30 2022-05-30 SOC precision verification method, device and equipment and readable storage medium Pending CN114839551A (en)

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