CN114822416A

CN114822416A - Driving method, driving device, terminal device and storage medium

Info

Publication number: CN114822416A
Application number: CN202110129455.3A
Authority: CN
Inventors: 不公告发明人
Original assignee: Beijing Xiaomi Mobile Software Co Ltd
Current assignee: Beijing Xiaomi Mobile Software Co Ltd
Priority date: 2021-01-29
Filing date: 2021-01-29
Publication date: 2022-07-29
Anticipated expiration: 2041-01-29
Also published as: CN114822416B

Abstract

The present disclosure relates to a driving method, a driving apparatus, a terminal device, and a storage medium. The driving method is applied to a pixel driving circuit, a driving thin film transistor of the pixel driving circuit is a double-gate thin film transistor, and the double-gate thin film transistor comprises a bottom gate and a top gate. The driving method comprises the following steps: the data voltage input to the pixel driving circuit is divided into a plurality of voltage interval ranges according to the voltage. For each voltage interval range of the plurality of voltage interval ranges, a bottom gate voltage is respectively determined that matches the voltage interval range. And applying bottom gate voltage matched with the range of the current voltage interval to the bottom gate of the double-gate thin film transistor based on the range of the current voltage interval. By the driving method provided by the disclosure, the threshold voltage of the pixel driving circuit can be adjusted, a circuit control mode can be adopted, the output voltage accuracy of the pixel driving circuit is improved, and the low gray-scale mura phenomenon can be effectively improved.

Description

Driving method, driving device, terminal device and storage medium

Technical Field

The present disclosure relates to the field of display driving technologies, and in particular, to a driving method, a driving apparatus, a terminal device, and a storage medium.

Background

An Active-matrix organic light-emitting diode (AMOLED) has the technical advantages of high contrast, high color gamut and flexibility, and is widely applied to terminal products such as mobile phones and Televisions (TVs). The AMOLED needs a driving (driver) Thin Film Transistor (TFT) to serve as a voltage-controlled pixel driving current to drive a display screen for displaying.

However, when the driver TFT has non-uniform electrical characteristics during the manufacturing process, the driving circuit may input the same data voltage but output current non-uniform, and then a brightness difference phenomenon, i.e. mura phenomenon, may occur after the screen is lit. In the related art, in order to improve the low gray-scale mura phenomenon, a process adjustment mode is used to increase the sub-threshold swing (SS) by degrading the interface characteristics of the driver TFT, so as to offset the influence caused by the electrical difference. However, this adjustment method is likely to affect the stability of the driver TFT.

Disclosure of Invention

In order to improve the accuracy of the output voltage of a pixel driving circuit without deteriorating the interface characteristics of a driver TFT, the present disclosure provides a driving method, a driving apparatus, a terminal device, and a storage medium.

According to a first aspect of the embodiments of the present disclosure, there is provided a driving method applied to a pixel driving circuit, where a driving thin film transistor of the pixel driving circuit is a dual-gate thin film transistor, the dual-gate thin film transistor includes a bottom gate and a top gate, and the driving method includes: and dividing the data voltage input into the pixel driving circuit into a plurality of voltage interval ranges according to the voltage. For each voltage interval range of the plurality of voltage interval ranges, a bottom gate voltage is respectively determined that matches the voltage interval range. And applying bottom gate voltage matched with the range of the current voltage interval to the bottom gate of the double-gate thin film transistor based on the range of the current voltage interval.

In an embodiment, the determining, for each voltage interval range of the plurality of voltage interval ranges, a bottom gate voltage that matches the voltage interval range separately comprises: and responding to the brightness gray scale value displayed by the data voltage driving pixel corresponding to a first gray scale stage, and determining the bottom gate voltage with the voltage lower than the data voltage in the voltage interval range corresponding to the first gray scale stage as the bottom gate voltage matched with the voltage interval range. And responding to the brightness gray scale value displayed by the data voltage driving pixel to correspond to a second gray scale stage, and determining the bottom gate voltage higher than the data voltage in the voltage interval range corresponding to the second gray scale stage as the bottom gate voltage matched with the voltage interval range. The data voltage in the voltage interval range corresponding to the first gray scale stage is higher than the data voltage in the voltage interval range corresponding to the second gray scale stage.

In another embodiment, the determining, for each voltage interval range of the plurality of voltage interval ranges, a bottom gate voltage that matches the voltage interval range separately comprises: the data voltage input in the compensation phase of the pixel driving circuit driving the pixel display is determined, and the pixel driving current is determined to determine the source voltage input in the light emitting phase of the pixel display. And determining a first bottom gate voltage and a second bottom gate voltage based on the data voltage input in the compensation stage and the source voltage input in the light-emitting stage, wherein the first bottom gate voltage is the bottom gate voltage within the range of the matching voltage interval in the compensation stage, and the second bottom gate voltage is the bottom gate voltage within the range of the matching voltage interval in the light-emitting stage.

In yet another embodiment, the determining the first bottom gate voltage and the second bottom gate voltage based on the data voltage input in the compensation phase and the source voltage input in the emission phase includes: and determining a first bottom gate voltage and a second bottom gate voltage which meet a preset condition based on the data voltage input in the compensation stage and the source voltage input in the light-emitting stage, wherein the preset condition comprises a condition that the threshold voltage of the compensation stage is consistent with the threshold voltage of the light-emitting stage.

In yet another embodiment, the first and second bottom gate voltages satisfy the following equation: vback1-Vdata Vback 2-ELVDD. Wherein the Vback1 represents the first bottom gate voltage, the Vback2 represents the second bottom gate voltage, the Vdata represents the data voltage input in the compensation phase, and the ELVDD represents the source voltage input in the light emission phase.

According to a second aspect of the embodiments of the present disclosure, there is provided a driving apparatus applied to a pixel driving circuit, a driving thin film transistor of the pixel driving circuit being a dual-gate thin film transistor, the dual-gate thin film transistor including a bottom gate and a top gate, the driving apparatus including: and the setting unit is used for dividing the data voltage input in the pixel driving circuit into a plurality of voltage interval ranges according to the voltage. A determining unit, configured to determine, for each voltage interval range of the plurality of voltage interval ranges, a bottom gate voltage that matches the voltage interval range, respectively. And the adjusting unit is used for applying bottom gate voltage matched with the range of the current voltage interval to the bottom gate of the double-gate thin film transistor based on the range of the current voltage interval.

In one embodiment, the determining unit determines the bottom gate voltage matching the voltage interval range for each of the plurality of voltage interval ranges respectively in the following manner: and responding to the brightness gray scale value displayed by the data voltage driving pixel corresponding to a first gray scale stage, and determining the bottom gate voltage with the voltage lower than the data voltage in the voltage interval range corresponding to the first gray scale stage as the bottom gate voltage matched with the voltage interval range. And responding to the brightness gray scale value displayed by the data voltage driving pixel to correspond to a second gray scale stage, and determining the bottom gate voltage with the voltage higher than the data voltage in the voltage interval range corresponding to the second gray scale stage as the bottom gate voltage in the matched voltage interval range. The data voltage in the voltage interval range corresponding to the first gray scale stage is higher than the data voltage in the voltage interval range corresponding to the second gray scale stage.

In another embodiment, the determining unit determines the bottom gate voltage matching the voltage interval range separately for each of the plurality of voltage interval ranges in the following manner: the data voltage input in the compensation phase of the pixel driving circuit driving the pixel display is determined, and the pixel driving current is determined to determine the source voltage input in the light emitting phase of the pixel display. And determining a first bottom gate voltage and a second bottom gate voltage based on the data voltage input in the compensation stage and the source voltage input in the light-emitting stage, wherein the first bottom gate voltage is the bottom gate voltage within the range of the matching voltage interval in the compensation stage, and the second bottom gate voltage is the bottom gate voltage within the range of the matching voltage interval in the light-emitting stage.

In still another embodiment, the determining unit determines the first bottom gate voltage and the second bottom gate voltage based on the data voltage input in the compensation phase and the source voltage input in the light emitting phase in the following manner: determining a first bottom gate voltage and a second bottom gate voltage satisfying a preset condition based on the data voltage input in the compensation phase and the source voltage input in the light emitting phase, the preset condition including a condition that a threshold voltage of the compensation phase is consistent with a threshold voltage of the light emitting phase.

According to a third aspect of the embodiments of the present disclosure, there is provided a terminal device, including: a memory to store instructions; and the processor is used for calling the instructions stored in the memory to execute any one of the driving methods.

According to a fourth aspect of the embodiments of the present disclosure, there is provided a computer-readable storage medium, in which instructions are stored, and when the instructions are executed by a processor, the computer-readable storage medium executes any one of the driving methods described above.

The technical scheme provided by the embodiment of the disclosure can have the following beneficial effects: by the driving method provided by the disclosure, the threshold voltage of the pixel driving circuit can be adjusted by adopting the pixel driving circuit with the double-gate thin film transistor. The data voltage input into the pixel driving circuit is divided into a plurality of voltage interval ranges according to the voltage, and matched bottom gate voltage is determined according to each voltage interval range. When the pixel driving circuit of the double-gate thin film transistor is used for driving, correspondingly matched bottom gate voltage can be applied to the bottom gate of the double-gate thin film transistor based on the range of the current voltage interval, so that a circuit control mode can be adopted, the output voltage accuracy of the pixel driving circuit is improved, and the low gray-scale mura phenomenon can be effectively improved.

It is to be understood that both the foregoing general description and the following detailed description are exemplary and explanatory only and are not restrictive of the disclosure.

Drawings

The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate embodiments consistent with the present disclosure and, together with the description, serve to explain the principles of the disclosure.

FIG. 1 is a diagram illustrating a screen brightness display according to an exemplary embodiment.

Fig. 2 is a schematic diagram of a pixel driving circuit according to an exemplary embodiment.

FIG. 3 is a flow chart illustrating a method of driving according to an exemplary embodiment.

Fig. 4 is a diagram illustrating a correspondence between a bottom gate voltage and a threshold voltage according to an exemplary embodiment.

Fig. 5 is a graph illustrating a relationship between pixel driving current and bottom gate voltage for single-gate and double-gate tfts according to an exemplary embodiment.

FIG. 6 is a diagram illustrating another screen brightness display according to an exemplary embodiment.

Fig. 7 is a flowchart illustrating a method of determining correspondence between a range of voltage intervals and a bottom gate voltage in accordance with an exemplary embodiment.

Fig. 8 is a diagram illustrating a correspondence between a bottom gate voltage and a data voltage according to an exemplary embodiment.

FIG. 9 is a schematic diagram of another drive circuit shown in accordance with an exemplary embodiment.

FIG. 10 is a schematic diagram of yet another drive circuit shown in accordance with an exemplary embodiment.

FIG. 11 is a schematic diagram of yet another drive circuit shown in accordance with an exemplary embodiment.

Fig. 12 is a block diagram illustrating a driving apparatus according to an exemplary embodiment.

Fig. 13 is a block diagram illustrating another terminal device according to an example embodiment.

Detailed Description

Reference will now be made in detail to the exemplary embodiments, examples of which are illustrated in the accompanying drawings. When the following description refers to the accompanying drawings, like numbers in different drawings represent the same or similar elements unless otherwise indicated. The implementations described in the exemplary embodiments below are not intended to represent all implementations consistent with the present disclosure. Rather, they are merely examples of apparatus and methods consistent with certain aspects of the present disclosure, as detailed in the appended claims.

In the related art, the sub-threshold swing (SS) is a performance measure of the mutual slew rate between the on and off states of a transistor. In order to improve the low gray-scale mura phenomenon, the SS is increased by degrading the interface characteristics of the driver TFT in a process adjustment mode, so that the influence caused by the electrical difference is offset. In one implementation scenario, the SS characteristic is improved to about 0.6V/dec by degrading the interface characteristic of the driver TFT, so as to counteract the influence of the electrical difference. Wherein, the display effect of the screen brightness can be as shown in fig. 1. Fig. 1 is a schematic diagram of a screen brightness display according to an exemplary embodiment. Since SS is positively correlated with the gate insulating layer (GI) and P channel (Psi) interface defect density in the driver TFT. In one example, the SS is increased by increasing the defect density. The SS is positively correlated with the defect density Dit of the driver TFT, and the correlation formula is as follows:

further, as SS increases, the defect density Dit also increases. However, this method has an effect that the TFT has an excessive characteristic shift under external stress such as electrical, optical, and thermal stress, and thus an output abnormality occurs in a circuit constructed by the TFT. In another example, SS is defined as

The method is used for representing the variation of the gate voltage which is ten times of the source-drain current variation. By passingA GI layer mask (mask) is introduced into the driver TFT, so that under the condition that a switching thin film transistor (Switch TFT) is not changed, the thickness of the GI layer of the driver TFT is increased, the gate dielectric capacitance Cox in a driving circuit is reduced, the SS is further improved, and the influence caused by electrical property difference is counteracted. However, the GI layer thickness increases, which tends to deteriorate the interface characteristics of the driver TFT, deteriorate the capability of controlling Psi by the gate, and affect the stability of the driver TFT. Therefore, both of the above-described improvement methods easily affect the reliability and uniformity of the driver TFT.

In view of the above, the present disclosure provides a pixel driving circuit, which is shown in fig. 2. Fig. 2 is a schematic diagram of a pixel driving circuit according to an exemplary embodiment. In the pixel driving circuit 10, M1-M7 respectively represent different thin film transistors, wherein M1 and M2-M7 are single-gate TFTs, and M2 is a double-gate driver TFT including a bottom gate (back gate) 1 and a top gate in the pixel driving circuit 10. The source of M2 is connected to the drain of M1, the drain of M2 is connected to the source of M5, and the gate of M2 is connected to the gate capacitor Cst. That is, the bottom gate 1 and the top gate are connected to the gate capacitance Cst. The EM indicates a signal applied to a gate of the pixel driving circuit 10, and controls the operating state of the pixel driving circuit 10 by controlling the level state of the EM. And determining whether the display screen is driven to emit light or not according to the level state of the EM. If the EM is at a high level, the drain voltage ELVDD and the source voltage ELVSS in the pixel driving circuit 10 are in a non-conducting state, and the display panel cannot be driven to emit light. If the EM is at a low level, the drain voltage ELVDD and the source voltage ELVSS in the pixel driving circuit 10 are in a conducting state, and the display panel is driven to emit light normally. Vg represents the top gate voltage corresponding to the top gate, Vback is used to represent the low gate voltage corresponding to the low gate, and Vint represents the input voltage input to the pixel driving circuit 10. Scan (n) is used for representing the scanning signal of the n-th row of pixels scanned currently, wherein n is larger than or equal to 1. Scan (n-1) is used to characterize the Scan signal for scanning the pixels in the row above the nth row of pixels.

The present disclosure provides a driving method applied to a pixel driving circuit 10, which correspondingly matches a bottom gate voltage of a bottom gate according to a voltage interval range where a data voltage inputted to the pixel driving circuit is located. The bottom gate voltage is controlled to increase SS through a circuit control mode so as to improve the accuracy of the output voltage of the pixel driving circuit, and therefore the reliability and the uniformity of the driver TFT can be improved under the condition that the interface characteristic of the driver TFT does not need to be degraded, and the low gray-scale mura phenomenon can be effectively improved.

Fig. 3 is a flowchart illustrating a driving method according to an exemplary embodiment, and as shown in fig. 3, the driving method includes the following steps S11 to S13.

In step S11, the data voltage input to the pixel driving circuit is divided into a plurality of voltage range intervals according to the voltage level.

In the embodiment of the present disclosure, M2 in the pixel driving circuit 10 is a double-gate thin film transistor. Therefore, the current flowing through the driver TFT can be adjusted by the bottom gate voltage Vback in the bottom gate and the top gate voltage Vg in the top gate in common.

Since the double-gate tft is used in M2, a channel for conduction exists when no voltage is applied between the drain voltage ELVDD and the source voltage ELVSS. In one example, the dual-gate thin film transistor is a depletion-type thin film transistor, and when the bottom gate voltage Vback is small, the transfer characteristic curve of M2 tends to saturate as the top gate voltage Vg increases, so that the on-resistance of the driver TFT formed by M2 and the bottom gate increases, and the increase in the top gate voltage Vg decreases. When the top gate voltage Vg increases to a certain voltage value, M2 enters the linear operating region from the saturation operating region, and conduction is conducted between the drain voltage ELVDD and the source voltage ELVSS. The on-resistance of the driver TFT formed by M2 and the top gate goes from the saturation region to the linear region. If the top gate voltage Vg is increased, the current between the channels tends to saturate as the bottom gate voltage Vback increases. Therefore, when the top gate voltage Vg is constant, the pixel driving current flowing through M2 can be increased by increasing the bottom gate voltage Vback.

The data voltage Vdata may be characterized as a compensation voltage for increasing the bottom gate voltage Vback in the case where Vg is constant. And dividing the voltage range after the Vdata is extended into a plurality of voltage interval ranges according to the voltage size so as to determine that the bottom gate corresponds to the matched Vback under different Vdata, and extending the voltage range of Vg.

In step S12, a bottom gate voltage is determined that matches the voltage interval range for each of the plurality of voltage interval ranges, respectively.

In the embodiment of the present disclosure, due to the dual-gate thin film transistor adopted, the threshold voltage Vth of M2 may vary according to the point location between the source and the substrate of the dual-gate thin film transistor. Therefore, in the case where the voltage value of Vback is more negative, the P-channel in the dual-gate thin film transistor is more fully opened, and the driver TFT is less likely to be turned off as the pixel drive current flowing between the drain and source of M2 is larger.

In one example, the correspondence between Vback and Vth can be as shown in FIG. 4. Fig. 4 is a diagram illustrating a correspondence between a bottom gate voltage and a threshold voltage according to an exemplary embodiment. In the related art, since the pixel driving circuit uses a single-gate driving thin film transistor, there is no bottom gate, and Vth is a fixed threshold. In the embodiment of the present disclosure, since the double-gate thin film transistor is employed, Vth can be adjusted in different ranges based on the difference of Vback. On the premise that Vg is fixed, the more negative the voltage value corresponding to Vback, the more positive the voltage value corresponding to Vth, and the easier the driver TFT is turned on. Conversely, the more positive the voltage value corresponding to Vback, the more negative the voltage value corresponding to Vth, and the more easily the driver TFT is turned off.

In one example, the correspondence between Vback and Vth may be determined by experimental tuning and the like. For example: under the condition that Vg is constant, Vth is determined by continuously adjusting the voltage value of Vback, and then the corresponding relation between Vback and Vth is obtained.

The Vdata drives the luminance gray scale value displayed by the pixel to correspond to different gray scale luminance in different voltage interval ranges, and the voltage range of the Vdata is divided according to the required gray scale luminance displayed by the pixel. For example, the voltage range of Vdata may be divided into a voltage range corresponding to a first gray scale stage and a voltage range corresponding to a second gray scale stage based on low gray scale luminance and high gray scale luminance. And determining the bottom gate voltage Vback corresponding to each voltage interval range based on the first gray scale stage and the second gray scale stage. The first gray scale phase may be referred to as a low gray scale phase, and the second gray scale phase may be referred to as a high gray scale phase. The low gray scale phase has a relatively high data voltage relative to the high gray scale phase. That is, the data voltage in the voltage interval range corresponding to the first gray scale stage is higher than the data voltage in the voltage interval range corresponding to the second gray scale stage. For example: when visually judged, the gray scale can be roughly divided into seven levels from high to low: white, off-white, light grey, dark grey, light black, and black. The gray scale stage corresponding to black can be a first gray scale stage, and the gray scale stage corresponding to white can be a second gray scale stage.

In step S13, a bottom gate voltage matching the current voltage interval range is applied to the bottom gate of the dual gate thin film transistor based on the current voltage interval range.

In the embodiment of the present disclosure, after the current voltage interval range is determined, Vback matching the voltage interval range is determined according to the correspondence between the determined voltage interval range and the bottom gate voltage. Vback matching the current voltage range is applied to the bottom gate of the double-gate thin film transistor. Vth is changed by adjusting Vback, pixel driving current flowing between a source and a drain is improved, and a path is formed between the drain and the source quickly to reduce loss of driver TFT current.

Through the embodiment, the voltage value of Vth can be changed by adjusting Vback in a circuit control mode, so that the loss of driver TFT current is reduced, the pixel driving current flowing between a source electrode and a drain electrode is improved, the SS is increased, and the low gray-scale mura phenomenon can be effectively improved.

In one example, when SS is low, the accuracy requirement for the output voltage of the pixel driving circuit (IC) is high, which is not good for gray scale development and brightness discrimination. Therefore, in the embodiment of the present disclosure, the pixel driving circuit can be controlled to output the pixel driving current according to the corresponding relationship between the pixel driving current Ids flowing between the source and the drain and the top gate voltage Vg, so as to improve SS.

In another example, the correspondence relationship between the pixel driving current Ids flowing between the source and the drain and the top gate voltage Vg may be as shown in fig. 5. Fig. 5 is a graph illustrating a relationship between pixel driving current and bottom gate voltage for single-gate and double-gate tfts according to an exemplary embodiment. The more negative the top gate voltage Vg, the more fully the P-channel is opened, the less likely the driver TFT is to be turned off, and the more the pixel drive current flowing between the source and drain can be increased. If the driver TFT is a single-gate thin film transistor, the voltage value of Vth is fixed, and the more positive the Vg value of the top gate voltage, the less likely the driver TFT is to be turned on. The more negative the value of the top gate voltage Vg, the less likely the driver TFT will turn off. If the driver TFT adopts a double-gate thin film transistor, the voltage value of Vth can be adjusted, no matter the top gate voltage Vg is positive or negative, current exists between the source electrode and the drain electrode all the time, and further the driver TFT is not easy to close or open, so that the Vg is extended in a high-low gray scale voltage range, and the Vg is obtained after Vdata compensation, so that the Vdata range is extended, and the mura phenomenon is improved. In one example, the display effect of the improved screen brightness may be as shown in fig. 6, where fig. 6 is another screen brightness display diagram according to an exemplary embodiment.

The following examples will specifically illustrate the correspondence between each voltage interval range and the corresponding matched bottom gate voltage.

In step S21, in response to the luminance gray scale value displayed by the pixel driven by the data voltage corresponding to the first gray scale phase, the bottom gate voltage having a voltage higher than the data voltage is determined as the bottom gate voltage matching the voltage interval range within the voltage interval range corresponding to the first gray scale phase.

In the embodiment of the disclosure, when the luminance gray scale value displayed by the pixel driven by the data voltage Vdata corresponds to the first gray scale stage, to ensure that the voltage between the drain voltage ELVDD and the source voltage ELVSS is in a pass state, Vth needs to be reduced, and then the bottom gate voltage Vback with a voltage lower than the data voltage is determined within the voltage interval range corresponding to the first gray scale stage as the bottom gate voltage matched with the voltage interval range corresponding to the first gray scale stage.

In step S22, in response to the luminance gray scale value displayed by the pixel driven by the data voltage corresponding to the second gray scale phase, the bottom gate voltage having a voltage lower than the data voltage is determined as the bottom gate voltage matching the voltage interval range in the voltage interval range corresponding to the second gray scale phase.

In the embodiment of the disclosure, when the gray scale value of the luminance displayed by the pixel driven by the data voltage Vdata corresponds to the second gray scale stage, Vth needs to be reduced to avoid the luminance displayed by the AMOLED from being too bright, and then the bottom gate voltage Vback with the voltage higher than the data voltage is determined within the voltage interval range corresponding to the second gray scale stage as the bottom gate voltage matched with the voltage interval range corresponding to the second gray scale stage. The data voltage in the voltage interval range corresponding to the first gray scale stage is higher than the data voltage in the voltage interval range corresponding to the second gray scale stage.

In one example, the correspondence between each voltage interval range and the bottom gate voltage corresponding to the matching voltage interval range can be as shown in fig. 8. Fig. 8 is a diagram illustrating a correspondence between a bottom gate voltage and a data voltage according to an exemplary embodiment. The abscissa is a voltage value corresponding to Vdata, and the ordinate is a voltage value corresponding to the bottom gate voltage Vback.

In an embodiment, the compensation stage may be characterized as a stage in which the bottom gate voltage Vback is controlled by inputting the data voltage Vdata, and then the threshold voltage Vth is adjusted, so that the currents at the two ends of the gate and the source of the pixel driving circuit are continuously increased until the pixel driving current output by the driver TFT can drive the pixel to normally display. The light-emitting stage can be characterized in that after the driver TFT is turned on, the voltage between the drain voltage ELVDD and the source voltage ELVSS is in a pass state, and the output pixel driving current can drive the pixel to perform a normal display process. The data voltage Vdata input by the pixel drive circuit in the compensation phase to drive the pixel display is different from the power supply voltage Vint input in the light emitting phase of the pixel drive current determination pixel display. Therefore, it is necessary to determine the data voltage Vdata input in the compensation phase of the pixel driving circuit driving the pixel display and the drain voltage ELVDD input in the light emission phase of the pixel display, respectively. The compensation stage is a process for preparing the light-emitting stage, so that the pixel driving circuit can normally drive the pixels to display when using the pixel driving current, brightness difference after the screen is lightened is avoided, and the first bottom gate voltage and the second bottom gate voltage are respectively determined based on the data voltage input in the compensation stage and the source voltage input in the light-emitting stage. The first bottom gate voltage is the bottom gate voltage within the range of the matching voltage interval in the compensation stage, and the second bottom gate voltage is the bottom gate voltage within the range of the matching voltage interval in the light-emitting stage.

In one example, to ensure reliability and uniformity of the driver TFT, Vth in the compensation phase needs to be consistent with Vth in the emission phase when determining the first bottom gate voltage and the second bottom gate voltage, and the driver TFT can be controlled when outputting a pixel driving current according to a path between the drain and the source.

In another example, the first bottom gate voltage and the second bottom gate voltage satisfy the following equation: vback1-Vdata Vback 2-ELVDD; wherein Vback1 represents the first bottom gate voltage, Vback2 represents the second bottom gate voltage, Vdata represents the data voltage input in the compensation phase, and ELVDD represents the source voltage input in the light emission phase.

In one implementation scenario, the circuit for driving the pixel display by the pixel driving current output by the pixel driving circuit operates as follows. Wherein, the operation process includes: an initialization phase, a compensation phase and a light emitting phase.

In the initialization phase, the preparation process of the pixel driving circuit may be as shown in fig. 9. FIG. 9 is a schematic diagram of another drive circuit shown in accordance with an exemplary embodiment. Here, the AMOLED does not display light emission, and at this time, in the pixel driving circuit 10, the EM is in a high level state. When the SCAN signal SCAN (n-1) is at a low level and the SCAN signal SCAN (n) is at a high level, the thin film transistor corresponding to M4 is in a conductive state, and the remaining thin film transistors are in a non-conductive state. The power voltage Vint inputted to the pixel driving circuit 10 is transmitted to the gate capacitor Cst via the M4 for initial charge storage, and is ready for writing the data voltage Vdata. Wherein n is more than or equal to 1, and n represents the number of pixel lines scanned currently.

In the compensation phase, the compensation process of the pixel driving circuit can be as shown in fig. 10. FIG. 10 is a schematic diagram of yet another drive circuit shown in accordance with an exemplary embodiment. In this pixel drive circuit 10, when the EM is at a high level and the 2 nd row pixels are scanned, SCAN (1) is at a high level and SCAN (2) is at a low level. Vdata- | vth | is written into the top gate, the bottom gate and the gate capacitor Cst of the driver TFT, and the anode potential is initialized to determine the voltage of the top gate Vg, which is prepared for the light-emitting stage. By Vdata- | vth |, a voltage required to turn on the driver TFT, that is, a voltage required to form a path between the source and the drain can be determined. In order to ensure that the pixel driving circuit can normally drive the pixel to display when using the pixel driving current and avoid the brightness difference after the screen is lightened, the data voltage Vdata input in the compensation phase of the pixel driving circuit driving pixel display and the drain voltage ELVDD input in the light emitting phase of the pixel driving circuit driving pixel display are determined, and under the premise that the Vth in the compensation phase is consistent with the Vth in the light emitting phase, the first bottom gate voltage and the second bottom gate voltage are respectively determined by the formula Vback 1-Vdata-Vback 2-ELVDD.

In the light emitting phase, the compensation process of the pixel driving circuit may be as shown in fig. 11. FIG. 11 is a schematic diagram of yet another drive circuit shown in accordance with an exemplary embodiment. In the pixel driving circuit 10, when the EM is at a low level and the 2 nd row pixels are scanned, SCAN (1) is at a high level and SCAN (2) is at a low level. A path is formed between the drain voltage ELVDD and the source voltage ELVSS, and the pixel driving current output by the path drives the pixel to perform normal display according to the control of the driver TFT.

By driving the pixel driving circuit in the above manner, the circuit control manner can be adopted, the SS can be increased by adjusting the bottom gate control manner, the interface characteristic of the driver TFT does not need to be degraded, the control capability of the gate on Psi is not affected when the bottom gate voltage Vback corresponding to the bottom gate is adjusted, and the stability of the driver TFT is further enhanced. Because the stability of the driver TFT is enhanced, the driver TFT is not easy to be interfered by bottom illumination and static electricity, and can play a role of a shielding layer. In addition, in the process of adjusting the bottom grid electrode, the matching relation between each matching voltage interval range of the data voltage Vdata and the bottom grid voltage can be adjusted, the voltage debugging precision is favorably improved, the pixel driving current output between the source electrode and the drain electrode is favorably controlled, the driving pixel can be ensured to normally display, and the low-gray-scale mura phenomenon can be effectively reduced.

Based on the same conception, the embodiment of the disclosure also provides a driving device, which is applied to a pixel driving circuit, wherein a driving thin film transistor of the pixel driving circuit is a double-gate thin film transistor, and the double-gate thin film transistor comprises a bottom gate and a top gate.

It is understood that the driving device provided by the embodiment of the present disclosure includes a hardware structure and/or a software module for performing each function in order to implement the above functions. The disclosed embodiments can be implemented in hardware or a combination of hardware and computer software, in combination with the exemplary elements and algorithm steps disclosed in the disclosed embodiments. Whether a function is performed as hardware or computer software drives hardware depends upon the particular application and design constraints imposed on the solution. Skilled artisans may implement the described functionality in varying ways for each particular application, but such implementation decisions should not be interpreted as causing a departure from the scope of the present disclosure.

Fig. 12 is a block diagram illustrating a driving apparatus according to an exemplary embodiment. Referring to fig. 12, the driving apparatus 100 includes a setting unit 101, a determining unit 102, and an adjusting unit 103.

The setting unit 101 is configured to divide the data voltage input to the pixel driving circuit into a plurality of voltage interval ranges according to the voltage level.

The determining unit 102 is configured to determine, for each voltage interval range of the plurality of voltage interval ranges, a bottom gate voltage matching the voltage interval range.

And the adjusting unit 103 is used for applying bottom gate voltage matched with the current voltage interval range to the bottom gate of the double-gate thin film transistor based on the current voltage interval range.

In an embodiment, the determining unit 102 determines the bottom gate voltage matching the voltage interval range for each of the voltage interval ranges respectively in the following manner: and determining the bottom gate voltage with the voltage lower than the data voltage in the voltage interval range corresponding to the first gray scale stage as the bottom gate voltage in the voltage interval range matched with the data voltage. And responding to the brightness gray scale value displayed by the data voltage driving pixel to correspond to the second gray scale stage, and determining the bottom gate voltage higher than the data voltage in the voltage interval range corresponding to the second gray scale stage as the bottom gate voltage matched with the voltage interval range. The data voltage in the voltage interval range corresponding to the first gray scale stage is higher than the data voltage in the voltage interval range corresponding to the second gray scale stage.

In another embodiment, the determining unit 102 determines the bottom gate voltage of the matching voltage interval range for each of the plurality of voltage interval ranges respectively in the following manner: the data voltage input during the compensation phase of the pixel drive circuit driving the pixel display is determined and the pixel drive current is determined to determine the source voltage input during the emission phase of the pixel display. And determining a first bottom gate voltage and a second bottom gate voltage based on the data voltage input in the compensation stage and the source voltage input in the light-emitting stage, wherein the first bottom gate voltage is the bottom gate voltage in the range of the matching voltage interval in the compensation stage, and the second bottom gate voltage is the bottom gate voltage in the range of the matching voltage interval in the light-emitting stage.

In yet another embodiment, the determining unit 102 determines the first bottom gate voltage and the second bottom gate voltage based on the data voltage input in the compensation phase and the source voltage input in the light emitting phase in the following manner: determining a first bottom gate voltage and a second bottom gate voltage satisfying a preset condition based on the data voltage input in the compensation phase and the source voltage input in the light emitting phase, the preset condition including a condition that a threshold voltage of the compensation phase is consistent with a threshold voltage of the light emitting phase.

In yet another embodiment, the first bottom gate voltage and the second bottom gate voltage satisfy the following equation: vback1-Vdata Vback 2-ELVDD. Wherein Vback1 represents the first bottom gate voltage, Vback2 represents the second bottom gate voltage, Vdata represents the data voltage input in the compensation phase, and ELVDD represents the source voltage input in the light emission phase.

With regard to the apparatus in the above-described embodiment, the specific manner in which each module performs the operation has been described in detail in the embodiment related to the method, and will not be elaborated here.

Fig. 13 is a block diagram of a terminal device shown in accordance with an example embodiment. For example, the terminal device may be a mobile phone, a computer, a digital broadcast terminal, a messaging device, a game console, a tablet device, a medical device, a fitness device, a personal digital assistant, and the like.

Referring to fig. 13, the driving device 200 may include one or more of the following components: a processing component 202, a memory 204, a power component 206, a multimedia component 208, an audio component 210, an input/output (I/O) interface 212, a sensor component 214, and a communication component 216.

The processing component 202 generally controls overall operations of the drive device 200, such as operations associated with display, telephone calls, data communications, camera operations, and recording operations. The processing components 202 may include one or more processors 220 to execute instructions to perform all or a portion of the steps of the methods described above. Further, the processing component 202 can include one or more modules that facilitate interaction between the processing component 202 and other components. For example, the processing component 202 can include a multimedia module to facilitate interaction between the multimedia component 208 and the processing component 202.

The memory 204 is configured to store various types of data to support operations at the drive apparatus 200. Examples of such data include instructions for any application or method operating on the drive apparatus 200, contact data, phonebook data, messages, pictures, videos, and the like. The memory 204 may be implemented by any type or combination of volatile or non-volatile memory devices, such as Static Random Access Memory (SRAM), electrically erasable programmable read-only memory (EEPROM), erasable programmable read-only memory (EPROM), programmable read-only memory (PROM), read-only memory (ROM), magnetic memory, flash memory, magnetic or optical disks.

The power component 206 provides power to the various components of the drive device 200. The power components 206 may include a power management system, one or more power sources, and other components associated with generating, managing, and distributing power to the drive devices 200.

The multimedia component 208 includes a screen providing an output interface between the drive device 200 and a user. In some embodiments, the screen may include a Liquid Crystal Display (LCD) and a Touch Panel (TP). If the screen includes a touch panel, the screen may be implemented as a touch screen to receive an input signal from a user. The touch panel includes one or more touch sensors to sense touch, slide, and gestures on the touch panel. The touch sensor may not only sense the boundary of a touch or slide action, but also detect the duration and pressure associated with the touch or slide operation. In some embodiments, the multimedia component 208 includes a front facing camera and/or a rear facing camera. When the driving apparatus 200 is in an operation mode, such as a photographing mode or a video mode, the front camera and/or the rear camera may receive external multimedia data. Each front camera and rear camera may be a fixed optical lens system or have a focal length and optical zoom capability.

The audio component 210 is configured to output and/or input audio signals. For example, the audio component 210 includes a Microphone (MIC) configured to receive an external audio signal when the driving apparatus 200 is in an operation mode, such as a call mode, a recording mode, and a voice recognition mode. The received audio signals may further be stored in the memory 204 or transmitted via the communication component 216. In some embodiments, audio component 210 also includes a speaker for outputting audio signals.

The I/O interface 212 provides an interface between the processing component 202 and peripheral interface modules, which may be keyboards, click wheels, buttons, etc. These buttons may include, but are not limited to: a home button, a volume button, a start button, and a lock button.

The sensor assembly 214 includes one or more sensors for providing various aspects of condition assessment for the drive device 200. For example, the sensor assembly 214 may detect an open/closed state of the drive device 200, the relative positioning of the components, such as a display and keypad of the drive device 200, the sensor assembly 214 may also detect a change in position of the drive device 200 or a component of the drive device 200, the presence or absence of user contact with the drive device 200, the orientation or acceleration/deceleration of the drive device 200, and a change in temperature of the drive device 200. The sensor assembly 214 may include a proximity sensor configured to detect the presence of a nearby object without any physical contact. The sensor assembly 214 may also include a light sensor, such as a CMOS or CCD image sensor, for use in imaging applications. In some embodiments, the sensor assembly 214 may also include an acceleration sensor, a gyroscope sensor, a magnetic sensor, a pressure sensor, or a temperature sensor.

The communication component 216 is configured to facilitate wired or wireless communication between the drive apparatus 200 and other devices. The driving device 200 may access a wireless network based on a communication standard, such as WiFi, 2G or 3G, or a combination thereof. In an exemplary embodiment, the communication component 216 receives a broadcast signal or broadcast related information from an external broadcast management system via a broadcast channel. In an exemplary embodiment, the communication component 216 further includes a Near Field Communication (NFC) module to facilitate short-range communications. For example, the NFC module may be implemented based on Radio Frequency Identification (RFID) technology, infrared data association (IrDA) technology, Ultra Wideband (UWB) technology, Bluetooth (BT) technology, and other technologies.

In an exemplary embodiment, the driving apparatus 200 may be implemented by one or more Application Specific Integrated Circuits (ASICs), Digital Signal Processors (DSPs), Digital Signal Processing Devices (DSPDs), Programmable Logic Devices (PLDs), Field Programmable Gate Arrays (FPGAs), controllers, micro-controllers, microprocessors or other electronic components for performing the above-described methods.

In an exemplary embodiment, a non-transitory computer readable storage medium comprising instructions, such as the memory 204 comprising instructions, executable by the processor 220 of the drive device 200 to perform the above-described method is also provided. For example, the non-transitory computer readable storage medium may be a ROM, a Random Access Memory (RAM), a CD-ROM, a magnetic tape, a floppy disk, an optical data storage device, and the like.

It is understood that "a plurality" in this disclosure means two or more, and other words are analogous. "and/or" describes the association relationship of the associated object, indicating that there may be three relationships, for example, a and/or B, which may indicate: a exists alone, A and B exist simultaneously, and B exists alone. The character "/" generally indicates that the former and latter associated objects are in an "or" relationship. The singular forms "a", "an", and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise.

It will be further understood that the terms "first," "second," and the like, are used to describe various information and should not be limited by these terms. These terms are only used to distinguish one type of information from another and do not denote a particular order or importance. Indeed, the terms "first," "second," and the like are fully interchangeable. For example, first information may also be referred to as second information, and similarly, second information may also be referred to as first information, without departing from the scope of the present disclosure.

It will be further understood that, unless otherwise specified, "connected" includes direct connections between the two without the presence of other elements, as well as indirect connections between the two with the presence of other elements.

It is further to be understood that while operations are depicted in the drawings in a particular order, this is not to be understood as requiring that such operations be performed in the particular order shown or in serial order, or that all illustrated operations be performed, to achieve desirable results. In certain environments, multitasking and parallel processing may be advantageous.

Other embodiments of the disclosure will be apparent to those skilled in the art from consideration of the specification and practice of the disclosure disclosed herein. This application is intended to cover any variations, uses, or adaptations of the disclosure following, in general, the principles of the disclosure and including such departures from the present disclosure as come within known or customary practice within the art to which the disclosure pertains. It is intended that the specification and examples be considered as exemplary only, with a true scope and spirit of the disclosure being indicated by the following claims.

It will be understood that the present disclosure is not limited to the precise arrangements described above and shown in the drawings and that various modifications and changes may be made without departing from the scope thereof. The scope of the present disclosure is limited only by the appended claims.

Claims

1. A driving method is applied to a pixel driving circuit, a driving thin film transistor of the pixel driving circuit is a double-gate thin film transistor, the double-gate thin film transistor comprises a bottom gate and a top gate, and the driving method comprises the following steps:

dividing the data voltage input in the pixel driving circuit into a plurality of voltage interval ranges according to the voltage;

determining a bottom gate voltage respectively matching each of the plurality of voltage interval ranges;

and applying bottom gate voltage matched with the range of the current voltage interval to the bottom gate of the double-gate thin film transistor based on the range of the current voltage interval.

2. The driving method according to claim 1, wherein the determining, for each of the plurality of voltage interval ranges, a bottom gate voltage that matches the voltage interval range separately comprises:

responding to a first gray scale stage corresponding to a brightness gray scale value displayed by the data voltage driving pixel, and determining bottom gate voltage with voltage lower than the data voltage in a voltage interval range corresponding to the first gray scale stage as bottom gate voltage in a matching voltage interval range;

responding to a second gray scale stage corresponding to the brightness gray scale value displayed by the data voltage driving pixel, and determining the bottom gate voltage higher than the data voltage in the voltage interval range corresponding to the second gray scale stage as the bottom gate voltage matched with the voltage interval range;

the data voltage in the voltage interval range corresponding to the first gray scale stage is higher than the data voltage in the voltage interval range corresponding to the second gray scale stage.

3. The driving method according to claim 1 or 2, wherein the determining, for each of the plurality of voltage interval ranges, a bottom gate voltage that matches the voltage interval range separately comprises:

determining the data voltage input in the compensation stage of the pixel driving circuit driving the pixel display, and determining the source voltage input in the light-emitting stage of the pixel display by the pixel driving current;

and determining a first bottom gate voltage and a second bottom gate voltage based on the data voltage input in the compensation stage and the source voltage input in the light-emitting stage, wherein the first bottom gate voltage is the bottom gate voltage within the range of the matching voltage interval in the compensation stage, and the second bottom gate voltage is the bottom gate voltage within the range of the matching voltage interval in the light-emitting stage.

4. The driving method according to claim 3, wherein the determining the first bottom gate voltage and the second bottom gate voltage based on the data voltage input in the compensation phase and the source voltage input in the emission phase comprises:

determining a first bottom gate voltage and a second bottom gate voltage satisfying a preset condition based on the data voltage input in the compensation phase and the source voltage input in the light emitting phase, the preset condition including a condition that a threshold voltage of the compensation phase is consistent with a threshold voltage of the light emitting phase.

5. The driving method according to claim 4, wherein the first and second bottom gate voltages satisfy the following formula:

Vback1-Vdata＝Vback2-ELVDD；

wherein the Vback1 represents the first bottom gate voltage, the Vback2 represents the second bottom gate voltage, the Vdata represents the data voltage input in the compensation phase, and the ELVDD represents the source voltage input in the light emission phase.

6. A driving device applied to a pixel driving circuit, wherein a driving thin film transistor of the pixel driving circuit is a dual-gate thin film transistor, the dual-gate thin film transistor includes a bottom gate and a top gate, and the driving device includes:

the setting unit is used for dividing the data voltage input in the pixel driving circuit into a plurality of voltage interval ranges according to the voltage;

a determining unit, configured to determine, for each voltage interval range of the plurality of voltage interval ranges, a bottom gate voltage respectively matching the voltage interval range;

and the adjusting unit is used for applying bottom gate voltage matched with the range of the current voltage interval to the bottom gate of the double-gate thin film transistor based on the range of the current voltage interval.

7. The driving device according to claim 6, wherein the determining unit determines the bottom gate voltage respectively matching the voltage interval ranges for each of the plurality of voltage interval ranges in the following manner:

8. The driving apparatus according to claim 6 or 7, wherein the determining unit determines the bottom gate voltage respectively matching the voltage interval ranges for each of the plurality of voltage interval ranges in the following manner:

9. The driving apparatus according to claim 8, wherein the determining unit determines the first bottom gate voltage and the second bottom gate voltage based on the data voltage input in the compensation phase and the source voltage input in the emission phase in the following manner:

10. The driving device according to claim 9, wherein the first and second bottom gate voltages satisfy the following equation:

Vback1-Vdata＝Vback2-ELVDD；

11. A terminal device, characterized in that the terminal device comprises:

a memory to store instructions; and

a processor for invoking the memory-stored instructions to perform the method of driving of any of claims 1-5.

12. A computer-readable storage medium in which instructions are stored, which when executed by a processor, perform the driving method of any one of claims 1 to 5.