CN114783380B - Display driving circuit, driving method, display panel and display device - Google Patents
Display driving circuit, driving method, display panel and display device Download PDFInfo
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- CN114783380B CN114783380B CN202210473934.1A CN202210473934A CN114783380B CN 114783380 B CN114783380 B CN 114783380B CN 202210473934 A CN202210473934 A CN 202210473934A CN 114783380 B CN114783380 B CN 114783380B
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- 229920001621 AMOLED Polymers 0.000 description 2
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- 230000003247 decreasing effect Effects 0.000 description 1
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
- G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
- G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
- G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
- G09G3/3225—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix
- G09G3/3258—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix with pixel circuitry controlling the voltage across the light-emitting element
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
- G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
- G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
- G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
- G09G3/3266—Details of drivers for scan electrodes
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2320/00—Control of display operating conditions
- G09G2320/02—Improving the quality of display appearance
- G09G2320/0233—Improving the luminance or brightness uniformity across the screen
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- Engineering & Computer Science (AREA)
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Abstract
The invention discloses a display driving circuit, a driving method, a display panel and a display device, wherein an effective display area of the display device is divided into a plurality of row areas according to pixel rows in advance, and the display driving circuit comprises: a gate driving sub-circuit and a voltage control sub-circuit, the gate driving sub-circuit being configured to supply a reset control signal, a scan control signal, and a light emission control signal to each row of pixel circuits, respectively; the voltage control sub-circuit is configured to provide an initialization voltage signal corresponding to the row region to the pixel circuit, wherein the initialization voltage corresponding to each row region is inversely related to a characteristic distance, and the characteristic distance is a distance between the row region and a driving chip in the display device. The voltage control sub-circuit can effectively solve the problem of uneven brightness caused by voltage drop of a power supply.
Description
Technical Field
The present invention relates to the field of display technologies, and in particular, to a display driving circuit, a driving method, a display panel, and a display device.
Background
With the wide application of Active-matrix organic light emitting diodes (AMOLED) in the display field, the requirements of people on the display effect are also increasing. Because the lines of the display Panel (Panel) have internal resistances, the wiring lengths are different, and the internal resistances are different, so that the power supply Voltages (VDD) actually applied to different positions of the display Panel have differences, namely the problem of power supply voltage drop (IR drop) exists, thereby causing uneven brightness of the display Panel and affecting the display effect.
Disclosure of Invention
The present invention has been made in view of the above problems, and has as its object to provide a display driving circuit, a driving method, a display panel and a display device which overcome or at least partially solve the above problems.
In a first aspect, an embodiment of the present invention provides a display driving circuit applied to a display device, an effective display area of the display device being divided into a plurality of row areas by pixel rows, each row area including at least one row of pixel circuits, the display driving circuit including:
a gate driving sub-circuit connected to the scan control terminal, the reset control terminal, and the light emission control terminal of each row of pixel circuits, and configured to provide a reset control signal, a scan control signal, and a light emission control signal to each row of pixel circuits, respectively;
the voltage control sub-circuit is connected with the initialization voltage end of each row of pixel circuits and is configured to provide initialization voltage signals corresponding to the row area where the pixel circuits are located, wherein the initialization voltage corresponding to each row area is inversely related to the characteristic distance, and the characteristic distance is the distance between the row area and a driving chip in the display device.
Further, the voltage control sub-circuit comprises a clock signal line and a GOA unit group, the GOA unit group comprises a plurality of GOA units which are cascaded in turn, wherein the input signal end of a first stage GOA unit is connected with a reset power supply end, the clock end of each stage GOA unit is connected with the clock signal line, the output end of each stage GOA unit is connected with an initialization voltage end of a row of pixel circuits,
the GOA unit group is configured to provide an initialization voltage signal corresponding to a row region where the GOA unit group is located to the pixel circuit row by row under the control of a clock signal provided by the clock signal line.
Further, in one working period of the pixels in the same row, the on time of the initialization voltage signal is before the on time of the reset control signal, and the off time of the initialization voltage signal is before the on time of the scan control signal.
Further, the plurality of row regions are divided into a middle region, a near-end region and a far-end region, the near-end region is positioned on one side of the middle region close to the driving chip, the far-end region is positioned on one side of the middle region far away from the driving chip, and the initialization voltage corresponding to the middle region is a reference voltage;
along the direction towards the driving chip, the initialization voltage of each row area in the near area is increased in turn on the basis of the reference voltage;
along the direction facing away from the driving chip, the initialization voltage of each row region in the far-end region is sequentially reduced on the basis of the reference voltage.
Further, the number of pixel rows included in each row region is the same or not exactly the same.
Further, each row region includes 1 to 10 rows of pixel circuits.
Further, the gate drive sub-circuit includes a row scan driver and an emission controller, the row scan driver being connected to the scan control terminal and the reset control terminal of each row of pixel circuits and configured to provide a reset control signal and a scan control signal to each row of pixel circuits; the emission controller is connected with the light-emitting control end of each row of pixel circuits and is configured to provide row light-emitting control signals for each row of pixel circuits.
In a second aspect, an embodiment of the present invention provides a pixel driving method applied to a display device. An effective display area of the display device is divided into a plurality of row areas by pixel rows, each row area including at least one row of pixel circuits, the method comprising:
in the resetting stage, a resetting control end and an initializing voltage end are controlled to be started, initializing voltages corresponding to the row areas where the pixel circuits are located are input, wherein the initializing voltages corresponding to the row areas are inversely related to characteristic distances, and the characteristic distances are distances between the row areas and driving chips in the display device;
in the data writing stage, the scanning control end is controlled to be started, and data voltages are written into the pixel circuit;
in the light emitting stage, the light emitting control end is controlled to be turned on, and the pixel circuit drives the light emitting element to emit light based on the initialization voltage and the written data voltage.
In a third aspect, an embodiment of the present invention provides a display panel, including: a substrate base plate, a pixel circuit, a light emitting element, and a display driving circuit provided in the first aspect described above, wherein,
the pixel circuit and the light-emitting element are arranged in an effective display area of the substrate, and the display driving circuit is arranged in a non-display area of the substrate.
In a fourth aspect, an embodiment of the present invention provides a display apparatus, including:
a substrate base;
a plurality of pixel units on the substrate, each pixel unit including a pixel circuit and a light emitting element, the pixel circuit being configured to drive the light emitting element to emit light;
and a display driving circuit provided in the first aspect.
The technical scheme provided by the embodiment of the invention has at least the following technical effects or advantages:
the display driving circuit, the driving method, the display panel and the display device provided by the embodiment of the invention divide the effective display area of the display device into a plurality of row areas according to pixel rows in advance, are connected with the initialization signal line of each row of pixel circuits by adding the voltage control sub-circuit, respectively provide the initialization voltage signal corresponding to the row area for each row of pixel circuits, and the initialization voltage corresponding to each row area is inversely related to the characteristic distance, namely the distance between the row area and the driving chip. Therefore, the initialization voltages of different row areas can be dynamically controlled, the brightness of the brightness bias area, namely the brightness close to the driving chip area, is reduced, the brightness of the brightness bias area, namely the brightness far from the driving chip area, is increased, the problem of non-uniform brightness caused by power supply voltage drop (IR drop) is solved, and the brightness uniformity of the display panel is improved.
The foregoing description is only an overview of the present invention, and is intended to be implemented in accordance with the teachings of the present invention in order that the same may be more clearly understood and to make the same and other objects, features and advantages of the present invention more readily apparent.
Drawings
Various other advantages and benefits will become apparent to those of ordinary skill in the art upon reading the following detailed description of the preferred embodiments. The drawings are only for purposes of illustrating the preferred embodiments and are not to be construed as limiting the invention. Also, like reference numerals are used to designate like parts throughout the figures. In the drawings:
FIG. 1 is a circuit diagram of an exemplary pixel circuit in an embodiment of the invention;
FIG. 2 is a schematic diagram of an exemplary row area division in accordance with an embodiment of the present invention;
FIG. 3 is a schematic diagram of an exemplary display driving circuit according to an embodiment of the present invention;
FIG. 4 is a schematic diagram of an exemplary voltage control sub-circuit in accordance with an embodiment of the present invention;
FIG. 5 is a control timing diagram of an embodiment of the present invention after modification;
FIG. 6 is a flowchart of a pixel driving method according to an embodiment of the invention;
fig. 7 is a schematic structural diagram of a display panel according to an embodiment of the invention.
Detailed Description
Fig. 1 shows a circuit diagram of an exemplary pixel circuit. The pixel circuit includes: the first transistor T1, the second transistor T2, the third transistor T3, the fourth transistor T4, the fifth transistor T5, the sixth transistor T6, the seventh transistor T7, and the capacitor C are configured to drive the light emitting element EL to emit light under the control of the reset control signal, the scan control signal, and the light emission control signal.
Specifically, the working process of the pixel circuit comprises the following steps: a reset phase t1, a data writing phase t2, and a light emitting phase t3. These three working phases are described separately below.
In the Reset phase T1, the Reset control terminal Reset is turned on, the first transistor T1 and the seventh transistor T7 are turned on, and the voltage of the first node N1 is Reset to the initialization voltage V init So as to avoid the problem that the high gray-scale picture can not be switched when the low gray-scale picture is switched. Wherein the initialization voltage terminal VINIT is directly connected with the reset power supply terminal VINIT, and is controlled by the reset control signal only init And the initialization voltage V of all pixel rows init The size is fixed.
In the data writing stage T2, the scan control terminal Gate is turned on, the second transistor T2, the third transistor T3 and the fourth transistor T4 are turned on, and the data voltage V data Node N1 is written. The voltage of the node N1 is V when the charging time is long enough data 。
In the light emitting stage T3, the light emitting control terminal EM is turned on, the sixth transistor T6 is turned on, and the voltage of the node N1 controls the light emitting luminance of the light emitting element EL by controlling the turn-on degree of the third transistor T3.
As can be seen from the above analysis of the operation, the gray level of the light emitting element EL is controlled by the voltage of the node N1 after the completion of the data writing stage. In the ideal case of a sufficiently long charging time, the data voltage V data And the light emission current I satisfies the following formula:
wherein K is a constant, and in practical application, the data voltage V data Is smaller than the supply voltage VDD.
The supply voltage VDD of the pixel circuit is controlled by a power management integrated circuit (Power Management Integrated Circuit, PMIC) in the display device. The VDD of the pixel circuits at different positions varies due to the presence of a supply voltage drop (IR drop). The farther from the IC endThe larger the IR drop, the smaller the VDD compared to the actual input voltage, i.e., the more VDD is toward V data The smaller the light emission current I, the lower the light emission luminance of the light emitting element EL, and the darker the display, resulting in a problem of uneven display luminance, for example, as the near IC side is lighted and the far IC side is lighted.
In view of the above, the inventors have considered that in practical use, a sufficiently long charging time cannot be achieved, and that the ideal state, i.e. "V" in the above formula cannot be achieved data "actually the voltage at the node N1 after data writing, this voltage is affected by the initializing voltage V in addition to the data voltage supplied from the data line init Is a function of (a) and (b). Therefore, the initialization voltage V can be dynamically controlled init The voltage of the node N1 after the data writing is directionally controlled, so that brightness adjustment is performed on the areas with brighter and darker light emission in a targeted manner, and the problem of uneven display brightness caused by the IR drop problem is solved. For example, when the same data voltage V is written data In the case of (2), the initialization voltage V is increased init The voltage of the node N1 can be increased to reduce the light emitting current I and the light emitting brightness, and conversely, the initialization voltage V is reduced init The light emission current I can be increased to thereby improve the light emission luminance.
Therefore, the technical proposal of the invention is that the effective display area of the display device is divided into a plurality of row areas according to pixel rows in advance, and the voltage control sub-circuits are additionally arranged in the display driving circuit to respectively provide the initialization voltage signals corresponding to the row areas for each row of pixel circuits, and the initialization voltage corresponding to each row area is inversely related to the characteristic distance, namely the distance between the row area and the driving chip (Driver Integrated Circuit, DIC). Therefore, the initialization voltages of different row areas can be dynamically controlled, the brightness of the brightness bias area, namely the brightness close to the driving chip area, is reduced, the brightness of the brightness bias area, namely the brightness far from the driving chip area, is increased, the problem of non-uniform brightness caused by IR drop is solved, and the brightness uniformity of the display panel is improved.
Exemplary embodiments of a display driving circuit, a driving method, a display panel, and a display device provided by the present invention will be described in detail below with reference to the accompanying drawings. While exemplary embodiments of the present invention are shown in the drawings, it should be understood that the present invention may be embodied in various forms and should not be limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the scope of the invention to those skilled in the art. In the following, for convenience of description, when comparing the magnitudes of voltages, positive and negative voltages are considered to be positive and negative numbers, that is, positive voltages are considered to be greater than negative voltages. As used herein, "not exactly the same" means that there are at least two differences in the plurality. The term "plurality" includes two or more than two cases.
In a first aspect, embodiments of the present invention provide a display driving circuit applied to a display device configured to supply a driving signal to a pixel circuit that drives a light emitting element to emit light under control of the driving signal. It should be noted that the display driving circuit may be applied to various pixel circuits, for example, the "7T1C" pixel circuit shown in fig. 1, or other pixel circuits having similar structures and operation processes, which is not limited in this embodiment.
The effective display area of the display device is divided into a plurality of row areas according to pixel rows in advance, each row area is provided with at least one row of pixel circuits, and different row areas correspond to different initialization voltages, so that brightness compensation is performed on the different row areas in a targeted manner.
Specifically, the line area division mode can be determined according to the requirement of an actual application scene and multiple experiments. For example, the division may be based on the brightness distribution and brightness uniformity requirements of different display regions under the influence of IR drop.
In order to make the display effect of the display panel conform to the visual perception of human eyes before the display panel leaves the factory, gamma debugging (gamma tuning) is usually performed on the display panel, and the gamma debugging is to debug the central brightness of the display panel to a set brightness. In an alternative embodiment, when dividing the row area, after gamma adjustment is completed, as shown in fig. 2, the middle area MA meeting the set brightness requirement in the effective display area 200 of the display panel may be divided into one row area, and the display areas on both sides of the middle area MA are respectively defined as a near area NA and a far area FA. Wherein the proximal area NA is located on the side of the middle area MA close to the driver chip 201, and the distal area FA is located on the side of the middle area MA far from the driver chip 201. Therefore, brightness compensation can be performed on the near-end area NA and the far-end area FA in a targeted manner by taking the brightness of the middle area MA as a reference after gamma adjustment brightness compensation so as to meet the requirement of uniform brightness.
Further, the near-end area NA and the far-end area FA may be divided into pixel rows, respectively, the near-end area NA is subdivided into k1 row areas, and the far-end area FA is divided into k2 row areas. Where k1 is an integer greater than or equal to 1 and less than M1, k2 is an integer greater than or equal to 1 and less than M2, M1 is the number of pixel rows in the near area NA, and M2 is the number of pixel rows in the far area FA. Note that, the dashed lines in fig. 2 indicate the line area dividing lines, and the number of line area divisions in fig. 2 is merely illustrative, and k1 and k2 may be the same or different according to actual needs.
It should be noted that, when the line areas are divided, the number of pixel lines included in each line area may be the same, or may not be the same, and the number of pixel lines specifically included may be determined according to actual needs. For example, to achieve more accurate brightness compensation, each row region may include 1-10 rows of pixels, such as 1 row, 5 rows, or 10 rows, etc. For example, in one application scenario, each row region includes a row of pixels, and then each row of pixels has a different initialization voltage. Of course, in some application scenarios, each row region may also include more rows of pixels, for example, 20 rows or 30 rows, and the embodiment is not limited thereto.
As shown in fig. 3, a display driving circuit 300 provided in an embodiment of the present invention may include: a gate drive sub-circuit 310 and a voltage control sub-circuit 320. The Gate driving sub-circuit 310 is connected to the scan control terminal Gate, the Reset control terminal Reset, and the emission control terminal EM of each row of pixel circuits, and the voltage control sub-circuit 320 is connected to the initialization voltage terminal vinit of each row of pixel circuits. For example, assuming that n rows of pixels are provided, the Gate driving sub-circuit 310 outputs scan driving signals gate_1 to gate_n and light emission control signals em_1 to em_n, and the voltage control sub-circuit 320 outputs initialization voltage signals vinit_1 to vinit_n. It is understood that the scan driving signal of the i-th row may serve as the reset control signal of the i+1-th row.
Specifically, the gate driving sub-circuit 310 is configured to supply a row reset control signal, a scan control signal, and a light emission control signal to each row of pixel circuits, respectively. In an alternative embodiment, the Gate drive sub-circuit 310 may include a row scan driver connected to the scan control terminal Gate and the Reset control terminal Reset of each row of pixel circuits, configured to provide scan control signals to each row of pixel circuits, and an emission controller. The emission controller is connected to the emission control terminal EM of each row of pixel circuits and configured to supply a row reset control signal and a scan control signal to each row of pixel circuits.
For example, the row scan driver and the emission controller may each be implemented by a group of GOA (Gate Driver On Array, array substrate row drive circuit) units, which may be referred to as Reset/Gate GOA, configured to implement the row scan driver, each stage of Reset/Gate GOA units being configured to provide a scan control signal to a corresponding pixel row; the group of GOA units configured to implement the emission controller is referred to as EM GOAs, and each stage of EM GOAs is configured to provide a light emission control signal to a corresponding pixel row, which will not be described in detail in the present embodiment with reference to the related art.
In another alternative embodiment, in order to reduce the frame width of the display product, the gate driving sub-circuit 310 may also employ a set of GOA units cascaded in sequence, where each GOA is configured to provide a scan control signal and a light emission control signal to a corresponding pixel row, which will not be described in detail in this embodiment with reference to the related art.
The voltage control sub-circuit 320 is configured to provide an initialization voltage signal corresponding to the row region in which each row of pixel circuits is located. The initializing voltages of the pixel circuits in the same row area are the same, and the initializing voltages corresponding to the row areas are inversely related to the characteristic distance. Wherein the feature distance is the distance between the row area and the driving chip 201. That is, the larger the feature distance is, the smaller the corresponding initialization voltage is.
It should be noted that, the voltage control sub-circuit 320 may be integrated into the driving chip 201, or the voltage control sub-circuit 320 may be integrated onto the array substrate together with the gate driving sub-circuit 310 to reduce the frame width of the display product.
For example, as shown in fig. 4, the voltage control sub-circuit 320 may include a clock signal line and a GOA cell group including a plurality of GOA cells (G1, G2, … … Gn as shown in fig. 4) that are sequentially cascaded. The input signal end of the first stage GOA unit G1 is connected with the reset power supply end VINIT, the clock end of each stage GOA unit is connected with the clock signal line, and the output end of each stage GOA unit is connected with the initialization voltage end of one row of pixel circuits. The GOA unit group is configured to provide an initialization voltage signal corresponding to a row region where the pixel circuit is located row by row under the control of a clock signal provided by a clock signal line.
Specifically, in the voltage control sub-circuit 320, at least two clock signal lines, i.e., a positive clock signal line CLK and an inverted clock signal line CLKB, are provided to the GOA unit group, respectively, to provide the first clock signal CK and the second clock signal CB. It should be noted that the number of clock signal lines shown in fig. 4 is merely illustrative, and not limiting, and the number of specific clock signal lines may be determined according to the actual application scenario. The first clock signal CK and the second clock signal CB are generated according to a predetermined row-by-row control timing and an initialization voltage corresponding to a row region where each row of pixels is located. By controlling the time sequence of the first clock signal CK and the second clock signal CB, on the one hand, the time sequence of the initialization voltage signal output by each GOA unit can be controlled, and the application of the initialization voltage V to the pixel circuits row by row is realized init I.e. to realize an initialization voltage V init On the other hand, the initialization voltage output by each GOA unit can be controlled to ensure that the GOA units corresponding to different row areas outputDifferent initialization voltages V init Applied to the corresponding pixel circuit. The specific voltage regulation is similar to the principle of a direct current Chopper circuit (DC Chopper), and will not be described in detail here.
Fig. 5 shows an exemplary control timing of one working cycle of the pixel circuit (taking the pixel circuit shown in fig. 1 as an example) under the control of the display driving circuit 300 provided in this embodiment, which is the waveform of the light emission control signal input by the light emission control terminal EM, the waveform of the Reset control signal input by the Reset control terminal Reset, the waveform of the scan control signal input by the scan control terminal Gate, and the waveform of the initialization voltage signal input by the initialization voltage terminal vinit, which are all triggered by the falling edge and are active at low level. In the Reset phase, the initialization voltage terminal vinit and the Reset control terminal Reset are turned on to Reset the voltage of the node N1 to the corresponding initialization voltage V init Then the initialization voltage terminal vinit and the Reset control terminal Reset are closed, the data writing stage is entered, the scan control terminal Gate is opened, and the data voltage V is written into the node N1 data Then, the scan control terminal Gate is turned off, the light emitting stage is entered, the light emitting control terminal EM is turned on, the voltage of the node N1 controls the turn-on degree of the third transistor T3, and the light emitting brightness of the light emitting element is controlled.
Compared with the existing control timing sequence, the voltage control sub-circuit 320 is additionally arranged, so that the control timing sequence of the initialization voltage signal is increased, the line-by-line starting of the initialization voltage and the dynamic control of the magnitude of the initialization voltage are realized, the brightness of a brightness bias area, namely a brightness close to a driving chip area, is reduced, and the brightness of a brightness bias area, namely a brightness far away from the driving chip area, is increased, so that the problem of non-uniformity of brightness caused by IR drop is solved.
It should be noted that, in order to ensure stability of the magnitude of the initialization voltage applied to the node N1 when the Reset control terminal Reset is turned on, in an alternative embodiment, the turn-on time T1 of the initialization voltage signal is before the turn-on time T2 of the Reset control signal in one working period of the pixels in the same row. Of course, the off time T3 of the initialization voltage signal is also before the on time T4 of the scan control signal, as is the case with the reset control signal.
In addition, before implementation, the initialization voltages corresponding to the different row regions need to be preset. For example, after the gamma debug is completed, the initialization voltage corresponding to the intermediate area MA may be used as a reference voltage, that is, the magnitude of the initialization voltage of the intermediate area MA may be kept unchanged. The initialization voltage settings for each row of areas in the near area NA and the far area FA satisfy the rule: sequentially increasing the initialization voltage of each row region in the near-end region NA on the basis of the reference voltage in the direction toward the driving chip 201; in a direction away from the driving chip 201, the initialization voltages of the respective row areas in the far-end area FA are sequentially reduced on the basis of the reference voltage. Taking k1 and k2 as 1, that is, taking the near end area NA as one row area and the far end area FA as one row area as an example, assuming that the initialization voltage corresponding to the middle area MA is-3V, the initialization voltage corresponding to the near end area NA is increased on the basis, for example, may be set to-2V, -1V, 0V or even set to a positive voltage, and the initialization voltage corresponding to the far end area FA is decreased on the basis, for example, may be set to-4V or-5V.
It should be noted that the initialization voltage setting in the above example is merely an example, and in a specific implementation, the initialization voltages of each row area in the near-end area NA and the far-end area FA may be obtained by debugging according to the initialization voltage setting rule after determining the reference voltage.
For example, to simplify the debugging process, one line area may be selected in the near-end area NA as a debugging target. Debugging the initialization voltage of the debugging target: an optical instrument with a smaller probe size is placed at the center position C of the display panel, and the brightness LC and the position coordinate Y at the position are recorded C The method comprises the steps of carrying out a first treatment on the surface of the Then the optical instrument is placed at the central position A of the debugging target, and the brightness LA and the position coordinate Y of the position are recorded A And adjusting the initialization voltage applied to the debugging target, and taking the adjusted initialization voltage as an initialization voltage set value corresponding to the debugging target on the assumption that the brightness of the debugging target is consistent with that of the central point after the aV is adjusted. And, the initialization voltage compensation value delta for each row region can be obtained according to the following formula vinit 。
Wherein a represents the initialization voltage difference between the A point and the C point after the debugging, |Y A -Y C I represents the longitudinal distance between points A and C, X is any point in the effective display area, and the voltage compensation value delta is initialized vinit The initialization voltage difference needs to be adjusted for any point in the active display area.
Thus, the initialization voltage compensation value delta of each row area in the near-end area NA and the far-end area FA according to the reference voltage vinit The initialization voltage set value for each row region is determined and stored in the driving chip 201.
In a second aspect, based on the same inventive concept, an embodiment of the present invention further provides a pixel driving method applied to a display device, an effective display area of the display device is divided into a plurality of row areas by pixel rows, and each row area includes at least one row of pixel circuits. As shown in fig. 6, the method may include the steps of:
step S601, in the resetting stage, the resetting control end and the initializing voltage end are controlled to be started, initializing voltages corresponding to the row areas are input to the pixel circuit, wherein the initializing voltages corresponding to the row areas are inversely related to the characteristic distances, and the characteristic distances are the distances between the row areas and the driving chips 201 in the display device;
step S602, in the data writing stage, the scanning control end is controlled to be turned on, and data voltages are written into the pixel circuits;
in step S603, in the light emitting stage, the light emitting control terminal is controlled to be turned on, and the pixel circuit drives the light emitting element to emit light based on the initialization voltage and the written data voltage.
It should be noted that, the specific implementation process of step S601 to step S603 may refer to the related description of the first aspect, and will not be repeated here.
In a third aspect, based on the same inventive concept, an embodiment of the present invention further provides a display panel, as shown in fig. 7, the display panel 700 including: the substrate, the pixel circuit 701, the light emitting element, and the display driver circuit 300 provided in the first aspect described above. The pixel circuit 701 and the light emitting element are provided in an effective display region of the substrate, and the display driving circuit 300 is provided in a non-display region of the substrate.
For example, the substrate may be a suitable substrate such as a glass substrate or a quartz substrate. The pixel circuit 701 may be the "7T1C" pixel circuit 701 shown in fig. 1, or other pixel circuits 701 having similar structures and operation processes, which is not limited in this embodiment. The light emitting element may be a light emitting diode, which may be, for example, an Organic Light Emitting Diode (OLED) or a quantum dot light emitting diode (QLED), or the like.
In the display driving circuit 300, the specific layout of the gate driving sub-circuit 310 may refer to the related art, for example, may be laid out in the non-display area on both sides of the pixel circuit 701, or may be laid out in the non-display area on one side of the pixel circuit 701, which is not limited in this embodiment. The layout shown in fig. 7 is merely illustrative, and is not intended to be limiting.
Similarly, the voltage control sub-circuit 320 may be disposed in the non-display area on both sides of the pixel circuit 701, or disposed in the non-display area on one side of the pixel circuit 701, which is not limited in this embodiment.
It should be noted that, other details of the implementation of the display panel 700 may refer to the related art, which will not be described in detail herein.
Since the display driving circuit 300 included in the display panel according to the embodiment of the present invention has been described in the foregoing, based on the display driving circuit 300 according to the embodiment of the present invention, a person skilled in the art can understand the specific structure and effect principle of the display panel, and therefore, the description thereof is omitted herein. Any display panel 700 including the display driving circuit 300 according to the embodiment of the invention is within the scope of the invention.
In a fourth aspect, based on the same inventive concept, an embodiment of the present invention further provides a display apparatus, including: the substrate, the plurality of pixel units, and the display driving circuit 300 provided in the first aspect. The pixel units are located on the substrate, and each pixel unit comprises a pixel circuit and a light emitting element, and the pixel circuit is configured to drive the light emitting element to emit light. The display driving circuit 300 is connected to the pixel circuit, and provides a reset control signal, a scan control signal, a light emitting control signal, and an initialization voltage signal for the pixel circuit, which can be specifically described with reference to the above related description of the first aspect, and will not be repeated here.
In the display device, the voltage control sub-circuit 320 of the display driving circuit 300 may be integrated on the array substrate of the display panel or may be integrated in the driving chip 201, which is not limited in this embodiment.
For example, the display device may be: any product or component with display function such as a mobile phone, electronic paper, tablet computer, television, display, notebook computer, wearable device, digital photo frame or navigator.
Since the display driving circuit 300 included in the display device according to the embodiment of the present invention has been described in the foregoing, based on the display driving circuit 300 according to the embodiment of the present invention, a person skilled in the art can understand the specific structure and effect principle of the display device, and therefore, the description thereof is omitted herein. All display devices including the display driving circuit 300 according to the embodiments of the present invention are within the scope of the present invention.
In the description provided herein, numerous specific details are set forth. However, it is understood that embodiments of the invention may be practiced without these specific details. In some instances, well-known methods, structures and techniques have not been shown in detail in order not to obscure an understanding of this description.
Similarly, it should be appreciated that in the foregoing description of exemplary embodiments of the invention, various features of the invention are sometimes grouped together in a single embodiment, figure, or description thereof for the purpose of streamlining the disclosure and aiding in the understanding of one or more of the various inventive aspects. However, the disclosed method should not be construed as reflecting the intention that: i.e., the claimed invention requires more features than are expressly recited in each claim. Rather, as the following claims reflect, inventive aspects lie in less than all features of a single foregoing disclosed embodiment. Thus, the claims following the detailed description are hereby expressly incorporated into this detailed description, with each claim standing on its own as a separate embodiment of this invention.
Those skilled in the art will appreciate that the modules in the apparatus of the embodiments may be adaptively changed and disposed in one or more apparatuses different from the embodiment. The modules or units or components of the embodiments may be combined into one module or unit or component and, furthermore, they may be divided into a plurality of sub-modules or sub-units or sub-components. Any combination of all features disclosed in this specification (including any accompanying claims, abstract and drawings), and all of the processes or units of any method or apparatus so disclosed, may be used in combination, except insofar as at least some of such features and/or processes or units are mutually exclusive. Each feature disclosed in this specification (including any accompanying claims, abstract and drawings), may be replaced by alternative features serving the same, equivalent or similar purpose, unless expressly stated otherwise.
Furthermore, those skilled in the art will appreciate that while some embodiments herein include some features but not others included in other embodiments, combinations of features of different embodiments are meant to be within the scope of the invention and form different embodiments. For example, in the following claims, any of the claimed embodiments can be used in any combination.
It should be noted that the above-mentioned embodiments illustrate rather than limit the invention, and that those skilled in the art will be able to design alternative embodiments without departing from the scope of the appended claims. The word "comprising" does not exclude the presence of elements or steps not listed in a claim. The word "a" or "an" preceding an element does not exclude the presence of a plurality of such elements. The invention may be implemented by means of hardware comprising several distinct elements, and by means of a suitably programmed computer. In the unit claims enumerating several means, several of these means may be embodied by one and the same item of hardware. The use of the words first, second, etc. do not denote any order. These words may be interpreted as names.
Claims (8)
1. A display driving circuit, characterized by being applied to a display device whose effective display area is divided into a plurality of row areas by pixel rows, each row area including at least one row of pixel circuits, comprising:
a gate driving sub-circuit connected to the scan control terminal, the reset control terminal, and the light emission control terminal of each row of pixel circuits, and configured to provide a reset control signal, a scan control signal, and a light emission control signal to each row of pixel circuits, respectively;
the voltage control sub-circuit is connected with the initialization voltage end of each row of pixel circuits and is configured to provide initialization voltage signals corresponding to the row area where the pixel circuits are located, wherein the initialization voltage corresponding to each row area is inversely related to the characteristic distance, and the characteristic distance is the distance between the row area and a driving chip in the display device;
the voltage control sub-circuit comprises a clock signal line and a GOA unit group, wherein the GOA unit group comprises a plurality of GOA units which are sequentially cascaded, an input signal end of a first-stage GOA unit is connected with a reset power end, a clock end of each stage GOA unit is connected with the clock signal line, an output end of each stage GOA unit is connected with an initialization voltage end of a row of pixel circuits, and the GOA unit group is configured to provide initialization voltage signals corresponding to a row area for the pixel circuits row by row under the control of clock signals provided by the clock signal line;
in one working period of the pixels in the same row, the starting time of the initialization voltage signal is before the starting time of the reset control signal, and the stopping time of the initialization voltage signal is before the starting time of the scanning control signal.
2. The display driving circuit according to claim 1, wherein the plurality of row regions are divided into a middle region, a near-end region and a far-end region, the near-end region is located on a side of the middle region close to the driving chip, the far-end region is located on a side of the middle region away from the driving chip, and an initialization voltage corresponding to the middle region is a reference voltage;
along the direction towards the driving chip, the initialization voltage of each row area in the near area is increased in turn on the basis of the reference voltage;
along the direction facing away from the driving chip, the initialization voltage of each row region in the far-end region is sequentially reduced on the basis of the reference voltage.
3. The display drive circuit according to claim 1, wherein the number of pixel rows included in each row region is the same or not the same.
4. The display drive circuit according to claim 1, wherein each row region includes 1 to 10 rows of pixel circuits.
5. The display driver circuit of claim 1, wherein the gate drive sub-circuit comprises a row scan driver and an emission controller,
the row scanning driver is connected with the scanning control end and the resetting control end of each row of pixel circuits and is configured to provide resetting control signals and scanning control signals for each row of pixel circuits;
the emission controller is connected with the light-emitting control end of each row of pixel circuits and is configured to provide row light-emitting control signals for each row of pixel circuits.
6. A pixel driving method applied to a display device whose effective display area is divided into a plurality of row areas by pixel rows, each row area including at least one row of pixel circuits, the method comprising:
in a reset stage, a reset control end and an initialization voltage end are controlled to be started, under the control of a clock signal provided by a clock signal line, initialization voltages corresponding to a row area where the GOA unit group is positioned are input to the pixel circuits row by row, wherein the initialization voltages corresponding to each row area are inversely related to characteristic distances, the characteristic distances are distances between the row areas and driving chips in the display device, the GOA unit group comprises a plurality of GOA units which are sequentially cascaded, an input signal end of a first-stage GOA unit is connected with a reset power end, a clock end of each GOA unit is connected with the clock signal line, and an output end of each GOA unit is connected with an initialization voltage end of one row of pixel circuits; in one working period of the pixels in the same row, the starting time of the initialization voltage is before the starting time of the reset control signal, and the stopping time of the initialization voltage is before the starting time of the scanning control signal;
in the data writing stage, the scanning control end is controlled to be started, and data voltages are written into the pixel circuit;
in the light emitting stage, the light emitting control end is controlled to be turned on, and the pixel circuit drives the light emitting element to emit light based on the initialization voltage and the written data voltage.
7. A display panel, comprising: the substrate, the pixel circuit, the light emitting element, and the display driver circuit according to any one of claims 1 to 5,
the pixel circuit and the light-emitting element are arranged in an effective display area of the substrate, and the display driving circuit is arranged in a non-display area of the substrate.
8. A display device, comprising:
a substrate base;
a plurality of pixel units on the substrate, each pixel unit including a pixel circuit and a light emitting element, the pixel circuit being configured to drive the light emitting element to emit light;
and a display driving circuit as claimed in any one of claims 1 to 5.
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