CN114783363A - Display device and signal control method - Google Patents
Display device and signal control method Download PDFInfo
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- CN114783363A CN114783363A CN202210440461.5A CN202210440461A CN114783363A CN 114783363 A CN114783363 A CN 114783363A CN 202210440461 A CN202210440461 A CN 202210440461A CN 114783363 A CN114783363 A CN 114783363A
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
- G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
- G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2320/00—Control of display operating conditions
- G09G2320/02—Improving the quality of display appearance
- G09G2320/0233—Improving the luminance or brightness uniformity across the screen
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Abstract
The embodiment of the application discloses a display device and a signal control method, wherein the display device comprises: the circuit board comprises at least two time sequence control chips; each display area comprises at least two types of data lines, each type of data line comprises a plurality of subdata lines, each subdata line in each type of data line is provided with at least one subdata line in at least one type of data line and is arranged adjacent to the subdata line, and the type number of the data lines corresponds to the number of the time sequence control chips; the at least two time sequence control chips are used for respectively controlling the signal transmission of a plurality of sub data lines in the at least two types of data lines so as to enable the display device to display pictures. According to the embodiment of the application, the adjacent sub data lines in the same display area are controlled by different time sequence control chips, and the brightness difference of the adjacent data lines is difficult to capture by human eyes, so that the problem of uneven brightness of the display device is solved, and the display effect is improved.
Description
Technical Field
The application belongs to the technical field of display, and particularly relates to a display device and a signal control method.
Background
With the continuous development and progress of display technologies and the demand of people for large-size and high-resolution display in the information age, increasingly abundant large-screen display products are brought, such as liquid crystal display devices, Micro LED display devices, Mini _ LED display devices and AMOLED display devices. The conventional liquid crystal display device and the AMOLED display device sometimes adopt a small-size display screen to obtain a larger display device in a splicing mode in order to realize a large-picture display effect, and the manufacturing process of the novel Micro LED and Mini _ LED display devices is a splicing technology, so that a large-screen display device with any size and resolution can be manufactured.
The large-screen display often needs a plurality of sequential control chips for data processing, but each sequential control chip is not completely the same, so that the problem of regional brightness unevenness of the display device can be caused.
Disclosure of Invention
The embodiment of the application provides a display device and a signal control method, which solve the problem of uneven brightness of the display device and improve the display effect.
In a first aspect, an embodiment of the present application provides a display device, including:
the circuit board comprises at least two sequential control chips;
each display area comprises at least two types of data lines, each type of data line comprises a plurality of sub data lines, each sub data line in each type of data line is provided with at least one sub data line in at least one type of data line and is arranged adjacent to the sub data line, and the type number of the data lines corresponds to the number of the time sequence control chips; wherein, the first and the second end of the pipe are connected with each other,
the at least two time sequence control chips are used for respectively controlling the signal transmission of a plurality of sub data lines in the at least two types of data lines so as to enable the display device to display pictures.
Optionally, in some embodiments, the at least two timing control chips include a first timing control chip and a second timing control chip, the at least two types of data lines include a first type of data line and a second type of data line, the first type of data line includes a plurality of first sub data lines, the second type of data line includes a plurality of second sub data lines, and each first sub data line is adjacent to at least one second sub data line; wherein, the first and the second end of the pipe are connected with each other,
the first time sequence control chip is used for controlling signal transmission of a plurality of first subdata lines in the first type of data lines, and the second time sequence control chip is used for controlling signal transmission of a plurality of second subdata lines in the second type of data lines, so that the display device displays pictures.
Optionally, in some embodiments, the at least two timing control chips include a first timing control chip, a second timing control chip, and a third timing control chip, the at least two types of data lines include a first type of data line, a second type of data line, and a third type of data line, the first type of data line includes a plurality of first sub data lines, the second type of data line includes a plurality of second sub data lines, the third type of data line includes a plurality of third sub data lines, each of the first sub data lines is adjacent to at least one of the second sub data lines, each of the second sub data lines is adjacent to at least one of the third sub data lines, and each of the third sub data lines is adjacent to at least one of the first sub data lines; wherein, the first and the second end of the pipe are connected with each other,
the first time sequence control chip is used for controlling signal transmission of a plurality of first sub data lines in the first type of data lines, the second time sequence control chip is used for controlling signal transmission of a plurality of second sub data lines in the second type of data lines, and the third time sequence control chip is used for controlling signal transmission of a plurality of third sub data lines in the third type of data lines, so that the display device can display pictures.
Optionally, in some embodiments, the at least two timing control chips include a first timing control chip, a second timing control chip, a third timing control chip, and a fourth timing control chip, the at least two types of data lines include a first type of data line, a second type of data line, a third type of data line, and a fourth type of data line, the first type of data line includes a plurality of first sub data lines, the second type of data line includes a plurality of second sub data lines, the third type of data line includes a plurality of third sub data lines, the fourth type of data line includes a plurality of fourth sub data lines, each first sub data line is disposed adjacent to at least one second sub data line, each second sub data line is disposed adjacent to at least one third sub data line, each third sub data line is disposed adjacent to at least one fourth sub data line, each fourth sub data line is arranged adjacent to at least one first sub data line; wherein the content of the first and second substances,
the first time sequence control chip is used for controlling signal transmission of a plurality of first sub data lines in the first type of data lines, the second time sequence control chip is used for controlling signal transmission of a plurality of second sub data lines in the second type of data lines, the third time sequence control chip is used for controlling signal transmission of a plurality of third sub data lines in the third type of data lines, and the fourth time sequence control chip is used for controlling signal transmission of a plurality of fourth sub data lines in the fourth type of data lines, so that the display device displays pictures.
Optionally, in some embodiments, the number of the display areas is greater than or equal to the number of the timing control chips.
In a second aspect, an embodiment of the present application further provides a signal control method, applied to a display device, a circuit board of the display device, and a plurality of display areas, where the method includes:
acquiring the number of time sequence control chips in the circuit board, wherein the number of the time sequence control chips is at least two;
determining the type number of the data lines in each display area according to the number of the time sequence control chips, wherein each display area comprises at least two types of data lines, each type of data line comprises a plurality of sub data lines, and each sub data line in each type of data line is provided with at least one sub data line in at least one type of data line and is arranged adjacent to the sub data line;
and respectively controlling the signal transmission of a plurality of sub data lines in the at least two types of data lines through the at least two time sequence control chips so as to enable the display device to display pictures.
Optionally, in some embodiments, the at least two timing control chips include a first timing control chip and a second timing control chip, the at least two types of data lines include a first type of data line and a second type of data line, the first type of data line includes a plurality of first sub data lines, the second type of data line includes a plurality of second sub data lines, and each first sub data line is adjacent to at least one second sub data line, and the method further includes:
and controlling the signal transmission of a plurality of first subdata lines in the first type of data lines through the first time sequence control chip, and controlling the signal transmission of a plurality of second subdata lines in the second type of data lines through the second time sequence control chip so as to enable the display device to display a picture.
Optionally, in some embodiments, the at least two timing control chips include a first timing control chip, a second timing control chip, and a third timing control chip, the at least two types of data lines include a first type of data line, a second type of data line, and a third type of data line, the first type of data line includes a plurality of first sub data lines, the second type of data line includes a plurality of second sub data lines, the third type of data line includes a plurality of third sub data lines, each of the first sub data lines is disposed adjacent to at least one of the second sub data lines, each of the second sub data lines is disposed adjacent to at least one of the third sub data lines, each of the third sub data lines is disposed adjacent to at least one of the first sub data lines, and the method further includes:
the signal transmission of a plurality of first subdata lines in the first type of data lines is controlled through the first time sequence control chip, the signal transmission of a plurality of second subdata lines in the second type of data lines is controlled through the second time sequence control chip, and the signal transmission of a plurality of third subdata lines in the third type of data lines is controlled through the third time sequence control chip, so that the display device displays pictures.
Optionally, in some embodiments, the at least two timing control chips include a first timing control chip, a second timing control chip, a third timing control chip, and a fourth timing control chip, the at least two types of data lines include a first type of data line, a second type of data line, a third type of data line, and a fourth type of data line, the first type of data line includes a plurality of first sub data lines, the second type of data line includes a plurality of second sub data lines, the third type of data line includes a plurality of third sub data lines, the fourth type of data line includes a plurality of fourth sub data lines, each of the first sub data lines is disposed adjacent to at least one of the second sub data lines, each of the second sub data lines is disposed adjacent to at least one of the third sub data lines, each of the third sub data lines is disposed adjacent to at least one of the fourth sub data lines, each fourth sub data line is arranged adjacent to at least one first sub data line, and the method further includes:
the signal transmission of a plurality of first subdata lines in the first type of data lines is controlled through the first time sequence control chip, the signal transmission of a plurality of second subdata lines in the second type of data lines is controlled through the second time sequence control chip, the signal transmission of a plurality of third subdata lines in the third type of data lines is controlled through the third time sequence control chip, and the signal transmission of a plurality of fourth subdata lines in the fourth type of data lines is controlled through the fourth time sequence control chip, so that the display device displays pictures.
In a third aspect, an embodiment of the present application further provides a display device, including:
a housing;
the circuit board is arranged in the shell and comprises at least two sequential control chips;
the display areas are arranged in the shell, each display area comprises at least two types of data lines, each type of data line comprises a plurality of subdata lines, each subdata line in each type of data line is provided with at least one subdata line in at least one type of data line and is arranged adjacent to the subdata line, and the type number of the data lines corresponds to the number of the time sequence control chips;
a memory storing a computer program;
a processor that executes the signal control method as described in any one of the above by calling the computer program stored in the memory.
The display device provided by the embodiment of the application comprises: the circuit board comprises at least two time sequence control chips; each display area comprises at least two types of data lines, each type of data line comprises a plurality of subdata lines, each subdata line in each type of data line is provided with at least one subdata line in at least one type of data line and is arranged adjacent to the subdata line, and the type number of the data lines corresponds to the number of the sequential control chips; the at least two time sequence control chips are used for respectively controlling the signal transmission of a plurality of sub data lines in the at least two types of data lines so as to enable the display device to display pictures. According to the embodiment of the application, the adjacent sub data lines in the same display area are controlled by different time sequence control chips, and the brightness difference of the adjacent data lines is difficult to capture by human eyes, so that the problem of uneven brightness of the display device is solved, and the display effect is improved.
Drawings
The technical solutions and advantages of the present application will become apparent from the following detailed description of specific embodiments of the present application when taken in conjunction with the accompanying drawings.
Fig. 1 is a schematic structural diagram of a display device in the prior art.
Fig. 2 is a schematic structural diagram of a display device according to an embodiment of the present disclosure.
Fig. 3 is a schematic view of a second structure of a display device according to an embodiment of the present disclosure.
Fig. 4 is a schematic structural diagram of a third display device according to an embodiment of the present application.
Fig. 5 is a schematic flowchart of a signal control method according to an embodiment of the present disclosure.
Detailed Description
The technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application. It should be apparent that the described embodiments are only a few embodiments of the present application, and not all embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present application.
Unless defined otherwise, technical or scientific terms used herein should have the same meaning as commonly understood by one of ordinary skill in the art to which this invention belongs. The use of "first," "second," and similar terms in this disclosure is not intended to indicate any order, quantity, or importance, but rather is used to distinguish one element from another.
The large-screen display often needs a plurality of sequential control chips for data processing, but each sequential control chip is not completely the same, so that the problem of regional brightness unevenness of the display device can be caused. Referring to fig. 1, fig. 1 is a schematic structural diagram of a display panel in the prior art. The display device 100 includes two display regions, which are a first display region 110 and a second display region 120, respectively, each display region includes a plurality of data lines, the display device 100 further includes two timing control chips 130, the two timing control chips 130 are respectively disposed at corresponding positions of the first display region 110 and the second display region 120, one of the timing control chips 130 controls the plurality of data lines in the first display region 110, and the other timing control chip 130 controls the plurality of data lines in the second display region 120.
However, since the two timing control chips 130 are different, the first display region 110 and the second display region 120 have a significant difference in luminance. The first display area 110 and the second display area 120 may be different display areas of the same display screen, and certainly, the first display area 110 and the second display area 120 may also be a display screen, and the display device 100 is an integral display device formed by splicing the display screens corresponding to the first display area 110 and the second display area 120.
In order to solve the problem of brightness difference of different display areas of a display device caused by different time sequence control chips in the prior art, the embodiment of the application provides the display device and a signal control method. Referring to fig. 2, fig. 2 is a schematic structural diagram of a display device according to an embodiment of the present disclosure. The display device 200 may include a circuit board and a plurality of display regions 210, among others.
The circuit board may include at least two timing control chips 220, the timing control chips 220 (TCON) are used for bridging the circuit board and the display panel, and mainly have two functions, One is to receive image data sent By the circuit board through a V-By-One, LVDS or eDP interface, then encode the image data according to the interface protocol requirement of the corresponding display panel model, and generate a synchronous display panel scanning control signal, under the control of the scanning control signal, the image data encoded according to a specific protocol is transmitted to the display panel line By line frame By frame through a high-speed differential signal to be displayed; and secondly, providing voltages of VGH, VGL, GAMMA, AVDD and the like required by the work for the display panel.
The display areas 210 may be different display areas of the same display screen, and certainly, each display area 210 may also correspond to one display screen, and the display apparatus 200 is an integral display apparatus formed by splicing a plurality of display screens corresponding to the display areas 210.
It should be noted that, human eyes usually have difficulty in distinguishing the brightness difference smaller than 2nits, that is, 2nits can be used as the brightness difference threshold, in the prior art, the brightness difference between the first display area 110 and the second display area 120 is obvious, which indicates that the brightness difference between the first display area 110 and the second display area 120 is larger than the brightness difference threshold. And human eyes can hardly capture the brightness difference between two adjacent data lines, namely the brightness difference between two adjacent data lines is smaller than a brightness difference threshold value.
Therefore, in the present embodiment, each display area 210 includes at least two types of data lines, each type of data line includes a plurality of sub data lines, and each sub data line in each type of data line has at least one sub data line in at least one type of data line disposed adjacent to the sub data line. The number of the types of the data lines corresponds to the number of the timing control chips 220, and if the number of the timing control chips 220 is two, the number of the types of the data lines is also two; if the number of the timing control chips 220 is three, the number of the types of the data lines is three.
Specifically, all data lines in each display area 210 are divided into at least two types, and each type of data line includes a plurality of sub data lines, and signal transmission of the plurality of sub data lines in the at least two types of data lines can be controlled by the at least two timing control chips 220, so that the display device 200 displays a picture. It can be understood that, since each sub data line of each type of data line is controlled by the first timing control chip 220, and each sub data line in each type of data line has at least one sub data line in at least one type of data line disposed adjacent thereto, and a plurality of sub data lines of the at least one type of data lines are controlled by the second timing control chip 220, so that each sub-data line controlled by the first timing control chip 220 and each sub-data line controlled by the second timing control chip 220 are two adjacent sub-data lines, since the difference in brightness between two adjacent data lines is difficult to capture by human eyes, even if the first timing control chip 220 is different from the second timing control chip 220, the resulting difference in brightness cannot be captured by human eyes, therefore, the problem of uneven brightness of the plurality of display areas 210 of the display device 200 caused by the difference of the time sequence control chips 220 is solved.
Continuing with FIG. 2, the display device 200 is illustrated as including two display regions 210. The at least two timing control chips 220 include a first timing control chip 221 and a second timing control chip 222, the at least two types of data lines include a first type data line 30 and a second type data line 40, the first type data line 30 includes a plurality of first sub data lines 31, the second type data line 40 includes a plurality of second sub data lines 41, and each first sub data line 31 is adjacent to at least one second sub data line 41.
Each display area 210 includes a plurality of sub data lines arranged in sequence, and the number of the data lines in each display area 210 may be the same. Assuming that the number of data lines in each display area 210 is 6, and the 6 sub-data lines are sequentially arranged, the first type data line 30 may be an odd-numbered data line of the first sub-data line, the third sub-data line, and the fifth sub-data line, and the second type data line 40 may be an even-numbered data line of the second sub-data line, the fourth sub-data line, and the sixth sub-data line. A first sub data line of the first type data lines 30 has a second sub data line of the second type data lines 40 disposed adjacent thereto, a second sub data line of the second type data lines 40 has a first sub data line and a third sub data line of the first type data lines 30 disposed adjacent thereto, and so on.
The first timing control chip 221 controls signal transmission of a plurality of first sub-data lines 31 in the first-type data lines 30, and the second timing control chip 222 controls signal transmission of a plurality of second sub-data lines 41 in the second-type data lines 40, so that the display device 200 displays a picture, even if the first timing control chip 221 and the second timing control chip 222 are different, because each first sub-data line 31 controlled by the first timing control chip 221 has at least one second sub-data line 41 controlled by the second timing control chip 222 and is arranged adjacent to the first sub-data line, human eyes cannot catch brightness difference, and the problem that the brightness of a plurality of display areas 210 of the display device 200 is uneven due to the difference of the timing control chips 220 is solved.
Referring to fig. 3, fig. 3 is a schematic view of a second structure of a display device according to an embodiment of the present disclosure, which is illustrated by a display device 200 including three display regions 210. The at least two timing control chips 220 include a first timing control chip 221, a second timing control chip 222, and a third timing control chip 223, the at least two types of data lines include a first type data line 30, a second type data line 40, and a third type data line 50, the first type data line 30 includes a plurality of first sub data lines 31, the second type data line 40 includes a plurality of second sub data lines 41, the third type data line 50 includes a plurality of third sub data lines 51, each first sub data line 31 is disposed adjacent to at least one second sub data line 41, each second sub data line 41 is disposed adjacent to at least one third sub data line 51, and each third sub data line is disposed adjacent to at least one first sub data line 31.
Each display area 210 includes a plurality of sub data lines arranged in sequence, and the number of the data lines in each display area 210 may be the same. Assuming that the number of data lines in each display area 210 is 6, and the 6 sub-data lines are arranged in sequence, the first type data line 30 may be a first sub-data line and a fourth sub-data line, the second type data line 40 may be a second sub-data line and a fifth sub-data line, and the third type data line 50 may include a third sub-data line and a sixth sub-data line. A first sub data line of the first type data lines 30 has a second sub data line of the second type data lines 40 disposed adjacent thereto, a second sub data line of the second type data lines 40 has a third sub data line of the third type data lines 50 disposed adjacent thereto, a third sub data line of the third type data lines 50 has a fourth sub data line of the first type data lines 30 disposed adjacent thereto, and so on.
The signal transmission of a plurality of first sub-data lines 31 in the first-type data lines 30 is controlled by the first timing control chip 221, the signal transmission of a plurality of second sub-data lines 41 in the second-type data lines 40 is controlled by the second timing control chip 222, and the signal transmission of a plurality of third sub-data lines 51 in the third-type data lines 50 is controlled by the third timing control chip 223, so that the display apparatus 200 displays a picture, even if there is a difference between the first timing control chip 221, the second timing control chip 222 and the third timing control chip 223, since each first sub-data line 31 controlled by the first timing control chip 221 has at least one second sub-data line 41 controlled by the second timing control chip 222 or at least one third sub-data line 51 controlled by the third timing control chip 223 and is disposed adjacent thereto, similarly, each second sub-data line 41 controlled by the second timing control chip 222 has at least one second sub-data line 221 controlled by the first timing control chip 221 At least one third sub data line 51 controlled by the first sub data line 31 or the third sequential control chip 223 is arranged adjacent to the first sub data line; each of the third sub data lines 51 controlled by the third timing control chip 223 has at least one first sub data line 31 controlled by the first timing control chip 221 or at least one second sub data line 41 controlled by the second timing control chip 222 and is disposed adjacent to the first sub data line 31. Therefore, human eyes cannot catch the brightness difference, and the problem of uneven brightness of the plurality of display areas 210 of the display device 200 caused by the difference of the time sequence control chip 220 is solved.
Referring to fig. 4, fig. 4 is a schematic view illustrating a third structure of a display device according to an embodiment of the present disclosure, in which the display device 200 includes four display regions 210 for illustration. The at least two timing control chips 220 include a first timing control chip 221, a second timing control chip 222, a third timing control chip 223 and a fourth timing control chip 224, the at least two data lines include a first data line 30, a second data line 40, a third data line 50 and a fourth data line 60, the first data line 30 includes a plurality of first sub data lines 31, the second data line 40 includes a plurality of second sub data lines 41, the third data line 50 includes a plurality of third sub data lines 51, and the fourth data line 60 includes a plurality of fourth sub data lines 61. Each first subdata line 31 is arranged adjacent to at least one second subdata line 41, each second subdata line 41 is arranged adjacent to at least one third subdata line 51, each third subdata line 51 is arranged adjacent to at least one fourth subdata line 61, and each fourth subdata line 61 is arranged adjacent to at least one first subdata line 31.
Each display area 210 includes a plurality of sub data lines arranged in sequence, and the number of the data lines in each display area 210 may be the same. Assuming that the number of data lines in each display area 210 is 8, and 8 sub-data lines are sequentially arranged, the first type data line 30 may be a first sub-data line and a fifth sub-data line, the second type data line 40 may be a second sub-data line and a sixth sub-data line, the third type data line 50 may be a third sub-data line and a seventh sub-data line, and the fourth type data line 60 may be a fourth sub-data line and an eighth sub-data line. Then a first sub data line of the first type data lines 30 has a second sub data line of the second type data lines 40 disposed adjacent thereto, a second sub data line of the second type data lines 40 has a third sub data line of the third type data lines 50 disposed adjacent thereto, a third sub data line of the third type data lines 50 has a fourth sub data line of the fourth type data lines 60 disposed adjacent thereto, a fourth sub data line of the fourth type data lines 60 has a fifth sub data line of the first type data lines 30 disposed adjacent thereto, and so on.
The signal transmission of the plurality of first sub-data lines 31 in the first-type data lines 30 is controlled by the first timing control chip 221, the signal transmission of the plurality of second sub-data lines 41 in the second-type data lines 40 is controlled by the second timing control chip 222, the signal transmission of the plurality of third sub-data lines 51 in the third-type data lines 50 is controlled by the third timing control chip 223, and the signal transmission of the plurality of fourth sub-data lines 61 in the fourth-type data lines 60 is controlled by the fourth timing control chip 224, so that the display apparatus 200 displays a picture, even if there is a difference between the first timing control chip 221, the second timing control chip 222, the third timing control chip 223, and the fourth timing control chip 224, since each first sub-data line 31 controlled by the first timing control chip 221 has at least one second sub-data line 41 controlled by the second timing control chip 222 or at least one fourth sub-data line 61 controlled by the fourth timing control chip 224 and the same phase thereof Similarly, each second sub-data line 41 controlled by the second timing control chip 222 has at least one first sub-data line 31 controlled by the first timing control chip 221 or at least one third sub-data line 51 controlled by the third timing control chip 223 and is arranged adjacent to the first sub-data line 31; each third sub-data line 51 controlled by the third timing control chip 223 has at least one fourth sub-data line 61 controlled by the fourth timing control chip 224 or at least one second sub-data line 41 controlled by the second timing control chip 222, which is arranged adjacent to the fourth sub-data line, and each fourth sub-data line 61 controlled by the fourth timing control chip 224 has at least one first sub-data line 31 controlled by the first timing control chip 221 or at least one third sub-data line 51 controlled by the third timing control chip 223, which is arranged adjacent to the fourth sub-data line. Therefore, human eyes cannot catch the brightness difference, and the problem of uneven brightness of the plurality of display areas 210 of the display device 200 caused by the difference of the time sequence control chip 220 is solved.
It should be noted that, the above embodiment exemplifies that the number of the display regions 210 is the same as the number of the timing control chips 220, however, as people continuously pursue a large-screen display device, the display device 200 may be formed by splicing more than four or more display regions 210, but for the screen display of the display device 200, the number of the timing control chips 220 corresponding to the number of the display regions 210 is not required to be excessive, and the problem of the brightness difference between different display regions can be solved only by ensuring that the number of the timing control chips 220 is the same as the number of the types of the data lines in each display region 210. That is, the number of the display regions 210 may be greater than the number of the timing control chips 220, for example, the display regions 210 include eight display regions, the number of the timing control chips 220 is four, and the like.
As can be seen from the above, the display device 200 provided in this embodiment includes a circuit board and a plurality of display areas 210, the circuit board includes at least two timing control chips 220, each display area 210 includes at least two types of data lines, each type of data line includes a plurality of sub data lines, each sub data line in each type of data line has at least one sub data line in at least one type of data line and is disposed adjacent to the sub data line, and the number of types of data lines corresponds to the number of timing control chips; the at least two timing control chips 220 are configured to control signal transmission of a plurality of sub data lines of the at least two types of data lines, respectively, so that the display device 200 displays a picture. In the present embodiment, the sub data lines adjacent to each other in the same display area 210 are controlled by different timing control chips 220, and it is difficult for human eyes to capture the brightness difference between the adjacent data lines, so that the problem of uneven brightness of the display device 200 is solved, and the display effect is improved.
To better explain the display device 200 disclosed in the above embodiment, a signal control method is further provided in the embodiment of the present application, please refer to fig. 5, and fig. 5 is a schematic flow chart of the signal control method provided in the embodiment of the present application. The signal control method is applied to a display device 200, and the display device 200 includes a circuit board and a plurality of display regions 210. The signal control method comprises the following specific operation steps:
301, acquiring the number of time sequence control chips in the circuit board, wherein the number of the time sequence control chips is at least two.
302, according to the number of the time sequence control chips, the number of the types of the data lines in each display area is determined.
Each display area comprises at least two types of data lines, each type of data line comprises a plurality of sub data lines, and each sub data line in each type of data line is provided with at least one sub data line in at least one type of data line and is arranged adjacent to the sub data line. The type number of the data lines corresponds to the number of the time sequence control chips, and if the number of the time sequence control chips is two, the type number of the data lines is also two; if the number of the timing control chips is three, the number of the types of the data lines is also three, and the like.
303, the signal transmission of the sub data lines in the at least two types of data lines is controlled by the at least two timing control chips, so that the display device displays the picture.
All data lines in each display area are divided into at least two types, each type of data line comprises a plurality of sub data lines, and signal transmission of the plurality of sub data lines in the at least two types of data lines can be controlled through at least two time sequence control chips respectively, so that the display device can display pictures. It can be understood that, since each sub data line in each type of data line is controlled by the first timing control chip, and each sub data line in each type of data line has at least one sub data line in at least one type of data line disposed adjacent thereto, and a plurality of sub data lines in the at least one type of data lines are controlled by a second time sequence control chip, therefore, each sub data line controlled by the first time sequence control chip and each sub data line controlled by the second time sequence control chip are two adjacent sub data lines, because the brightness difference of two adjacent data lines is difficult to capture by human eyes, even if the first time sequence control chip is different from the second time sequence control chip, the brightness difference can not be captured by human eyes, therefore, the problem of uneven brightness of a plurality of display areas of the display device caused by the difference of the time sequence control chips is solved.
For example, the at least two timing control chips include a first timing control chip and a second timing control chip, the at least two types of data lines include a first type of data line and a second type of data line, the first type of data line includes a plurality of first sub data lines, the second type of data line includes a plurality of second sub data lines, and each first sub data line is adjacent to at least one second sub data line. The signal transmission of a plurality of first subdata lines in the first type of data lines is controlled through the first time sequence control chip, and the signal transmission of a plurality of second subdata lines in the second type of data lines is controlled through the second time sequence control chip, so that the display device displays pictures.
For example, the at least two timing control chips include a first timing control chip, a second timing control chip, and a third timing control chip, the at least two types of data lines include a first type data line, a second type data line, and a third type data line, the first type data line includes a plurality of first sub data lines, the second type data line includes a plurality of second sub data lines, the third type data line includes a plurality of third sub data lines, each first sub data line is disposed adjacent to at least one second sub data line, each second sub data line is disposed adjacent to at least one third sub data line, and each third sub data line is disposed adjacent to at least one first sub data line. The signal transmission of a plurality of first subdata lines in the first type of data lines is controlled through the first time sequence control chip, the signal transmission of a plurality of second subdata lines in the second type of data lines is controlled through the second time sequence control chip, and the signal transmission of a plurality of third subdata lines in the third type of data lines is controlled through the third time sequence control chip, so that the display device can display pictures.
For another example, the at least two timing control chips include a first timing control chip, a second timing control chip, a third timing control chip, and a fourth timing control chip, the at least two types of data lines include a first type of data line, the data line comprises a first type of data line, a second type of data line, a third type of data line and a fourth type of data line, wherein the first type of data line comprises a plurality of first subdata lines, the second type of data line comprises a plurality of second subdata lines, the third type of data line comprises a plurality of third subdata lines, the fourth type of data line comprises a plurality of fourth subdata lines, each first subdata line is arranged adjacent to at least one second subdata line, each second subdata line is arranged adjacent to at least one third subdata line, each third subdata line is arranged adjacent to at least one fourth subdata line, and each fourth subdata line is arranged adjacent to at least one first subdata line. The signal transmission of a plurality of first subdata lines in the first type of data lines is controlled through the first time sequence control chip, the signal transmission of a plurality of second subdata lines in the second type of data lines is controlled through the second time sequence control chip, the signal transmission of a plurality of third subdata lines in the third type of data lines is controlled through the third time sequence control chip, and the signal transmission of a plurality of fourth subdata lines in the fourth type of data lines is controlled through the fourth time sequence control chip, so that the display device displays pictures.
As can be seen from the above, in the embodiment, the number of the timing control chips in the circuit board is obtained, where the number of the timing control chips is at least two, the number of the types of the data lines in each display area is determined according to the number of the timing control chips, and the at least two timing control chips are used to respectively control the signal transmission of the sub data lines in the at least two types of data lines, so that the display device displays the picture. In the embodiment, the adjacent sub data lines in the same display area are controlled by different time sequence control chips, and the brightness difference of the adjacent data lines is difficult to capture by human eyes, so that the problem of uneven brightness of the display device is solved, and the display effect is improved.
Accordingly, the embodiment of the present application also provides a display device 200, and the display device 200 may include a housing, a circuit board, a plurality of display areas 210, a processor, and a memory. The display device may be a product or a component having a display function such as a television, a display, or the like.
Wherein the housing is a casing of the display device 200. The circuit board is disposed in the accommodating space formed by the housing, and the circuit board includes at least two timing control chips 220. The plurality of display regions 210 may also be disposed in an accommodating space formed by the housing, each display region 210 includes at least two types of data lines, each type of data line includes a plurality of sub data lines, each sub data line in each type of data line has at least one sub data line in at least one type of data line disposed adjacent to the sub data line, and the number of types of data lines corresponds to the number of the timing control chips.
The processor is a control center of the display apparatus 200, connects various parts of the entire electronic device using various interfaces and lines, performs various functions of the electronic device and processes data by operating or calling a computer program stored in the memory, and calling data stored in the memory, thereby integrally monitoring the electronic device.
The memory may be used to store software programs and modules, and the processor may execute various functional applications and data processing by executing the computer programs and modules stored in the memory. The memory may mainly include a storage program area and a storage data area, wherein the storage program area may store an operating system, a computer program required for at least one function, and the like; the storage data area may store data created according to use of the electronic device, and the like.
Further, the memory may include high speed random access memory, and may also include non-volatile memory, such as at least one magnetic disk storage device, flash memory device, or other volatile solid state storage device. Accordingly, the memory may also include a memory controller to provide the processor access to the memory.
In the foregoing embodiments, the descriptions of the respective embodiments have respective emphasis, and for parts that are not described in detail in a certain embodiment, reference may be made to the related descriptions of other embodiments.
The display device and the signal control method provided by the embodiment of the present application are described in detail above, and the principle and the embodiment of the present application are explained in the present application by applying specific examples, and the description of the above embodiments is only used to help understanding the method and the core idea of the present application; meanwhile, for those skilled in the art, according to the idea of the present application, there may be variations in the specific embodiments and the application scope, and in summary, the content of the present specification should not be construed as a limitation to the present application.
Claims (10)
1. A display device, comprising:
the circuit board comprises at least two sequential control chips;
each display area comprises at least two types of data lines, each type of data line comprises a plurality of subdata lines, each subdata line in each type of data line is provided with at least one subdata line in at least one type of data line and is arranged adjacent to the subdata line, and the type number of the data lines corresponds to the number of the time sequence control chips; wherein the content of the first and second substances,
the at least two time sequence control chips are used for respectively controlling the signal transmission of a plurality of sub data lines in the at least two types of data lines so as to enable the display device to display pictures.
2. The display device according to claim 1, wherein the at least two timing control chips comprise a first timing control chip and a second timing control chip, the at least two types of data lines comprise a first type of data line and a second type of data line, the first type of data line comprises a plurality of first sub data lines, the second type of data line comprises a plurality of second sub data lines, and each first sub data line is arranged adjacent to at least one second sub data line; wherein the content of the first and second substances,
the first time sequence control chip is used for controlling signal transmission of a plurality of first subdata lines in the first type of data lines, and the second time sequence control chip is used for controlling signal transmission of a plurality of second subdata lines in the second type of data lines, so that the display device displays pictures.
3. The display device according to claim 1, wherein the at least two timing control chips comprise a first timing control chip, a second timing control chip, and a third timing control chip, the at least two types of data lines comprise a first type of data line, a second type of data line, and a third type of data line, the first type of data line comprises a plurality of first sub data lines, the second type of data line comprises a plurality of second sub data lines, the third type of data line comprises a plurality of third sub data lines, each of the first sub data lines is disposed adjacent to at least one of the second sub data lines, each of the second sub data lines is disposed adjacent to at least one of the third sub data lines, and each of the third sub data lines is disposed adjacent to at least one of the first sub data lines; wherein the content of the first and second substances,
the first time sequence control chip is used for controlling signal transmission of a plurality of first sub data lines in the first type of data lines, the second time sequence control chip is used for controlling signal transmission of a plurality of second sub data lines in the second type of data lines, and the third time sequence control chip is used for controlling signal transmission of a plurality of third sub data lines in the third type of data lines, so that the display device can display pictures.
4. The display device according to claim 1, wherein the at least two timing control chips comprise a first timing control chip, a second timing control chip, a third timing control chip, and a fourth timing control chip, the at least two types of data lines comprise a first type of data line, a second type of data line, a third type of data line, and a fourth type of data line, the first type of data line comprises a plurality of first sub data lines, the second type of data line comprises a plurality of second sub data lines, the third type of data line comprises a plurality of third sub data lines, the fourth type of data line comprises a plurality of fourth sub data lines, each of the first sub data lines is adjacent to at least one of the second sub data lines, each of the second sub data lines is adjacent to at least one of the third sub data lines, each of the third sub data lines is adjacent to at least one of the fourth sub data lines, each fourth sub data line is arranged adjacent to at least one first sub data line; wherein the content of the first and second substances,
the first time sequence control chip is used for controlling signal transmission of a plurality of first sub data lines in the first type of data lines, the second time sequence control chip is used for controlling signal transmission of a plurality of second sub data lines in the second type of data lines, the third time sequence control chip is used for controlling signal transmission of a plurality of third sub data lines in the third type of data lines, and the fourth time sequence control chip is used for controlling signal transmission of a plurality of fourth sub data lines in the fourth type of data lines, so that the display device displays pictures.
5. The display device according to claim 1, wherein the number of the display regions is greater than or equal to the number of the timing control chips.
6. A signal control method is applied to a display device, a circuit board of the display device and a plurality of display areas, and the method comprises the following steps:
acquiring the number of time sequence control chips in the circuit board, wherein the number of the time sequence control chips is at least two;
determining the type number of the data lines in each display area according to the number of the time sequence control chips, wherein each display area comprises at least two types of data lines, each type of data line comprises a plurality of sub data lines, and each sub data line in each type of data line is provided with at least one sub data line in at least one type of data line and is arranged adjacent to the sub data line;
and respectively controlling the signal transmission of a plurality of sub data lines in the at least two types of data lines through at least two time sequence control chips so as to enable the display device to display pictures.
7. The signal control method of claim 6, wherein the at least two timing control chips comprise a first timing control chip and a second timing control chip, the at least two types of data lines comprise a first type of data line and a second type of data line, the first type of data line comprises a plurality of first sub data lines, the second type of data line comprises a plurality of second sub data lines, and each of the first sub data lines is disposed adjacent to at least one of the second sub data lines, the method further comprising:
and controlling the signal transmission of a plurality of first subdata lines in the first type of data lines through the first time sequence control chip, and controlling the signal transmission of a plurality of second subdata lines in the second type of data lines through the second time sequence control chip so that the display device displays a picture.
8. The signal control method of claim 6, wherein the at least two timing control chips comprise a first timing control chip, a second timing control chip, and a third timing control chip, the at least two types of data lines comprise a first type of data line, a second type of data line, and a third type of data line, the first type of data line comprises a plurality of first sub data lines, the second type of data line comprises a plurality of second sub data lines, the third type of data line comprises a plurality of third sub data lines, each of the first sub data lines is disposed adjacent to at least one of the second sub data lines, each of the second sub data lines is disposed adjacent to at least one of the third sub data lines, and each of the third sub data lines is disposed adjacent to at least one of the first sub data lines, the method further comprising:
the signal transmission of a plurality of first subdata lines in the first type of data lines is controlled through the first time sequence control chip, the signal transmission of a plurality of second subdata lines in the second type of data lines is controlled through the second time sequence control chip, and the signal transmission of a plurality of third subdata lines in the third type of data lines is controlled through the third time sequence control chip, so that the display device displays pictures.
9. The signal control method according to claim 6, wherein the at least two timing control chips include a first timing control chip, a second timing control chip, a third timing control chip, and a fourth timing control chip, the at least two types of data lines include a first type of data line, a second type of data line, a third type of data line, and a fourth type of data line, the first type of data line includes a plurality of first sub data lines, the second type of data line includes a plurality of second sub data lines, the third type of data line includes a plurality of third sub data lines, the fourth type of data line includes a plurality of fourth sub data lines, each of the first sub data lines is disposed adjacent to at least one of the second sub data lines, each of the second sub data lines is disposed adjacent to at least one of the third sub data lines, each of the third sub data lines is disposed adjacent to at least one of the fourth sub data lines, each fourth sub data line is arranged adjacent to at least one first sub data line, and the method further includes:
the signal transmission of a plurality of first subdata lines in the first type of data lines is controlled through the first time sequence control chip, the signal transmission of a plurality of second subdata lines in the second type of data lines is controlled through the second time sequence control chip, the signal transmission of a plurality of third subdata lines in the third type of data lines is controlled through the third time sequence control chip, and the signal transmission of a plurality of fourth subdata lines in the fourth type of data lines is controlled through the fourth time sequence control chip, so that the display device displays pictures.
10. A display device, comprising:
a housing;
the circuit board is arranged in the shell and comprises at least two sequential control chips;
the display areas are arranged in the shell, each display area comprises at least two types of data lines, each type of data line comprises a plurality of subdata lines, each subdata line in each type of data line is provided with at least one subdata line in at least one type of data line and is arranged adjacent to the subdata line, and the type number of the data lines corresponds to the number of the time sequence control chips;
a memory storing a computer program;
a processor for executing the signal control method according to any one of claims 6 to 9 by calling the computer program stored in the memory.
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