CN114758618A - Pixel circuit, driving method thereof and display panel - Google Patents
Pixel circuit, driving method thereof and display panel Download PDFInfo
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- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
- G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
- G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
- G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
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Abstract
The disclosure provides a pixel circuit, a driving method thereof and a display panel, belongs to the technical field of display, and can solve the problem that short-term afterimages are easy to appear on the existing display panel. The driving method of the pixel circuit of the present disclosure includes: in the resetting stage, the first resetting transistor is used for responding to a resetting signal, the voltage of the control electrode of the driving transistor is reset for multiple times through an initialization signal, and the voltages of the initialization signal are different when the reset is performed for multiple times; in a data writing stage, responding to a scanning signal by using a data writing transistor, writing a data signal into a first pole of a driving transistor, and storing the data signal into a storage capacitor; in the light emitting stage, the data signal stored in the storage capacitor is called, the driving transistor is used for responding to the data signal, the first power voltage is converted into the driving current, and the driving current is written into the light emitting device, so that the light emitting device emits light.
Description
Technical Field
The disclosure belongs to the technical field of display, and particularly relates to a pixel circuit, a driving method thereof and a display panel.
Background
An Organic Light-Emitting Diode (OLED) is a Light-Emitting device using an Organic solid semiconductor as a Light-Emitting material, and has a wide application prospect because of its advantages of simple preparation process, low cost, low power consumption, high luminance, wide working temperature application range, and the like. Each pixel unit in the OLED display panel generally includes a pixel circuit, and a thin film transistor in the pixel circuit may input a driving current to the light emitting device to cause the light emitting device to emit light.
However, due to hysteresis, the thin film transistor in the pixel circuit is prone to have problems such as threshold voltage shift, etc., so that the driving current input to the light emitting device is abnormal, and thus short-term afterimages are prone to appear on the display screen of the OLED display panel, which affects the display effect.
Disclosure of Invention
The present disclosure is directed to at least one of the technical problems in the prior art, and provides a pixel circuit, a driving method thereof, and a display panel.
In a first aspect, an embodiment of the present disclosure provides a driving method for a pixel circuit, where the driving method for the pixel circuit includes:
in a resetting stage, responding to a resetting signal by using a first resetting transistor, resetting the voltage of a control electrode of a driving transistor for multiple times through an initialization signal, wherein the voltages of the initialization signal are different when resetting for multiple times;
In a data writing stage, responding to a scanning signal by using a data writing transistor, writing a data signal into a first pole of the driving transistor, and storing the data signal into a storage capacitor;
and in the light-emitting stage, calling the data signal stored in the storage capacitor, responding to the data signal by using the driving transistor, converting the first power voltage into a driving current, and writing the driving current into the light-emitting device to enable the light-emitting device to emit light.
Optionally, the initialization signal is a multi-level voltage signal;
the order of the multi-order voltage signal is the same as the reset times of the reset stage.
Optionally, the voltage of the multi-step voltage signal is increased step by step.
Optionally, the multi-step voltage signal has a voltage of-5 volts to-3 volts.
Optionally, the driving method of the pixel circuit further includes:
in the resetting stage, the voltage of the anode of the light-emitting device is reset for multiple times through an initialization signal by using a second reset transistor in response to a reset signal, and the voltages of the initialization signal are different when the multiple resets are performed.
In a second aspect, the embodiments of the present disclosure provide a pixel circuit driven by the above-described driving method of the pixel circuit.
In a third aspect, an embodiment of the present disclosure provides a display panel, including: a plurality of rows of pixel cells; wherein each of the pixel cells comprises a pixel circuit as provided above.
Optionally, the order of the multi-order voltage signal is m; the display panel further includes: n × m initialization signal lines; m and n are positive integers;
and each m adjacent initialization signal lines are correspondingly connected with the pixel circuits in the pixel units in m adjacent rows one by one.
Optionally, the j-th initialization signal line is connected to the pixel circuits in the pixel units in the j + mk-th row; j. k is a positive integer less than or equal to n m.
Optionally, the display panel further comprises: a driving chip; the driving chip is provided with m initial signal output ends;
and each adjacent m initialization signal lines are correspondingly connected with the m initial signal output ends one by one.
Drawings
FIG. 1 is a schematic diagram of an exemplary pixel circuit;
FIG. 2 is a driving timing diagram of the pixel circuit shown in FIG. 1;
FIG. 3 is another driving timing diagram of the pixel circuit shown in FIG. 1;
fig. 4 is a schematic flowchart of a driving method of a pixel circuit according to an embodiment of the disclosure;
Fig. 5 is a driving timing diagram of a pixel circuit according to an embodiment of the disclosure.
Detailed Description
For a better understanding of the technical aspects of the present disclosure, reference is made to the following detailed description taken in conjunction with the accompanying drawings.
Unless otherwise defined, technical or scientific terms used herein shall have the ordinary meaning as understood by one of ordinary skill in the art to which this disclosure belongs. The use of "first," "second," and similar terms in this disclosure is not intended to indicate any order, quantity, or importance, but rather is used to distinguish one element from another. Also, the use of the terms "a," "an," or "the" and similar referents do not denote a limitation of quantity, but rather denote the presence of at least one. The word "comprising" or "comprises", and the like, means that the element or item listed before the word covers the element or item listed after the word and its equivalents, but does not exclude other elements or items. The terms "connected" or "coupled" and the like are not restricted to physical or mechanical connections, but may include electrical connections, whether direct or indirect. "upper", "lower", "left", "right", and the like are used merely to indicate relative positional relationships, and when the absolute position of the object being described is changed, the relative positional relationships may also be changed accordingly.
The transistors used in the embodiments of the present disclosure may be thin film transistors or field effect transistors or other devices of the same characteristics, and since the source and drain of the transistors used are symmetrical, there is no difference between the source and drain. In the embodiments of the present disclosure and the following description, to distinguish the source and the drain of the transistor, one of the poles is referred to as a first pole, the other pole is referred to as a second pole, and the gate is referred to as a control pole. In addition, the transistors can be divided into an N type and a P type according to the characteristic distinction of the transistors, when the P type transistors are adopted, the first pole is the source electrode of the P type transistor, the second pole is the drain electrode of the P type transistor, and when a low-level signal is input into the grid electrode, the source electrode and the drain electrode are conducted; when an N-type transistor is adopted, the first electrode is the source electrode of the N-type transistor, the second electrode is the drain electrode of the N-type transistor, and when a high-level signal is input into the grid electrode, the source electrode and the drain electrode are conducted. In the embodiments of the present disclosure and the following description, a transistor in a pixel circuit is exemplified as a P-type transistor.
Fig. 1 is a schematic structural diagram of an exemplary pixel circuit, as shown in fig. 1, the pixel circuit includes: a first reset transistor T1, a second reset transistor T2, a data write transistor T3, a driving transistor T4, a storage capacitor C, a threshold compensation transistor T5, a first light emission control transistor T6, a second light emission control transistor T7, and a light emitting device D.
Specifically, the gate of the first Reset transistor T1 is connected to the Reset signal terminal Reset, the source is connected to the initialization signal terminal Vint, and the drain is connected to the first node N1; the first node N1 is a connection point between the first reset transistor T1, the driving transistor T4, the storage capacitor C, and the threshold compensation transistor T5. The second Reset transistor T2 has a gate connected to a Reset signal terminal Reset, a source connected to the initialization signal terminal Vint, and a drain connected to the anode of the light emitting device D. The Data writing transistor T3 has a Gate connected to the scanning signal terminal Gate, a source connected to the Data signal terminal Data, and a drain connected to the source of the driving transistor T4. The driving transistor T4 has a gate connected to the first node N1, a source connected to the drain of the data writing transistor T3 and the drain of the first light emission controlling transistor T6, and a drain connected to the source of the threshold compensating transistor T5 and the source of the second light emission controlling transistor T7. One end of the storage capacitor C is connected to the first power voltage terminal VDD, and the other end is connected to the first node N1. The threshold compensation transistor T5 has a Gate connected to the scan signal terminal Gate, a source connected to the drain of the driving transistor T4, and a drain connected to the first node N1. The first light emission control transistor T6 has a gate connected to the light emission control terminal EM, a source connected to the first power voltage terminal VDD, and a drain connected to the source of the driving transistor T4. The second light emission controlling transistor T7 has a gate connected to the light emission controlling terminal EM, a source connected to the drain of the driving transistor T4, and a drain connected to the anode of the light emitting device D. The light emitting device D has an anode connected to the drain of the second light emission controlling transistor T7 and the drain of the second reset transistor T2, and a cathode connected to the second power voltage terminal VSS.
Fig. 2 is a driving timing diagram of the pixel circuit shown in fig. 1, and as shown in fig. 2, the operation process of the pixel circuit is divided into: a reset phase S1, a data write phase S2, and a light emission phase S3.
In the Reset stage S1, a low level signal is input from the Reset signal terminal Reset, the first Reset transistor T1 and the second Reset transistor T2 are turned on under the control of the low level signal, and the initialization signal (low level signal) input from the initialization signal terminal Vint is used to Reset the first node N1 and the anode of the light emitting device D, so that the first node N1 and the anode of the light emitting device D are restored to a lower potential, thereby avoiding interference of a high level data signal input from a previous frame of display picture on the first node N1 and the anode of the light emitting device D, and affecting the accuracy of the data signal input this time.
In the data writing stage S2, a low level signal is input to the Gate of the scan signal terminal, the data writing transistor T3 is turned on under the control of the low level signal, a data signal is written to the source of the driving transistor T4, and the storage capacitor C stores the data signal. Meanwhile, the threshold compensation transistor T5 is turned on under the control of a low level signal, the driving transistor T4 is turned on under the control of a data signal stored in the storage capacitor C, so that the gate and the drain of the driving transistor T4 are connected, the driving transistor T4 is in a self-saturation state, and at this time, the data signal and the threshold voltage of the driving transistor T4 are written into the first node N1, thereby realizing the compensation of the threshold voltage of the driving transistor T4.
In the light emitting phase S3, the switch control signal terminal EM inputs a low level signal, the first light emitting control transistor T6 and the second light emitting control transistor T7 are turned on under the control of the low level signal, and the driving transistor T4 may convert the voltage of the first power voltage terminal VDD into a driving current, so that the light emitting device D between the first power voltage terminal VDD and the second power voltage terminal VSS forms a current loop to drive the light emitting device D to emit light.
In the process of practical application, the display picture is easy to have the problem of short-term afterimage, the first reason is the hysteresis phenomenon of the thin film transistor, and the second reason is that the charging and discharging time of the thin film transistor under the high refresh rate is insufficient.
For the second reason, the charging efficiency can be improved by using data compensation, for example, the voltage of the initialization signal is set to-3 volts to-4 volts, and in order to more fully reset the first node N1 in the same time, the voltage of the initialization signal can be further reduced, for example, -5 volts. However, due to the characteristics of the thin film transistor, when the voltage of the initialization signal is set to-5 v, the display panel always operates at-5 v, and the voltage difference between the gate and the source of the first reset transistor T1 is too large, which easily causes current leakage, thereby causing a problem of a bright point of reliability on the display screen. To balance the short term image retention and bright spot problems, the voltage of the initialization signal is currently set to-3 volts to-4 volts.
For the first reason, the common solution at present is to reset the voltage at the first node N1 several times before the light-emitting phase, and the driving timing diagram is shown in fig. 3, so that the hysteresis of the tft can be improved within a certain range. However, the above method still cannot completely solve the short-term afterimage problem, and the short-term afterimage problem of a large number of display products is still serious at present, and even under the condition of process fluctuation, the short-term afterimage is obvious and cannot be accepted by users.
In order to solve at least one of the above technical problems, embodiments of the present disclosure provide a driving method of a pixel circuit and a display panel, and the driving method of the pixel circuit and the display panel provided by embodiments of the present disclosure will be described in further detail with reference to the accompanying drawings and detailed description.
In a first aspect, an embodiment of the present disclosure provides a driving method of a pixel circuit, and fig. 4 is a schematic flow chart of the driving method of the pixel circuit provided in the embodiment of the present disclosure, as shown in fig. 4, the driving method of the pixel circuit includes the following steps:
step S401, in a reset phase, the first reset transistor is used to respond to a reset signal, and the voltage of the control electrode of the driving transistor is reset for multiple times through an initialization signal, and when resetting for multiple times, the voltages of the initialization signal are all different.
In step S402, in the data writing stage, the data writing transistor is used to respond to the scan signal, write the data signal into the first electrode of the driving transistor, and store the data signal into the storage capacitor.
In step S403, in the light emitting stage, the data signal stored in the storage capacitor is called, and the driving transistor is used to respond to the data signal, convert the first power voltage into a driving current, and write the driving current into the light emitting device, so that the light emitting device emits light.
It should be noted that the driving method of the pixel circuit provided in the embodiment of the present disclosure may drive the pixel circuit shown in fig. 1, and certainly may also drive a pixel circuit similar to fig. 1, and in the embodiment of the present disclosure and the following description, the driving of the pixel circuit shown in fig. 1 will be taken as an example for explanation. Fig. 5 is a driving timing diagram of a pixel circuit according to an embodiment of the present disclosure, and a driving method of the pixel circuit according to the embodiment of the present disclosure will be described in further detail with reference to the driving timing diagram shown in fig. 5.
As shown in fig. 5, the reset phase S1 may be divided into a plurality of reset sub-phases S10, the data write phase S2 may be divided into a plurality of data write sub-phases S20, the reset phase S1 is divided into 3 reset sub-phases S10 in the embodiment of the disclosure, and accordingly, the data write phase S2 may be divided into 3 data write sub-phases S20.
At each reset sub-phase S10, an initialization signal may be input to the first node N1 and the anode of the light emitting device D, and only resetting the voltage of the first node N1 is exemplified in the embodiment of the present disclosure. The initialization signal may be a low level signal, so that the voltage of the first node N1 is at a low level, thereby avoiding the influence of a high level data signal inputted in a previous frame on the first node N1.
At each data writing sub-phase S20, a data signal may be input to the source of the driving transistor T4 and stored in the storage capacitor C. However, the data signals input several times before are all redundant data signals, and the reset sub-phase S10 after the data writing sub-phase S20 may discharge the storage capacitor C to reset the voltage of the first node N1 a plurality of times. Only the data signal input at the last data writing sub-phase S20 may enter the light emitting phase, so that the light emitting device D emits light. This allows the storage capacitor C to be charged and discharged many times to achieve many resets of the voltage at the first node N1.
In the light emitting stage S3, the driving transistor T4 may be turned on under the control of the data signal and convert the voltage of the first power voltage terminal VDD into a driving current, so that the light emitting device D emits light.
It can be seen from the foregoing that, in the reset stage S1, the voltage of the first node N1 may be reset many times by using the initialization signal, and each time the voltage of the initialization signal is different, the first node N1 may be prevented from being always kept at the same voltage in the reset stage, so that a large voltage difference may not be kept between the gate and the source of the first reset transistor T1 for a long time, and therefore, a hysteresis phenomenon of a thin film transistor in the pixel circuit may be prevented, a display defect of a short-term afterimage due to the hysteresis phenomenon of the thin film transistor may be avoided, and a display effect of a display screen may be effectively improved.
In some embodiments, the initialization signal is a multi-level voltage signal; the order of the multi-order voltage signal is the same as the reset times of the reset stage.
The initialization signal may be a multi-level voltage signal, and in each reset sub-stage, the initialization signal may maintain a certain voltage, so as to implement multiple resets of the voltage of the first node N1, and at the same time, the voltages of the initialization signal for each reset may be different, thereby avoiding the first node N1 from always maintaining the same voltage in the reset stage, and avoiding a large voltage difference from being maintained between the gate and the source of the first reset transistor T1 for a long time, thereby preventing a thin film transistor in a pixel circuit from generating a hysteresis phenomenon, and thus avoiding a display failure of a short-term afterimage due to the hysteresis phenomenon of the thin film transistor, and further effectively improving a display effect of a display screen. Specifically, the order of the multi-level voltage signal is the same as the number of times of resetting in the resetting stage T1, for example, the resetting stage T1 is divided into 3 resetting sub-stages T10, that is, the voltage of the first node N1 is reset 3 times in the resetting stage T1, and correspondingly, the multi-level voltage signal may be a three-level voltage signal, so that the voltages of the initialization signals reset three times are all different.
In some embodiments, the voltage of the multi-level voltage signal is stepped up.
The voltage of the multi-level electrical signal may be increased by levels, for example, the voltage of the multi-level voltage signal may be-5 v to-3 v, the level may be 3 levels, the first level voltage may be-5 v, the second level voltage may be-4 v, the third level voltage may be-3 v, and the first level voltage is the lowest voltage, which may effectively reset the voltage of the first node N1, may prevent the initialization signal from being maintained at-5 v all the time, and may prevent a large voltage difference from being maintained between the gate and the source of the first reset transistor T1, thereby preventing the first reset transistor T1 from leaking electricity. The second-order voltage and the third-order voltage can reset the voltage of the first node N1 for multiple times, and simultaneously, the voltages of the initialization signals reset every time are different, so that hysteresis of a thin film transistor in the pixel circuit can be prevented, poor display of short-term afterimages caused by the hysteresis of the thin film transistor can be avoided, and the display effect of a display picture can be effectively improved.
In some embodiments, as shown in fig. 4, the driving method of the pixel circuit further includes: in step S401a, in the reset phase, the voltage of the anode of the light emitting device is reset a plurality of times by the initialization signal in response to the reset signal using the second reset transistor, and the voltages of the initialization signal are all different when the plurality of times of resetting are performed.
While the voltage of the first node N1 is reset, the voltage of the anode of the light emitting device D may be reset by the second reset transistor T2, and the same initialization signal is input to the anode of the light emitting device D, so that it may be avoided that the anode of the light emitting device D is interfered by a high-level data signal input on a previous frame of display picture, which affects the accuracy of the data signal input this time. Similarly, the initialization signal may be a multi-level voltage signal, and in each reset sub-phase, the initialization signal may maintain a certain voltage, so as to implement multiple resets of the voltage of the anode of the light emitting device D while making the voltages of the initialization signal reset each time different, and may avoid that the anode of the light emitting device D always maintains the same voltage in the reset phase, so that a larger voltage difference may not be maintained between the gate and the source of the second reset transistor T2 for a long time, and thus may prevent the thin film transistor in the pixel circuit from generating a hysteresis, and may avoid the occurrence of poor display of short-term afterimage due to the hysteresis of the thin film transistor, and may further effectively improve the display effect of the display screen.
In a second aspect, an embodiment of the present disclosure provides a pixel circuit, where the pixel circuit is driven by the driving method of the pixel circuit provided in any one of the embodiments, and the structure of the pixel circuit may be the same as that of the pixel circuit shown in fig. 1, and the implementation principle and the beneficial effect thereof are the same as those of the driving method of the pixel circuit, and details will not be repeated here.
In a third aspect, embodiments of the present disclosure provide a display panel, including: a plurality of rows of pixel cells, each pixel cell comprising a pixel circuit as provided in any of the embodiments above. Wherein. The order of the multi-order signal is m; the display panel further includes: n × m initialization signal lines; m and n are positive integers; every adjacent m initialization signal lines are connected with the pixel circuits in the pixel units of the adjacent m rows in a one-to-one correspondence mode. The jth initialization signal line is connected with the pixel circuits in the pixel units of the (j + mk) th row; j. k is a positive integer less than or equal to n m.
In a specific example, the order of the multi-level voltage signal is 3 levels, and accordingly, the number of the initialization signal lines is 3, the 1 st initialization signal line is connected with the 1 st row of pixel units, the 4 th row of pixel units, the 7 th row of pixel units and the like, the 2 nd initialization signal line is connected with the 2 nd row of pixel units, the 5 th row of pixel units, the 8 th row of pixel units and the like, and the 3 rd initialization signal line is connected with the 3 rd row of pixel units, the 6 th row of pixel units, the 9 th row of pixel units and the like, so that only 3 initialization signal lines are needed to control the multiple rows of pixel units in the display panel, and the display panel can be prevented from generating a short-term afterimage without changing the process, thereby improving the display effect.
In some embodiments, the display panel further comprises: a driver chip; the driving chip is provided with m initial signal output ends Vint; every m adjacent initialization signal lines are connected with m initial signal output ends Vint in a one-to-one correspondence mode.
Specifically, the number of the initialization signal output terminals Vint of the driving chip may be 3, and the 3 initialization signal output terminals Vint may provide initialization signals for the corresponding initialization signal lines, so that the first node N1 in the pixel circuit in each pixel unit may be reset for multiple times in the reset stage, and each time the reset is performed, the voltages of the input initialization signals are different, and it may be avoided that the first node N1 is always maintained at the same voltage in the reset stage, so that a large voltage difference may not be maintained between the gate and the source of the first reset transistor T1 for a long time, and thus, the thin film transistor in the pixel circuit may be prevented from generating a hysteresis, and thus, the occurrence of poor display of short-term afterimage due to the hysteresis of the thin film transistor may be avoided, and further, the display effect of the display screen may be effectively improved.
It is to be understood that the above embodiments are merely exemplary embodiments that are employed to illustrate the principles of the present disclosure, and that the present disclosure is not limited thereto. It will be apparent to those skilled in the art that various changes and modifications can be made therein without departing from the spirit and scope of the disclosure, and these are to be considered as the scope of the disclosure.
Claims (10)
1. A method of driving a pixel circuit, the method comprising:
in the resetting stage, the first resetting transistor is used for responding to a resetting signal, the voltage of the control electrode of the driving transistor is reset for multiple times through an initialization signal, and the voltages of the initialization signal are different when the reset is performed for multiple times;
in a data writing stage, responding to a scanning signal by using a data writing transistor, writing a data signal into a first pole of the driving transistor, and storing the data signal into a storage capacitor;
in the light emitting stage, calling the data signal stored in the storage capacitor, responding to the data signal by using the driving transistor, converting the first power voltage into a driving current, and writing the driving current into the light emitting device, so that the light emitting device emits light.
2. The method for driving a pixel circuit according to claim 1, wherein the initialization signal is a multi-step voltage signal;
the order of the multi-order voltage signal is the same as the reset times of the reset stage.
3. The method for driving a pixel circuit according to claim 2, wherein the voltage of the multi-step voltage signal is increased step by step.
4. The method for driving a pixel circuit according to claim 3, wherein the multi-level voltage signal has a voltage of-5V to-3V.
5. The method for driving the pixel circuit according to claim 1, further comprising:
in the resetting stage, the voltage of the anode of the light-emitting device is reset for multiple times through an initialization signal by using a second reset transistor in response to a reset signal, and the voltages of the initialization signal are different when the multiple resets are performed.
6. A pixel circuit characterized in that the pixel circuit is driven by the driving method of the pixel circuit according to any one of claims 1 to 5.
7. A display panel, comprising: a plurality of rows of pixel cells; wherein each of the pixel cells comprises the pixel circuit of claim 6.
8. The display panel according to claim 7, wherein the multi-step voltage signal has an order of m; the display panel further includes: n × m initialization signal lines; m and n are positive integers;
and each m adjacent initialization signal lines are correspondingly connected with the pixel circuits in the pixel units in m adjacent rows one by one.
9. The display panel according to claim 8, wherein a j-th initialization signal line is connected to the pixel circuits in the pixel units of a j + mk-th row; j. k is a positive integer less than or equal to n m.
10. The display panel according to claim 8, wherein the display panel further comprises: a driver chip; the driving chip is provided with m initial signal output ends;
and each adjacent m initialization signal lines are correspondingly connected with the m initial signal output ends one by one.
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