CN114719973A - Quenching circuit applied to large-scale SPAD integrated array - Google Patents
Quenching circuit applied to large-scale SPAD integrated array Download PDFInfo
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- CN114719973A CN114719973A CN202110009263.9A CN202110009263A CN114719973A CN 114719973 A CN114719973 A CN 114719973A CN 202110009263 A CN202110009263 A CN 202110009263A CN 114719973 A CN114719973 A CN 114719973A
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- 238000010791 quenching Methods 0.000 title claims abstract description 23
- 230000000171 quenching effect Effects 0.000 title claims abstract description 22
- 230000000694 effects Effects 0.000 claims abstract description 5
- 230000015556 catabolic process Effects 0.000 claims description 11
- 238000001514 detection method Methods 0.000 claims description 4
- 230000010354 integration Effects 0.000 abstract description 3
- 230000009286 beneficial effect Effects 0.000 abstract description 2
- 230000005669 field effect Effects 0.000 abstract 1
- 229910044991 metal oxide Inorganic materials 0.000 abstract 1
- 150000004706 metal oxides Chemical class 0.000 abstract 1
- 239000004065 semiconductor Substances 0.000 abstract 1
- 238000000034 method Methods 0.000 description 4
- 238000010586 diagram Methods 0.000 description 3
- 238000005516 engineering process Methods 0.000 description 1
- 238000003384 imaging method Methods 0.000 description 1
- 230000000452 restraining effect Effects 0.000 description 1
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01J—MEASUREMENT OF INTENSITY, VELOCITY, SPECTRAL CONTENT, POLARISATION, PHASE OR PULSE CHARACTERISTICS OF INFRARED, VISIBLE OR ULTRAVIOLET LIGHT; COLORIMETRY; RADIATION PYROMETRY
- G01J1/00—Photometry, e.g. photographic exposure meter
- G01J1/42—Photometry, e.g. photographic exposure meter using electric radiation detectors
- G01J1/44—Electric circuits
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01J—MEASUREMENT OF INTENSITY, VELOCITY, SPECTRAL CONTENT, POLARISATION, PHASE OR PULSE CHARACTERISTICS OF INFRARED, VISIBLE OR ULTRAVIOLET LIGHT; COLORIMETRY; RADIATION PYROMETRY
- G01J1/00—Photometry, e.g. photographic exposure meter
- G01J1/42—Photometry, e.g. photographic exposure meter using electric radiation detectors
- G01J1/44—Electric circuits
- G01J2001/4413—Type
- G01J2001/442—Single-photon detection or photon counting
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01J—MEASUREMENT OF INTENSITY, VELOCITY, SPECTRAL CONTENT, POLARISATION, PHASE OR PULSE CHARACTERISTICS OF INFRARED, VISIBLE OR ULTRAVIOLET LIGHT; COLORIMETRY; RADIATION PYROMETRY
- G01J1/00—Photometry, e.g. photographic exposure meter
- G01J1/42—Photometry, e.g. photographic exposure meter using electric radiation detectors
- G01J1/44—Electric circuits
- G01J2001/4446—Type of detector
- G01J2001/446—Photodiode
- G01J2001/4466—Avalanche
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- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Spectroscopy & Molecular Physics (AREA)
- Light Receiving Elements (AREA)
Abstract
The invention provides a quenching circuit applied to a large-scale SPAD integrated array. The circuit effectively reduces the working current and the power consumption by limiting the avalanche current of the avalanche diode, can quickly inhibit the avalanche effect of the diode, reduce the dead time and improve the working speed. The circuit has a simple structure, realizes all functions of the circuit by using a small number of metal-oxide semiconductor field effect transistors (MOSFET), effectively reduces the occupied area of the circuit, effectively limits the working current and is beneficial to realizing the large-scale integration of the single photon avalanche diode.
Description
Technical Field
The invention provides a quenching circuit applied to a large-scale SPAD integrated array, which can rapidly quench the avalanche phenomenon of a single photon avalanche diode, limit current and effectively reduce power consumption. The integral quenching circuit has simple structure and high integration level, is completely compatible with the standard integrated circuit process, and can realize a large-scale imaging detection array.
Background
After a Single Photon Avalanche Diode (SPAD) generates an avalanche effect, if the avalanche effect is not restrained, the diode is in a large-current state for a long time, the device is easy to burn, and the next detection cannot be carried out. Therefore, an additional circuit is required to suppress this large current, which is the role of the quenching circuit.
At present, the quenching circuit mainly comprises a passive quenching circuit, an active quenching circuit, a gated quenching circuit and the like. In the prior art, a passive quenching circuit designed based on a common resistor has the problem of overlarge occupied area of a layout; most of active quenching circuits and gated quenching circuits are complex in structure, and the problem of large occupied area of a layout also exists.
Disclosure of Invention
The quenching circuit applied to the large-scale SPAD integrated array is used for restraining the avalanche phenomenon of the single-photon avalanche diode and limiting avalanche current. As shown in fig. 1, the basic circuit configuration is configured as follows: applying a fixed voltage V to the anode of a Single Photon Avalanche Diode (SPAD)apThis fixed voltage is slightly lower than the diode avalanche breakdown voltage. The cathode of the SPAD is connected to the source of a PMOSFET PM 2. The two PMOSFET pipes PM1 and PM2 are combined with a cascode current mirror, voltage bias is carried out on Vb1 and Vb2 respectively, the two PMOSFET pipes are operated in a saturation region and used for limiting the current of the SPAD in an avalanche mode, and the drain electrode of the PM1 is connected with a voltage VDD. The cathode of the SPAD is connected with an inverter group, and the inverter group modulates and outputs the pulse signal and serves as a buffer of the whole circuit.
Compared with the existing various circuit technologies, the quenching circuit applied to the large-scale SPAD integrated array has the main beneficial effects that: (1) the avalanche current is effectively limited, and the power consumption of the device is reduced; (2) the circuit structure is simple, the occupied area of the circuit part is small, and the duty ratio of the whole detector is favorably improved; (3) the quenching time is short, and the working speed is high; (4) facilitating large-scale integration of the detector.
Drawings
The subject matter of the present invention will now be described in detail with particular reference to the following drawings, and the relevant circuit configurations and modes of operation, as well as objects, features, and advantages thereof, will be clearly understood by reference to the following drawings:
FIG. 1 is a schematic diagram of the quenching circuit of the present invention applied to a large scale SPAD integrated array.
Detailed Description
In the following detailed description, the working principle and working process of the present invention will be fully understood with reference to the accompanying drawings and examples.
FIG. 1 is a diagram of the present invention applied to a large-scale SPAD integrated arrayThe circuit structure diagram of the quenching circuit, the quenching circuit is specifically composed of: applying a fixed voltage V to the anode of a Single Photon Avalanche Diode (SPAD)apThis fixed voltage is slightly lower than the diode avalanche breakdown voltage. The cathode of the SPAD is connected to the source of a PMOSFET PM 2. The two PMOSFET pipes PM1 and PM2 are combined with a cascode current mirror, voltage bias is carried out on Vb1 and Vb2 respectively, the two PMOSFET pipes and the PMOS transistor are operated in a saturation region, the current mirror is used for limiting the current of the SPAD in an avalanche mode, the upper limit of the operating current of the whole circuit is ensured, and the drain electrode of the PM1 is connected with the voltage VDD. The cathode of the SPAD is connected with an inverter group, and the inverter group modulates and outputs the pulse signal and serves as a buffer of the whole circuit.
The working principle and the working process of the quenching circuit applied to the large-scale SPAD integrated array are as follows:
when the circuit starts to work, the anode of the SPAD applies a negative voltage VapThis voltage is lower than the diode breakdown voltage and the drain of PM1 is connected to a positive voltage source VDD. When no photon signal is incident, the voltage drop on the PM1 and PM2 MOS tubes is zero, and the SPAD cathode voltage VxEqual to VDD, the voltage difference across SPAD is:
Vspad=VDD－Vap (1)
this voltage is higher than the avalanche breakdown voltage of the SPAD, which is now in geiger mode of operation. When photons are incident, the SPAD generates an avalanche effect, current flows through PM1 and PM2 tubes to generate voltage drop, and the SPAD cathode voltage VxThe voltage difference between two ends of the SPAD is reduced to be lower than breakdown voltage by being smaller than VDD, the avalanche phenomenon is inhibited, the circuit current is reduced to zero, the voltage of the PM1 and PM2 tubes is reduced to zero, and the voltage V of the cathode of the SPAD is reduced to be lower than breakdown voltagexAnd the circuit is restored to VDD, and the whole circuit is reset to the initial state to wait for the next detection.
The current in the whole process is limited in a cascode current mirror formed by PM1 and PM2, the current of the current mirror is limited by Vb1 and Vb2, and the working current of the whole circuit can be effectively controlled by setting the voltage of Vb1 and the voltage of Vb2, so that the optimal working state is achieved, and the power consumption of the circuit is reduced.
Claims (3)
1. A quenching circuit applied to a large-scale SPAD integrated array is characterized in that: applying a fixed voltage V to the anode of a Single Photon Avalanche Diode (SPAD)apThe fixed voltage is slightly lower than the avalanche breakdown voltage of the diode; the cathode of the SPAD is connected with the source electrode of a PMOSFET pipe PM 2; the two PMOSFET pipes PM1 and PM2 are combined with a cascode current mirror, voltage bias is carried out on Vb1 and Vb2 respectively, the two PMOSFET pipes and the PMOS transistor work in a saturation region, the current mirror is used for limiting the current of the SPAD in an avalanche mode, the upper limit of the working current of the whole circuit is ensured, and the drain electrode of the PM1 is connected with a voltage VDD; the cathode of the SPAD is connected with an inverter group, and the inverter group modulates and outputs the pulse signal and serves as a buffer of the whole circuit.
2. The quenching circuit of claim 1, wherein the anode of the SPAD applies a negative voltage VapThe voltage is lower than the breakdown voltage of a diode, PM1 and PM2 form a cascode current mirror, the drain of PM1 is connected with a positive voltage source VDD, when no photon signal is incident, the voltage drop on PM1 and PM2 tubes is zero, and the voltage V of the SPAD cathode is equal to the voltage V of the diodexEqual to VDD, the voltage difference between the two ends of the SPAD is:
Vspad=VDD－Vap
the voltage is higher than the avalanche breakdown voltage of the SPAD, and the SPAD is in a Geiger working mode at the moment; when photons are incident, the SPAD generates an avalanche effect, current flows through PM1 and PM2, voltage drops are generated on PM1 and PM2 tubes, and the SPAD cathode voltage VxThe voltage difference between two ends of the SPAD is reduced to be lower than breakdown voltage by being smaller than VDD, the avalanche phenomenon is inhibited, the circuit current is reduced to zero, the voltage of the PM1 and PM2 tubes is reduced to zero, and the voltage V of the cathode of the SPAD is reduced to be lower than breakdown voltagexAnd the circuit is restored to VDD, and the whole circuit is reset to the initial state to wait for the next detection.
3. The current-limiting circuit of claims 1 and 2, wherein the bias voltages Vb1 and Vb2 are adjustable as required, and the modulation of the magnitude of the operating current of the circuit is realized by changing the bias voltages.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202110009263.9A CN114719973A (en) | 2021-01-05 | 2021-01-05 | Quenching circuit applied to large-scale SPAD integrated array |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202110009263.9A CN114719973A (en) | 2021-01-05 | 2021-01-05 | Quenching circuit applied to large-scale SPAD integrated array |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN114719973A true CN114719973A (en) | 2022-07-08 |
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Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202110009263.9A Pending CN114719973A (en) | 2021-01-05 | 2021-01-05 | Quenching circuit applied to large-scale SPAD integrated array |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN114719973A (en) |
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2021
- 2021-01-05 CN CN202110009263.9A patent/CN114719973A/en active Pending
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Application publication date: 20220708 |