CN114692499A - Method and system for evaluating service life of integrated circuit chip based on machine learning - Google Patents
Method and system for evaluating service life of integrated circuit chip based on machine learning Download PDFInfo
- Publication number
- CN114692499A CN114692499A CN202210331280.9A CN202210331280A CN114692499A CN 114692499 A CN114692499 A CN 114692499A CN 202210331280 A CN202210331280 A CN 202210331280A CN 114692499 A CN114692499 A CN 114692499A
- Authority
- CN
- China
- Prior art keywords
- chip
- model
- integrated circuit
- regression model
- life
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000000034 method Methods 0.000 title claims abstract description 49
- 238000010801 machine learning Methods 0.000 title claims abstract description 40
- 239000013598 vector Substances 0.000 claims abstract description 80
- 230000004927 fusion Effects 0.000 claims abstract description 45
- 238000012549 training Methods 0.000 claims abstract description 34
- 238000012360 testing method Methods 0.000 claims abstract description 24
- 238000004088 simulation Methods 0.000 claims abstract description 19
- 238000005315 distribution function Methods 0.000 claims abstract description 14
- 238000000605 extraction Methods 0.000 claims abstract description 13
- 238000005457 optimization Methods 0.000 claims abstract description 11
- 238000011156 evaluation Methods 0.000 claims abstract description 7
- 238000004422 calculation algorithm Methods 0.000 claims description 34
- 238000010586 diagram Methods 0.000 claims description 31
- 239000000463 material Substances 0.000 claims description 12
- 238000012935 Averaging Methods 0.000 claims description 10
- 238000013500 data storage Methods 0.000 claims description 10
- 230000006870 function Effects 0.000 claims description 9
- 238000005070 sampling Methods 0.000 claims description 5
- 238000002372 labelling Methods 0.000 claims description 4
- 238000003860 storage Methods 0.000 claims description 3
- 230000001133 acceleration Effects 0.000 description 9
- 230000008569 process Effects 0.000 description 9
- 238000009826 distribution Methods 0.000 description 5
- 230000007246 mechanism Effects 0.000 description 4
- 230000015556 catabolic process Effects 0.000 description 3
- 238000006731 degradation reaction Methods 0.000 description 3
- 238000005516 engineering process Methods 0.000 description 3
- 238000002474 experimental method Methods 0.000 description 3
- 238000004806 packaging method and process Methods 0.000 description 3
- 238000007619 statistical method Methods 0.000 description 3
- 238000013461 design Methods 0.000 description 2
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 2
- 239000010931 gold Substances 0.000 description 2
- 229910052737 gold Inorganic materials 0.000 description 2
- 230000010354 integration Effects 0.000 description 2
- 238000012417 linear regression Methods 0.000 description 2
- 238000004458 analytical method Methods 0.000 description 1
- 238000013528 artificial neural network Methods 0.000 description 1
- 238000004364 calculation method Methods 0.000 description 1
- 238000006243 chemical reaction Methods 0.000 description 1
- 238000010276 construction Methods 0.000 description 1
- 238000005336 cracking Methods 0.000 description 1
- 238000003066 decision tree Methods 0.000 description 1
- 238000011161 development Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 229920006335 epoxy glue Polymers 0.000 description 1
- 230000006872 improvement Effects 0.000 description 1
- 238000007689 inspection Methods 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 238000005259 measurement Methods 0.000 description 1
- 238000012544 monitoring process Methods 0.000 description 1
- 238000007637 random forest analysis Methods 0.000 description 1
- 239000004065 semiconductor Substances 0.000 description 1
- 238000010008 shearing Methods 0.000 description 1
- 238000013179 statistical model Methods 0.000 description 1
- 230000035882 stress Effects 0.000 description 1
- 239000000758 substrate Substances 0.000 description 1
- 238000010998 test method Methods 0.000 description 1
- 230000008646 thermal stress Effects 0.000 description 1
Images
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F30/00—Computer-aided design [CAD]
- G06F30/20—Design optimisation, verification or simulation
- G06F30/27—Design optimisation, verification or simulation using machine learning, e.g. artificial intelligence, neural networks, support vector machines [SVM] or training a model
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F2119/00—Details relating to the type or aim of the analysis or the optimisation
- G06F2119/04—Ageing analysis or optimisation against ageing
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Evolutionary Computation (AREA)
- Theoretical Computer Science (AREA)
- Computer Vision & Pattern Recognition (AREA)
- Medical Informatics (AREA)
- Software Systems (AREA)
- Artificial Intelligence (AREA)
- Computer Hardware Design (AREA)
- Geometry (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Design And Manufacture Of Integrated Circuits (AREA)
Abstract
A method and system for evaluating the life of IC chip based on machine learning includes: recording a real data set of the integrated circuit chip according to the life test and establishing a life distribution function; obtaining a corresponding simulation life value by using a life distribution function to obtain a simulation data set; combining the real data set and the simulation data set to form an original data set of a training optimization machine learning regression model; obtaining parameter type characteristic vectors for the parameter type data in the original data set through characteristic extraction; converting the two-dimensional structure connection graph into a characteristic vector to form a structure characteristic vector of the chip; combining the parameter type characteristic vectors and the structural characteristic vectors to form a full characteristic vector set, inputting the full characteristic vector set into a machine learning regression model, and performing model fusion to obtain a fusion regression model; and finally forming an end-to-end chip life prediction model by utilizing the training set and the test set. The method can realize the real-time and accurate prediction and evaluation of the service life of the integrated circuit chip.
Description
Technical Field
The invention relates to a method and a system for evaluating the service life of an integrated circuit chip, belonging to the technical field of semiconductor failure analysis.
Background
Electronic equipment is more and more widely applied in the fields of military and aerospace, and the reliability requirement of the electronic equipment is continuously improved. With the improvement of the design technology and the manufacturing level of integrated circuits, the integration level of large-scale electronic equipment is higher and higher, and the functions are more and more complex. With the rapid development of electronic chip technology, the process feature size of CMOS devices is becoming more and more miniaturized and integrated, and the problems of interconnection structure failure and thermal stress become the most challenging problems in the design of nano integrated circuits. The increase in integration density and power consumption leads to higher chip temperatures, chip temperature gradients, and increasingly complex interconnect structure failures, which in turn affects their reliability. Therefore, it is necessary to evaluate the lifetime of an integrated circuit chip.
The traditional life evaluation test method generally adopts stress such as temperature, humidity or temperature cycle and the like as acceleration conditions, measures parameters of a device regularly through an acceleration life test, roughly obtains failure time of the device according to stage measurement data, further performs data statistical analysis, calculates experience acceleration factors through life distribution models of different gradient test conditions, and further estimates the acceleration life under normal conditions; or an accelerated degradation experiment is adopted, the shearing strength of the interconnection structure is periodically detected, the pseudo life of the interconnection structure is calculated, and then the life of the packaging body under the normal use environment is deduced by combining a failure mechanism acceleration model. The method for evaluating the service life of the integrated circuit chip has the problems of large estimation error and low estimation efficiency.
1) The estimation error is large: the method comprises the steps of detecting sensitive parameters of a packaging body regularly, obtaining parameter degradation trend, and fitting final failure time according to parameter trend simulation, wherein the final failure time is not the failure time of a real chip interconnection structure, and a service life estimation result is directly related to a rough parameter trend fitting method, so that an estimation error is large; the average service life is calculated from the simulation service life distribution model, and the average service life does not have high-reliability inspection requirements, so that the normal service life calculated by the average service life has insufficient reliability; the characteristic life calculation acceleration factor obtained based on the simulated life distribution is adopted, the key influence of a failure mechanism is not considered, and the reliability prediction method only through the traditional data statistical analysis is not scientific; or directly adopting a failure mechanism acceleration model substituted into rough estimation parameters to calculate the service life of the interconnection structure under normal use conditions, and having insufficient applicability and accuracy;
2) the evaluation efficiency is low: and obtaining relevant experimental data through a life test of a limited sample chip in the process of simulating the life of the chip to form a limited life distribution, substituting a complicated electromigration model, a cracking model, a thermal/vibration fatigue model and other failure mechanism acceleration models according to the roughly estimated life, and calculating the life of the interconnection structure under the normal use condition. A large amount of manpower, material resources and time are consumed in the simulation process, and the complex failure physical model set is difficult to solve.
Thus, such methods do not accurately and efficiently assess the lifetime of integrated circuit chip interconnect structures.
Disclosure of Invention
The technical problem to be solved by the invention is as follows: in order to solve the problems of larger monitoring data error, unreasonable average service life reliability and insufficient applicability of an acceleration model when a traditional accelerated life test or accelerated degradation test is used for evaluating a packaging interconnection structure, the invention provides a chip service life evaluation method and system based on a multi-material laminated chip structure modeling machine learning technology.
The technical scheme adopted by the invention is as follows: a method for evaluating the life of an integrated circuit chip based on machine learning comprises the following steps:
step one, recording a real data set { c) of the integrated circuit chip according to a life testi,y′iAnd establishing a life distribution function; wherein, yiThe real life value of the integrated circuit chip corresponding to the relevant parameters of the integrated circuit chip is obtained;
step two, according to the working condition of the using environment of the integrated circuit chip, in the parameter range of the relevant parameter corresponding to the working condition of the using environment, randomly generating n groups of parameter groups, simulating various actual possible using environment conditions, obtaining the corresponding simulated life value by using a life distribution function, and representing the simulated data set as { c }i,y i1, ·, n; n is a positive integer; wherein, ciIs a parameter of interest of the integrated circuit chip, yiSimulating a life value for the corresponding integrated circuit chip;
combining the real data set and the simulation data set to form an original data set of a training optimization machine learning regression model;
thirdly, obtaining parameter type characteristic vectors for the parameter type data in the original data set through characteristic extraction;
for the physical structure of the multilayer longitudinal section of the chip, a multi-material laminated structure modeling method is adopted to form a two-dimensional structure connection diagram of a three-dimensional chip structure; converting the two-dimensional structure connection diagram into a characteristic vector by using a Weisfiel-Leeman iterative algorithm to form a structure characteristic vector of the chip;
step four, merging the parameter characteristic vectors and the structural characteristic vectors to form a full characteristic vector set, inputting the full characteristic vector set into a machine learning regression model for model fusion to obtain a fusion regression model;
taking a% of the original data set as a training set, taking the rest 100% -a% as a test set, bringing the data serving as the training set into a fusion regression model to obtain a predicted value, and optimizing the accuracy of the fusion regression model by utilizing a plurality of loss functions to obtain an optimized fusion regression model; and (4) bringing the test set into the optimized fusion regression model, detecting the accuracy, and finally forming an end-to-end chip life prediction model, wherein a is a set value.
The multi-material stacked junction modeling method models a multi-element stacked chip structure to form a node connection diagram, and the specific modeling mode is as follows:
abstracting different element areas of different layers into a node, abstracting the adjacent relation of the different element areas into a non-directional edge, connecting the nodes representing different elements, and modeling a three-dimensional chip structure into a two-dimensional structure connection diagram model; the method comprises the following specific steps:
a. sequentially labeling all elements in the physical structure of the multilayer longitudinal section of the chip;
b. identifying a connected region of the same element in each layer of the multilayer longitudinal section physical structure of the chip, abstracting to be a node in a connection graph, and marking the node as a label corresponding to the element; two identical element connected regions, if touching, add an undirected edge between the corresponding two nodes in the connection graph.
Converting the two-dimensional structure connection diagram into a characteristic vector by using a Weisfiel-Leeman iterative algorithm, and forming the structural characteristic vector of the chip by the specific steps as follows:
s3.1, obtaining adjacent nodes of each node in the two-dimensional structure connection diagram; obtaining a mark of an adjacent node element of each node, and putting the mark into an unordered list Li; placing the element of the node in the infinite list Li;
s3.2, coding each node according to the disordered list Li obtained in the S3.1;
and S3.3, counting the number of each code in the two-dimensional structure connection diagram, and orderly arranging the codes to form a structure characteristic vector.
The machine learning regression model is as follows:
where y is the lifetime of the integrated circuit chip,is the full feature vector obtained after feature extraction.
In the fourth step, the full feature set is sent to a fusion regression model formed by K machine learning algorithms, K sub-models are trained by repeating the repeated K times of repeated sample with replacement, 1 model is trained by random sampling each time, and Voting/Averaging fusion is carried out on K model results; k is a positive integer, when K is 1, only one model is used, and the voing/Averaging method is unchanged.
An evaluation system according to the integrated circuit chip service life evaluation method based on machine learning comprises a data acquisition module, a data storage module, an algorithm application module and a display module:
the data acquisition module records a real data set { c) of the integrated circuit chip according to the life testi,y′iAnd establishing a life distribution function;
according to the working condition of the using environment of the integrated circuit chip, randomly generating n groups of parameter groups in the parameter range of the relevant parameters corresponding to the working condition of the using environment, simulating various actual possible using environment conditions, obtaining the corresponding simulated life value by using the life distribution function, and representing the simulated data set as { c }i,y i1, ·, n; n is a positive integer;
combining the real data set and the simulation data set to form an original data set of a training optimization machine learning regression model, and sending the original data set to a data storage module for storage;
wherein, yiThe real life value of the integrated circuit chip corresponding to the relevant parameters of the integrated circuit chip is' obtained; c. CiAs a parameter of interest, y, of the integrated circuit chipiSimulating a life value for the corresponding integrated circuit chip;
the algorithm application module is used for reading the original data set stored in the data storage module and extracting the parameter type data in the original data set through characteristics to obtain parameter type characteristic vectors;
for the physical structure of the multilayer longitudinal section of the chip, a multi-material laminated structure modeling method is adopted to form a two-dimensional structure connection diagram of a three-dimensional chip structure; converting the two-dimensional structure connection diagram into a characteristic vector by using a Weisfiel-Leeman iterative algorithm to form a structure characteristic vector of the chip;
combining the parameter type characteristic vectors and the structural characteristic vectors to form a full characteristic vector set, inputting the full characteristic vector set into a machine learning regression model, and performing model fusion to obtain a fusion regression model;
taking a% of the original data set as a training set, taking the rest 100% -a% as a test set, bringing the data taken as the training set into a fusion regression model to obtain a predicted value, and optimizing the accuracy of the fusion regression model by utilizing a plurality of loss functions to obtain an optimized fusion regression model; the test set is brought into the optimized fusion regression model, the accuracy is detected, and finally an end-to-end chip life prediction model is formed;
and the display module is used for displaying the data sent by the algorithm application module, and the data comprises the accuracy of the chip life prediction model and the chip life prediction value.
Compared with the prior art, the invention has the advantages that:
(1) the method for estimating the service life of the precise integrated circuit chip is characterized by comprising the following steps: the input data of the machine learning algorithm is a full data set combining experimental data and simulation data, so that the problem of insufficient samples in a real data set is solved, and the problem of inaccurate life estimation caused by rough life distribution estimation and invalid physical model parameter fitting is solved. The accuracy requirements on traditional statistical analysis and model estimation are greatly reduced, simulation data are generated, real data are used for correcting a machine learning model, and the accuracy and robustness of the model are improved; based on a multi-material laminated junction construction model method, a Weissella-Leeman iterative algorithm is fused, information of a chip structure is accurately used as features to be input into a machine learning model, and model prediction accuracy is greatly improved.
(2) The invention can carry out the service life estimation of the integrated circuit chip with ultra-high efficiency: the invention integrates the data acquisition module, the data storage module, the algorithm application module and the display module to finally form an integrated circuit chip service life prediction system and complete an end-to-end direct service life prediction path from the parameter input end to the service life output end, thereby not only solving the problem of high cost caused by obtaining accurate results by the traditional experimental method, but also completely replacing the traditional simulation method, breaking through the limitation of time and labor consumption caused by repeated simulation, increasing the prediction speed to the second level and greatly improving the efficiency of integrated circuit chip service life prediction.
Drawings
FIG. 1 is a schematic diagram of a chip hierarchy;
FIG. 2 is a schematic diagram of chip structure modeling;
FIG. 3 is a flow chart of a machine learning algorithm;
FIG. 4 is a flow chart of the method of the present invention.
Detailed Description
The following embodiments are described in detail with reference to the accompanying drawings.
As shown in fig. 4, a method for evaluating the lifetime of an integrated circuit chip based on machine learning includes the following steps:
first, data acquisition
The data source consists of two parts: the life test system comprises a real data set recorded in a life test and simulation data generated by establishing a life distribution function according to the real data;
the simulated life value is generated by a life distribution function in n groups (for example, n is 5000) randomly in the fluctuation range of the relevant parameter, and each group of data contains the relevant parameter data of the chip and is represented as ciThe corresponding chip lifetime is noted as yiThe simulation data set is denoted as { c }i,y i1.., n. Meanwhile, the experimental real data set is expressed in the same way, and the real data set and the simulation data set are combined to form an original data set of the training optimization machine learning regression model.
Second, feature extraction
The feature extraction is from each chip data ciA process for extracting a set of features related to the lifetime of the chip. This set of features is usually collected in a vector, called a feature vector, denoted asThe features of the present invention are broadly divided into two categories: parametric and structural. These two types of features are described in detail below.
1. Parameter type
Such features are often parameters that characterize the chip. Including but not limited to:
the coverage width of the epoxy glue, the arrangement mode of the salient points, the quantity of the salient points, the relative fatigue coefficient of the gold wires, the thermal expansion coefficient (/ K) of the device, the relative fatigue coefficient of the gold wires, the thermal expansion coefficient (/ K) of the substrate and the like.
2. Structural type
Such features are features used to characterize the chip structure. The method of extracting the structural features is described in detail below.
First, as shown in FIG. 1, the chip is generally a layered structure, with different regions of each layer containing different elements.
This structure was modeled as follows, converting the chip structure into a graph:
(1) taking the area with the same element in each layer as a node in the graph, and marking the node with an element;
(2) if each element area is contacted with other element areas, establishing an edge between corresponding nodes;
thus, for each chip, we can get a graph to reflect the structural features of the chip.
FIG. 2 shows the chip structure of FIG. 1 obtained in accordance with our method.
Third, structural feature conversion
A graph is converted into feature vectors using the weisserle-leman iterative algorithm.
Take fig. 2 as an example. We proceed as follows, with intermediate results set forth in Table 1
(1) For each node, its own node element tag is listed. As shown in the second column of table 1.
(2) For each node, the element labels of all neighboring nodes are listed. As shown in the third column of table 1.
(3) The encoding is performed according to a combination of the second column and the third column. The order of the third column of the subject has no effect if there are multiple elements in each row.
(4) For each structure diagram, the number of each code in the fourth column of table 1 is counted. For example, the statistics are counted in the order of (H1, H2, H3, H4, H5). The diagram in fig. 2 can be represented as (1,4,5,3,1, 1). This vector is the resulting structural feature vector.
TABLE 1 Weisfiele-Laiman iterative Algorithm intermediate results
Finally, the parametric and structural features are connected together as the final resulting feature
Fourthly, flow of machine learning algorithm
As shown in fig. 3, the machine learning algorithm of the present invention consists of two parts, training and prediction.
The training process is a process of obtaining a regression model after feature extraction by using historical data. For the training data, it is assumed that n sets of data are collected, which may be from experiments or from simulations. Each set of data contains the relevant data c for the chip, and the corresponding chip lifetime y. For simplicity, the training data set may be represented as { c }i,y i1, ·, n; n is a positive integer;
the predicted process is for new chip related data cnewAnd inputting the obtained features into a regression model obtained in the training process by using a feature extraction method which is the same as that in the training process, so as to obtain the life prediction.
Five, regression model
The regression model is for modelingAnd (4) modeling. In the present invention, y refers to the lifetime of the chip,is a feature vector obtained after feature extraction.
In the present invention, any regression model may be used. Including but not limited to: linear regression, bayesian regression, decision trees, random forests, gradient boosting trees, neural networks. K sub-models are trained by repeating the sampling with the place back for K times (1 model is trained by random sampling each time), and Voting/Averaging fusion is carried out on K model results. K is a positive integer, when K is 1, only one model is used, and the voing/Averaging method is unchanged.
The regression model training algorithm uses the training data set to derive a model that can more accurately predict new data. Typically, a loss function based on training data is defined, and then a numerical optimization algorithm is used to find a set of model parameters to minimize the loss function. For one model, various loss functions may be defined according to requirements, and various numerical optimization algorithms may be used according to requirements.
For example, for a linear regression model, model training is to make the result X θ of the weighted combination of feature vectors closest to the real chip lifetime y, and can be specifically summarized as the following unconstrained optimization problem:
for all theta, find (X theta-y)2A minimum value;
wherein,is a feature vector obtained after feature extraction, y refers to the life of the chip, θ is a feature vector proportion weight, i is 1,2,3, …, n; n is a positive integer.
Or converted to a band penalty term rho theta2P is the penalty term weight:
minimization (X theta-y)2+ρθ2。
Numerical optimization algorithms that may be used include, but are not limited to: gradient descent, random gradient descent, etc.
Sixth, system architecture
A system for evaluating the service life of an integrated circuit chip based on machine learning comprises a data acquisition module, a data storage module, an algorithm application module and a display module:
the data acquisition module records a real data set { c) of the integrated circuit chip according to the life testi,y′iAnd establishing a life distribution function; according to the working condition of the using environment of the integrated circuit chip, randomly generating n groups of parameter groups in the parameter range of the relevant parameters corresponding to the working condition of the using environment, simulating various actual possible using environment conditions, obtaining the corresponding simulated life value by using a life distribution function, and expressing the simulated data set as { c }i,y i1, ·, n; n is a positive integer; combining the real data set and the simulation data set to form an original data set of a training optimization machine learning regression model, and sending the original data set to a data storage module for storage;
wherein, yiThe real life value of the integrated circuit chip corresponding to the relevant parameters of the integrated circuit chip is' obtained; c. CiIs a parameter of interest of the integrated circuit chip, yiSimulating a life value for the corresponding integrated circuit chip;
the algorithm application module is used for reading the original data set stored in the data storage module and extracting the parameter type data in the original data set through characteristics to obtain parameter type characteristic vectors;
for the physical structure of the multilayer longitudinal section of the chip, a multi-material laminated structure modeling method is adopted to form a two-dimensional structure connection diagram of a three-dimensional chip structure; converting the two-dimensional structure connection diagram into a characteristic vector by using a Weisfiel-Leeman iterative algorithm to form a structure characteristic vector of the chip;
combining the parameter type characteristic vector and the structural characteristic vector to form a full characteristic vector set, inputting the full characteristic vector set into a machine learning regression model, and performing model fusion to obtain a fusion regression model;
taking a% of the original data set as a training set, taking the rest 100% -a% as a test set, bringing the data taken as the training set into a fusion regression model to obtain a predicted value, and optimizing the accuracy of the fusion regression model by utilizing a plurality of loss functions to obtain an optimized fusion regression model; the test set is brought into the optimized fusion regression model, the accuracy is detected, and finally an end-to-end chip life prediction model is formed;
and the display module is used for displaying the data sent by the algorithm application module, and the data comprises the accuracy of the chip life prediction model and the chip life prediction value.
The method for modeling the multi-element laminated chip structure by adopting a multi-material laminated junction modeling method to form a node connection diagram comprises the following steps:
different element areas of different layers are abstracted into a node, the adjacent relation of the different element areas is abstracted into a non-directional edge, so that the nodes representing different elements are connected with each other, and a three-dimensional chip structure is modeled into a two-dimensional structure connection diagram model, which comprises the following steps:
sequentially labeling all elements in the physical structure of the multilayer longitudinal section of the chip;
identifying a connected region of the same element in each layer of the multilayer longitudinal section physical structure of the chip, abstracting to be a node in a connection graph, and marking the node as a label corresponding to the element; two identical element connected regions, if touching, add an undirected edge between the corresponding two nodes in the connection graph.
The method for converting the two-dimensional structure connection diagram into the characteristic vector by using the Weisfiel-Leemann iterative algorithm to form the structure characteristic vector of the chip comprises the following steps:
s3.1, obtaining adjacent nodes of each node in the two-dimensional structure connection diagram; obtaining the marks of the adjacent node elements of each node, and putting the marks into an unordered list Li; placing the element of the node in the infinite list Li;
s3.2, coding each node according to the disordered list Li obtained in the S3.1;
and S3.3, counting the number of each code in the two-dimensional structure connection diagram, and orderly arranging the codes to form a structure characteristic vector.
The machine learning regression model is as follows:
where y is the lifetime of the integrated circuit chip,is the full feature vector obtained after feature extraction.
The merging parameter type characteristic vector and the structure characteristic vector form a full characteristic vector set, the full characteristic vector set is input into a machine learning regression model to be subjected to model fusion, and a fusion regression model is obtained, and the merging parameter type characteristic vector and the structure characteristic vector include:
sending the full feature set into a fusion regression model formed by K machine learning algorithms, training K sub-models by repeating K times of repeated sample with put back, training 1 model by random sample each time, and performing Voting/Averaging fusion on K model results; k is a positive integer, when K is 1, only one model is used, and the voing/Averaging method is unchanged.
Parts of the invention not described in detail are well known to the person skilled in the art.
Claims (10)
1. A method for evaluating the lifetime of an integrated circuit chip based on machine learning, comprising:
recording the real data set { c) of the integrated circuit chip according to the life testi,y′iAnd establishing a life distribution function; wherein, ciIs a parameter of interest of the integrated circuit chip, yiThe real life value of the integrated circuit chip corresponding to the relevant parameters of the integrated circuit chip is' obtained;
according to the working condition of the using environment of the integrated circuit chip, randomly generating n groups of parameter groups in the parameter range of the relevant parameters corresponding to the working condition of the using environment, simulating various actual possible using environment conditions, obtaining the corresponding simulated life value by using the life distribution function, and representing the simulated data set as { c }i,yi1, ·, n; n is a positive integer; wherein, ciIs a parameter of interest of the integrated circuit chip, yiSimulating a life value for the corresponding integrated circuit chip;
combining the real data set and the simulation data set to form an original data set of a training optimization machine learning regression model;
obtaining parameter type characteristic vectors for the parameter type data in the original data set through characteristic extraction;
for the physical structure of the multilayer longitudinal section of the chip, a two-dimensional structure connection diagram of a three-dimensional chip structure is formed by adopting a multi-material laminated structure modeling method; converting the two-dimensional structure connection diagram into a characteristic vector by using a Weisfiel-Leeman iterative algorithm to form a structure characteristic vector of the chip;
combining the parameter type characteristic vectors and the structural characteristic vectors to form a full characteristic vector set, inputting the full characteristic vector set into a machine learning regression model to perform model fusion to obtain a fusion regression model;
taking a% of the original data set as a training set, taking the rest 100% -a% as a test set, bringing the data serving as the training set into a fusion regression model to obtain a predicted value, and optimizing the accuracy of the fusion regression model by utilizing a plurality of loss functions to obtain an optimized fusion regression model; and (4) bringing the test set into the optimized fusion regression model, detecting the accuracy, and finally forming an end-to-end chip life prediction model, wherein a is a set value.
2. The method of claim 1, wherein modeling the multi-element stacked chip structure using a multi-material stacked junction modeling method to form a node connection graph comprises:
different element areas of different layers are abstracted and simplified into a node, the adjacent relation of different element areas is abstracted into an undirected edge, so that the nodes representing different elements are connected with each other, and a three-dimensional chip structure is modeled into a two-dimensional structure connection diagram model, which comprises the following steps:
sequentially labeling all elements in the physical structure of the multilayer longitudinal section of the chip;
identifying a connected region of the same element in each layer of the multilayer longitudinal section physical structure of the chip, abstracting to form a node in a connection diagram, and marking the node as a label corresponding to the element; two identical element connected regions, if touching, add an undirected edge between the corresponding two nodes in the connection graph.
3. The method of claim 2, wherein the step of converting the two-dimensional structure connection map into feature vectors by using a Weisselfree-Laemann iterative algorithm to form the structure feature vectors of the chip comprises:
s3.1, obtaining adjacent nodes of each node in the two-dimensional structure connection diagram; obtaining the marks of the adjacent node elements of each node, and putting the marks into an unordered list Li; placing the element of the node in the infinite list Li;
s3.2, coding each node according to the disordered list Li obtained in the S3.1;
and S3.3, counting the number of each code in the two-dimensional structure connection diagram, and orderly arranging the codes to form a structure characteristic vector.
5. The method of claim 1, wherein the merging the parametric feature vectors and the structural feature vectors to form a full feature vector set, and inputting the full feature vector set into a machine learning regression model for model fusion to obtain a fused regression model, comprises:
sending the full feature set into a fusion regression model formed by K machine learning algorithms, training K sub-models by repeating K times of sampling with putting back, training 1 model by random sampling each time, and performing Voting/Averaging fusion on K model results; k is a positive integer, when K is 1, only one model is used, and the voing/Averaging method is unchanged.
6. The integrated circuit chip life evaluation system based on machine learning is characterized by comprising a data acquisition module, a data storage module, an algorithm application module and a display module:
the data acquisition module records a real data set { c) of the integrated circuit chip according to the life testi,y′iAnd establishing a life distribution function;
according to the working condition of the using environment of the integrated circuit chip, randomly generating n groups of parameter groups in the parameter range of the relevant parameters corresponding to the working condition of the using environment, simulating various actual possible using environment conditions, obtaining the corresponding simulated life value by using a life distribution function, and expressing the simulated data set as { c }i,yi1, ·, n; n is a positive integer;
combining the real data set and the simulation data set to form an original data set of a training optimization machine learning regression model, and sending the original data set to a data storage module for storage;
wherein, yiThe real life value of the integrated circuit chip corresponding to the relevant parameters of the integrated circuit chip is' obtained; c. CiIs a parameter of interest of the integrated circuit chip, yiSimulating a life value for the corresponding integrated circuit chip;
the algorithm application module is used for reading the original data set stored in the data storage module and extracting the parameter type data in the original data set through characteristics to obtain parameter type characteristic vectors;
for the physical structure of the multilayer longitudinal section of the chip, a multi-material laminated structure modeling method is adopted to form a two-dimensional structure connection diagram of a three-dimensional chip structure; converting the two-dimensional structure connection diagram into a characteristic vector by using a Weisfiel-Leeman iterative algorithm to form a structure characteristic vector of the chip;
combining the parameter type characteristic vectors and the structural characteristic vectors to form a full characteristic vector set, inputting the full characteristic vector set into a machine learning regression model, and performing model fusion to obtain a fusion regression model;
taking a% of the original data set as a training set, taking the rest 100% -a% as a test set, bringing the data serving as the training set into a fusion regression model to obtain a predicted value, and optimizing the accuracy of the fusion regression model by utilizing a plurality of loss functions to obtain an optimized fusion regression model; the test set is brought into the optimized fusion regression model, the accuracy is detected, and finally an end-to-end chip life prediction model is formed;
and the display module is used for displaying the data sent by the algorithm application module, and the data comprises the accuracy of the chip life prediction model and the chip life prediction value.
7. The system of claim 6, wherein modeling the multi-element stacked chip structure using a multi-material stacked junction modeling method to form a node connection graph comprises:
different element areas of different layers are abstracted into a node, the adjacent relation of the different element areas is abstracted into a non-directional edge, so that the nodes representing different elements are connected with each other, and a three-dimensional chip structure is modeled into a two-dimensional structure connection diagram model, which comprises the following steps:
sequentially labeling all elements in the physical structure of the multilayer longitudinal section of the chip;
identifying a connected region of the same element in each layer of the multilayer longitudinal section physical structure of the chip, abstracting to be a node in a connection graph, and marking the node as a label corresponding to the element; two identical element connected regions, if touching, add an undirected edge between the corresponding two nodes in the connection graph.
8. The system of claim 7, wherein the using the Weisselfree-Leemann iterative algorithm to convert the two-dimensional structure connection graph into feature vectors to form the structure feature vectors of the chip comprises:
s3.1, obtaining adjacent nodes of each node in the two-dimensional structure connection diagram; obtaining the marks of the adjacent node elements of each node, and putting the marks into an unordered list Li; placing the element of the node in the infinite list Li;
s3.2, coding each node according to the disordered list Li obtained in the S3.1;
and S3.3, counting the number of each code in the two-dimensional structure connection diagram, and orderly arranging the codes to form a structure characteristic vector.
10. The system of claim 6, wherein the merged feature vectors of parametric type and the feature vectors of structure form a full feature vector set, which is input into a machine learning regression model for model fusion to obtain a fused regression model, comprising:
sending the full feature set into a fusion regression model formed by K machine learning algorithms, training K sub-models by repeating K times of repeated sample with put back, training 1 model by random sample each time, and performing Voting/Averaging fusion on K model results; k is a positive integer, when K is 1, only one model is used, and the voing/Averaging method is unchanged.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN202210331280.9A CN114692499A (en) | 2022-03-30 | 2022-03-30 | Method and system for evaluating service life of integrated circuit chip based on machine learning |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN202210331280.9A CN114692499A (en) | 2022-03-30 | 2022-03-30 | Method and system for evaluating service life of integrated circuit chip based on machine learning |
Publications (1)
Publication Number | Publication Date |
---|---|
CN114692499A true CN114692499A (en) | 2022-07-01 |
Family
ID=82140624
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN202210331280.9A Pending CN114692499A (en) | 2022-03-30 | 2022-03-30 | Method and system for evaluating service life of integrated circuit chip based on machine learning |
Country Status (1)
Country | Link |
---|---|
CN (1) | CN114692499A (en) |
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN115420307A (en) * | 2022-11-04 | 2022-12-02 | 四川凌翔科技发展有限公司 | Real-time self-calibration self-diagnosis low-temperature drift data acquisition system |
CN115616374A (en) * | 2022-09-20 | 2023-01-17 | 重庆鹰谷光电股份有限公司 | Machine learning-based semiconductor chip test system |
CN117634101A (en) * | 2024-01-26 | 2024-03-01 | 杭州广立微电子股份有限公司 | Chip surface morphology determination method, chip surface morphology determination device, computer device and storage medium |
CN117787179A (en) * | 2023-12-28 | 2024-03-29 | 杭州四维映射软件有限公司 | Fusion type circuit performance modeling method and device |
-
2022
- 2022-03-30 CN CN202210331280.9A patent/CN114692499A/en active Pending
Cited By (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN115616374A (en) * | 2022-09-20 | 2023-01-17 | 重庆鹰谷光电股份有限公司 | Machine learning-based semiconductor chip test system |
CN115420307A (en) * | 2022-11-04 | 2022-12-02 | 四川凌翔科技发展有限公司 | Real-time self-calibration self-diagnosis low-temperature drift data acquisition system |
CN115420307B (en) * | 2022-11-04 | 2023-02-07 | 四川凌翔科技发展有限公司 | Real-time self-calibration self-diagnosis low-temperature drift data acquisition system |
CN117787179A (en) * | 2023-12-28 | 2024-03-29 | 杭州四维映射软件有限公司 | Fusion type circuit performance modeling method and device |
CN117787179B (en) * | 2023-12-28 | 2024-06-07 | 杭州四维映射软件有限公司 | Fusion type circuit performance modeling method and device |
CN117634101A (en) * | 2024-01-26 | 2024-03-01 | 杭州广立微电子股份有限公司 | Chip surface morphology determination method, chip surface morphology determination device, computer device and storage medium |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
CN114692499A (en) | Method and system for evaluating service life of integrated circuit chip based on machine learning | |
US20230195986A1 (en) | Method for predicting delay at multiple corners for digital integrated circuit | |
CN108664700A (en) | Acceleration degradation information Fusion Modeling Method based on uncertain data Envelope Analysis | |
CN109189028A (en) | PCA method for diagnosing faults based on muti-piece information extraction | |
US11416007B2 (en) | Computer-implemented method and system for evaluating uncertainty in trajectory prediction | |
CN104215893A (en) | Circuit reliability evaluating method based on signal probability | |
CN113626267B (en) | Complex electronic system uncertainty fault diagnosis efficiency evaluation method | |
CN112083244A (en) | Integrated avionics equipment fault intelligent diagnosis system | |
CN102608519B (en) | Circuit failure diagnosis method based on node information | |
CN109638826B (en) | CNN-based power grid topology identification method and system | |
CN113642255A (en) | Photovoltaic power generation power prediction method based on multi-scale convolution cyclic neural network | |
CN116881685A (en) | Bearing life prediction method for improving TCN (train control network) under mixed attention mechanism | |
CN114399066A (en) | Mechanical equipment predictability maintenance system and maintenance method based on weak supervision learning | |
CN115146580A (en) | Integrated circuit path delay prediction method based on feature selection and deep learning | |
Han et al. | Research on quality problems management of electric power equipment based on knowledge–data fusion method | |
Xiahou et al. | Measuring conflicts of multisource imprecise information in multistate system reliability assessment | |
Guan et al. | Objective Bayesian analysis for competing risks model with Wiener degradation phenomena and catastrophic failures | |
Song et al. | Remaining Useful Life Prediction Method Based on the Spatiotemporal Graph and GCN Nested Parallel Route Model | |
Myilsamy et al. | State-of-health prediction for Li-ion batteries for efficient battery management system using hybrid machine learning model | |
CN117557127A (en) | Power grid dispatching system supporting platform reliability assessment method, system and storage medium | |
Shao et al. | Degradation modeling with long-term memory considering measurement errors | |
Zou et al. | A deep learning approach for state-of-health estimation of lithium-ion batteries based on differential thermal voltammetry and attention mechanism | |
CN115184055A (en) | Method and system for determining test set with optimized hierarchical testability | |
CN114757391A (en) | Service quality prediction method based on network data space design | |
Bagheriye et al. | Life-time prognostics of dependable VLSI-SoCs using machine-learning |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
PB01 | Publication | ||
PB01 | Publication | ||
SE01 | Entry into force of request for substantive examination | ||
SE01 | Entry into force of request for substantive examination |