CN114690830A - Band-gap reference circuit, switching power supply and power supply management chip - Google Patents

Band-gap reference circuit, switching power supply and power supply management chip Download PDF

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CN114690830A
CN114690830A CN202011621050.3A CN202011621050A CN114690830A CN 114690830 A CN114690830 A CN 114690830A CN 202011621050 A CN202011621050 A CN 202011621050A CN 114690830 A CN114690830 A CN 114690830A
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current
bipolar transistor
power supply
transistor
reference circuit
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CN114690830B (en
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陈俊吉
吴琪
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Amlogic Shanghai Co Ltd
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Amlogic Shanghai Co Ltd
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    • G—PHYSICS
    • G05—CONTROLLING; REGULATING
    • G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
    • G05F1/00—Automatic systems in which deviations of an electric quantity from one or more predetermined values are detected at the output of the system and fed back to a device within the system to restore the detected quantity to its predetermined value or values, i.e. retroactive systems
    • G05F1/10—Regulating voltage or current
    • G05F1/46—Regulating voltage or current wherein the variable actually regulated by the final control device is dc
    • G05F1/56—Regulating voltage or current wherein the variable actually regulated by the final control device is dc using semiconductor devices in series with the load as final control devices
    • G05F1/565—Regulating voltage or current wherein the variable actually regulated by the final control device is dc using semiconductor devices in series with the load as final control devices sensing a condition of the system or its load in addition to means responsive to deviations in the output of the system, e.g. current, voltage, power factor
    • G05F1/567—Regulating voltage or current wherein the variable actually regulated by the final control device is dc using semiconductor devices in series with the load as final control devices sensing a condition of the system or its load in addition to means responsive to deviations in the output of the system, e.g. current, voltage, power factor for temperature compensation

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Abstract

The band-gap reference circuit comprises a band-gap current generation unit, a current mirror unit and a reference voltage output unit; the bandgap current generating unit is suitable for outputting a bandgap current, and comprises a first current generating module, a second current generating module and a clamping module, wherein the first current generating module is suitable for outputting a first current proportional to absolute temperature and comprises a first bipolar transistor and a second bipolar transistor, the first bipolar transistor and the second bipolar transistor are both NPN transistors, and collectors and bases of the first bipolar transistor and the second bipolar transistor are both connected with the power supply terminal; the second current generation module is adapted to generate a second current that is inversely proportional to absolute temperature; the reference voltage output unit is suitable for outputting reference voltage. By adopting the band-gap reference circuit, the reference voltage which is not interfered by substrate noise can be output.

Description

Band-gap reference circuit, switching power supply and power supply management chip
Technical Field
The embodiment of the invention relates to the technical field of band gap reference, in particular to a band gap reference circuit, a switching power supply and a power supply management chip.
Background
With the rapid development of portable electronic products, the requirements for performance, volume and cost of the power management chip are higher and higher, and the switching power supply has the excellent characteristics of low power consumption, high efficiency, wide voltage stabilizing range and the like, and becomes an essential component in a high-power management chip.
Currently, the Power Ground (Power Ground) of the switching Power supply is mostly wire-bonded from the chip to the pad (Down Bond) to reduce the number of chip pins (Pin), for example, the substrate of the transistor can be used as the Power Ground of the switching Power supply, so that the Power Ground Pin of the switching Power supply can be removed.
However, in the above manner, when the switching power supply switches the switching state, all the switching noise introduced by the switching power supply enters the substrate, and the switching noise is transmitted into the Circuit through the substrate, which may have a great influence on a Band Gap reference Circuit (Band Gap Circuit) in the Circuit structure of the electronic product.
Disclosure of Invention
In view of this, embodiments of the present invention provide a bandgap reference circuit, a switching power supply, and a power management chip, which can prevent substrate noise from entering the bandgap reference circuit, so as to output a reference voltage without being interfered by the substrate noise.
First, an embodiment of the present invention provides a bandgap reference circuit, including:
a bandgap current generating unit, a current mirror unit, and a reference voltage output unit, wherein:
the band gap current generating unit is suitable for outputting band gap current, and comprises:
a first current generating module adapted to generate a proportional-to-absolute-temperature current as a first current, an input terminal of the first current generating module being coupled to a power supply terminal, the first current generating module comprising: a first bipolar transistor and a second bipolar transistor, wherein the first bipolar transistor and the second bipolar transistor are both NPN transistors, and collectors and bases of the first bipolar transistor and the second bipolar transistor are both connected to the power supply terminal, and emitters of the first bipolar transistor and the second bipolar transistor are respectively used as a first output terminal and a second output terminal of the first current generation module;
a second current generating module adapted to generate a current with inverse ratio and absolute temperature as a second current, an input terminal of the second current generating module being coupled to the power supply terminal, and an output terminal of the second current generating module being coupled to the first output terminal of the first current generating module and the input terminal of the current mirror unit;
the clamping module is suitable for keeping the voltages of the first output end and the second output end of the first current generation module equal;
the current mirror image unit is suitable for mirroring the band gap current generated by the first output end of the first current generation module and outputting the mirrored band gap current to the reference voltage output unit;
the reference voltage output unit is suitable for outputting reference voltage.
Optionally, the clamping module includes:
and a non-inverting input terminal of the operational amplifier is coupled to the first output terminal of the first current generation module, and an inverting input terminal of the operational amplifier is coupled to the second output terminal of the first current generation module.
Optionally, the current mirror unit includes:
a first NMOS transistor, wherein the drain electrode of the first NMOS transistor is coupled with the emitter electrode of the first bipolar transistor, and the source electrode of the first NMOS transistor is connected with the ground;
a second NMOS transistor, a gate of which is connected to the gate of the first NMOS transistor and is coupled to the output terminal of the operational amplifier, a drain of the second NMOS transistor is connected to the emitter of the second bipolar transistor, and a source of the second NMOS transistor is connected to the ground;
a third NMOS transistor, wherein the grid electrode of the third NMOS transistor is coupled with the output end of the operational amplifier, and the source electrode of the third NMOS transistor is connected with the ground;
the drain electrode of the first PMOS tube is connected with the drain electrode of the third NMOS tube, the drain electrode of the first PMOS tube is connected with the grid electrode, and the source electrode of the first PMOS tube is connected with the power supply end;
and a gate of the second PMOS transistor is connected to a gate of the first PMOS transistor and a drain of the third NMOS transistor, respectively, a source of the second PMOS transistor is connected to the power supply terminal, and a drain of the second PMOS transistor is coupled to the input terminal of the reference voltage output unit.
Optionally, the current mirror unit further includes:
and the third PMOS tube is suitable for outputting a first current source, the source electrode of the third PMOS tube is connected with the power supply end, the grid electrode of the third PMOS tube is respectively connected with the grid electrode of the first PMOS tube and the grid electrode of the second PMOS tube, and the drain electrode of the third PMOS tube outputs the first current source.
Optionally, the current mirror unit further includes:
and the fourth NMOS tube is suitable for outputting a second current source, the grid electrode of the fourth NMOS tube is coupled with the output end of the operational amplifier, the source electrode of the fourth NMOS tube is connected with the ground, and the drain electrode of the fourth NMOS tube outputs the second current source.
Optionally, the first current generating module further includes:
and a first end of the first resistor is connected with the emitter of the first bipolar transistor, and a second end of the first resistor is connected with the output end of the second current generation module.
Optionally, the second current generating module includes:
and the first end of the second resistor is connected with the power supply end, and the second end of the second resistor is connected with the output end of the first current generation module.
Optionally, the reference voltage output unit includes:
and a first end of the third resistor is connected with the output end of the current mirror unit, and a second end of the third resistor is connected with the ground.
An embodiment of the present invention further provides a switching power supply, including: the bandgap reference circuit described above.
The embodiment of the present invention further provides a power management chip, including: the aforementioned switching power supply.
The bandgap reference circuit provided by The embodiment of The present invention is adopted, wherein The bandgap current generating unit includes a first current generating module, a second current generating module and a clamping module, The first current generating module includes a first bipolar transistor and a second bipolar transistor, The first bipolar transistor and The second bipolar transistor are both NPN transistors, and collectors and bases of The first bipolar transistor and The second bipolar transistor are both connected to The power supply terminal, and can output a first current Proportional to an Absolute Temperature (PTAT); the second current generating module may generate a second current that is inversely proportional to The Absolute Temperature (CTAT) current. Since the first bipolar transistor and the second bipolar transistor are both NPN transistors, and the collectors and bases of the first bipolar transistor and the second bipolar transistor are both connected to the power supply terminal, parasitic diodes with conduction directions from the substrate to the collector can be generated between the substrate and the collector of the first bipolar transistor and between the substrate and the collector of the second bipolar transistor, and since the collectors of the transistors are connected, the potential of the substrate is much smaller than that of the collector, substrate noise cannot enter the bandgap reference circuit through the parasitic diodes, and thus the bandgap reference circuit can output a bandgap reference voltage which is not interfered by noise.
Further, the voltages of the first output terminal and the second output terminal of the first current generating module can be kept equal by coupling the non-inverting input terminal of the operational amplifier with the first output terminal of the first current generating module and coupling the inverting input terminal with the second output terminal of the first current generating module; in addition, the output end of the operational amplifier is connected with the grid electrode of the NMOS tube in the current mirror image unit, and the starting voltage can be provided for the current mirror image unit under the condition that a circuit structure is not additionally increased, so that the circuit area can be reduced, the power consumption of the circuit is reduced, and the cost is saved.
Furthermore, the current mirror unit can be composed of a first NMOS tube, a second NMOS tube, a third NMOS tube, a first PMOS tube and a second PMOS tube, and the band gap current generated by the band gap current generating unit can be mirrored to the reference voltage output unit through the MOS tubes, so that the reference voltage output by the reference voltage output unit is not influenced by temperature, and the obtained reference voltage is more stable.
Furthermore, the current mirror unit can also comprise at least one of a third PMOS tube and a fourth NMOS tube, and can output various different types of current sources with smaller temperature coefficients through the MOS tubes without adding an additional circuit, so that the circuit area can be reduced, the power consumption of the circuit can be reduced, and the cost can be saved.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present specification, the drawings needed to be used in the embodiments of the present specification or in the description of the prior art will be briefly described below, it is obvious that the drawings described below are only some embodiments of the present specification, and it is also possible for a person skilled in the art to obtain other drawings based on these drawings without creative efforts.
Fig. 1 shows a block diagram of an NPN bipolar transistor.
Fig. 2 shows a block diagram of a PNP bipolar transistor.
Fig. 3 shows a circuit diagram of a bandgap reference circuit structure.
Fig. 4 shows a circuit diagram of another bandgap reference circuit configuration.
Fig. 5 shows a schematic diagram of a bandgap reference circuit structure in an embodiment of the invention.
Fig. 6 is a circuit diagram of a bandgap reference circuit structure according to a specific application scenario in an embodiment of the present invention.
Fig. 7 is a schematic structural diagram of a power management chip in the embodiment of the present invention.
Detailed Description
As described in the background art, at present, the power ground of the switching power supply mostly adopts a wire bonding manner from the chip to the bonding pad to reduce the number of chip pins, so that the switching noise introduced by the switching power supply can completely enter the substrate. In the MOSFET process, the substrate of the transistor is used as the power ground terminal of the switching power supply, so that noise from the switching power supply directly enters the inside of the bandgap reference circuit through the substrate, and the performance of the circuit is influenced.
In the MOSFET process, a proportional bipolar transistor is often used in the bandgap reference circuit to generate a PTAT current for the transistor, but in the actual operation of the bandgap reference circuit, the bipolar transistor may generate a parasitic diode effect, so that the transistor substrate noise is directly transmitted to the inside of the bandgap reference circuit through the parasitic diode.
Referring to a block diagram of an NPN bipolar transistor shown in fig. 1, the NPN bipolar transistor shown in fig. 1 has a structure including: n +, PW (P-WELL), DNW (Deep N-WELL), and SUB, wherein the N + region is an emitter of the NPN bipolar transistor, the PW is a base of the NPN bipolar transistor, the DNW is a collector of the NPN bipolar transistor, the SUB is a substrate of the NPN bipolar transistor, and the substrate is a P-type substrate.
With continued reference to fig. 1, a PN junction is formed between the N-well and the P-type substrate of the NPN bipolar transistor, i.e., a PN junction is formed between the collector and the substrate of the NPN bipolar transistor. Therefore, in the actual operation of the NPN bipolar transistor, a parasitic diode effect is formed in the PN junction between the substrate and the collector, and the conduction direction of the parasitic diode is from the substrate to the collector, so that substrate noise can be transferred to the inside of the bandgap reference circuit through the parasitic diode.
Specifically, when the bandgap reference circuit actually works, a power supply ground terminal of the switching power supply is connected to a substrate of the NPN bipolar transistor, and when the switching power supply normally works, switching noise generated by switching operation of the power MOS transistor is transmitted to the substrate through the power supply ground terminal, and the switching noise increases with increase of a load at an output terminal of the switching power supply. Then the substrate noise can be introduced into the band-gap reference circuit through a parasitic diode formed between the substrate and the collector, and the band-gap current generated by the band-gap reference circuit is small and is easily influenced by the substrate noise, so that the performance of the circuit is influenced
Referring to a structure diagram of the PNP bipolar transistor shown in fig. 2, the PNP bipolar transistor shown in fig. 2 includes: PW (P-WELL), DNW (Deep N-WELL), SUB, wherein PW is the emitter of the PNP bipolar transistor, DNW is the base of the PNP bipolar transistor, SUB is the substrate of the PNP bipolar transistor.
Note that the substrate of the PNP bipolar transistor is a collector.
With continued reference to fig. 2, unlike the NPN bipolar transistor, a PN junction is formed between the base and the emitter of the PNP bipolar transistor, and thus a parasitic diode is formed in the PN junction between the base and the emitter when the PNP bipolar transistor actually operates, and the conduction direction of the parasitic diode is from the base to the emitter. Since the collector of the NPN bipolar transistor is the substrate, in the actual circuit connection, the collector (substrate) and the base of the PNP bipolar transistor need to be shorted, that is, the substrate (collector) and the base are shorted, so that the substrate noise can be transmitted into the bandgap reference circuit through the parasitic diodes of the substrate (collector) and the emitter.
Specifically, when the bandgap reference circuit actually operates, a power supply ground terminal of the switching power supply is connected to a substrate (collector) of the NPN bipolar transistor, and when the switching power supply normally operates, switching noise generated by switching operation of the power MOS transistor is transmitted to the substrate (collector) through the power supply ground terminal, and the switching noise increases as a load at an output terminal of the switching power supply increases. Then, the noise of the substrate can be introduced into the bandgap reference circuit through a parasitic diode formed between the substrate (collector) and the emitter, and the bandgap reference circuit generates a smaller bandgap current and is easily affected by the noise of the substrate, thereby affecting the performance of the circuit.
In order to more clearly and clearly illustrate that the bandgap reference circuit in the conventional MOSFET process cannot effectively solve the substrate noise interference problem, the following detailed description is provided by the accompanying drawings.
The basic principle of the bandgap reference Circuit is that a voltage with a positive temperature coefficient and a voltage with a negative temperature coefficient are superposed, and the temperature coefficients of the two are mutually offset, so that the output of the reference voltage independent of the temperature is realized.
Referring to fig. 3, a circuit diagram of a bandgap reference circuit structure is shown. As shown in fig. 3, includes resistors R31, R32, R33, R34, bipolar transistors T1 and T2, and an operational amplifier. Wherein the resistor R33 is used for generating a PTAT current; the number of the bipolar transistors T1 is an integral multiple of that of the bipolar transistors T2, and all the bipolar transistors are NPN type bipolar transistors; the operational amplifier makes the voltages at the two nodes U, V equal.
By adopting the band-gap reference circuit shown in fig. 3, the circuit can output a stable reference voltage by selecting appropriate resistors R31, R32, R33 and R34. However, in practical operation of the bandgap reference circuit, as mentioned above, a parasitic diode effect is generated between the collector and the substrate of the NPN-type bipolar transistor, and parasitic diodes, such as the parasitic diodes D31 and D32 in fig. 3, are formed, and the conduction directions of the parasitic diodes D31 and D32 are from the substrate to the collector. Since the substrate is connected to the power ground of the switching power supply, when the voltage at the substrate end is greater than the voltage at the collector, noise from the switching power supply is transmitted to the substrate, and then the substrate noise is transmitted to the bandgap reference circuit through the parasitic diodes D1 and D2, affecting the collector current I of the bipolar transistor T1C1And collector current I of bipolar transistor T2C2Thereby affecting the stability of the circuit output.
Referring to fig. 4, a circuit diagram of another bandgap reference circuit configuration is shown. As shown in fig. 4, includes: resistors R41, R42, R43, bipolar transistors a1 and a2, and an operational amplifier OA 1. Wherein the resistor R43 is used for generating a PTAT current; the bipolar transistors A1 and A2 are both PNP type, and the number of the bipolar transistors A2 is an integer multiple of the number of the bipolar transistors A1; the operational amplifier OA1 causes the voltage V at the non-inverting input terminal to beinpAnd the voltage V of the inverting input terminalinnAre equal.
With the bandgap reference circuit as shown in fig. 4, by selecting appropriate resistors R42 and R43, the circuit can output a stable reference voltage. However, band gapIn practical operation of the reference circuit, as mentioned above, the PNP bipolar transistor will generate parasitic diode effect at the base and the emitter, and generate parasitic diodes, such as parasitic diodes D41 and D42 shown in fig. 4, because the base of the PNP bipolar transistor is shorted to the substrate, that is, parasitic diodes will be generated between the substrate and the emitter, and the conduction directions of the parasitic diodes D41 and D42 are from the substrate to the emitter. Since the substrate is connected to the power ground of the switching power supply and the voltage at the substrate end is not 0 due to the switching noise, when the voltage at the substrate end is greater than the voltage at the emitter, the noise from the switching power supply can be transmitted to the bandgap reference circuit through the parasitic diode D41 and the parasitic diode D42, and the collector current I of the bipolar transistor a1 is affected1And collector current I of bipolar transistor A22Thereby affecting the stability of the output of the bandgap reference circuit.
In order to solve the above-mentioned problems, embodiments of the present invention provide a bandgap reference circuit, wherein the first bipolar transistor and the second bipolar transistor of the bandgap current generating unit are both NPN transistors, and a parasitic diode effect whose conduction direction is from a substrate to a collector can be generated between a substrate and a collector of the first bipolar transistor and between a substrate and a collector of the second bipolar transistor, however, since the collectors and bases of the first bipolar transistor and the second bipolar transistor are both connected to the power source terminal, so that the potential of the substrate is much smaller than that of the collector, substrate noise cannot enter the bandgap reference circuit through the parasitic diode, and thus the bandgap reference circuit can output a bandgap reference voltage without being interfered by noise.
Referring to a schematic diagram of a bandgap reference circuit structure of the embodiment of the present invention shown in fig. 5, as shown in the figure, the bandgap reference circuit 50 may include a bandgap current generating unit 51, a current mirroring unit 52 and a reference voltage output unit 53, wherein:
the bandgap current generating unit 51, adapted to output a bandgap current, may include:
a first current generation module 511 adapted to generate a proportional and absolute temperature current as a first current;
a second current generation module 512 adapted to generate a current of inverse proportion to absolute temperature as a second current;
a clamping module 513 adapted to keep the voltages of the first and second output terminals of the first current generating module equal.
The current mirror unit 52 is adapted to mirror the bandgap current generated at the first output terminal of the first current generating module and output the mirrored bandgap current to the reference voltage output unit 53.
The reference voltage output unit 53 is adapted to output a reference voltage.
In a specific implementation, the bandgap reference circuit 50 takes the substrate of the transistor in the first current generating module 511 as a power ground, and connects the collector of the transistor in the first current generating module 511 to the power terminal AVDD, so that the potential of the collector is much larger than that of the substrate, and substrate noise cannot enter the bandgap reference circuit. To clearly illustrate the above process, how embodiments of the present invention prevent substrate noise from entering the inside of the bandgap reference circuit is described in detail below with a specific application scenario.
Referring to a circuit diagram of a bandgap reference circuit structure of a specific application scenario shown in fig. 6, the bandgap reference circuit may include: a band gap current generating unit A, a current mirror unit B and a reference voltage output unit C, wherein:
the reference current generating unit a, adapted to output a bandgap current, may include: a first current generating module A1, a second current generating module A2, wherein:
the first current generation module a1 is adapted to generate a proportional and absolute temperature current, which is referred to as a first current I for convenience of descriptionPTAT；
The second current generation module a2 is adapted to generate a current inversely proportional to absolute temperature, which is referred to as a second current I for convenience of descriptionCTAT。
In an embodiment of the present invention, the output terminal of the second current generating module a2 and the first current generatorThe output end of the generating module A1 is connected, and the first current I generated by the first current generating module A1PTATWith positive temperature coefficient, the second current I generated by the second current generation module A2CTATThe band gap current I with a small temperature coefficient can be generated by mutually overlapping the negative temperature coefficient and the positive temperature coefficient.
In specific implementation, to obtain stable band gap current IPTATThe voltages of the first output terminal and the second output terminal of the first current generation module need to be kept equal, so the bandgap current generation unit a may further include a clamping module, wherein the clamping module may be an operational amplifier OA.
With continuing reference to the circuit diagram of the bandgap reference circuit configuration shown in fig. 6, as shown in fig. 6, the first current generating module a1 may include: a first bipolar transistor Q1, a second bipolar transistor Q2 and a first resistor R0. A collector of the first bipolar transistor Q1 is connected to a power supply terminal AVDD, a base of the first bipolar transistor Q1 and a base of the second bipolar transistor Q2 are both connected to the power supply terminal AVDD, and an emitter of the first bipolar transistor Q1 is connected to a non-inverting input terminal of the operational amplifier OA through a first resistor R0; a collector of the second transistor Q2 is connected to the power supply terminal AVDD, and an emitter of the second transistor Q2 is connected to the inverting input terminal of the operational amplifier.
In a specific implementation, proportional NPN bipolar transistors may be employed, wherein the number of first bipolar transistors Q1 may be n times the number of second bipolar transistors Q2, n being an integer greater than 1.
In an embodiment of the present invention, the second current generating module a2 may include a second resistor R1, a first terminal of the second resistor R1 is connected to the power supply terminal AVDD, and a second terminal of the second resistor R1 is connected to an emitter of the first bipolar transistor Q1 through a first resistor R0.
In a specific implementation, as shown in fig. 6, the non-inverting input terminal of the operational amplifier OA is connected to the emitter of the first bipolar transistor Q1 through the first resistor R0, the inverting input terminal thereof is connected to the emitter of the second bipolar transistor Q2, and the output terminal thereof is connected to the input terminal of the current mirror unit B, so that the start voltage can be provided to the current mirror unit B, thereby eliminating the need to add an additional circuit structure, reducing the circuit area, reducing the circuit power consumption, and saving the cost.
It should be noted that the bandgap current I generated by the reference current generating unit a is directly mirrored to the reference voltage output unit C by the current mirror unit B without passing through the operational amplifier OA.
In the embodiment of the present invention, the current mirror unit B is adapted to mirror the bandgap current I generated by the bandgap current generating unit a and output the mirrored bandgap current I to the reference voltage output unit C.
In some embodiments of the present invention, the current mirror unit B may include: a first NMOS transistor M1, a second NMOS transistor M2, a third NMOS transistor M3, a first PMOS transistor M4, and a second PMOS transistor M5. Specifically, the drain of the first NMOS transistor M1 is connected to the emitter of the first bipolar transistor Q1 through the first resistor R0, and the source of the first NMOS transistor M1 is grounded AVSS; the gate of the second NMOS transistor M2 is connected to the gate of the first NMOS transistor M1 and to the output of the operational amplifier OA, the drain of the second NMOS transistor M2 is connected to the emitter of the second bipolar transistor Q2, and the source of the second NMOS transistor M2 is connected to the ground AVSS; the grid electrode of the third NMOS tube M3 is connected with the output end of the operational amplifier, and the source electrode of the third NMOS tube M3 is connected with the ground AVSS; the drain of the first PMOS transistor M4 is connected to the drain of the third NMOS transistor M3, the gate and the drain of the first PMOS transistor M4 are connected, and the source of the first PMOS transistor M4 is connected to the power supply terminal AVDD; the gate of the second PMOS transistor M5 is connected to the gate of the first PMOS transistor M4 and the drain of the third NMOS transistor M3, respectively, the source of the second PMOS transistor M5 is connected to a power supply terminal AVDD, and the drain of the second PMOS transistor M5 is connected to the input terminal of the reference voltage output unit C, so as to mirror the bandgap current to the reference voltage output unit C.
In other embodiments of the present invention, the current mirror unit B may further include: a third PMOS transistor M6 for outputting a first current source IBP. Specifically, the third PMOS transistorThe source of the transistor M6 is connected to a power supply terminal AVDD, the base of the third PMOS transistor M6 is connected to the base of the first PMOS transistor M4 and the gate of the second PMOS transistor M5, respectively, and the drain of the third PMOS transistor M6 outputs the first current source IBP。
As another optional example, the current mirror unit B may further include: a fourth NMOS transistor M7 for outputting a second current source IBN. Specifically, a gate of the fourth NMOS transistor M7 is connected to the output terminal of the operational amplifier, a source of the fourth NMOS transistor M7 is connected to ground AVSS, and a drain of the fourth NMOS transistor M7 outputs the second current source IBN。
In a specific implementation, as shown in fig. 6, the current mirror unit B may include both the third PMOS transistor M6 and the fourth NMPS transistor M7, so that two different types of current sources may be output.
It should be noted that the first current source IBPAnd a second current source IBNAll have smaller temperature coefficients and can be used as current sources of other circuit structures. In addition, the number of NMOS tubes or PMOS tubes used in the current mirror unit can be expanded according to the number of current sources required by the switching power supply. For example, if a greater number of current sources are required, more PMOS transistors may be further connected to the gate of the third PMOS transistor M6, or more NMOS transistors may be further connected to the gate of the fourth NMOS.
As can be seen from the above, on the one hand, by using the current mirror unit in the embodiment of the present invention, the bandgap current generated by the bandgap current generating unit can be mirrored to the reference voltage output unit, so that the reference voltage output by the reference voltage output unit is not affected by temperature, and the obtained reference voltage is more stable.
On the other hand, under the condition that a circuit is not additionally added, the current mirror unit can also output various current sources of different types through other MOS (metal oxide semiconductor) tubes, so that the area of the circuit can be reduced, the power consumption of the circuit is reduced, and the cost is saved.
In a specific implementation, the reference voltage output unit C is adapted to output a reference voltage, and may include: a third resistor R having a first end coupled to the currentThe drain of the second PMOS transistor M5 in the mirror image unit B is connected, the second terminal is connected to the ground AVSS, and the reference voltage output unit C leads a reference voltage output terminal between the drain of the second PMOS transistor M5 and the third resistor R, for providing a reference voltage V for other circuitsBG。
With continued reference to fig. 6, the power supply terminal AVDD supplies power to the bandgap reference circuit, which in actual operation, when the voltages between the bases and the emitters of the first bipolar transistor Q1 and the second bipolar transistor Q2 are greater than the turn-on voltage, the first bipolar transistor Q1 and the second bipolar transistor Q2 are turned on to generate the bandgap current I while the voltages of the non-inverting input terminal and the inverting input terminal of the operational amplifier OA are kept equal. Specifically, the first bipolar transistor Q1 generates a PTAT current flowing through the resistor R0, the second bipolar transistor Q2 generates a CTAT current inversely proportional to absolute temperature at the resistor R1, temperature coefficients of the CTAT current and the resistor R1 are superimposed to generate a bandgap current I with a smaller temperature coefficient, the bandgap current I is mirrored by the current mirroring unit B to make the current flowing through the third resistor R be I, and the reference voltage output unit C outputs a reference voltage V independent of temperatureBG。
As shown in fig. 6, during the actual operation of the bandgap reference circuit, the first bipolar transistor Q1 and the second bipolar transistor Q2 are turned on, and the voltage at the positive input terminal of the operational amplifier is equal to the voltage at the negative input terminal of the operational amplifier due to the clamping effect of the operational amplifier, that is:
VX＝VY (1)
the power supply terminal voltage VDDComprises the following steps:
VDD＝VX+R1*ICTAT (2)
VDD＝VX+R0*IPTAT+VBE1 (3)
VDD＝VY+VBE2 (4)
wherein, VBE1The voltage of the base and the emitter when the first bipolar transistor Q1 is turned on; vBE2Represents the secondWhen bipolar transistor Q2 is on, the base and emitter voltages.
The following equations (1), (2) and (4) show that:
Figure BDA0002874023230000121
the following equations (1), (3) and (4) show that:
R0*IPTAT＝VBE2-VBE1＝ΔVTlnn (6)
Figure BDA0002874023230000122
in the formula (6), Δ VTIs a thermal voltage generated by PN junction of bipolar transistor and has positive temperature coefficient, VBE2Has a negative temperature coefficient, and n is the number ratio of the first bipolar transistor Q1 to the second bipolar transistor Q2. Specifically, Δ VTkT/q, where k is the boltzmann constant, q is the charge of the electron, and T is the absolute temperature.
From equations (5) and (7) and the node current method, it can be seen that:
Figure BDA0002874023230000123
therefore, the reference voltage output by the reference voltage output unit is:
Figure BDA0002874023230000124
as can be seen from equation (9), by selecting appropriate first resistor R0, second resistor R1, and third resistor R, the bandgap reference circuit can be made to output a reference voltage independent of temperature.
In the embodiment of the present invention, as shown in fig. 6, the first bipolar transistor Q1 and the second bipolar transistor Q2 are both NPN bipolar transistors, and the collectors of the first bipolar transistor Q1 and the second bipolar transistor Q2 are connected to the power supply terminal.
When the bandgap reference circuit actually operates, as described above, a parasitic diode effect is generated between the collector of the first bipolar transistor Q1 and the substrate, and a parasitic diode D1 is formed; a parasitic diode effect is generated between the collector of the second bipolar transistor Q2 and the substrate, forming a parasitic diode D2, and the conduction directions of the parasitic diode D1 and the parasitic diode D2 are both from the substrate to the collector of the bipolar transistor, i.e. opposite to the direction of the PTAT current generated by the first bipolar transistor Q1. When the substrate noise enters the inside of the bandgap reference circuit through the parasitic diode D1 or the parasitic diode D2, since the collector of the transistor is connected to the power supply terminal AVDD, the potential of the substrate terminal is much lower than that of the collector, so that the substrate noise cannot enter the inside of the bandgap reference circuit through the parasitic diodes D1 and D2, and the bandgap reference circuit can output a reference voltage without being interfered by the substrate noise.
An embodiment of the present invention further provides a switching power supply, as shown in fig. 7, where the switching power supply 71 may include: the bandgap reference circuit 72 may adopt the circuit structure shown in the foregoing embodiment, and is adapted to output a reference voltage without being interfered by substrate noise. Specifically, reference may be made to the bandgap reference circuit shown in the foregoing embodiments, and details are not repeated here.
Correspondingly, the embodiment of the present invention further provides a power management chip, as shown in fig. 7, the power management chip 70 may include a switching power supply 71, wherein a power ground terminal of the switching power supply 71 is connected to the substrate of the power management chip 70.
It should be noted that the terms "first" and "second" in the embodiments of the present specification are used for descriptive purposes only and are not to be construed as indicating or implying relative importance or implying any number of indicated technical features. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of that feature. Moreover, the terms "first," "second," and the like are used for distinguishing between similar elements and not necessarily for describing a particular sequential or chronological order. It is to be understood that the terms so used are interchangeable under appropriate circumstances such that the embodiments of the specification described herein are capable of operation in other sequences than described or illustrated herein.
Although the disclosed embodiments are disclosed above, the disclosed embodiments are not limited thereto. Various changes and modifications may be effected therein by one of ordinary skill in the pertinent art without departing from the scope or spirit of the embodiments of the present disclosure, and it is therefore intended that the scope of the embodiments of the present disclosure be limited only by the terms of the appended claims.

Claims (10)

1. A bandgap reference circuit, comprising: a bandgap current generating unit, a current mirror unit, and a reference voltage output unit, wherein:
the band gap current generating unit is suitable for outputting band gap current, and comprises:
a first current generating module adapted to generate a proportional-to-absolute-temperature current as a first current, an input terminal of the first current generating module being coupled to a power supply terminal, the first current generating module comprising: a first bipolar transistor and a second bipolar transistor, wherein the first bipolar transistor and the second bipolar transistor are both NPN transistors, and collectors and bases of the first bipolar transistor and the second bipolar transistor are both connected to the power supply terminal, and emitters of the first bipolar transistor and the second bipolar transistor are respectively used as a first output terminal and a second output terminal of the first current generation module;
a second current generating module adapted to generate a current with inverse ratio and absolute temperature as a second current, an input terminal of the second current generating module being coupled to the power supply terminal, and an output terminal of the second current generating module being coupled to the first output terminal of the first current generating module and the input terminal of the current mirror unit;
the clamping module is suitable for keeping the voltages of the first output end and the second output end of the first current generation module equal;
the current mirror unit is suitable for mirroring the band gap current generated by the first output end of the first current generation module and outputting the mirrored band gap current to the reference voltage output unit;
the reference voltage output unit is suitable for outputting reference voltage.
2. The bandgap reference circuit of claim 1, wherein the clamping module comprises:
and a non-inverting input terminal of the operational amplifier is coupled to the first output terminal of the first current generation module, and an inverting input terminal of the operational amplifier is coupled to the second output terminal of the first current generation module.
3. The bandgap reference circuit according to claim 2, wherein the current mirror unit comprises:
a first NMOS transistor, wherein the drain electrode of the first NMOS transistor is coupled with the emitter electrode of the first bipolar transistor, and the source electrode of the first NMOS transistor is connected with the ground;
a second NMOS transistor, a gate of which is connected to the gate of the first NMOS transistor and is coupled to the output terminal of the operational amplifier, a drain of the second NMOS transistor is connected to the emitter of the second bipolar transistor, and a source of the second NMOS transistor is connected to the ground;
a third NMOS transistor, wherein the grid electrode of the third NMOS transistor is coupled with the output end of the operational amplifier, and the source electrode of the third NMOS transistor is connected with the ground;
the drain electrode of the first PMOS tube is connected with the drain electrode of the third NMOS tube, the drain electrode of the first PMOS tube is connected with the grid electrode, and the source electrode of the first PMOS tube is connected with the power supply end;
and a gate of the second PMOS transistor is connected to a gate of the first PMOS transistor and a drain of the third NMOS transistor, respectively, a source of the second PMOS transistor is connected to the power supply terminal, and a drain of the second PMOS transistor is coupled to the input terminal of the reference voltage output unit.
4. The bandgap reference circuit of claim 3, wherein the current mirror unit further comprises:
and the third PMOS tube is suitable for outputting a first current source, the source electrode of the third PMOS tube is connected with the power supply end, the grid electrode of the third PMOS tube is respectively connected with the grid electrode of the first PMOS tube and the grid electrode of the second PMOS tube, and the drain electrode of the third PMOS tube outputs the first current source.
5. The bandgap reference circuit according to any of claims 3 or 4, wherein the current mirror unit further comprises:
and the fourth NMOS tube is suitable for outputting a second current source, the grid electrode of the fourth NMOS tube is coupled with the output end of the operational amplifier, the source electrode of the fourth NMOS tube is connected with the ground, and the drain electrode of the fourth NMOS tube outputs the second current source.
6. The bandgap reference circuit of claim 1, wherein the first current generating module further comprises:
and a first end of the first resistor is connected with the emitter of the first bipolar transistor, and a second end of the first resistor is connected with the output end of the second current generation module.
7. The bandgap reference circuit of claim 1, wherein the second current generating module comprises:
and the first end of the second resistor is connected with the power supply end, and the second end of the second resistor is connected with the output end of the first current generation module.
8. The bandgap reference circuit according to claim 1, wherein the reference voltage output unit comprises:
and a first end of the third resistor is connected with the output end of the current mirror unit, and a second end of the third resistor is connected with the ground.
9. A switching power supply, comprising: a bandgap reference circuit as claimed in any one of claims 1 to 7.
10. A power management chip, comprising: the switching power supply of claim 9.
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