CN114639686A - 一种阵列基板及其制备方法、显示面板、显示装置 - Google Patents

一种阵列基板及其制备方法、显示面板、显示装置 Download PDF

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CN114639686A
CN114639686A CN202011372499.0A CN202011372499A CN114639686A CN 114639686 A CN114639686 A CN 114639686A CN 202011372499 A CN202011372499 A CN 202011372499A CN 114639686 A CN114639686 A CN 114639686A
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electrode
tft
metal
layer
static
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王海涛
成军
王明
王庆贺
汪军
苏同上
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BOE Technology Group Co Ltd
Hefei Xinsheng Optoelectronics Technology Co Ltd
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BOE Technology Group Co Ltd
Hefei Xinsheng Optoelectronics Technology Co Ltd
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Abstract

本发明涉及显示技术领域，公开了一种阵列基板及其制备方法、显示面板、显示装置，该阵列基板包括：衬底基板、在衬底基板上依次叠设且彼此隔绝的第一金属层、金属氧化物层和第二金属层；第一金属层包括遮光金属、第一电极、防静电走线；金属氧化物层包括第一有源层，第二金属层包括栅线、第二电极；栅线与防静电走线通过第一TFT连接，第一电极与第二电极中的一个形成第一TFT的源漏极，另一个形成第一TFT的栅极；源极与栅线电连接，漏极与防静电走线电连接。该阵列基板中，防静电结构整体结构简单、紧凑，不需要跨越多层导电层的制备，防静电结构较早形成，将制备时干刻或曝光过程中积累的静电由栅线疏导到防静电走线被消耗掉。

Description

一种阵列基板及其制备方法、显示面板、显示装置
技术领域
本发明涉及显示技术领域，特别涉及一种阵列基板及其制备方法、显示面板、显示装置。
背景技术
在现有的OLED基板结构设计中，会设置防静电结构，但是现有技术中的防静电结构比较复杂，制备过程过越工序较多，往往很多导电层工序之后才能制备完成，才能实现疏导静电作用，由此，就会对一些金属层制备过程由于干刻或曝光过程中积累较大的静电无法疏导，容易造成静电击穿。
发明内容
本发明公开了一种阵列基板及其制备方法、显示面板、显示装置，该阵列基板中，防静电结构整体结构简单，且结构紧凑，制备工序较少，不需要跨越多层导电层的制备，在栅线形成时，防静电结构也形成，可以将制备过程中由于干刻或曝光过程中积累的静电由栅线疏导到防静电走线，静电在防静电走线上被消耗掉，可以有效避免在制备过程中，像素单元内的栅极与有源层的交叠处发生静电击穿造成短路的现象，并且可以避免防静电走线与栅线搭接区域的静电击穿，减少具有搭接区域的两层金属之间短路不良，进而有效减少由于短路不良造成的亮点现象，有效提高产品良率。
为达到上述目的，本发明提供以下技术方案：
一种阵列基板，包括：衬底基板、以及在所述衬底基板上依次叠设且彼此隔绝的第一金属层、金属氧化物层和第二金属层；
所述第一金属层包括遮光金属、第一电极、以及防静电走线，所述防静电走线位于所述衬底基板的周边布线区；所述金属氧化物层包括第一有源层；所述第二金属层包括栅线、以及第二电极；
其中，所述栅线与所述防静电走线之间通过第一TFT连接，且所述第一电极、第一有源层和第二电极构成所述第一TFT，所述第一电极与所述第二电极中的其中一个形成所述第一TFT的源漏极，另一个形成所述第一TFT的栅极；所述第一有源层与所述第一TFT的源漏极通过导电结构连接，且所述导电结构背离所述衬底基板的表面与所述衬底基板之间的距离小于或等于所述第二金属层背离所述衬底基板的表面与所述衬底基板之间的距离所述第一TFT的源极与所述栅线电连接，所述第一TFT的漏极与所述防静电走线电连接；且所述第一TFT的栅极与所述第一TFT的源极之间形成有第一电容，所述第一TFT的栅极与所述第一TFT的漏极之间形成有第二电容。
上述阵列基板中，包括有衬底基板，衬底基板上划分有显示区域和位于显示区域周侧的周边布线区，在衬底基板上设置有第一金属层，第一金属层用于形成遮光金属、第一电极、以及防静电走线，遮光金属、第一电极、以及防静电走线为同一层金属制备形成，遮光金属为显示区域内用于起到遮光作用，第一电极和防静电走线设置在周边布线区；在第一金属层上形成有金属氧化物层，金属氧化物层与第一金属层彼此隔绝，金属氧化物层包括有第一有源层，在金属氧化物层之上设置有第二金属层，且第一金属层与金属氧化物层彼此隔绝，第二金属层的材料可以为铜或铝，或者其它导电金属，本实施例不做局限；第二金属层用于形成栅线和第二电极，其中，栅线与防静电走线之间通过第一TFT连接，且第一电极、第一有源层和第二电极三者构成该第一TFT，第一电极与第二电极两者中的其中一个形成第一TFT的源漏极，即形成第一TFT的源极和漏极，另一个形成第一TFT的栅极，第一有源层与第一TFT的源漏极可以通过导电结构连接，相对于衬底基板，导电结构的顶面低于第二金属层的顶面，或者导电结构的顶面与第二金属层的顶面平齐，导电结构为第二金属层形成之前形成的一导电层或为第二金属层的一部分，由于第一TFT为第一电极、第一有源层和第二电极三者形成，导电结构也为第一TFT的一部分，导电结构起到上下两层的连接作用，则导电结构为第一有源层或第二电极两者中其中一个的一部分；且第一TFT的源极与所述栅线电连接，第一TFT的漏极与防静电走线电连接，第一TFT的栅极与第一源极之间形成有第一电容，第一TFT的栅极与第一TFT的漏极之间形成有第二电容，第一TFT连接与栅线和防静电走线之间，当栅线上具有较多的静电时，第一TFT的源极与栅线电连接，同样与栅线的电压相同，栅线积累静电较多，栅线的电压较高，则第一TFT的源极电压较高，第一TFT与第一TFT的栅极之间具有第一电容，则第一TFT的栅极形成高电位，将第一TFT打开，将第一TFT的源极和漏极连通，进而将栅线的静电疏导到防静电走线上，上述阵列基板的结构中，在栅线这一层形成后，防静电结构中的防静电走线以及连接防静电走线和栅线的第一TFT就形成了，防静电结构仅依靠第一金属层、金属氧化物层和第二金属层三层导电层就可以形成导通的结构电路，整体防静电结构非常简单，且可以完成静电疏导，防静电结构在阵列基板的制备过程较早的形成了，可以对栅线上的静电起到疏导作用；则在制备过程中，由于刻蚀或曝光积累的较大的静电，会被已经形成的防静电结构由栅线疏导到防静电走线，防静电走线会对静电进行消耗，从而消除静电，可以在制备过程中有效避免子像素单元内的栅极与有源层的交叠处发生静电击穿造成短路的现象，并且可以避免防静电走线与栅线搭接区域的静电击穿，减少具有搭接区域的两层金属之间短路不良，进而有效减少由于短路不良造成的亮点现象，有效提高产品良率。
因此，上述阵列基板中，防静电结构整体结构简单，且结构紧凑，制备工序较少，不需要跨越多层导电层的制备，在栅线形成时，防静电结构也形成，可以将制备过程中由于干刻或曝光过程中积累的静电由栅线疏导到防静电走线，静电在防静电走线上被消耗掉，可以有效避免在制备过程中，像素单元内的栅极与有源层的交叠处发生静电击穿造成短路的现象，并且可以避免防静电走线与栅线搭接区域的静电击穿，减少具有搭接区域的两层金属之间短路不良，进而有效减少由于短路不良造成的亮点现象，有效提高产品良率。
可选地，所述第一电极形成所述第一TFT的源漏极，所述第二电极形成所述第一TFT的栅极。
可选地，所述第一有源层包括与所述第一TFT的栅极相对的沟道区域、以及分别位于所述沟道区两侧的第一导体化区域和第二导体化区域，所述第一导体化区域与所述第二导体化区域构成所述导电结构，且所述第一导体化区域与所述第一TFT的源极连接，所述第二导体化区域与所述第一TFT的漏极连接。
可选地，所述第一电极形成所述第一TFT的栅极，所述第二电极形成所述第一TFT的源漏极。
可选地，所述第一有源层包括与所述第一TFT的栅极相对的沟道区域、以及分别位于所述沟道区两侧的第一导体化区域和第二导体化区域，所述第二电极还形成有第一连接金属和第二连接金属，所述第一连接金属与所述第二连接金属构成所述导电结构，所述第一连接金属与所述第二连接金属构成所述导电结构，所述第一连接金属与所述第一导体化区域连接，所述第二连接金属与所述第二导体化区域连接。
可选地，所述第一TFT的栅极与所述第一TFT的源极之间具有部分交叠以形成所述第一电容，所述第一TFT的栅极与所述第一TFT的漏极之间具有部分交叠以形成所述第二电容。
可选地，所述防静电走线为环形走线，且所述防静电走线环绕所述阵列基板的显示区设置。
可选地，所述栅线在所述衬底基板上的正投影与所述防静电走线在所述衬底基板上的正投影具有交叠，且所述防静电走线与所述栅线交叠的部位设置有镂空结构。
可选地，所述阵列基板还包括：
设于所述第一金属层和所述金属氧化物层之间的缓冲层；
设于所述金属氧化物层和所述第二金属层之间的栅绝缘层。
可选地，所述金属氧化层还包括位于所述阵列基板的子像素单元的第二有源层；
所述第二金属层还包括位于所述子像素单元且与所述第二有源层对应的第二栅极；
所述第二金属层之上设置有层间绝缘层，所述层间绝缘层之上形成有第三金属层，所述第三金属层包括与所述第二有源层电连接的第二源极和第二漏极。
本发明还提供了一种显示面板，包括如上述技术方案提供的任意一种阵列基板。
本发明还提供了一种显示装置，包括如上述技术方案提供的任意一种显示面板。
本发明还提供了一种上述技术方案提供的任意一种阵列基板的制备方法，包括：
在所述衬底基板上形成第一金属层，所述第一金属层包括遮光金属、第一电极、以及防静电走线，所述防静电走线位于所述衬底基板的周边布线区；
在所述第一金属层之上形成金属氧化物层，所述金属氧化物层与所述第一金属层彼此隔绝，所述金属氧化物层包括第一有源层；
在所述第一金属层之上形成第二金属层，所述第二金属层与所述金属氧化物层彼此隔绝，所述第二金属层包括栅线、以及第二电极；
其中，所述栅线与所述防静电走线之间通过第一TFT连接，且所述第一电极、第一有源层和第二电极构成所述第一TFT，所述第一电极与所述第二电极中的其中一个形成所述第一TFT的源漏极，另一个形成所述第一TFT的栅极；所述第一有源层与所述第一TFT的源漏极通过导电结构连接，且所述导电结构背离所述衬底基板的表面与所述衬底基板之间的距离小于或等于所述第二金属层背离所述衬底基板的表面与所述衬底基板之间的距离；所述第一TFT的源极与所述栅线电连接，所述第一TFT的漏极与所述防静电走线电连接，且所述第一TFT的栅极与所述第一TFT的源极之间形成第一电容，所述第一TFT的栅极与所述第一TFT的漏极之间形成第二电容。
附图说明
图1为本发明实施例提供的一种阵列基板的俯视结构示意图；
图2为本发明实施例提供的一种阵列基板的局部结构示意图；
图3为图2中沿A-A向的截面结构示意图；
图4为本发明实施例提供的一种阵列基板的局部结构示意图；
图5为图4中沿B-B向的截面结构示意图；
图6为本发明实施例提供的一种第一TFT的等效电路示意图；
图标：1-阵列基板；2-第一电极；3-防静电走线；4-栅线；5-第二电极；6-第一TFT；7-镂空结构；8-第一连接金属；9-第二连接金属；10-缓冲层；11-第一有源层；12-栅绝缘层；13-钝化层；14-第一导体化区域；15-第二导体化区域。
具体实施方式
下面将结合本发明实施例中的附图，对本发明实施例中的技术方案进行清楚、完整地描述，显然，所描述的实施例仅仅是本发明一部分实施例，而不是全部的实施例。基于本发明中的实施例，本领域普通技术人员在没有做出创造性劳动前提下所获得的所有其他实施例，都属于本发明保护的范围。
如图1至图3以及图6所示，本发明实施例提供了一种阵列基板，包括：衬底基板1；以及在衬底基板1上依次叠设且彼此隔绝的第一金属层、金属氧化物层和第二金属层；第一金属层包括遮光金属、第一电极2、以及防静电走线3，防静电走线3位于衬底基板的周边布线区；金属氧化物层包括第一有源层11；第二金属层包括栅线4、以及第二电极5；其中，栅线4与防静电走线3之间通过第一TFT6连接，第一电极2、第一有源层11和第二电极5构成第一TFT6，第一电极2与第二电极5中的其中一个形成第一TFT6的源漏极，另一个形成第一TFT6的栅极；第一有源层与第一TFT的源漏极通过导电结构连接，且导电结构背离衬底基板的表面与衬底基板之间的距离小于或等于所述第二金属层背离衬底基板的表面与衬底基板之间的距离；第一TFT6的源极与栅线4电连接，第一TFT6的漏极与防静电走线3电连接；且第一TFT6的栅极与第一TFT6的源极之间形成有第一电容，第一TFT6的栅极与第一TFT6的漏极之间形成有第二电容。
上述阵列基板中，包括有衬底基板，衬底基板上划分有显示区域和位于显示区域周侧的周边布线区，在衬底基板上设置有第一金属层，第一金属层用于形成遮光金属、第一电极2、以及防静电走线3，遮光金属、第一电极2、以及防静电走线3为同一层金属制备形成，遮光金属为显示区域内用于起到遮光作用，第一电极2和防静电走线3设置在周边布线区；在第一金属层上形成有金属氧化物层，金属氧化物层与第一金属层彼此隔绝，金属氧化物层包括有第一有源层11，在金属氧化物层上设置有第二金属层，且第二金属层与金属氧化物层彼此隔绝，第二金属层的材料可以为铜或铝，或者其它导电金属，本实施例不做局限；第二金属层用于形成栅线4和第二电极5，其中，栅线4与防静电走线3之间通过第一TFT6连接，且第一电极2、第一有源层11和第二电极5三者构成该第一TFT6，第一电极2与第二电极5两者中的其中一个形成第一TFT6的源漏极，即形成第一TFT6的源极和漏极，另一个形成第一TFT6的栅极，第一有源层与第一TFT的源漏极可以通过导电结构连接，相对于衬底基板，导电结构的顶面低于第二金属层的顶面，或者导电结构的顶面与第二金属层的顶面平齐，导电结构为第二金属层形成之前形成的一导电层或为第二金属层的一部分，由于第一TFT为第一电极2、第一有源层和第二电极5三者形成，导电结构也为第一TFT的一部分，导电结构起到上下两层的连接作用，则导电结构为第一有源层或第二电极两者中其中一个的一部分；且第一TFT6的源极与所述栅线4电连接，第一TFT6的漏极与防静电走线3电连接，第一TFT6的栅极与第一源极之间形成有第一电容C1，第一TFT6的栅极与第一TFT6的漏极之间形成有第二电容C2，第一TFT6连接与栅线4和防静电走线3之间，当栅线4上具有较多的静电时，第一TFT6的源极与栅线4电连接，同样与栅线4的电压相同，栅线4积累静电较多，栅线4的电压较高，则第一TFT6的源极电压较高，第一TFT6与第一TFT6的栅极之间具有第一电容C1，则第一TFT6的栅极GT形成高电位，将第一TFT6打开，将第一TFT6的源极和漏极连通，进而将栅线4的静电疏导到防静电走线3上，具体地，衬底基板上设置有多个栅线，每个栅线均设置有第一TFT与防静电走线连接，相对于一个栅线来说，可以在栅线的两端分别设置一个第一TFT连接于防静电走线，或者，在栅线的一端设置第一TFT与防静电走线连接，或者设置三个第一TFT，每个第一TFT均用于连接栅线和防静电走线，需要说明是，每个栅线与防静电走线之间设置第一TFT的数量以及位置可以根据实际需求进行设置，本实施例不做局限；在上述阵列基板的结构中，在栅线4这一层形成后，防静电结构中的防静电走线3、以及连接防静电走线3和栅线4的第一TFT6就形成了，防静电结构仅依靠第一金属层、金属氧化物层和第二金属层三层导电层就可以形成导通的结构电路，整体防静电结构非常简单，且可以完成静电疏导，防静电结构简单可靠，制备工艺较少，在阵列基板的制备过程较早的形成了，可以对栅线4上的静电起到疏导作用；则在制备过程中，由于刻蚀或曝光积累的较大的静电，会被已经形成的防静电结构由栅线4疏导到防静电走线3，防静电走线3会对静电进行消耗，从而消除静电，可以在制备过程中有效避免子像素单元内的栅极与有源层的交叠处发生静电击穿造成短路的现象，并且可以避免防静电走线3与栅线4搭接区域的静电击穿，减少具有搭接区域的两层金属之间短路不良，进而有效减少由于短路不良造成的亮点现象，有效提高产品良率，并且在产品完成之后，防静电结构可以起到静电防护作用，对产品内的电路走线形成保护作用。
因此，上述阵列基板中，防静电结构整体结构简单，且结构紧凑，制备工序较少，不需要跨越很多层导电层的制备，在栅线形成时，防静电结构也形成，可以将制备过程中由于干刻或曝光过程中积累的静电由栅线疏导到防静电走线，静电在防静电走线上被消耗掉，可以有效避免在制备过程中，像素单元内的栅极与有源层的交叠处发生静电击穿造成短路的现象，并且可以避免防静电走线与栅线搭接区域的静电击穿，减少具有搭接区域的两层金属之间短路不良，进而有效减少由于短路不良造成的亮点现象，有效提高产品良率。
具体地，上述阵列基板中还包括：设置在第一金属层和金属氧化物层之间且依次层叠设置的缓冲层10、以及设置在金属氧化物层和第二金属层之间的栅绝缘层12，缓冲层起到隔绝作用，使叠置的第一金属层与金属氧化物之间隔开，栅绝缘层起到隔绝作用，使叠置的金属氧化物与第二金属层之间隔开；其中，在金属氧化物层中还包括位于子像素单元的第二有源层，第二金属层中还包括位于子像素单元且与第二有源层对应的第二栅极；在第二金属层之上设置有层间绝缘层，层间绝缘层上形成有第三金属层，第三金属层的材料可以为铜或铝；第三金属层中包括与第二有源层电连接的第二源极和第二漏极，且上述第二栅极、第二有源层和第二源极、第二漏极构成第二TFT，该第二TFT开关可以为子像素电路里的像素TFT开关。
具体地，在第三金属层之上设置有钝化层13，钝化层13的材料可以为SiOx，钝化层13的层厚度可以为3000埃～5000埃。
其中，上述阵列基板中，对于第一电极2和第二电极5的设置，可以有多种选择设置方式，如：
方式一：
如图2和图3所示，可以将第一电极2形成第一TFT6的源漏极，第二电极5形成第一TFT6的栅极，也就是第一电极2形成第一TFT6的源极和漏极，第一TFT6的源极和漏极与遮光金属和防静电走线3同层制备形成，第一TFT6的漏极与防静电走线3电连接；将第二电极5设置为第一TFT6的栅极，第一TFT6的栅极与栅线4同层制备形成，栅线4与第一TFT6的源极电连接。
具体地，上述方式一中，第一TFT中，连接第一TFT的源漏极与第一有源层11的导电结构可以为第一有源层11的一部分，其中，第一有源层包括与第一TFT的栅极相对的沟道区域，沟道区域的分别设置有第一导体化区域14和第二导体化区域15，其中，可以设置第一导体化区域与第二导体化区域形成上述导电结构，第一导体化区域延伸并通过伸入第一过孔与第一TFT6的源极连接，第二导体化区域延伸并通过伸入第二过孔与第一TFT的漏极连接，则实现了第一有源层与第一TFT的源漏极连接，另外，由于第一TFT的源漏极与防静电走线是同层制备形成的，所以可以在制备第一金属层的图形时，设置第一TFT的漏极直接与防静电走线连接，简单可靠；对于栅线与第一TFT的源极的连接，可以设置栅线4通过第三过孔与第一TFT6的源极连接，简单可靠。
方式二：
如图4和图5所示，将第一电极2形成第一TFT6的栅极，第二电极5形成第一TFT6的源漏极，也就是将第一电极2设置为第一TFT6的栅极，第一TFT6的栅极与遮光金属和防静电走线3同层制备形成；将第二电极5设置为第一TFT6的源极和漏极，第一TFT6的源极和漏极与栅线4同层制备形成，栅线4与第一TFT6的源极电连接，防静电走线3与第一TFT6的漏极电连接。
具体地，上述方式二中，第一有源层11包括与第一TFT的栅极相对的沟道区域、以及分别位于沟道区两侧的第一导体化区域14和第二导体化区域14，在第二电极5中还可以形成有第一连接金属8和第二连接金属9，第一连接金属和第二连接金属可以构成连接第一有源层和第一TFT的源漏极的导电结构，其中，第一连接金属直接与TFT的源极连接，且第一连接金属可以通过伸入第四过孔与第一有源层的第一导体化区域连接，第二连接金属直接与第一TFT的漏极直接连接，且第二连接金属可以通过伸入第五过孔与第一有源层的第二导体化区域连接；由于栅线与第一TFT的源漏极同层制备形成，可以设置栅线与第一TFT的源极直接相连实现电连接，简单可靠，制备方便；第一TFT的漏极可以通过第六过孔与防静电走线连接，结构简单，容易制备。
具体地，上述阵列基板中，可以设置第一TFT6的栅极在垂直于衬底基板方向上的投影的一部分与第一TFT6的源极在垂直于衬底基板方向的投影的一部分具有交叠，即设置第一TFT6的栅极与第一TFT6的源极之间部分交叠以形成第一电容；且设置第一TFT6的栅极在垂直于衬底基板方向上的投影的一部分与第一TFT6的漏极在垂直于衬底基板方向的投影的一部分具有交叠，设置第一TFT6的栅极与第一TFT6的漏极之间部分交叠以形成第二电容。
如图1所示，上述阵列基板中，防静电走线3为环形走线，且所述防静电走线3环绕所述衬底基板的显示区设置，防静电走线3直接设置为环形，环绕在衬底基板的显示区周侧设置，可更好的对静电进行消耗，消除静电。
具体地，如图2所示，栅线4在衬底基板上的正投影与防静电走线3在衬底基板上的正投影具有交叠，且防静电走线3中与栅线4交叠的部位设置有镂空结构7，在防静电走线3中与栅线4交叠的部位设置镂空结构7，可以有效避免防静电走线3与栅线4交叠部位产生寄生电容，有效避免产生静电击穿。
本实施例还提供了一种显示面板，包括如上述技术方案提供的任意一种阵列基板。
本实施例还提供了一种显示装置，包括如上述技术方案提供的任意一种显示面板。
基于相同的发明构思，参考图1、图2以及图3，本实施例还提供了一种上述实施例提供的任意一种阵列基板的制备方法，包括：
步骤S101，在衬底基板上形成第一金属层，第一金属层包括遮光金属、第一电极2、以及防静电走线3，防静电走线3位于衬底基板的周边布线区；
步骤S102，在第一金属层之上形成金属氧化物层，金属氧化物层与第一金属层彼此隔绝，金属氧化物层包括第一有源层；
步骤S103，在第一金属层之上形成第二金属层，第二金属层与第一金属层彼此隔绝，第二金属层包括栅线4、以及第二电极5；
其中，栅线4与防静电走线3之间通过第一TFT6连接，第一电极、第一有源层和第二电极构成第一TFT，第一电极2与第二电极5中的其中一个形成第一TFT6的源漏极，另一个形成第一TFT6的栅极；第一有源层与第一TFT的源漏极通过导电结构连接，且导电结构背离衬底基板的表面与衬底基板之间的距离小于或等于所述第二金属层背离衬底基板的表面与衬底基板之间的距离；第一TFT6的源极与栅线4电连接，第一TFT6的漏极与防静电走线3电连接，且第一TFT6的栅极与第一TFT6的源极之间形成第一电容，第一TFT6的栅极与第一TFT6的漏极之间形成第二电容。
上述制备方法制备过程中，防静电结构整体结构简单，且结构紧凑，制备工序较少，不需要跨越多层导电层的制备，在栅线形成时，防静电结构也形成，可以将制备过程中由于干刻或曝光过程中积累的静电由栅线疏导到防静电走线，静电在防静电走线上被消耗掉，可以有效避免在制备过程中，像素单元内的栅极与有源层的交叠处发生静电击穿造成短路的现象，并且可以避免防静电走线与栅线搭接区域的静电击穿，减少具有搭接区域的两层金属之间短路不良，进而有效减少由于短路不良造成的亮点现象，有效提高产品良率。
具体地，参考图3所示，上述制备方法中，还包括：在形成第一金属层之后，且形成金属氧化物层之前，在第一金属层之上形成缓冲层10；
在形成金属氧化物层之后，且在形成第二金属层之前，在金属氧化物层上形成栅绝缘层12。
具体地，在第二金属层该层的图案化制备中，可以同时形成栅线4、第二电极5以及第二栅极，第二栅极位于显示区。
具体地，在金属氧化物层该层的图案化制备中，可以同时形成第一有源层和第二有源层，第二有源层位于子像素单元，简化制备工艺。
具体地，参考图3所示，上述制备方法还包括：在形成第二金属层之后，且在第二金属层之上形成层间绝缘层；
然后，在层间绝缘层之上形成第三金属层，第三金属层中包括第二源极和第二漏极，其中，第二源极、第二漏极和第二有源层电连接，第二栅极、第二有源层以及第二源极和第二漏极可以构成第二TFT，第二TFT可以形成为像素电路中的像素TFT开关；具体的，第三金属层的材料可以为铜或铝；
接着，在第三金属层之上形成钝化层13，钝化层13的材料可以为SiOx，钝化层13的层厚度可以为3000埃～5000埃。
显然，本领域的技术人员可以对本发明实施例进行各种改动和变型而不脱离本发明的精神和范围。这样，倘若本发明的这些修改和变型属于本发明权利要求及其等同技术的范围之内，则本发明也意图包含这些改动和变型在内。

Claims (13)

1.一种阵列基板，其特征在于，包括：衬底基板、以及在所述衬底基板上依次叠设且彼此隔绝的第一金属层、金属氧化物层和第二金属层；
所述第一金属层包括遮光金属、第一电极、以及防静电走线，所述防静电走线位于所述衬底基板的周边布线区；所述金属氧化物层包括第一有源层；所述第二金属层包括栅线、以及第二电极；
其中，所述栅线与所述防静电走线之间通过第一TFT连接，且所述第一电极、第一有源层和第二电极构成所述第一TFT，所述第一电极与所述第二电极中的其中一个形成所述第一TFT的源漏极，另一个形成所述第一TFT的栅极；所述第一有源层与所述第一TFT的源漏极通过导电结构连接，且所述导电结构背离所述衬底基板的表面与所述衬底基板之间的距离小于或等于所述第二金属层背离所述衬底基板的表面与所述衬底基板之间的距离；所述第一TFT的源极与所述栅线电连接，所述第一TFT的漏极与所述防静电走线电连接；且所述第一TFT的栅极与所述第一TFT的源极之间形成有第一电容，所述第一TFT的栅极与所述第一TFT的漏极之间形成有第二电容。
2.根据权利要求1所述的阵列基板，其特征在于，所述第一电极形成所述第一TFT的源漏极，所述第二电极形成所述第一TFT的栅极。
3.根据权利要求2所述的阵列基板，其特征在于，所述第一有源层包括与所述第一TFT的栅极相对的沟道区域、以及分别位于所述沟道区两侧的第一导体化区域和第二导体化区域，所述第一导体化区域与所述第二导体化区域构成所述导电结构，且所述第一导体化区域与所述第一TFT的源极连接，所述第二导体化区域与所述第一TFT的漏极连接。
4.根据权利要求1所述的阵列基板，其特征在于，所述第一电极形成所述第一TFT的栅极，所述第二电极形成所述第一TFT的源漏极。
5.根据权利要求4所述的阵列基板，其特征在于，所述第一有源层包括与所述第一TFT的栅极相对的沟道区域、以及分别位于所述沟道区两侧的第一导体化区域和第二导体化区域，所述第二电极还形成有第一连接金属和第二连接金属，所述第一连接金属与所述第二连接金属构成所述导电结构，所述第一连接金属与所述第一导体化区域连接，所述第二连接金属与所述第二导体化区域连接。
6.根据权利要求1-4任一项所述的阵列基板，其特征在于，所述第一TFT的栅极与所述第一TFT的源极之间具有部分交叠以形成所述第一电容，所述第一TFT的栅极与所述第一TFT的漏极之间具有部分交叠以形成所述第二电容。
7.根据权利要求1所述的阵列基板，其特征在于，所述防静电走线为环形走线，且所述防静电走线环绕所述阵列基板的显示区设置。
8.根据权利要求1-4任一项所述的阵列基板，其特征在于，所述栅线在所述衬底基板上的正投影与所述防静电走线在所述衬底基板上的正投影具有交叠，且所述防静电走线与所述栅线交叠的部位设置有镂空结构。
9.根据权利要求1所述的阵列基板，其特征在于，还包括：
设于所述第一金属层和所述金属氧化物层之间的缓冲层；
设于所述金属氧化物层和所述第二金属层之间的栅绝缘层。
10.根据权利要求9所述的阵列基板，其特征在于，所述金属氧化层还包括位于所述阵列基板的子像素单元的第二有源层；
所述第二金属层还包括位于所述子像素单元且与所述第二有源层对应的第二栅极；
所述第二金属层之上设置有层间绝缘层，所述层间绝缘层之上形成有第三金属层，所述第三金属层包括与所述第二有源层电连接的第二源极和第二漏极。
11.一种显示面板，其特征在于，包括如权利要求1-10任一项所述的阵列基板。
12.一种显示装置，其特征在于，包括如权利要求11所述的显示面板。
13.一种如权利要求1-10任一项所述的阵列基板的制备方法，其特征在于，包括：
在所述衬底基板上形成第一金属层，所述第一金属层包括遮光金属、第一电极、以及防静电走线，所述防静电走线位于所述衬底基板的周边布线区；
在所述第一金属层之上形成金属氧化物层，所述金属氧化物层与所述第一金属层彼此隔绝，所述金属氧化物层包括第一有源层；
在所述第一金属层之上形成第二金属层，所述第二金属层与所述金属氧化物层彼此隔绝，所述第二金属层包括栅线、以及第二电极；
其中，所述栅线与所述防静电走线之间通过第一TFT连接，且所述第一电极、第一有源层和第二电极构成所述第一TFT，所述第一电极与所述第二电极中的其中一个形成所述第一TFT的源漏极，另一个形成所述第一TFT的栅极；所述第一有源层与所述第一TFT的源漏极通过导电结构连接，且所述导电结构背离所述衬底基板的表面与所述衬底基板之间的距离小于或等于所述第二金属层背离所述衬底基板的表面与所述衬底基板之间的距离；所述第一TFT的源极与所述栅线电连接，所述第一TFT的漏极与所述防静电走线电连接，且所述第一TFT的栅极与所述第一TFT的源极之间形成第一电容，所述第一TFT的栅极与所述第一TFT的漏极之间形成第二电容。
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