CN114629368B - Nine level inverter of switched capacitor high gain - Google Patents

Nine level inverter of switched capacitor high gain Download PDF

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CN114629368B
CN114629368B CN202210240037.6A CN202210240037A CN114629368B CN 114629368 B CN114629368 B CN 114629368B CN 202210240037 A CN202210240037 A CN 202210240037A CN 114629368 B CN114629368 B CN 114629368B
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switching tube
capacitor
diode
drain electrode
abs
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CN114629368A (en
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徐能谋
周国华
彭璠
刘卜源
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Southwest Jiaotong University
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Southwest Jiaotong University
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    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M7/00—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
    • H02M7/42—Conversion of dc power input into ac power output without possibility of reversal
    • H02M7/44—Conversion of dc power input into ac power output without possibility of reversal by static converters
    • H02M7/48—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H02M7/53—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
    • H02M7/537—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02J—CIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
    • H02J3/00—Circuit arrangements for ac mains or ac distribution networks
    • H02J3/38—Arrangements for parallely feeding a single network by two or more generators, converters or transformers
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00—Details of apparatus for conversion
    • H02M1/08—Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters
    • H02M1/088—Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters for the simultaneous control of series or parallel connected semiconductor devices
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02J—CIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
    • H02J2300/00—Systems for supplying or distributing electric power characterised by decentralized, dispersed, or local generation
    • H02J2300/20—The dispersed energy generation being of renewable origin

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Inverter Devices (AREA)

Abstract

A nine-level inverter with high gain of switched capacitor, DC voltage source V in Is connected to the diode D 1 Anode and switching tube S 1 Drain electrode of (V) in Is connected to the switching tube S 2 Source electrode and switch tube S 4 Source and diode D 3 The cathode of (a); capacitor C 1 Is connected to D 1 Cathode of (2), diode D 2 Anode and switching tube S 3 Drain electrode of, C 1 Is connected to S 1 Source and S of 2 A drain electrode of (1); capacitor C 2 Is connected to D 2 Cathode and switching tube S 6 Drain electrode of (1) and switching tube S 8 Drain electrode of, C 2 Is connected to S 3 Source electrode of (1) and switching tube S 5 A drain electrode of (1); capacitor C 3 Is connected to the diode D 4 And S 4 Drain electrode of, C 3 Is connected to D 3 Anode and switching tube S 7 Source electrode of (1) and switching tube S 9 A source electrode of (a); s 5 Is connected to D 4 The anode of (1); s 6 Is connected to S 7 And the positive pole of the load, S 8 Is connected to S 9 And the negative pole of the load. The four-time boosting capacity is achieved, the number of devices is small, the power density is high, and the system efficiency is high.

Description

Nine level dc-to-ac converter of switched capacitor high gain
Technical Field
The invention belongs to the technical field of power electronics, and particularly relates to a switched capacitor high-gain nine-level inverter.
Background
The renewable energy has the advantages of wide distribution, safety, reliability, abundant reserves, convenience for development and the like. In a renewable energy power generation system, a power electronic inverter is a key link of electric energy conversion and transmission, and has important influence on the aspects of working performance, conversion efficiency, reliability and the like of the whole system. The multilevel inverter has the advantages of low harmonic content of output voltage, high quality of output electric energy, low voltage stress of a switching device, small requirement on an output filter and the like, and has important application prospect in a renewable energy power generation system. Conventional multi-level inverters include diode-clamped, flying capacitor, and cascaded H-bridge inverter architectures. The diode clamping type inverter and the flying capacitor type inverter respectively use a large number of clamping diodes and flying capacitors to generate multi-level output, but the structure is complex and the control difficulty is high. The cascaded H-bridge inverter performs multi-level output by cascading a plurality of H-bridge units, but the system cost and the occupied area are increased due to more power devices of the cascaded H-bridge inverter, more direct-current power supplies are needed, and the application range of the cascaded H-bridge inverter is limited.
In recent years, switched capacitor technology has been widely used in multilevel inverters. The switch capacitor structure has no magnetic elements such as inductors and transformers, and has the advantages of small volume, high power density, high conversion efficiency, easy integration and the like. Meanwhile, the structure has certain boosting capacity, intermediate DC/DC boosting links are reduced, the cost of the system can be reduced, and the efficiency of the inverter is improved. The switched capacitor structure is applied to the multi-level inverter, and has important significance for improving the voltage regulation capability of the multi-level inverter, widening the application range of the inverter and realizing the miniaturization, integration and high-efficiency development of the inverter. However, the conventional switched capacitor nine-level inverter generally has the problems of low voltage gain, large number of devices, large capacitor size and the like.
Disclosure of Invention
The invention provides a switched capacitor high-gain nine-level inverter aiming at the problems. The output voltage of the inverter is four times of the voltage of a direct-current voltage source, and the high-voltage gain is realized; the number of the used switching tubes is small, the capacitors can realize the charge and discharge balance of the capacitor voltage in a switching period, and the cost and the volume of the inverter are reduced.
The technical scheme for realizing the purpose of the invention is as follows:
a first circuit: DC voltage source V in Is connected to the diode D 1 Anode and switching tube S 1 Drain electrode of (V) in Is connected to the switching tube S 2 Source electrode and switch tube S 4 Source and diode D 3 A cathode of (a); capacitor C 1 Positive electrode connection ofTo D 1 Cathode of (2), diode D 2 Anode and switching tube S 3 Drain electrode of, C 1 Is connected to S 1 Source and S of 2 A drain electrode of (1); capacitor C 2 Is connected to D 2 Cathode and switching tube S 6 Drain electrode of (1) and switching tube S 8 Drain electrode of, C 2 Is connected to S 3 Source electrode of (2) and switching tube S 5 A drain electrode of (1); capacitor C 3 Is connected to the diode D 4 And S 4 Drain electrode of (C) 3 Is connected to D 3 Anode and switching tube S 7 Source electrode of (1) and switching tube S 9 A source electrode of (a); s 5 Is connected to D 4 The anode of (1); s 6 Is connected to S 7 And the positive pole of the load, S 8 Is connected to S 9 And the negative pole of the load.
A second circuit: DC voltage source V in Is connected to the diode D at its cathode 1 Cathode and switching tube S 1 Source electrode of, V in Is connected to the switching tube S 2 Drain electrode of (1), and switching tube S 3 And diode D 2 The anode of (1); capacitor C 1 Is connected to D 1 Anode of (2), diode D 3 Cathode and switching tube S 4 Source electrode of (C) 1 Is connected to S 1 And S 2 A source electrode of (a); capacitor C 2 Is connected to D 2 Cathode and switching tube S 6 Drain electrode of (1) and switching tube S 8 Drain electrode of (C) 2 Is connected to S 3 Source electrode of (2) and switching tube S 5 A drain electrode of (1); capacitor C 3 Is connected to the diode D 4 And S 4 Drain electrode of, C 3 Is connected to D 3 Anode and switching tube S 7 Source electrode of (2) and switching tube S 9 A source electrode of (a); s. the 5 Is connected to D 4 The anode of (1); s 6 Is connected to S 7 And the positive pole of the load, S 8 Is connected to S 9 And the negative electrode of the load.
The control method of the circuit comprises the following steps:using sine waves u s Triangular wave u 1 、u 2 、u 3 、u 4 Generating driving signals S1-S9 to respectively control the switch tube S 1 -S 9 (ii) a Wherein u is 1 、u 2 、u 3 、u 4 Has a frequency greater than u s The frequency of (d); u. of 1 And u 2 Equal frequency, 90 ° phase difference; u. of 3 And u 4 Equal frequency and 180 degrees phase difference; u. of 1 And u 2 Has a frequency of u 3 And u 4 Twice the frequency of (c); u. of 1 Is 0 to A c ，u 2 Size of A c ～2A c ，u 3 And u 4 Has a size of 2A c ～4A c ，u s The amplitude is less than 4Ac; the method specifically comprises the following steps:
generating an intermediate signal A 1 -A 10 Wherein: a. The 1 ＝(u s >0)，A 2 ＝not(u s >0)，A 3 ＝(abs(u s )>u 1 )，A 4 ＝(abs(u s )>u 2 )，A 5 ＝(abs(u s )>u 3 )，A 6 ＝not(abs(u s )>u 3 )，A 7 ＝(abs(u s )>u 4 )，A 8 ＝not(abs(u s )>u 4 )，A 9 ＝(abs(u s )>3A c )，A 10 ＝not(abs(u s )>3A c )；
Generating an intermediate signal B 1 -B 5 Wherein: b is 1 ＝(A 3 )xor(A 4 )，B 2 ＝(A 5 )and(A 7 )，B 3 ＝((A 5 )or(A 7 ))xor(A 4 )，B 4 ＝((A 6 )and(A 9 ))or((A 7 )and(A 10 ))，B 5 ＝((A 5 )and(A 10 ))or((A 8 )and(A 9 ))；
Generating drive signals s1-s9, wherein: s1= (B) 2 )or(B 3 )or(B 5 )，s2＝(B 1 )or(B 4 )，s3＝(B 2 )or(B 4 )，s4＝B 5 ，s5＝(B 4 )or(B 5 )，s6＝not((A 2 )and(A 3 ))，s7＝(A 2 )and(A 3 )，s8＝not((A 1 )and(A 3 ))，s9＝(A 1 )and(A 3 )。
Compared with the prior art, the invention has the beneficial effects that:
1. the invention is a boost inverter, which has four times of boost capability.
2. The device has the advantages of small quantity, simple structure, low cost, high power density and high system efficiency.
3. All capacitors can realize the charge and discharge balance of capacitor voltage under the switching period, and the cost and the volume of the switched capacitor are reduced.
Drawings
Fig. 1 is a schematic diagram of a first switched capacitor high-gain nine-level inverter.
Fig. 2 is a schematic diagram of a second switched capacitor high-gain nine-level inverter.
Fig. 3 (a), 3 (b), and 3 (c) are modulation signal diagrams.
Fig. 3 (d) is a logic diagram for generating the switching tube driving signal.
Fig. 4 (a) -4 (k) are diagrams of operation modes of the first switched capacitor high-gain nine-level inverter.
Fig. 5 shows waveforms of output voltage, output current and capacitor voltage of a first switched capacitor high-gain nine-level inverter.
Fig. 6 shows waveforms of output voltage and output current of the first switched capacitor high-gain nine-level inverter during load variation.
Detailed Description
The following further describes embodiments of the present invention with reference to the drawings.
As shown in FIG. 1, a circuit schematic diagram of a first switched capacitor high-gain nine-level inverter includes a DC voltage source V in A first capacitor C 1 A second capacitor C 2 A third capacitor C 3 A first diode D 1 A second diode D 2 A third diode D 3 A fourth diode D 4 A first switch S 1 A second switch S 2 And a third switch S 3 And a fourth switch S 4 The fifth switch S 5 And a sixth switch S 6 Seventh switch S 7 The eighth switch S 8 Ninth switch S 9 And a load.
DC voltage source V in Anode and first diode D 1 And the first switch S 1 Is connected with the drain electrode of the transistor; DC voltage source V in And the second switch S 2 Source electrode, fourth switch S 4 Source electrode of and third diode D 3 The cathode of (a) is connected; a first capacitor C 1 Anode and first diode D 1 Cathode of (2), second diode D 2 And a third switch S 3 Is connected with the drain electrode of the transistor; a first capacitor C 1 Negative pole of (2) and first switch S 1 Source electrode and second switch S 2 Is connected with the drain electrode of the transistor; second capacitor C 2 Anode and second diode D 2 Cathode of (2), sixth switch S 6 Drain electrode of (1) and eighth switch S 8 Is connected with the drain electrode of the transistor; second capacitor C 2 And the third switch S 3 Source electrode of, fifth switch S 5 Is connected with the drain electrode of the transistor; third capacitance C 3 Anode and fourth diode D 4 Cathode, fourth switch S 4 Is connected with the drain electrode of the transistor; third capacitor C 3 Negative pole of and a third diode D 3 Anode of (2), seventh switch S 7 Source electrode and ninth switch S 9 Is connected to the source of (a); fifth switch S 5 Source electrode of and fourth diode D 4 The anode of (2) is connected; sixth switch S 6 Source and seventh switch S 7 The drain of (3) is connected with the anode of the load; eighth switch S 8 Source and ninth switch S 9 Is connected to the negative electrode of the load.
As shown in FIG. 2, a circuit schematic diagram of a second switched capacitor high-gain nine-level inverter includes a DC voltage source V in A first capacitor C 1 A second capacitor C 2 A third capacitor C 3 A first diode D 1 A second diode D 2 A third diode D 3 A fourth diode D 4 First, aSwitch S 1 A second switch S 2 And a third switch S 3 And a fourth switch S 4 The fifth switch S 5 And a sixth switch S 6 Seventh switch S 7 The eighth switch S 8 Ninth switch S 9 And a load.
DC voltage source V in Anode and second diode D 2 Anode of (2), second switch S 2 And the third switch S 3 Is connected with the drain electrode of the transistor; DC voltage source V in Negative pole of (2) and first switch S 1 Source electrode and first diode D 1 Is connected with the cathode; first diode D 1 Anode and first capacitor C 1 Negative pole, fourth switch S 4 Source electrode of and third diode D 3 The cathode of (a) is connected; first switch S 1 Drain electrode of and the first capacitor C 1 Positive pole of (2) and second switch S 2 Is connected to the source of (a); a second capacitor C 2 Anode and second diode D 2 Cathode of (2), sixth switch S 6 Drain electrode of (1) and eighth switch S 8 Is connected with the drain electrode of the transistor; a second capacitor C 2 Negative pole and third switch S 3 Source electrode of, fifth switch S 5 Is connected with the drain electrode of the transistor; third capacitance C 3 Anode and fourth diode D 4 Cathode, fourth switch S 4 Is connected with the drain electrode of the transistor; third capacitor C 3 Negative pole of and a third diode D 3 Anode of (2), seventh switch S 7 Source electrode and ninth switch S 9 Is connected to the source of (a); fifth switch S 5 Source electrode of and fourth diode D 4 The anode of (2) is connected; sixth switch S 6 Source and seventh switch S 7 The drain of (3) is connected with the anode of the load; eighth switch S 8 Source and ninth switch S 9 Is connected to the negative pole of the load.
Fig. 3 (a), fig. 3 (b) and fig. 3 (c) show modulation signals of the two kinds of switched capacitor high-gain nine-level inverters. In the figure, u s Is a sine wave, u 1 、u 2 、u 3 、u 4 Is a triangular wave. As shown in FIGS. 3 (a) and 3 (b), u 1 、u 2 、u 3 、u 4 Is greater than u s The frequency of (d); u. of 1 And u 2 Equal frequency, 90 ° phase difference; u. of 3 And u 4 Equal frequency and 180 degrees phase difference; u. of 1 And u 2 Has a frequency of u 3 And u 4 Twice the frequency of (c); u. of 1 Is 0 to A c ，u 2 Size of A c ～2A c ，u 3 And u 4 Has a size of 2A c ～4A c ，u s The amplitude is less than 4Ac.
Fig. 3 (d) is a logic diagram for generating a switching tube driving signal using a sine wave and a triangular wave. As shown, the sine wave and the triangular wave signals are logically operated to generate an intermediate signal A 1 -A 10 ，A 1 -A 10 Regenerating an intermediate signal B 1 -B 5 And the intermediate signals are subjected to logical operation to obtain switching tube driving signals s1-s9.
The two inverters can obtain the following results under the control of the switching tube driving signal generated in fig. 3 (d): a first capacitor C 1 Is the voltage of a DC voltage source, a second capacitor C 2 Is twice the voltage of the DC voltage source, and a third capacitor C 3 Is the voltage of the dc voltage source.
If the switching tube driving signals s3 and s4 are respectively replaced by s3= B 5 ，s4＝(B 2 )or(B 4 ) Then, we can get: a first capacitor C 1 Is the voltage of a DC voltage source, a second capacitor C 2 Is the voltage of the DC voltage source, and a third capacitor C 3 Is twice the voltage of the dc voltage source.
A first capacitor C 1 A second capacitor C 2 And a third capacitance C 3 The charging and discharging balance of the capacitor voltage can be realized under the switching period; the amplitude of the output voltage of the inverter is four times of the voltage of the direct-current voltage source.
Next, the operation state of the switching tube controlled by the driving signal generated in fig. 3 (d) will be described by taking the first nine-level inverter with high gain of switched capacitor as an example.
The inverter has 11 operating states in one output voltage period.
1)v o =0: as shown in FIG. 4 (a), the switching tube S 6 、S 8 Conducting, and turning off the other switching tubes; diode D 1 The forward direction is conducted, and the rest diodes are cut off. The inverter output voltage is zero.
2)v o ＝+V in : as shown in fig. 4 (b), the switching tube S 2 、S 6 、S 9 Conducting, and turning off the other switching tubes; diode D 1 、D 2 、D 3 Forward conducting, diode D 4 Cutting off; capacitor C 1 Is charged in parallel with a DC voltage source to V in While a DC voltage source is passed through D 1 、D 2 、S 6 、S 9 、D 3 Directly to the load. The output voltage of the inverter is + V in 。
3)v o ＝+2V in : as shown in fig. 4 (c), the switching tube S 1 、S 6 、S 9 Conducting, and turning off the other switching tubes; diode D 2 、D 3 Forward conducting, diode D 1 、D 4 Cutting off; at this time, the capacitance C 1 In series with a DC voltage source, through S 1 、D 2 、S 6 、S 9 、D 3 Power is supplied to the load. The output voltage of the inverter is +2V in 。
4)v o ＝+3V in : as shown in fig. 4 (d), the switching tube S 2 、S 3 、S 5 、S 6 、S 9 Conducting, and turning off the other switching tubes; diode D 1 、D 3 、D 4 Forward conducting, diode D 2 By capacitor C 2 Reverse cut-off; capacitor C 1 、C 3 Charged in parallel with a DC voltage source to V in While, at the same time, a capacitance C 2 In series with a DC voltage source, through D 1 、S 3 、S 6 、S 9 、D 3 Power is supplied to the load. The output voltage of the inverter is +3V in 。
5)v o ＝+3V in : as shown in fig. 4 (e), the switching tube S 1 、S 4 、S 5 、S 6 、S 9 Conducting, and turning off the other switching tubes; diode D 2 、D 4 Forward conducting, diode D 1 、D 3 Are respectively covered by a capacitor C 1 、C 3 Reverse cut-off; capacitor C 1 Connected in series with a DC voltage source to a capacitor C 2 Charging, and simultaneously, the capacitor C 1 、C 3 In series with a DC voltage source, through S 1 、D 2 、S 6 、S 9 、S 4 Power is supplied to the load. The output voltage of the inverter is +3V in 。
6)v o ＝+4V in : as shown in FIG. 4 (f), the switching tube S 1 、S 3 、S 6 、S 9 Conducting, and turning off the other switching tubes; diode D 3 Conducting in the forward direction, and stopping the rest diodes; capacitor C 1 、C 2 In series with a DC voltage source, through S 1 、S 3 、S 6 、S 9 、D 3 Power is supplied to the load. The output voltage of the inverter is +4V in 。
7)v o ＝-V in : as shown in fig. 4 (g), the switching tube S 2 、S 7 、S 8 Conducting, and turning off the other switching tubes; diode D 1 、D 2 、D 3 Forward conducting, diode D 4 Cutting off; capacitor C 1 Charged in parallel with a DC voltage source to V in While a DC voltage source passes D 1 、D 2 、S 7 、S 8 、D 3 Directly to the load. The output voltage of the inverter is-V in 。
8)v o ＝-2V in : as shown in fig. 4 (h), the switching tube S 1 、S 7 、S 8 Conducting, and turning off the other switching tubes; diode D 2 、D 3 Forward conducting, diode D 1 、D 4 Cutting off; at this time, the capacitance C 1 In series with a DC voltage source, through S 1 、D 2 、S 7 、S 8 、D 3 Power is supplied to the load. The output voltage of the inverter is-2V in 。
9)v o ＝-3V in : as shown in fig. 4 (i), the switching tube S 2 、S 3 、S 5 、S 7 、S 8 Conducting, and turning off the other switching tubes; diode D 1 、D 3 、D 4 Forward conducting, diode D 2 By capacitor C 2 Reverse cut-off; capacitor C 1 、C 3 Charged in parallel with a DC voltage source to V in While, at the same time, a capacitance C 2 In series with a DC voltage source, through D 1 、S 3 、S 7 、S 8 、D 3 Power is supplied to the load. The output voltage of the inverter is-3V in 。
10)v o ＝-3V in : as shown in fig. 4 (j), the switching tube S 1 、S 4 、S 5 、S 7 、S 8 Conducting, and turning off the other switching tubes; diode D 2 、D 4 Forward conducting, diode D 1 、D 3 Are respectively covered by a capacitor C 1 、C 3 Reverse cut-off; capacitor C 1 Connected in series with a DC voltage source to a capacitor C 2 Charging, and simultaneously, the capacitor C 1 、C 3 In series with a DC voltage source, through S 1 、D 2 、S 7 、S 8 、S 4 Power is supplied to the load. The output voltage of the inverter is-3V in 。
11)v o ＝-4V in : as shown in fig. 4 (k), the switching tube S 1 、S 3 、S 7 、S 8 Conducting, and turning off the other switching tubes; diode D 3 Conducting in the forward direction, and stopping the rest diodes; capacitor C 1 、C 2 In series with a DC voltage source, through S 1 、S 3 、S 7 、S 8 、D 3 Power is supplied to the load. The output voltage of the inverter is-4V in 。
Time domain simulation analysis is carried out on the first switched capacitor high-gain nine-level inverter by using Simulink simulation software, wherein the voltage of a direct-current voltage source is 100V, and C is 1 ＝680μF，C 2 ＝270μF，C 3 =220 μ F, load of 100 Ω, switching frequency of 20kHz, and effective value of output voltage of 220V. The simulation results are shown in fig. 5. As can be seen from the figure, the simulation results are consistent with the theoretical analysis.
Fig. 6 is a transient response waveform of a first switched capacitor high gain nine level inverter load jump. At the initial moment, the load is 100 omega; the load is changed from 100 omega to 50 omega at 0.06 s; at 0.18s, the load is changed from 50 omega back to 100 omega, and the system operation condition is consistent with the initial state. As can be seen from the figure, the output voltage remains constant as the load changes.
The second switched capacitor high-gain nine-level inverter may also adopt the control logic of generating the switching tube driving signal by using sine waves and triangular waves shown in fig. 3 (d), and the working state thereof is not described again.
The two types of switched capacitor high-gain nine-level inverters can obtain another type of control logic after switching tube driving signals s3 and s4 obtained in the step (d) of fig. 3 are exchanged, and the working state and the technical effect are similar.
According to the theoretical analysis and simulation, the switched capacitor high-gain nine-level inverter provided by the invention has the advantages of simple structure, low cost, high power density and high system efficiency; the high-voltage-gain capacitor has the advantages of high voltage gain, four times of output voltage compared with input voltage, wide application range, high reliability, few switching devices, capacity of realizing charge and discharge balance of capacity voltage in a switching period, and small capacity voltage and capacitance. Therefore, the nine-level inverter with the switched capacitor and the high gain has obvious advantages compared with the prior art.

Claims (6)

1. A nine-level inverter with high gain of switched capacitor is characterized in that a DC voltage source V in Is connected to the diode D 1 Anode and switching tube S 1 Drain electrode of (V) in Is connected to the switching tube S 2 Source electrode and switch tube S 4 Source and diode D 3 A cathode of (a); capacitor C 1 Is connected to D 1 Cathode of (2), diode D 2 Anode and switching tube S 3 Drain electrode of, C 1 Is connected to S 1 Source and S of 2 A drain electrode of (1); capacitor C 2 Is connected to D 2 Cathode and switching tube S 6 Drain electrode of (1) and switching tube S 8 Drain electrode of, C 2 Is connected to S 3 Source electrode of (2) and switching tube S 5 A drain electrode of (1); capacitor C 3 Is connected to the diode D 4 And S 4 Drain electrode of (C) 3 Is connected to D 3 Anode and switching tube S 7 Source electrode of (1) and switching tube S 9 A source electrode of (a); s 5 Is connected to D 4 The anode of (1); s 6 Is connected to S 7 And the positive pole of the load, S 8 Is connected to S 9 And the negative electrode of the load.
2. The method as claimed in claim 1, wherein the sine wave u is used s Triangular wave u 1 、u 2 、u 3 、u 4 Generating driving signals S1-S9 to respectively control the switch tube S 1 -S 9 (ii) a Wherein u is 1 、u 2 、u 3 、u 4 Is greater than u s The frequency of (d); u. of 1 And u 2 Equal frequency, 90 ° phase difference; u. of 3 And u 4 Equal frequency and 180 degrees phase difference; u. of 1 And u 2 Has a frequency of u 3 And u 4 Twice the frequency of (c); u. of 1 Is 0 to A c ，u 2 Size of A c ～2A c ，u 3 And u 4 Has a size of 2A c ～4A c ，u s The amplitude is less than 4Ac; the method comprises the following specific steps:
generating an intermediate signal A 1 -A 10 Wherein: a. The 1 ＝(u s >0)，A 2 ＝not(u s >0)，A 3 ＝(abs(u s )>u 1 )，A 4 ＝(abs(u s )>u 2 )，A 5 ＝(abs(u s )>u 3 )，A 6 ＝not(abs(u s )>u 3 )，A 7 ＝(abs(u s )>u 4 )，A 8 ＝not(abs(u s )>u 4 )，A 9 ＝(abs(u s )>3A c )，A 10 ＝not(abs(u s )>3A c )；
Generating an intermediate signal B 1 -B 5 Wherein: b 1 ＝(A 3 )xor(A 4 )，B 2 ＝(A 5 )and(A 7 )，B 3 ＝((A 5 )or(A 7 ))xor(A 4 )，B 4 ＝((A 6 )and(A 9 ))or((A 7 )and(A 10 ))，B 5 ＝((A 5 )and(A 10 ))or((A 8 )and(A 9 ))；
Generating drive signals s1-s9, wherein: s1= (B) 2 )or(B 3 )or(B 5 )，s2＝(B 1 )or(B 4 )，s3＝(B 2 )or(B 4 )，s4＝B 5 ，s5＝(B 4 )or(B 5 )，s6＝not((A 2 )and(A 3 ))，s7＝(A 2 )and(A 3 )，s8＝not((A 1 )and(A 3 ))，s9＝(A 1 )and(A 3 )。
3. The method for controlling a nine-level inverter with high gain of switched capacitors as claimed in claim 2, wherein said driving signals s3, s4 are replaced by: s3= B 5 ，s4＝(B 2 )or(B 4 )。
4. A nine level inverter of switched capacitor high gain which characterized in that: DC voltage source V in Is connected to the diode D at its cathode 1 Cathode and switching tube S 1 Source electrode of, V in Is connected to the switching tube S 2 Drain electrode of (1), and switching tube S 3 And diode D 2 The anode of (2); capacitor C 1 Is connected to D 1 Anode of (2), diode D 3 And a switching tube S 4 Source electrode of, C 1 Is connected to S 1 And S 2 A source electrode of (a); capacitor C 2 Is connected to D 2 Cathode and switching tube S 6 Drain electrode of (1) and switching tube S 8 Drain electrode of, C 2 Is connected to S 3 Source electrode of (1) and switching tube S 5 A drain electrode of (1); capacitor C 3 Is connected to the diode D 4 And S 4 Drain electrode of, C 3 Is connected to D 3 Anode of (2), switching tube S 7 Source electrode of (1) and switching tube S 9 A source electrode of (a); s 5 Is connected to D 4 The anode of (2); s 6 Is connected to S 7 And the positive pole of the load, S 8 Is connected to S 9 And the negative electrode of the load.
5. The method as claimed in claim 4, wherein the sine wave u is used s Triangular wave u 1 、u 2 、u 3 、u 4 Generating driving signals S1-S9 to respectively control the switch tube S 1 -S 9 (ii) a Wherein u is 1 、u 2 、u 3 、u 4 Has a frequency greater than u s The frequency of (d); u. of 1 And u 2 Equal frequency, 90 ° phase difference; u. of 3 And u 4 Equal frequency and 180 degrees phase difference; u. of 1 And u 2 Has a frequency of u 3 And u 4 Twice the frequency of (c); u. of 1 Is 0 to A c ，u 2 Has a size of A c ～2A c ，u 3 And u 4 Has a size of 2A c ～4A c ，u s The amplitude is less than 4Ac; the method comprises the following specific steps:
generating an intermediate signal A 1 -A 10 Wherein: a. The 1 ＝(u s >0)，A 2 ＝not(u s >0)，A 3 ＝(abs(u s )>u 1 )，A 4 ＝(abs(u s )>u 2 )，A 5 ＝(abs(u s )>u 3 )，A 6 ＝not(abs(u s )>u 3 )，A 7 ＝(abs(u s )>u 4 )，A 8 ＝not(abs(u s )>u 4 )，A 9 ＝(abs(u s )>3A c )，A 10 ＝not(abs(u s )>3A c )；
Generating an intermediate signal B 1 -B 5 Wherein: b is 1 ＝(A 3 )xor(A 4 )，B 2 ＝(A 5 )and(A 7 )，B 3 ＝((A 5 )or(A 7 ))xor(A 4 )，B 4 ＝((A 6 )and(A 9 ))or((A 7 )and(A 10 ))，B 5 ＝((A 5 )and(A 10 ))or((A 8 )and(A 9 ))；
Generating drive signals s1-s9, wherein: s1= (B) 2 )or(B 3 )or(B 5 )，s2＝(B 1 )or(B 4 )，s3＝(B 2 )or(B 4 )，s4＝B 5 ，s5＝(B 4 )or(B 5 )，s6＝not((A 2 )and(A 3 ))，s7＝(A 2 )and(A 3 )，s8＝not((A 1 )and(A 3 ))，s9＝(A 1 )and(A 3 )。
6. The method for controlling the switched capacitor high-gain nine-level inverter according to claim 5, wherein the driving signals s3 and s4 are replaced by: s3= B 5 ，s4＝(B 2 )or(B 4 )。
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CN111800030A (en) * 2020-06-30 2020-10-20 广东工业大学 Multi-level inverter circuit and system based on switched capacitor and diode clamping
CN112187082A (en) * 2020-11-13 2021-01-05 国网福建省电力有限公司 Novel high-gain eight-switch nine-level inverter
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