CN114629224A - Neutral point balance control method for direct current bus voltage of UPS system and inverter - Google Patents
Neutral point balance control method for direct current bus voltage of UPS system and inverter Download PDFInfo
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02J—CIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
- H02J9/00—Circuit arrangements for emergency or stand-by power supply, e.g. for emergency lighting
- H02J9/04—Circuit arrangements for emergency or stand-by power supply, e.g. for emergency lighting in which the distribution system is disconnected from the normal source and connected to a standby source
- H02J9/06—Circuit arrangements for emergency or stand-by power supply, e.g. for emergency lighting in which the distribution system is disconnected from the normal source and connected to a standby source with automatic change-over, e.g. UPS systems
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02J—CIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
- H02J9/00—Circuit arrangements for emergency or stand-by power supply, e.g. for emergency lighting
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02J—CIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
- H02J9/00—Circuit arrangements for emergency or stand-by power supply, e.g. for emergency lighting
- H02J9/04—Circuit arrangements for emergency or stand-by power supply, e.g. for emergency lighting in which the distribution system is disconnected from the normal source and connected to a standby source
- H02J9/06—Circuit arrangements for emergency or stand-by power supply, e.g. for emergency lighting in which the distribution system is disconnected from the normal source and connected to a standby source with automatic change-over, e.g. UPS systems
- H02J9/062—Circuit arrangements for emergency or stand-by power supply, e.g. for emergency lighting in which the distribution system is disconnected from the normal source and connected to a standby source with automatic change-over, e.g. UPS systems for AC powered loads
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02J—CIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
- H02J9/00—Circuit arrangements for emergency or stand-by power supply, e.g. for emergency lighting
- H02J9/04—Circuit arrangements for emergency or stand-by power supply, e.g. for emergency lighting in which the distribution system is disconnected from the normal source and connected to a standby source
- H02J9/06—Circuit arrangements for emergency or stand-by power supply, e.g. for emergency lighting in which the distribution system is disconnected from the normal source and connected to a standby source with automatic change-over, e.g. UPS systems
- H02J9/068—Electronic means for switching from one power supply to another power supply, e.g. to avoid parallel connection
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M7/00—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
- H02M7/42—Conversion of dc power input into ac power output without possibility of reversal
- H02M7/44—Conversion of dc power input into ac power output without possibility of reversal by static converters
- H02M7/48—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
- H02M7/483—Converters with outputs that each can have more than two voltages levels
- H02M7/487—Neutral point clamped inverters
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Abstract
The invention provides a neutral point balance control method of a direct current bus voltage of a UPS system and an inverter. The method comprises the following steps: in a positive half period of an inversion output period, the duty ratio of each switching tube of the inverter is controlled by replacing half bus voltage with negative bus voltage of a direct current bus; and in the negative half period of the inversion output period, the duty ratio of the switching tube of the inverter is controlled by the positive bus voltage of the direct current bus instead of the half bus voltage. The invention can realize the balance of the midpoint voltage of the direct current bus through the inverter and can avoid the problem that the main circuit cannot be switched to a bypass when the main circuit fails due to the fact that the neutral point voltage of the bus is balanced through the rectifier in the UPS system without the N line.
Description
Technical Field
The invention relates to the technical field of UPS control, in particular to a neutral point balance control method of a direct current bus voltage of a UPS system and an inverter.
Background
In recent years, power generation systems and power transmission systems in power systems have been greatly developed, and especially the introduction of the alternating current flexible power transmission technology of smart grids will further promote safe and stable operation of the power grids, and the quality of power consumption of users will be better.
In many high Power demanding applications, an on-line UPS (Uninterruptible Power Supply) plays an important role. When the commercial power is normal, the energy of the power grid is converted into direct current through the UPS pre-stage rectifier, and then stable and clean alternating current or direct current is output through the inverter.
The dc bus side of UPS systems often suffers from unbalanced midpoint potential, and the prior art is usually controlled by a rectifier to balance the positive and negative bus voltages at its outputs. When the UPS fails, the main circuit needs to be switched to the bypass, and for an N-wire-free UPS system, the voltage difference between the main circuit and the bypass exists due to the fact that the rectifier performs bus midpoint voltage balance control, so that the main circuit cannot be switched to the bypass.
Disclosure of Invention
The embodiment of the invention provides a neutral point balance control method of a direct current bus voltage of a UPS system and an inverter, which aim to solve the problem that if a UPS main circuit fails to switch to a bypass when the UPS system controls neutral point voltage balance of a bus through a rectifier.
In a first aspect, an embodiment of the present invention provides a method for controlling midpoint balance of a dc bus voltage of a UPS system, where the method is applied to an inverter, and includes:
in a positive half period of an inversion output period, the duty ratio of each switching tube of the inverter is controlled by replacing half bus voltage with negative bus voltage of a direct current bus, and the value of the half bus voltage is one half of the direct current bus voltage;
and in the negative half period of the inversion output period, the duty ratio of the inverter switching tube is controlled by replacing half bus voltage with positive bus voltage of the direct current bus.
In one possible implementation, the controlling the duty ratio of each switching tube of the inverter by the negative bus voltage of the dc bus instead of the half bus voltage in the positive half period of one inverter output cycle includes:
in the positive half period of the inversion output period, determining the duty ratio of the inverter switching tube by dividing the gains of the bus voltage control loop and the current control loop by the negative bus voltage;
in the negative half period of the inversion output period, the step of controlling the duty ratio of the inverter switching tube by replacing the half bus voltage with the positive bus voltage of the direct current bus comprises the following steps:
and in the negative half period of the inversion output period, determining the duty ratio of the inverter switching tube by dividing the gains of the bus voltage control loop and the current control loop by the positive bus voltage.
In one possible implementation, the inverter is a three-level inverter, and for any inverter bridge of the three-level inverter, the direction in which the predefined current flows from the inverter bridge to the load is an outflow direction, the direction in which the predefined current flows from the load to the inverter bridge is an inflow direction, and the voltage at the output end of the inverter bridge includes a positive level state, a zero level state, and a negative level state.
In a possible implementation manner, in a positive half period of an inverter output period, current is in an outflow direction, if the voltage of the output end of the inverter bridge is in a zero level state, the midpoint voltage of a bus is reduced, the voltage of a positive bus is increased, the voltage of a negative bus is reduced, and if the voltage of the positive bus is greater than the voltage of the negative bus, the duty ratio of the inverter switching tube is determined by dividing the gains of a bus voltage control loop and a current control loop by the voltage of the negative bus, so as to reduce the time of the voltage of the output end of the inverter bridge in the zero level state.
In a possible implementation manner, in a positive half period of an inverter output period, current is in an outflow direction, if the voltage of the output end of the inverter bridge is in a zero level state, the midpoint voltage of a bus is reduced, the voltage of a positive bus is increased, the voltage of a negative bus is reduced, and if the voltage of the positive bus is smaller than the voltage of the negative bus, the duty ratio of a switching tube of the inverter is determined by dividing the gains of a bus voltage control loop and a current control loop by the voltage of the negative bus so as to increase the time when the voltage of the output end of the inverter bridge is in a zero level state.
In a possible implementation manner, in a negative half period of an inverter output period, current is in an inflow direction, if the voltage of the output end of the inverter bridge is in a zero level state, the midpoint voltage of a bus is increased, the voltage of a positive bus is decreased, the voltage of a negative bus is increased, and if the voltage of the positive bus is greater than the voltage of the negative bus, the duty ratio of the inverter switching tube is determined by dividing the gains of a bus voltage control loop and a current control loop by the voltage of the positive bus so as to increase the time of the voltage of the output end of the inverter bridge in the zero level state.
In a possible implementation manner, in a negative half period of an inverter output period, current is in an inflow direction, if the voltage of the output end of the inverter bridge is in a zero level state, the midpoint voltage of a bus is increased, the voltage of a positive bus is decreased, the voltage of a negative bus is increased, and if the voltage of the positive bus is smaller than the voltage of the negative bus, the duty ratio of the inverter switching tube is determined by dividing the gains of a bus voltage control loop and a current control loop by the voltage of the positive bus, so as to reduce the time of the voltage of the output end of the inverter bridge in the zero level state.
In a second aspect, embodiments of the present invention provide an inverter, including a control module;
the control module is used for controlling the duty ratio of each switching tube of the inverter by replacing half bus voltage with negative bus voltage of a direct current bus in a positive half period of an inversion output period, wherein the value of the half bus voltage is one half of the direct current bus voltage;
and the control module is also used for controlling the duty ratio of the inverter switching tube by replacing half bus voltage with positive bus voltage of the direct current bus in the negative half period of the inversion output period.
In a third aspect, an embodiment of the present invention provides an inverter, including a memory, a processor, and a computer program stored in the memory and executable on the processor, where the processor implements the steps of the method according to the first aspect or any one of the possible implementation manners of the first aspect when executing the computer program.
In a fourth aspect, the present invention provides a computer-readable storage medium, which stores a computer program, and when the computer program is executed by a processor, the computer program implements the steps of the method according to the first aspect or any one of the possible implementation manners of the first aspect.
The embodiment of the invention provides a neutral point balance control method of a direct current bus voltage of a UPS system and an inverter, in a positive half period of an inversion output period, the duty ratio of each switching tube of the inverter is controlled by replacing a half bus voltage with a negative bus voltage of a direct current bus, in a negative half period of the inversion output period, the duty ratio of the switching tube of the inverter is controlled by replacing the half bus voltage with the positive bus voltage of the direct current bus, if the positive bus voltage is greater than the negative bus voltage, the method provided by the embodiment of the invention can avoid further aggravation of neutral point voltage unbalance of the bus in the positive half period, reduce the positive bus voltage in the negative half period, raise the negative bus voltage to realize neutral point voltage balance of the bus, if the positive bus voltage is less than the negative bus voltage, the method provided by the embodiment of the invention can increase the positive bus voltage in the positive half period, the negative bus voltage is reduced to achieve bus midpoint voltage balancing and to avoid bus midpoint voltage imbalance exacerbation during the negative half-cycle. Therefore, according to the method provided by the embodiment of the invention, the balance of the midpoint voltage of the direct current bus is realized through the inverter, and the problem that the main circuit cannot be switched to a bypass when the main circuit fails due to the fact that the bus midpoint voltage balance is realized through the rectifier in the UPS system without the N line can be solved.
Drawings
In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the drawings needed to be used in the embodiments or the prior art descriptions will be briefly described below, and it is obvious that the drawings in the following description are only some embodiments of the present invention, and it is obvious for those skilled in the art to obtain other drawings based on these drawings without inventive exercise.
FIG. 1 is a schematic diagram of a UPS system;
fig. 2 is a flowchart illustrating an implementation of a method for controlling a midpoint balance of a dc bus voltage of a UPS system according to an embodiment of the present invention;
FIG. 3 is a schematic diagram of an inverter configuration;
FIG. 4 is a schematic diagram of another inverter configuration;
fig. 5 is a schematic diagram of a structure of still another inverter.
Detailed Description
In the following description, for purposes of explanation and not limitation, specific details are set forth, such as particular system structures, techniques, etc. in order to provide a thorough understanding of the embodiments of the invention. It will be apparent, however, to one skilled in the art that the present invention may be practiced in other embodiments that depart from these specific details. In other instances, detailed descriptions of well-known systems, devices, circuits, and methods are omitted so as not to obscure the description of the present invention with unnecessary detail.
In order to make the objects, technical solutions and advantages of the present invention more apparent, the following description is made by way of specific embodiments with reference to the accompanying drawings.
Fig. 1 is a schematic diagram of a UPS system in the prior art, which includes a rectifier module, an inverter module, a battery module, and a bypass path. The utility power input end of the UPS is usually provided with a set of relays, and the relays are divided into two paths, one path is the main circuit, and the other path is the bypass path.
Under normal conditions, the mains supply can be input into the mains supply input part of the main circuit, as shown in fig. 1, the mains supply input of the main circuit is divided into two paths: one path is connected with a load after passing through the inverter, and the other path is connected with the storage battery module to charge the storage battery. In the UPS state, the load is powered by the mains supply subjected to voltage stabilization, and the storage battery generates alternating current through the inverter module to supply power to the load at the moment of disconnection of the mains supply.
When the main circuit of the UPS is abnormal, such as the rectifier module or the inverter module fails to start or work normally, the relay at the input end acts, the utility power bypasses the main circuit and directly reaches the output end of the UPS, and this line is called a bypass, as shown in fig. 1, and the utility power supplies power to the load through the bypass path at this time.
In the UPS system, the output side of the direct current BUS of the rectifying module is provided with two capacitors C1 and C2 which are connected in series, wherein C1 is positive BUS capacitor, BUS + is positive BUS voltage, C2 is negative BUS capacitor, and BUS-is negative BUS voltage. The voltage between C1 and C2 is the midpoint voltage of the dc bus. The dc bus side usually has a problem of unbalanced midpoint potential, and in an UPS system with N lines, a rectifier module is usually used to control the balance of the positive and negative bus voltages at the output end of the UPS system.
However, in an N-wire-less UPS system, controlling dc bus midpoint balance via a rectifier can cause such problems: after the rectifier is adopted for control, the main circuit can generate direct current, the main circuit and the bypass have pressure difference due to the fact that N lines do not exist, and when the main circuit needs to be switched to the bypass, large current is generated in the switching process due to the existence of the pressure difference, and the main circuit cannot be switched to the bypass.
To solve the problem, fig. 2 is a flowchart illustrating an implementation of a method for controlling a neutral point balance of a dc bus voltage of a UPS system according to an embodiment of the present invention, where the method is applied to an inverter, that is, the inverter replaces a rectifier to solve the problem of neutral point potential imbalance of the dc bus, so as to avoid the problem that a main circuit of the UPS system cannot be switched to a bypass when the main circuit is abnormal. In conjunction with fig. 2, the method includes:
in step 201, in a positive half period of one inversion output period, the duty ratio of each switching tube of the inverter is controlled by the negative bus voltage of the direct current bus instead of the half bus voltage, and the value of the half bus voltage is one half of the direct current bus voltage.
In one possible implementation, for an inverter bridge of the inverter, the direction in which the predefined current flows from the inverter bridge to the load is the outgoing direction and the direction in which the predefined current flows from the load to the inverter bridge is the incoming direction. In the positive half period of an inversion output period, the current direction is the output direction, at the moment, the duty ratio of each switching tube of the inverter is controlled through the negative bus voltage of the direct current bus, so that when the positive bus voltage is larger than the negative bus voltage, the time that the voltage at the output end of the inverter bridge is at the zero level is reduced, and when the positive bus voltage is smaller than the negative bus voltage, the time that the voltage at the output end of the inverter bridge is at the zero level is increased.
The inverter is usually provided with dual-loop control, namely a voltage control loop and a current control loop, and the duty ratio calculation formula of each switching tube in the inverter is D ═ P/(Ubus/2), where D is the duty ratio, P is the gains of the bus voltage control loop and the current control loop, and Ubus is the bus voltage. When the bus midpoint voltages are balanced, the positive and negative bus voltages are equal, both equal to Ubus/2.
In one possible implementation, the duty cycle of the inverter switching tubes is determined by dividing the gains of the bus voltage control loop and the current control loop by the negative bus voltage during the positive half of the inverter output period. That is, when the positive bus voltage is greater than the negative bus voltage, the midpoint of the bus is unbalanced, and based on the above analysis, if the negative bus voltage value is smaller, the negative bus voltage is used as the denominator in the duty ratio calculation formula to control the duty ratio of the switching tube corresponding to the positive half cycle to increase, so as to avoid the positive bus voltage from increasing continuously, and in the negative half cycle of the inversion output cycle, the duty ratio of the inverter switching tube is determined by dividing the gain of the bus voltage control loop and the current control loop by the positive bus voltage. Because the positive bus voltage is greater than the negative bus voltage, the positive bus voltage value is greater, the positive bus voltage is used as a denominator in a duty ratio calculation formula to control the duty ratio of a switching tube corresponding to a positive half period to be reduced, so as to control C2 to be charged and C1 to be discharged, so that the bus midpoint voltage is increased, the positive bus voltage is reduced, the negative bus voltage is increased, and therefore the bus midpoint potential balance is achieved.
For ease of understanding the present solution, the embodiments of the present invention are described in conjunction with a specific inverter. Fig. 3 is a schematic structural diagram of an inverter, and for convenience of understanding, only two capacitors connected in series between the a-phase inverter bridge and C1 and C2 on the dc bus side are shown in fig. 3, and the voltage at the midpoint of C1 and C2 is the dc bus midpoint voltage.
When the output end voltage of the inverter bridge is in the positive level state, the current direction is the outflow direction in the positive half period of an inverter output period, the upper capacitor and the lower capacitor on the direct current side are discharged simultaneously, the discharge amount of the two capacitors is equal, and the bus midpoint voltage keeps balanced. When the voltage at the output end of the inverter bridge is in a negative level state, the current direction is the outflow direction in a positive half period of an inverter output period, the charging process of an upper capacitor and a lower capacitor on the direct current side simultaneously occurs, the charging quantity of the two capacitors is equal, and the midpoint voltage of the bus is kept balanced. When the voltage at the output end of the inverter bridge is in a zero level state, the current direction is the outflow direction in a positive half period of an inverter output period, the midpoint potential of the bus is continuously reduced at the moment, the voltage of the positive bus is increased, and the voltage of the negative bus is reduced.
When the voltage at the output end of the inverter bridge is in a positive level state, the current direction is the inflow direction in the negative half period of an inverter output period, the charging process of the upper capacitor and the lower capacitor on the direct current side simultaneously occurs, the charging quantity of the two capacitors is equal, and the midpoint voltage of the bus is kept balanced. When the voltage at the output end of the inverter bridge is in a negative level state, the current direction is the inflow direction in the negative half period of an inverter output period, the charging process of the upper capacitor and the lower capacitor on the direct current side simultaneously occurs, the charging quantity of the two capacitors is equal, and the midpoint voltage of the bus is kept balanced. When the voltage at the output end of the inverter bridge is in a zero level state, the current direction is the inflow direction in the negative half period of an inverter output period, the midpoint potential of the bus is continuously increased, the voltage of the positive bus is reduced, and the voltage of the negative bus is increased.
In a possible implementation manner, the method provided by the embodiment of the present invention is applied to a three-level inverter as shown in fig. 3, and for any inverter bridge of the three-level inverter, the direction in which a current flows from the inverter bridge to a load is predefined as an outgoing direction, and the direction in which a current flows from the load to the inverter bridge is predefined as an incoming direction, and the voltage at the output end of the inverter bridge includes a positive level state, a zero level state, and a negative level state.
In a possible implementation mode, in a positive half period of an inverter output period, current is in an outflow direction, if the voltage of the output end of the inverter bridge is in a zero level state, the midpoint voltage of a bus is reduced, the voltage of a positive bus is increased, the voltage of a negative bus is reduced, and if the voltage of the positive bus is greater than the voltage of the negative bus, the duty ratio of a switching tube of the inverter is determined by dividing the gains of a bus voltage control loop and a current control loop by the voltage of the negative bus so as to reduce the time of the voltage of the output end of the inverter bridge in the zero level state.
Through the analysis, in the positive half period, the current direction is the outflow direction, if the positive bus voltage is greater than the negative bus voltage, because the current direction is the outflow direction under the zero level state, the midpoint potential can continue to drop, namely the positive bus voltage continues to rise, the negative bus voltage continues to fall, thereby aggravating the unbalance of the bus midpoint voltage, at the moment, the duty ratio of the inverter switching tube is determined by dividing the gains of the bus voltage control ring and the current control ring by the negative bus voltage, because the negative bus voltage value is smaller, the obtained duty ratio is larger, namely the time that the inverter bridge is in the positive level state or the negative level state is increased, the time in the zero level state is reduced, and further aggravation of the unbalance of the bus midpoint voltage is avoided.
In a positive half period of an inversion output period, current is in the outflow direction, if the voltage of the output end of the inversion bridge is in a zero level state, the midpoint voltage of a bus is reduced, the voltage of a positive bus is increased, the voltage of a negative bus is reduced, and if the voltage of the positive bus is smaller than the voltage of the negative bus, the duty ratio of a switching tube of the inverter is determined by dividing the gains of a bus voltage control loop and a current control loop by the voltage of the negative bus so as to increase the time when the voltage of the output end of the inversion bridge is in the zero level state.
Through the analysis, in the positive half period, the current direction is the outflow direction, if the positive bus voltage is smaller than the negative bus voltage, the neutral point potential is reduced due to the fact that the current direction is the outflow direction in the zero level state, namely the positive bus voltage is increased, the negative bus voltage is decreased, and therefore the balance of the neutral point voltage of the bus is achieved.
In step 202, during the negative half period of the inverter output cycle, the duty cycle of the inverter switching tubes is controlled by the positive bus voltage of the dc bus instead of the half bus voltage.
In one possible implementation, the duty cycle of the inverter switching tubes is controlled by the positive bus voltage of the dc bus during the negative half-cycle of the inverter output cycle.
In a possible implementation mode, in a negative half period of an inverter output period, current is in the inflow direction, if the voltage of the output end of the inverter bridge is in a zero level state, the midpoint voltage of a bus is increased, the voltage of a positive bus is decreased, the voltage of a negative bus is increased, and if the voltage of the positive bus is greater than the voltage of the negative bus, the duty ratio of a switching tube of the inverter is determined by dividing the gains of a bus voltage control loop and a current control loop by the voltage of the positive bus so as to increase the time of the voltage of the output end of the inverter bridge in the zero level state.
Through the analysis, in a negative half period, the current direction is the inflow direction, if the positive bus voltage is larger than the negative bus voltage, the neutral point potential can rise due to the fact that the current direction is the inflow direction in the zero level state, namely the positive bus voltage descends, the negative bus voltage ascends, and therefore balance of the neutral point voltage of the bus is achieved.
In a possible implementation mode, in a negative half period of an inverter output period, current is in the inflow direction, if the voltage at the output end of the inverter bridge is in a zero level state, the midpoint voltage of a bus is increased, the voltage of a positive bus is decreased, the voltage of a negative bus is increased, and if the voltage of the positive bus is smaller than the voltage of the negative bus, the duty ratio of a switching tube of the inverter is determined by dividing the gains of a bus voltage control loop and a current control loop by the voltage of the positive bus so as to reduce the time of the voltage at the output end of the inverter bridge in the zero level state.
Through the analysis, in the negative half period, the current direction is the inflow direction, if the positive bus voltage is smaller than the negative bus voltage, because the current direction is the inflow direction under the zero level state, the midpoint potential can rise, namely the positive bus voltage falls, the negative bus voltage rises, thereby aggravating the unbalance of the bus midpoint voltage, at the moment, the duty ratio of the inverter switching tube is determined by dividing the gain of the bus voltage control loop and the current control loop by the positive bus voltage, because the positive bus voltage value is smaller, the obtained duty ratio is larger, namely the time that the inverter bridge is in the state of the positive level or the negative level is increased, the time in the zero level state is reduced, and the aggravation of the bus midpoint voltage is avoided.
The method provided by the embodiment of the invention controls the duty ratio of each switching tube of the inverter through the negative bus voltage of the direct current bus in the positive half period of an inverter output period, in the negative half period of the inversion output period, the duty ratio of the inverter switching tube is controlled by the positive bus voltage of the direct current bus, if the positive bus voltage is greater than the negative bus voltage, the method provided by the embodiment of the invention can avoid further aggravation of the neutral point voltage unbalance of the bus in the positive half period, and reducing the positive bus voltage in the negative half period and increasing the negative bus voltage to realize the bus midpoint voltage balance, if the positive bus voltage is less than the negative bus voltage, the method provided by the embodiment of the invention can increase the voltage of the positive bus in the positive half period, reduce the voltage of the negative bus, so as to realize the balance of the midpoint voltage of the bus and avoid the aggravation of the unbalance of the midpoint voltage of the bus in the negative half period. Therefore, according to the method provided by the embodiment of the invention, the balance of the midpoint voltage of the direct current bus is realized through the inverter, and the problem that the main circuit cannot be switched to a bypass when the main circuit fails due to the fact that the bus midpoint voltage balance is realized through the rectifier in the UPS system without the N line can be solved.
The following are embodiments of the apparatus of the invention, reference being made to the corresponding method embodiments described above for details which are not described in detail therein.
Fig. 4 shows a schematic structural diagram of an inverter provided in an embodiment of the present invention, and for convenience of description, only the portions related to the embodiment of the present invention are shown, and detailed descriptions are as follows:
as shown in fig. 4, the inverter 4 includes: a control module 41;
the control module 41 is used for controlling the duty ratio of each switching tube of the inverter through the negative bus voltage of the direct current bus in the positive half period of one inversion output period;
the control module 41 is further configured to control a duty ratio of the inverter switching tube through a positive bus voltage of the dc bus in a negative half period of the inverter output period.
The inverter provided by the embodiment of the invention controls the duty ratio of each switching tube of the inverter through the negative bus voltage of the direct current bus in the positive half period of an inversion output period, in the negative half period of the inversion output period, the duty ratio of the inverter switching tube is controlled by the positive bus voltage of the direct current bus, if the positive bus voltage is greater than the negative bus voltage, the method provided by the embodiment of the invention can avoid further aggravation of the neutral point voltage unbalance of the bus in the positive half period, and reducing the positive bus voltage in the negative half period and increasing the negative bus voltage to realize the bus midpoint voltage balance, if the positive bus voltage is less than the negative bus voltage, the method provided by the embodiment of the invention can increase the voltage of the positive bus in the positive half period, reduce the voltage of the negative bus, so as to realize the balance of the midpoint voltage of the bus and avoid the aggravation of the unbalance of the midpoint voltage of the bus in the negative half period. Therefore, according to the method provided by the embodiment of the invention, the balance of the midpoint voltage of the direct current bus is realized through the inverter, and the problem that the main circuit cannot be switched to a bypass circuit when the main circuit fails due to the fact that the midpoint voltage of the bus is balanced through the rectifier in the UPS system without the N lines can be solved.
In one possible implementation, the control module 41 is configured to determine the duty cycle of the inverter switching tube by dividing the gains of the bus voltage control loop and the current control loop by the negative bus voltage in the positive half period of the inverter output period; and in the negative half period of the inversion output period, the duty ratio of the inverter switching tube is determined by dividing the gains of the bus voltage control loop and the current control loop by the positive bus voltage.
In one possible implementation, the inverter is a three-level inverter, and for any inverter bridge of the three-level inverter, the direction in which the predefined current flows from the inverter bridge to the load is an outflow direction, the direction in which the predefined current flows from the load to the inverter bridge is an inflow direction, and the voltage at the output end of the inverter bridge includes a positive level state, a zero level state, and a negative level state.
In one possible implementation, the control module 41 is configured to: in a positive half period of an inversion output period, current is in an outflow direction, if the voltage of the output end of the inversion bridge is in a zero level state, the midpoint voltage of a bus is reduced, the voltage of a positive bus is increased, the voltage of a negative bus is reduced, and if the voltage of the positive bus is greater than the voltage of the negative bus, the duty ratio of a switching tube of the inverter is determined by dividing the gains of a bus voltage control loop and a current control loop by the voltage of the negative bus so as to reduce the time of the voltage of the output end of the inversion bridge in the zero level state.
In a possible implementation manner, the control module 41 is configured to, in a positive half cycle of an inverter output period, set a current as an outflow direction, decrease a midpoint voltage of a bus, increase a voltage of a positive bus, and decrease a voltage of a negative bus if a voltage at an output end of the inverter bridge is in a zero level state, and determine a duty ratio of a switching tube of the inverter by dividing gains of a bus voltage control loop and a current control loop by the voltage of the negative bus to increase a time when the voltage at the output end of the inverter bridge is in the zero level state if the voltage of the output end of the inverter bridge is smaller than the voltage of the negative bus.
In a possible implementation manner, the control module 41 is configured to, in a negative half cycle of an inverter output period, set a current as an inflow direction, if a voltage at an output end of the inverter bridge is in a zero level state, increase a midpoint voltage of a bus, decrease a voltage of a positive bus, increase a voltage of the negative bus, and if the voltage of the positive bus is greater than the voltage of the negative bus, determine a duty cycle of a switching tube of the inverter by dividing gains of a bus voltage control loop and a current control loop by the voltage of the positive bus, so as to increase a time when the voltage at the output end of the inverter bridge is in the zero level state.
In a possible implementation manner, the control module 41 is configured to, in a negative half cycle of an inverter output period, set a current as an inflow direction, if a voltage at an output end of the inverter bridge is in a zero level state, increase a midpoint voltage of a bus, decrease a voltage of a positive bus, increase a voltage of the negative bus, and if the voltage of the positive bus is less than the voltage of the negative bus, determine a duty cycle of a switching tube of the inverter by dividing gains of a bus voltage control loop and a current control loop by the voltage of the positive bus, so as to reduce a time when the voltage at the output end of the inverter bridge is in the zero level state.
The inverter provided in this embodiment may be used to implement the above embodiment of the method for controlling the midpoint balance of the dc bus voltage of the UPS system, and the implementation principle and technical effect are similar, which are not described herein again.
Fig. 5 is a schematic diagram of an inverter according to an embodiment of the present invention. As shown in fig. 5, the inverter 5 of this embodiment includes: a processor 50, a memory 51 and a computer program 52 stored in said memory 51 and executable on said processor 50. The processor 50, when executing the computer program 52, implements the steps of the above-mentioned embodiments of the method for controlling the midpoint balance of the dc bus voltage of the UPS system, such as the steps 201 to 202 shown in fig. 2. Alternatively, the processor 50, when executing the computer program 52, implements the functions of each module/unit in the above-mentioned device embodiments, for example, the functions of the module 41 shown in fig. 4.
Illustratively, the computer program 52 may be partitioned into one or more modules/units that are stored in the memory 51 and executed by the processor 50 to implement the present invention. The one or more modules/units may be a series of computer program instruction segments capable of performing specific functions, which are used to describe the execution of the computer program 52 in the inverter 5.
The inverter 5 may include, but is not limited to, a processor 50, a memory 51. Those skilled in the art will appreciate that fig. 5 is merely an example of an inverter 5, and does not constitute a limitation of the inverter 5, and may include more or less components than those shown, or combine certain components, or different components, for example, the inverter may also include input-output devices, network access devices, buses, etc.
The Processor 50 may be a Central Processing Unit (CPU), other general purpose Processor, a Digital Signal Processor (DSP), an Application Specific Integrated Circuit (ASIC), a Field Programmable Gate Array (FPGA) or other Programmable logic device, discrete Gate or transistor logic device, discrete hardware component, etc. A general purpose processor may be a microprocessor or the processor may be any conventional processor or the like.
The memory 51 may be an internal storage unit of the inverter 5, such as a hard disk or a memory of the inverter 5. The memory 51 may also be an external storage device of the inverter 5, such as a plug-in hard disk, a Smart Media Card (SMC), a Secure Digital (SD) Card, a Flash memory Card (Flash Card), or the like, provided on the inverter 5. Further, the memory 51 may also include both an internal storage unit of the inverter 5 and an external storage device. The memory 51 is used for storing the computer program and other programs and data required by the inverter. The memory 51 may also be used to temporarily store data that has been output or is to be output.
It will be apparent to those skilled in the art that, for convenience and brevity of description, only the above-mentioned division of the functional units and modules is illustrated, and in practical applications, the above-mentioned function distribution may be performed by different functional units and modules according to needs, that is, the internal structure of the apparatus is divided into different functional units or modules to perform all or part of the above-mentioned functions. Each functional unit and module in the embodiments may be integrated in one processing unit, or each unit may exist alone physically, or two or more units are integrated in one unit, and the integrated unit may be implemented in a form of hardware, or in a form of software functional unit. In addition, specific names of the functional units and modules are only for convenience of distinguishing from each other, and are not used for limiting the protection scope of the present application. The specific working processes of the units and modules in the system may refer to the corresponding processes in the foregoing method embodiments, and are not described herein again.
In the above embodiments, the descriptions of the respective embodiments have respective emphasis, and reference may be made to the related descriptions of other embodiments for parts that are not described or illustrated in a certain embodiment.
Those of ordinary skill in the art will appreciate that the various illustrative elements and algorithm steps described in connection with the embodiments disclosed herein may be implemented as electronic hardware or combinations of computer software and electronic hardware. Whether such functionality is implemented as hardware or software depends upon the particular application and design constraints imposed on the implementation. Skilled artisans may implement the described functionality in varying ways for each particular application, but such implementation decisions should not be interpreted as causing a departure from the scope of the present invention.
In the embodiments provided by the present invention, it should be understood that the disclosed apparatus/inverter and method may be implemented in other ways. For example, the above-described apparatus/inverter embodiments are merely illustrative, and for example, the division of the modules or units is only one logical function division, and there may be other divisions when actually implemented, for example, a plurality of units or components may be combined or may be integrated into another system, or some features may be omitted or not executed. In addition, the shown or discussed mutual coupling or direct coupling or communication connection may be an indirect coupling or communication connection through some interfaces, devices or units, and may be in an electrical, mechanical or other form.
The units described as separate parts may or may not be physically separate, and parts displayed as units may or may not be physical units, may be located in one place, or may be distributed on a plurality of network units. Some or all of the units can be selected according to actual needs to achieve the purpose of the solution of the embodiment.
In addition, functional units in the embodiments of the present invention may be integrated into one processing unit, or each unit may exist alone physically, or two or more units are integrated into one unit. The integrated unit can be realized in a form of hardware, and can also be realized in a form of a software functional unit.
The integrated module/unit, if implemented in the form of a software functional unit and sold or used as a stand-alone product, may be stored in a computer readable storage medium. Based on such understanding, all or part of the processes in the method according to the embodiments of the present invention may also be implemented by a computer program, which may be stored in a computer-readable storage medium, and when the computer program is executed by a processor, the computer program may implement the steps of the embodiments of the method for controlling the neutral point balance of the dc bus voltage of the UPS system. Wherein the computer program comprises computer program code, which may be in the form of source code, object code, an executable file or some intermediate form, etc. The computer-readable medium may include: any entity or device capable of carrying the computer program code, recording medium, U.S. disk, removable hard disk, magnetic diskette, optical disk, computer Memory, Read-Only Memory (ROM), Random Access Memory (RAM), electrical carrier wave signal, telecommunications signal, and software distribution medium, etc. It should be noted that the computer readable medium may contain other components which may be suitably increased or decreased as required by legislation and patent practice in jurisdictions, for example, in some jurisdictions, computer readable media which may not include electrical carrier signals and telecommunications signals in accordance with legislation and patent practice.
The above-mentioned embodiments are only used for illustrating the technical solutions of the present invention, and not for limiting the same; although the present invention has been described in detail with reference to the foregoing embodiments, it should be understood by those of ordinary skill in the art that: the technical solutions described in the foregoing embodiments may still be modified, or some technical features may be equivalently replaced; such modifications and substitutions do not substantially depart from the spirit and scope of the embodiments of the present invention, and are intended to be included within the scope of the present invention.
Claims (10)
1. A method for controlling the neutral point balance of the DC bus voltage of a UPS system is characterized in that the method is applied to an inverter and comprises the following steps:
in a positive half period of an inversion output period, the duty ratio of each switching tube of the inverter is controlled by replacing half bus voltage with negative bus voltage of a direct current bus, and the value of the half bus voltage is one half of the direct current bus voltage;
and in the negative half period of the inversion output period, controlling the duty ratio of the inverter switching tube by replacing the half bus voltage with the positive bus voltage of the direct current bus.
2. The method of claim 1, wherein controlling the duty cycle of each switching tube of the inverter during the positive half-cycle of an inverter output cycle by a negative bus voltage of the dc bus instead of a half-bus voltage comprises:
in the positive half period of the inversion output period, determining the duty ratio of the inverter switching tube by dividing the gains of the bus voltage control loop and the current control loop by the negative bus voltage;
in the negative half period of the inversion output cycle, the duty ratio of the inverter switching tube is controlled by replacing half bus voltage with positive bus voltage of the direct current bus, and the duty ratio comprises the following steps:
and in the negative half period of the inversion output period, determining the duty ratio of the inverter switching tube by dividing the gains of the bus voltage control loop and the current control loop by the positive bus voltage.
3. The method of claim 2, wherein the inverter is a three-level inverter, the predefined direction of current flow from the inverter bridge to the load is an outgoing direction and the predefined direction of current flow from the load to the inverter bridge is an incoming direction for any inverter bridge of the three-level inverter, and the inverter bridge output voltage includes a positive level state, a zero level state, and a negative level state.
4. The method of claim 3 wherein during a positive half of an inverter output cycle, current is flowing in a direction, and if the inverter bridge output terminal voltage is at a zero level, the bus midpoint voltage is decreased, the positive bus voltage is increased, and the negative bus voltage is decreased, and if the positive bus voltage is greater than the negative bus voltage, the duty cycle of the inverter switching tubes is determined by dividing the gain of the bus voltage control loop and the current control loop by the negative bus voltage to reduce the time that the inverter bridge output terminal voltage is at a zero level.
5. The method of claim 3 wherein during a positive half of an inverter output cycle, current is flowing in a direction, and if the inverter bridge output terminal voltage is at a zero level, the bus midpoint voltage is decreased, the positive bus voltage is increased, and the negative bus voltage is decreased, and if the positive bus voltage is less than the negative bus voltage, the duty cycle of the inverter switching tube is determined by dividing the gain of the bus voltage control loop and the current control loop by the negative bus voltage to increase the time that the inverter bridge output terminal voltage is at a zero level.
6. The method of claim 3 wherein during the negative half of an inverter output cycle, current is in the incoming direction, and if the inverter bridge output voltage is at a zero level, the bus midpoint voltage is increased, the positive bus voltage is decreased, and the negative bus voltage is increased, and if the positive bus voltage is greater than the negative bus voltage, the duty cycle of the inverter switching tubes is determined by dividing the gain of the bus voltage control loop and the current control loop by the positive bus voltage to increase the time that the inverter bridge output voltage is at a zero level.
7. The method of claim 3 wherein during the negative half of an inverter output cycle, current is in the incoming direction, and if the inverter bridge output voltage is at a zero level, the bus midpoint voltage is increased, the positive bus voltage is decreased, and the negative bus voltage is increased, and if the positive bus voltage is less than the negative bus voltage, the duty cycle of the inverter switching tubes is determined by dividing the gain of the bus voltage control loop and the current control loop by the positive bus voltage to reduce the time that the inverter bridge output voltage is at a zero level.
8. An inverter, characterized in that the inverter comprises a control module;
the control module is used for controlling the duty ratio of each switching tube of the inverter by replacing half bus voltage with negative bus voltage of a direct current bus in a positive half period of an inversion output period, wherein the value of the half bus voltage is one half of the direct current bus voltage;
and the control module is also used for controlling the duty ratio of the inverter switching tube by replacing half bus voltage with positive bus voltage of the direct current bus in the negative half period of the inversion output period.
9. An inverter comprising a memory, a processor and a computer program stored in the memory and executable on the processor, characterized in that the processor implements the steps of the method according to any of the preceding claims 1 to 7 when executing the computer program.
10. A computer-readable storage medium, in which a computer program is stored which, when being executed by a processor, carries out the steps of the method according to any one of claims 1 to 7.
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Citations (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20180109136A1 (en) * | 2016-10-13 | 2018-04-19 | Schneider Electric It Corporation | Dc-link bus balancer |
CN108540005A (en) * | 2018-04-27 | 2018-09-14 | 上能电气股份有限公司 | A kind of DC bus-bar voltage balance control method of three-level inverter |
CN111130372A (en) * | 2020-01-02 | 2020-05-08 | 科华恒盛股份有限公司 | Three-level grid-connected inverter bus midpoint potential adjusting method and terminal equipment |
CN113422530A (en) * | 2021-08-09 | 2021-09-21 | 上海弘正新能源科技有限公司 | Control method for ensuring voltage balance of positive and negative direct current buses by energy storage inverter |
CN113691105A (en) * | 2021-07-28 | 2021-11-23 | 漳州科华技术有限责任公司 | Balance bridge voltage-sharing control method and power supply |
WO2022027892A1 (en) * | 2020-08-04 | 2022-02-10 | 美的威灵电机技术(上海)有限公司 | Drive apparatus, control method, electrical device and storage medium |
-
2022
- 2022-03-24 CN CN202210303286.5A patent/CN114629224A/en active Pending
Patent Citations (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20180109136A1 (en) * | 2016-10-13 | 2018-04-19 | Schneider Electric It Corporation | Dc-link bus balancer |
CN108540005A (en) * | 2018-04-27 | 2018-09-14 | 上能电气股份有限公司 | A kind of DC bus-bar voltage balance control method of three-level inverter |
CN111130372A (en) * | 2020-01-02 | 2020-05-08 | 科华恒盛股份有限公司 | Three-level grid-connected inverter bus midpoint potential adjusting method and terminal equipment |
WO2022027892A1 (en) * | 2020-08-04 | 2022-02-10 | 美的威灵电机技术(上海)有限公司 | Drive apparatus, control method, electrical device and storage medium |
CN113691105A (en) * | 2021-07-28 | 2021-11-23 | 漳州科华技术有限责任公司 | Balance bridge voltage-sharing control method and power supply |
CN113422530A (en) * | 2021-08-09 | 2021-09-21 | 上海弘正新能源科技有限公司 | Control method for ensuring voltage balance of positive and negative direct current buses by energy storage inverter |
Non-Patent Citations (2)
Title |
---|
ZHAN GAO等: "Neutral-Point Voltage Balancing Strategy for ThreeLevel Neutral Point Clamped Inverter Based on Online Calculating Redundant Vector Duty Cycles", 《2019 22ND INTERNATIONAL CONFERENCE ON ELECTRICAL MACHINES AND SYSTEMS (ICEMS)》, 31 December 2019 (2019-12-31), pages 1 - 6 * |
王要强等: "单相中点箝位开关电容多电平逆变器及其控制", 《电力自动化设备》, vol. 40, no. 7, 31 July 2020 (2020-07-31), pages 89 - 97 * |
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