CN114584109B - Method for real-time filtering parallel signals transmitted by high-speed serial interface - Google Patents
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Abstract
The invention discloses a method for filtering parallel signals transmitted by a high-speed serial interface in real timeOn the basis of constructing a prototype filter, a D-group filter bank is obtained for filtering a D-path low-speed parallel signal after high-speed serial interface deserializing, and the results of the D-group filter bank are added according to y D‑1 [n]、…、y 1 [n]、y 0 [n]The sequence of the signals is output in sequence to obtain a signal y [ n ]]. Thus, without memory read, the samples can be processed continuously to obtain a digital signal x [ n ]]The entire filtering processing speed is kept at f s Thereby improving the efficiency and real-time performance of the filtering. In addition, the invention has the following advantages: (1) The order of the prototype filter can be designed to be higher, better pass band ripple and stop band ripple indexes can be obtained, and the suppression of the pass band compared with the stop band can also be higher; (2) In the invention, the order of each sub-filter is 1/D of that of the prototype filter, and the working rate is the original sampling rate f s The 1/D of the filter can improve the filtering effect, reduce the design complexity and be easier to realize in engineering.
Description
Technical Field
The invention belongs to the technical field of high-speed signal acquisition and processing, and particularly relates to a method for filtering parallel signals transmitted by a high-speed serial interface in real time.
Background
With the rise of the New generation of technologies such as 5G NR (5G New Radio), WIFI6E, etc., the communication data rate is increasing, often needs to reach tens of Gbps or even tens of Gbps, and is far beyond the transmission limit of the traditional CMOS and LVDS interface technologies. At present, the transmission between the high-speed high-precision ADC and the back-end logic processing device can only be realized through a high-speed serial interface of a new interface standard, such as JESD 204B.
JESD204B is a high-speed serial interface whose basic principle is to convert a high data rate input signal into several parallel signals of relatively low speed for easy reception and processing by back-end logic devices. However, due to the high overall data rate, logic devices can generally only transmit parallel signals without difference.
Fig. 1 is a diagram illustrating filtering of parallel signals transmitted in a high-speed serial configuration according to the prior art.
Once algorithmic processing, such as the filtering process shown in FIG. 1, is involved with the serial signal, the high-speed serial interface converts the incoming analog signal into a digital signal x [ n ]]Then with D parallel signals x 0 [n],x 1 [n],…,x D-1 [n]Output, the traditional processing mode can only store the parallel signals first, then transmit the signals to the upper computer software and then splice the signals to obtain the digital signals x [ n ]]Filtering to obtain filtered signal y [ n ]]The real-time performance is poor, and only the data with limited length in the memory can be processed, and the digital signal x [ n ] cannot be processed]The efficiency is low for the purpose of continuous processing.
Disclosure of Invention
The invention aims to overcome the defects of the prior art and provides a method for filtering parallel signals transmitted by a high-speed serial interface in real time so as to carry out real-time filtering processing on digital signals x [ n ] obtained by converting the high-speed serial interface and improve the filtering efficiency and the real-time performance.
In order to achieve the above object, the present invention provides a method for real-time filtering of parallel signals transmitted by a high-speed serial interface, comprising the steps of:
(1) Sampling the input analog signal x (t) according to the high-speed serial interface to obtain a digital signal x [ n ]]Sampling rate f of s And a required passband cut-off frequency B of the filter, designing a filter as a prototype filter with a filter coefficient of h [ n ]]The order is multiple of the number D of parallel signal paths output by the high-speed serial interface;
(2) And taking the number of the filter coefficients h [ n ] of the prototype filter every D points to form D sub-filters, and obtaining D groups of filter banks 0,1, … and D-1 in D number taking modes, wherein the D groups of filter banks satisfy the following requirements:
filter bank 0: h [ nD ], h [ nD +1], … …, h [ nD + D-1]
Filter bank 1: h [ nD-1], h [ nD ], … …, h [ nD + D-2]
……
Filter bank D-1: h [ nD-D +1], h [ nD-D +2], … …, h [ nD ];
(3) Using D sub-filters h [ nD ] in filter bank 0]、h[nD+1]、……、h[nD+D-1]Are respectively paired with x 0 [n]，x 1 [n]，…，x D-1 [n]Filtering to obtain D filtering results y 00 [n]、y 01 [n]、……、y 0(D-1) [n]；
y 00 [n]＝x 0 [n]*h[Dn]
y 01 [n]＝x 1 [n]*h[Dn+1]
……
y 0(D-1) [n]＝x D-1 [n]*h[Dn+D-1]
Wherein "+" represents a convolution operation;
with D sub-filters h [ nD-D +1] in filter bank 1]、h[nD-D+2]、……、h[nD]Are respectively paired with x 0 [n]，x 1 [n]，…，x D-1 [n]Filtering to obtain D filtering results y 10 [n]、y 11 [n]、……、y 1(D-1) [n]：
y 10 [n]＝x 0 [n]*h[Dn-1]；
y 11 [n]＝x 1 [n]*h[Dn]
……
y 1(D-1) [n]＝x D-1 [n]*h[Dn+D-2]
And so on, obtaining D sub-filters in the filter groups 2 and … D-1 respectively corresponding to x 0 [n]，x 1 [n]，…，x D-1 [n]Filtering to obtain corresponding filtering results, wherein the last group is D filtering results y of the filter bank D-1 (D-1)0 [n]、y 11 [n]、……、y 1(D-1) [n]：
y (D-1)0 [n]＝x 0 [n]*h[Dn-D+1]；
y (D-1)1 [n]＝x 1 [n]*h[Dn-D+2]
……
y (D-1)(D-1) [n]＝x D-1 [n]*h[Dn]；
By x 0 [n]，x 1 [n]，…，x D-1 [n]Represents the D-path low-speed parallel signal after the deserialization of the high-speed serial interface and meets x d [n]＝x[nD-d]，d∈[0，D-1]；
(4) And summing the D filtering results of the filter bank 0 to obtain y 0 [n]：
Summing the D filter results of the filter bank 1 to obtain y 1 [n]：
And so on to obtain the summation of the filtering results of the filter banks 2 and … D-1, wherein the summation of the D filtering results of the last filter bank D-1 obtains y D-1 [n]Comprises the following steps:
(5) Summing the filter results of the D filter bank according to y D-1 [n]、…、y 1 [n]、y 0 [n]The sequence of the digital signal x [ n ] is output in sequence to obtain a filtering output signal y [ n ] of the digital signal x [ n ]]。
The purpose of the invention is realized as follows:
the invention relates to a method for real-time filtering parallel signals transmitted by a high-speed serial interface, which obtains digital signals x [ n ] by sampling input analog signals x (t) through the high-speed serial interface]Sampling rate f of s And the passband cut-off frequency B of the filtering requirement is designed to have a filtering coefficient h [ n ]]The prototype filter is characterized in that on the basis, a D-group filter bank is obtained for filtering the D-path low-speed parallel signals after the high-speed serial interface is deserialized, and the results of the D-group filter bank are added according to y D-1 [n]、…、y 1 [n]、y 0 [n]The sequence of the signals is output in sequence to obtain a signal y [ n ]]. Thus, the D-path low-speed parallel signal after the high-speed serial interface is deserialized can be parallelly carried out in real timeFiltering to obtain correct digital signal x [ n ]]The filtered output signal. The digital signal x [ n ] can be obtained by continuously processing the samples without storing and reading]The entire filtering processing speed is kept at f s Thereby improving the efficiency and real-time performance of the filtering.
In addition, the invention has the following advantages:
(1) The order of the prototype filter can be designed to be higher, better pass band ripple and stop band ripple indexes can be obtained, and the suppression of the pass band compared with the stop band can also be higher;
(2) In the invention, the order of each sub-filter is 1/D of that of the prototype filter, and the working rates are the original sampling rates f s The 1/D can not only improve the filtering effect, but also reduce the design complexity and is easier to realize in engineering.
Drawings
Fig. 1 is a diagram of fig. 1 illustrating filtering of parallel signals transmitted in a high-speed serial configuration according to the prior art.
FIG. 2 is a schematic diagram illustrating an embodiment of a method for real-time filtering of parallel signals transmitted by a high-speed serial interface according to the present invention;
fig. 3 is a flow chart of an embodiment of the method for filtering parallel signals transmitted by a high-speed serial interface in real time according to the present invention.
Detailed Description
The following description of the embodiments of the present invention is provided in order to better understand the present invention for those skilled in the art with reference to the accompanying drawings. It is to be expressly noted that in the following description, a detailed description of known functions and designs will be omitted when it may obscure the subject matter of the present invention.
Fig. 2 is a schematic diagram illustrating a method for real-time filtering a parallel signal transmitted by a high-speed serial interface according to an embodiment of the present invention.
In this embodiment, as shown in FIG. 2, the analog input signal is represented by x (t), x [ n ]]At a high sampling rate f s The digital signal obtained by sampling the input analog signal x (t) is then processed, h 2n]Represents the pair x [ n ]]Filter coefficients for low-pass filtering and called prototype filter, yn]Representing a digital signal x n]The result of the filtering is then y [ n ]]Satisfy y [ n ]]＝x[n]*h[n]。
In this embodiment, the high-speed serial interface is JESD204B, using x 0 [n]，x 1 [n]，…，x D-1 [n]Represents the D-path low-speed parallel signal after deserializing the JESD204B high-speed serial interface and meets the requirement of x d [n]＝x[nD-d]，d∈[0，D-1]Then, the present invention is directed to x d [n]＝x[nD-d]Parallel real-time filtering to obtain correct filtered output signal y [ n ]]。
Fig. 3 is a flow chart of an embodiment of the method for filtering parallel signals transmitted by a high-speed serial interface in real time according to the present invention.
In this embodiment, as shown in fig. 3, the method for filtering parallel signals transmitted by a high-speed serial interface in real time according to the present invention includes the following steps:
step S1: designing a prototype filter according to analog signal sampling and passband cut-off frequency
Sampling an input analog signal x (t) according to a high-speed serial interface to obtain a digital signal x [ n ]]Sampling rate f of s And a required passband cut-off frequency B of the filter, designing a filter as a prototype filter with a filter coefficient h [ n ]]The order is multiple of the number D of parallel signal paths output by the high-speed serial interface.
Step S2: construction of a group D Filter Bank from prototype filters
Taking the number of the filter coefficients h [ n ] of the prototype filter every D points to form D sub-filters, and obtaining D groups of filter banks 0,1, … and D-1 in D number taking modes, wherein the D groups of filter banks satisfy the following requirements:
filter bank 0: h [ nD ], h [ nD +1], … …, h [ nD + D-1]
Filter bank 1: h [ nD-1], h [ nD ], … …, h [ nD + D-2]
……
Filter bank D-1: h [ nD-D +1], h [ nD-D +2], … … and h [ nD ].
That is, for the ith group, the filter coefficients of the D sub-filters are:
a filter bank i: h [ nD-i ], h [ nD-i +1], … … and h [ nD-i + D-1].
And step S3: d-path low-speed parallel signals after the high-speed serial interface is deserialized are filtered by a D-group filter bank
With D sub-filters h nD in filter bank 0]、h[nD+1]、……、h[nD+D-1]Are respectively paired with x 0 [n]，x 1 [n]，…，x D-1 [n]Filtering to obtain D filtering results y 00 [n]、y 01 [n]、……、y 0(D-1) [n]；
y 00 [n]＝x 0 [n]*h[Dn]；
y 01 [n]＝x 1 [n]*h[Dn+1]
……
y 0(D-1) [n]＝x D-1 [n]*h[Dn+D-1]
With D sub-filters h [ nD-D +1] in filter bank 1]、h[nD-D+2]、……、h[nD]Respectively to x 0 [n]，x 1 [n]，…，x D-1 [n]Filtering to obtain D filtering results y 10 [n]、y 11 [n]、……、y 1(D-1) [n]：
y 10 [n]＝x 0 [n]*h[Dn-1]；
y 11 [n]＝x 1 [n]*h[Dn]
……
y 1(D-1) [n]＝x D-1 [n]*h[Dn+D-2]
And so on, obtaining D sub-filters in the filter group 2, … D-1 respectively to x 0 [n]，x 1 [n]，…，x D-1 [n]Filtering to obtain corresponding filtering results, wherein the last group is D filtering results y of the filter bank D-1 (D-1)0 [n]、y 11 [n]、……、y 1(D-1) [n]：
y (D-1)0 [n]＝x 0 [n]*h[Dn-D+1]；
y (D-1)1 [n]＝x 1 [n]*h[Dn-D+2]
……
y (D-1)(D-1) [n]＝x D-1 [n]*h[Dn]；
By x 0 [n]，x 1 [n]，…，x D-1 [n]Represents the D-path low-speed parallel signal after the deserialization of the high-speed serial interface and meets x d [n]＝x[nD-d]，d∈[0，D-1]。
Specifically, for the ith group, the D filtering results of the D sub-filters are:
y i0 [n]＝x 0 [n]*h[Dn-i]；
y i1 [n]＝x 1 [n]*h[Dn-i+1]
……
y i(D-1) [n]＝x D-1 [n]*h[Dn-i+D-1]
specifically, the filtering result for the ith group and the d-th sub-filter is:
y id [n]＝x d [n]*h[Dn-i+d]。
and step S4: summing the D filtering results of each group of filter banks
Summing the D filter results of filter bank 0 to obtain y 0 [n]：
Summing the D filter results of the filter bank 1 to obtain y 1 [n]：
And so on to obtain the summation of the filtering results of the filter banks 2 and … D-1, wherein the summation of the D filtering results of the last filter bank D-1 obtains y D-1[ n]Comprises the following steps:
in particular, the filtering results for the ith filter bank are summed y i [n]Comprises the following steps:
step S5: adding and sequentially outputting the filtering results to obtain filtering output signals
Summing the results of the D-filterbanks by y D-1 [n]、…、y 1 [n]、y 0 [n]The sequence of the digital signal x [ n ] is output in sequence to obtain a filtering output signal y [ n ] of the digital signal x [ n ]]。
Summation y of filter results for the kth filterbank i [n]Comprises the following steps:
let k = D (n-r) -D then there is:
thus, for the filter results of the filter bank D-1, the filter results are summed y D-1 [n]Is y [ Dn-D +1]And for the filter results of filter bank 0, the filter results are summed y 0 [n]Is y [ Dn]Therefore, the output sequence is that the filtering result of the filter bank D-1 is output first, then the filtering result of the filter bank D-2 is output, and finally the filtering results of the filter banks 1 and 0 are output.
In this embodiment, the parallel signal transmitted by the high-speed serial interface with model number 4-lane JESD204B is taken as an example.
The input analog signal is represented as x (t), and four paths of parallel signals are obtained after ADC sampling configured by JESD204B standard and 4-lane, namely:
x d [n]＝x[4n-d]
wherein d =0,1,2,3.
X is to be d [n]And carrying out one-to-one corresponding filtering with the filter banks 0-3 and adding the filtering results to obtain:
where i =0,1, …, D-1=0,1,2,3, specifically for filter banks 0-3, each of the sum results of the filter results is:
with y 0 [n]As subject, the results are:
let k =4 (n-r) -d, then
In a similar way, the following steps are provided:
it can be seen that according to y 3 [n]、y 2 [n]、y 1 [n]、y 0 [n]The four paths of signals are combined in sequence to obtain a complete output signal y [ n ]]The invention realizes that the digital signal x [ n ] is obtained by sampling]The real-time filtering improves the filtering efficiency and the real-time performance.
Although the illustrative embodiments of the present invention have been described in order to facilitate those skilled in the art to understand the present invention, it is to be understood that the present invention is not limited to the scope of the embodiments, and that various changes may be made apparent to those skilled in the art as long as they are within the spirit and scope of the present invention as defined and defined in the appended claims, and all matters of the invention using the inventive concepts are protected.
Claims (1)
1. A method for real-time filtering of parallel signals transmitted by a high-speed serial interface, comprising the steps of:
(1) Sampling the input analog signal x (t) according to the high-speed serial interface to obtain a digital signal x [ n ]]Sampling rate f of s And a required passband cut-off frequency B of the filter, designing a filter as a prototype filter with a filter coefficient of h [ n ]]The order is multiple of the number D of parallel signal paths output by the high-speed serial interface;
(2) And taking the number of the filter coefficients h [ n ] of the prototype filter every D points to form D sub-filters, and obtaining D groups of filter banks 0,1, … and D-1 in D number taking modes, wherein the D groups of filter banks satisfy the following requirements:
filter bank 0: h [ nD ], h [ nD +1], … …, h [ nD + D-1]
Filter bank 1: h [ nD-1], h [ nD ], … …, h [ nD + D-2]
……
Filter bank D-1: h [ nD-D +1], h [ nD-D +2], … …, h [ nD ];
(3) Using D sub-filters h [ nD ] in filter bank 0]、h[nD+1]、……、h[nD+D-1]Are respectively paired with x 0 [n],x 1 [n],…,x D-1 [n]Filtering to obtain D filtering results y 00 [n]、y 01 [n]、……、y 0(D-1) [n]；
y 00 [n]＝x 0 [n]*h[nD]
y 01 [n]＝x 1 [n]*h[nD+1]
……
y 0(D-1) [n]＝x D-1 [n]*h[nD+D-1]
Wherein "+" represents a convolution operation;
with D sub-filters h nD-1 in filter bank 1]、h[nD]、……、h[nD+D-2]Are respectively paired with x 0 [n],x 1 [n],…,x D-1 [n]Filtering to obtain D filtering results y 10 [n]、y 11 [n]、……、y 1(D-1) [n]：
y 10 [n]＝x 0 [n]*h[nD-1]；
y 11 [n]＝x 1 [n]*h[nD]
……
y 1(D-1) [n]＝x D-1 [n]*h[nD+D-2]
And so on, obtaining D sub-filters in the filter groups 2 and … D-1 respectively corresponding to x 0 [n],x 1 [n],…,x D-1 [n]Filtering to obtain corresponding filtering results, wherein the last group is D filtering results y of the filter bank D-1 (D-1)0 [n]、y 11 [n]、……、y 1(D-1) [n]：
y (D-1)0 [n]＝x 0 [n]*h[nD-D+1]；
y (D-1)1 [n]＝x 1 [n]*h[nD-D+2]
……
y (D-1)(D-1) [n]＝x D-1 [n]*h[nD]；
By x 0 [n],x 1 [n],…,x D-1 [n]Represents the D-path low-speed parallel signal after the deserialization of the high-speed serial interface and meets x d [n]＝x[nD-d]，d∈[0,D-1]；
(4) And summing the D filtering results of the filter bank 0 to obtain y 0 [n]：
Summing the D filter results of the filter bank 1 to obtain y 1 [n]：
And so on to obtain the summation of the filtering results of the filter banks 2 and … D-1, wherein the summation of the D filtering results of the last filter bank D-1 obtains y D-1 [n]Comprises the following steps:
(5) Filtering nodes of the D filter bankFruit sum according to y D-1 [n]、…、y 1 [n]、y 0 [n]The digital signal x [ n ] is obtained by sequentially outputting the sequences]Filtered output signal y n]。
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