CN114582984A - Low-cost solar cell and preparation method thereof - Google Patents

Low-cost solar cell and preparation method thereof Download PDF

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Publication number
CN114582984A
CN114582984A CN202210063416.2A CN202210063416A CN114582984A CN 114582984 A CN114582984 A CN 114582984A CN 202210063416 A CN202210063416 A CN 202210063416A CN 114582984 A CN114582984 A CN 114582984A
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passivation layer
solar cell
barrier film
depositing
junction
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宣益民
王继磊
郑立凯
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Nanjing University of Aeronautics and Astronautics
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Nanjing University of Aeronautics and Astronautics
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/02Details
    • H01L31/0224Electrodes
    • H01L31/022408Electrodes for devices characterised by at least one potential jump barrier or surface barrier
    • H01L31/022425Electrodes for devices characterised by at least one potential jump barrier or surface barrier for solar cells
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/02Details
    • H01L31/0224Electrodes
    • H01L31/022408Electrodes for devices characterised by at least one potential jump barrier or surface barrier
    • H01L31/022425Electrodes for devices characterised by at least one potential jump barrier or surface barrier for solar cells
    • H01L31/022433Particular geometry of the grid contacts
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/04Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices
    • H01L31/06Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by potential barriers
    • H01L31/072Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by potential barriers the potential barriers being only of the PN heterojunction type
    • H01L31/0745Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by potential barriers the potential barriers being only of the PN heterojunction type comprising a AIVBIV heterojunction, e.g. Si/Ge, SiGe/Si or Si/SiC solar cells
    • H01L31/0747Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by potential barriers the potential barriers being only of the PN heterojunction type comprising a AIVBIV heterojunction, e.g. Si/Ge, SiGe/Si or Si/SiC solar cells comprising a heterojunction of crystalline and amorphous materials, e.g. heterojunction with intrinsic thin layer
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/18Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
    • H01L31/20Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof such devices or parts thereof comprising amorphous semiconductor materials
    • H01L31/202Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof such devices or parts thereof comprising amorphous semiconductor materials including only elements of Group IV of the Periodic Table
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02EREDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E10/00Energy generation through renewable energy sources
    • Y02E10/50Photovoltaic [PV] energy

Abstract

The invention discloses a low-cost solar cell and a preparation method thereof, wherein the solar cell comprises a cell substrate, a surface passivation layer, a field passivation layer, a PN junction, a transparent conductive film layer, and a main grid electrode and a fine grid electrode which are arranged on the transparent conductive film layer, wherein the main grid electrode and the fine grid electrode are of an aluminum-tin laminated structure, and are arranged vertically. The invention is prepared by adopting a non-contact physical vapor deposition or evaporation coating method, and forms graphics by a physical mask method, wherein the physical mask method adopts a barrier film as a mask plate, and the barrier film is adhered by electrostatic action. The structure provided by the invention, which combines the solar cell adopting the metallization scheme with lower cost and the low-temperature process, has the advantages that the cell manufacturing cost is greatly reduced while the higher conversion efficiency is kept, and the commercial value is very high.

Description

Low-cost solar cell and preparation method thereof
Technical Field
The invention belongs to the field of solar cells, and particularly relates to a low-cost solar cell and a preparation method thereof.
Background
Solar cells have become one of the key energy sources for national and even global development and application as a clean energy source. Among them, silicon-based solar cells are the most widely and mature solar cell technology developed at present. The continuous improvement of the conversion efficiency of the silicon-based solar cell promotes the continuous reduction of the power consumption cost of the whole photovoltaic system, and basically reaches the level of the flat-price internet access. However, the silicon-based battery technology has the problems of high manufacturing cost, wherein the most important cost problem is caused by high cost of metallization, a method of screen printing silver paste is widely adopted at present, and high printing consumption is the main reason of the problem. With the increasing amount of photovoltaic devices, the growing problem of the commonly used silver amount of heterojunction cells, traditional PERC cells and TOPCON cells becomes more prominent.
Disclosure of Invention
The purpose of the invention is as follows: in order to overcome the defect of high metallization cost of a silicon-based solar cell, the invention provides a scheme of combining a laminated structure of base metals of aluminum and tin with a cell technology, and the scheme also adopts a non-contact mask film coating mode to further avoid the problem of hidden cracking caused by a contact process in the flaking process.
The technical scheme is as follows:
a low-cost solar cell comprises a cell substrate, a surface passivation layer, a field passivation layer, a PN junction, a transparent conductive film layer, a main grid electrode and a fine grid electrode, wherein the main grid electrode and the fine grid electrode are arranged on the transparent conductive film layer, the fine grid electrode is of an aluminum-tin laminated structure, and the main grid electrode and the fine grid electrode are perpendicular to each other.
The main grid electrode and the fine grid electrode are both of an aluminum-tin laminated structure
Further, the cell substrate is an N-type or P-type crystalline silicon wafer; the surface passivation layer is intrinsic amorphous silicon; the field passivation layer is amorphous silicon or microcrystalline silicon doped with phosphorus; the PN junction is amorphous silicon or microcrystalline silicon doped with boron; the transparent conductive film layer is TCO.
Further, the low-cost solar cell is a single-sided cell or a double-sided cell;
the double-sided battery structure is as follows: the solar cell comprises a cell substrate, surface passivation layers arranged on an illuminated surface and a backlight surface of the cell substrate, and a field passivation layer and a PN junction which are respectively arranged on the two surface passivation layers, wherein transparent conductive film layers are respectively deposited outside the field passivation layer and the PN junction, and a main gate electrode and a fine gate electrode are arranged on the transparent conductive film layers;
the single-sided battery structure is as follows: the solar cell comprises a cell substrate and surface passivation layers arranged on an illuminated surface and a backlight surface of the cell substrate, wherein a field passivation layer and a PN junction are arranged on the surface passivation layer of the backlight surface, a transparent conductive film layer is deposited outside the field passivation layer and the PN junction, a transparent conductive film layer is also deposited on the surface passivation layer of the illuminated surface, and a main gate electrode and a fine gate electrode are arranged on the transparent conductive film layer.
Further, in the aluminum tin lamination, tin is arranged on the outer layer; wherein the thickness of the aluminum layer is 0.1-50 μm, and the thickness of the tin layer is 0.005-20 μm.
Further, the width of each main grid electrode is 0.01-0.5mm on average; the width of the fine grid electrode is 0.005-0.15mm on average.
The preparation method of the low-cost solar cell adopts a non-contact physical vapor deposition or evaporation coating method to prepare, and forms the graphics through a physical mask method, wherein the physical mask method adopts a barrier film as a mask plate, and the barrier film is adhered through electrostatic action.
Further, the barrier film is made of high-temperature-resistant PVC material.
Further, the preparation method of the low-cost solar cell specifically comprises the following steps:
s1, selecting an N-type or P-type crystalline silicon wafer as a cell substrate (11), and depositing intrinsic amorphous silicon on the light receiving surface and the backlight surface of the cell substrate (11) as a surface passivation layer;
s2, when designing a bifacial battery:
s21, respectively depositing a field passivation layer and a PN junction on the intrinsic amorphous silicon of the light receiving surface and the backlight surface;
s22, respectively depositing corresponding TCO layers on two sides;
s23, finally, attaching the patterned barrier film to the surface of the TCO through electrostatic action, further depositing aluminum and tin on the surface of the silicon wafer in sequence in a PVD or thermal evaporation mode, depositing a laminated structure of the aluminum and the tin on the opening part of the barrier film to serve as a main fine gate electrode, and finally taking down the barrier film;
s3, when designing a single-sided battery:
s31, depositing a silicon nitride film on the intrinsic amorphous silicon surface of the light receiving surface; pasting a patterned barrier film on the intrinsic amorphous silicon of the backlight surface through electrostatic action to be used as a mask, and then depositing one of a field passivation layer or a PN junction;
s32, removing the barrier film, then pasting the barrier film with the complementary pattern as a mask, and depositing the other one of the field passivation layer or the PN junction;
s33, then pasting a graphical barrier film on the field passivation layer and the PN junction, and depositing TCO;
and S34, finally, attaching the patterned barrier film to the surface of the TCO, sequentially depositing aluminum and tin on the surface of the silicon wafer in a PVD or thermal evaporation mode, depositing a laminated structure of the aluminum and the tin at the opening part of the barrier film to serve as a main fine gate electrode, and finally taking down the barrier film.
Advantageous effects
The structure provided by the invention, which combines the solar cell adopting the metallization scheme with lower cost and the low-temperature process, has the advantages that the cell manufacturing cost is greatly reduced while the higher conversion efficiency is kept, and the commercial value is very high. On one hand, the cost of the conductive material is greatly reduced by adopting the conductive substrate mainly made of aluminum, although the conductivity of pure metal aluminum is not as good as that of pure metal silver, the conductive material still needs to be better than the silver paste in the form of slurry, the thin grid line can be made thinner by combining with the scheme of electrostatic pasting a mask, and the electrical performance can be obviously improved by matching with the whole process of the battery; on the other hand, the deposition of the tin layer is added on the aluminum layer, so that the aluminum layer is protected from being oxidized, and in the welding step in the manufacturing process of the assembly, the welding strip and the grid line (especially the thin grid line) can be connected effectively, and the packaging loss from the battery to the assembly is further reduced.
Drawings
FIG. 1 is a schematic diagram of a battery of the present invention;
FIG. 2 is a schematic diagram showing the structure of a battery according to example 1 of the present invention;
FIG. 3 is a schematic diagram of a battery according to embodiment 2 of the present invention;
number designation in the figures: 11-cell substrate, 121 is the main gate electrode and 122 is the fine gate electrode.
Detailed Description
Reference will now be made in detail to embodiments of the present invention, examples of which are illustrated in the accompanying drawings. The embodiments described below with reference to the accompanying drawings are illustrative only for the purpose of explaining the present invention, and are not to be construed as limiting the present invention.
Example 1:
the embodiment designs a double-sided heterojunction solar cell with an aluminum-tin laminated electrode
With reference to fig. 1 and 2, the method specifically includes the following steps:
s1, selecting an N-type or P-type crystalline silicon wafer as a cell substrate 11, and depositing intrinsic amorphous silicon on the light receiving surface and the backlight surface of the cell substrate 11 as a surface passivation layer;
s2, respectively depositing a field passivation layer and a PN junction on the intrinsic amorphous silicon of the light receiving surface and the backlight surface; the field passivation layer is amorphous silicon or microcrystalline silicon doped with phosphorus; the PN junction is amorphous silicon or microcrystalline silicon doped with boron; the barrier film is made of high-temperature-resistant PVC material;
s3, respectively depositing corresponding TCO layers on two sides;
s4, finally, attaching the patterned barrier film to the surface of the TCO through electrostatic action, further depositing aluminum and tin on the surface of the silicon wafer in sequence in a PVD or thermal evaporation mode, depositing a laminated structure of the aluminum and the tin on the opening part of the barrier film to serve as a main fine gate electrode, and finally taking down the barrier film; the thickness of the aluminum layer is 0.1-50 μm, and the thickness of the tin layer is 0.005-20 μm; the width of the main gate electrode 121 is 0.01-0.5mm per average; the width of the fine gate electrode 122 is 0.005-0.15mm on average per one.
Example 2:
the embodiment designs a single-sided heterojunction solar cell with an aluminum-tin laminated electrode
S1, selecting an N-type or P-type crystalline silicon wafer as a cell substrate 11, and depositing intrinsic amorphous silicon on the light receiving surface and the backlight surface of the cell substrate 11 as a surface passivation layer;
s2, depositing a silicon nitride film on the intrinsic amorphous silicon surface of the light receiving surface; pasting a graphical barrier film on the intrinsic amorphous silicon of the backlight surface as a mask, and then depositing one of a field passivation layer or a PN junction; the field passivation layer is amorphous silicon or microcrystalline silicon doped with phosphorus; the PN junction is amorphous silicon or microcrystalline silicon doped with boron; the barrier film is made of high-temperature-resistant PVC material;
s3, removing the barrier film, then pasting the barrier film with the complementary pattern as a mask, and depositing the other one of the field passivation layer or the PN junction;
s4, then pasting a graphical barrier film on the field passivation layer and the PN junction, and depositing TCO;
s5, finally, attaching the patterned barrier film to the surface of the TCO, sequentially depositing aluminum and tin on the surface of the silicon wafer in a PVD or thermal evaporation mode, depositing a laminated structure of the aluminum and the tin at the opening part of the barrier film to serve as a main fine gate electrode, and finally taking down the barrier film; the thickness of the aluminum layer is 0.1-50 μm, and the thickness of the tin layer is 0.005-20 μm; the width of the main gate electrode 121 is 0.01-0.5mm per average; the width of the fine gate electrode 122 is 0.005-0.15mm on average per one.
Comparative example:
the embodiment designs a double-sided heterojunction solar cell adopting a silver paste electrode
The difference from example 1 is that the main fine gate electrode is a silver paste electrode.
The above description is only of the preferred embodiments of the present invention, and it should be noted that: it will be apparent to those skilled in the art that various modifications and adaptations can be made without departing from the principles of the invention and these are intended to be within the scope of the invention.
Table 1 shows the corresponding electrical property data for comparative example, example 1, example 2, comparative example. Shown in table 1: eta is the conversion efficiency (%) of the battery, Voc is the open-circuit voltage (V) of the battery, Isc is the short-circuit current (mA), and FF is the fill factor (%) of the battery. From the test data, it can be seen that the final conversion efficiency of the experimental group of examples 1 and 2 is substantially equal to that of the comparative group. The structure provided by the invention, which combines the solar cell adopting the metallization scheme with lower cost and the low-temperature process, has the advantages that the cell manufacturing cost is greatly reduced while the higher conversion efficiency is kept, and the commercial value is very high.
TABLE 1
Eta(%) Voc(V) Isc(A) FF(%) Rs(Ω) Rsh(Ω)
Comparative example 0.00 0.000 0.000 0.00 0.0000 0
Example 1 0.2 0.000 0.045 0.3 -0.001 206
Example 2 1.0 0.003 0.350 0.2 -0.001 352

Claims (9)

1. The solar cell with low cost comprises a cell substrate (11), a surface passivation layer, a field passivation layer, a PN junction, a transparent conductive film layer, a main grid electrode (121) and a fine grid electrode (122) which are arranged on the transparent conductive film layer, and is characterized in that the fine grid electrode (122) is of an aluminum-tin laminated structure, and the main grid electrode (121) and the fine grid electrode (122) are arranged in a mutually vertical mode.
2. A low cost solar cell according to claim 1, wherein the main grid electrode (121) and the fine grid electrode (122) are both of an al-sn stacked structure.
3. A low cost solar cell according to claim 1 or 2, characterized in that said cell substrate (11) is an N-type or P-type crystalline silicon wafer; the surface passivation layer is intrinsic amorphous silicon; the field passivation layer is amorphous silicon or microcrystalline silicon doped with phosphorus; the PN junction is amorphous silicon or microcrystalline silicon doped with boron; the transparent conductive film layer is TCO.
4. The low-cost solar cell according to claim 3, wherein the low-cost solar cell is a single-sided cell or a double-sided cell;
the double-sided battery structure is as follows: the solar cell comprises a cell substrate (11), surface passivation layers arranged on a light receiving surface and a backlight surface of the cell substrate (11), and a field passivation layer and a PN junction which are respectively arranged on the two surface passivation layers, wherein transparent conductive film layers are respectively deposited outside the field passivation layer and the PN junction, and a main gate electrode (121) and a fine gate electrode (122) are arranged on the transparent conductive film layers;
the single-sided battery structure is as follows: the solar cell comprises a cell substrate (11) and surface passivation layers arranged on a light receiving surface and a backlight surface of the cell substrate (11), wherein a field passivation layer and a PN junction are arranged on the surface passivation layer of the backlight surface, a transparent conductive film layer is deposited outside the field passivation layer and the PN junction, a transparent conductive film layer is also deposited on the surface passivation layer of the light receiving surface, and a main gate electrode (121) and a fine gate electrode (122) are arranged on the transparent conductive film layer.
5. A low cost solar cell according to claim 1 or 2, wherein the al-sn stack has tin on the outer layer; wherein the thickness of the aluminum layer is 0.1-50 μm, and the thickness of the tin layer is 0.005-20 μm.
6. A low cost solar cell according to claim 1 or 2, characterized in that the width of the main grid electrode (121) is 0.01-0.5mm on average each; the width of the fine gate electrode (122) is 0.005-0.15mm on average.
7. The method for manufacturing a low-cost solar cell according to claim 1 or 2, wherein the solar cell is manufactured by a non-contact physical vapor deposition or evaporation coating method, and the patterning is performed by a physical mask method using a barrier film as a mask, the barrier film being pasted by electrostatic action.
8. The method of claim 7, wherein the barrier film is a high temperature PVC material.
9. The method for manufacturing a low-cost solar cell according to claim 8, comprising the following steps:
s1, selecting an N-type or P-type crystalline silicon wafer as a cell substrate (11), and depositing intrinsic amorphous silicon on the light receiving surface and the backlight surface of the cell substrate (11) as a surface passivation layer;
s2, when designing the double-sided battery:
s21, respectively depositing a field passivation layer and a PN junction on the intrinsic amorphous silicon of the light receiving surface and the backlight surface;
s22, respectively depositing corresponding TCO layers on two sides;
s23, finally, attaching the patterned barrier film to the surface of the TCO through electrostatic action, further depositing aluminum and tin on the surface of the silicon wafer in sequence in a PVD or thermal evaporation mode, depositing a laminated structure of the aluminum and the tin on the opening part of the barrier film to serve as a main fine gate electrode, and finally taking down the barrier film;
s3, when designing a single-sided battery:
s31, depositing a silicon nitride film on the intrinsic amorphous silicon surface of the light receiving surface; pasting a patterned barrier film on the intrinsic amorphous silicon of the backlight surface through electrostatic action to be used as a mask, and then depositing one of a field passivation layer or a PN junction;
s32, removing the barrier film, then pasting the barrier film with the complementary pattern as a mask, and depositing the other one of the field passivation layer or the PN junction;
s33, then pasting a graphical barrier film on the field passivation layer and the PN junction, and depositing TCO;
and S34, finally, attaching the patterned barrier film to the surface of the TCO, sequentially depositing aluminum and tin on the surface of the silicon wafer in a PVD or thermal evaporation mode, depositing a laminated structure of the aluminum and the tin at the opening part of the barrier film to serve as a main fine gate electrode, and finally taking down the barrier film.
CN202210063416.2A 2022-01-20 2022-01-20 Low-cost solar cell and preparation method thereof Pending CN114582984A (en)

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Citations (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH104204A (en) * 1996-06-18 1998-01-06 Sharp Corp Manufacture of solar battery
CN1638032A (en) * 2003-12-26 2005-07-13 精工爱普生株式会社 Thin film formation method and apparatus. method of manufacturing organic electroluminescence device,
CN105118870A (en) * 2015-08-31 2015-12-02 深圳市科纳能薄膜科技有限公司 Method of manufacturing back contact heterojunction single crystalline silicon solar cell
US20160284918A1 (en) * 2013-03-19 2016-09-29 Choshu Industry Co., Ltd. Photovoltaic element and manufacturing method therefor
WO2016182128A1 (en) * 2015-05-12 2016-11-17 주식회사 테스 Method for manufacturing solar cell module
US20170207356A1 (en) * 2014-10-06 2017-07-20 Kaneka Corporation Solar cell, solar cell module, method for manufacturing solar cell, and method for manufacturing solar cell module
JP6302613B1 (en) * 2017-03-01 2018-03-28 ナノコイル株式会社 Manufacturing method of nano coil type GSR sensor element
WO2019182314A1 (en) * 2018-03-19 2019-09-26 엘지전자 주식회사 Solar cell and method for manufacturing solar cell
CN113054043A (en) * 2021-03-10 2021-06-29 苏州元昱新能源有限公司 Single-side light-receiving heterojunction photovoltaic cell grid line electrode structure
CN113823701A (en) * 2021-09-29 2021-12-21 西南石油大学 Electrode design and battery interconnection method of double-sided power generation heterojunction solar battery

Patent Citations (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH104204A (en) * 1996-06-18 1998-01-06 Sharp Corp Manufacture of solar battery
CN1638032A (en) * 2003-12-26 2005-07-13 精工爱普生株式会社 Thin film formation method and apparatus. method of manufacturing organic electroluminescence device,
US20160284918A1 (en) * 2013-03-19 2016-09-29 Choshu Industry Co., Ltd. Photovoltaic element and manufacturing method therefor
US20170207356A1 (en) * 2014-10-06 2017-07-20 Kaneka Corporation Solar cell, solar cell module, method for manufacturing solar cell, and method for manufacturing solar cell module
WO2016182128A1 (en) * 2015-05-12 2016-11-17 주식회사 테스 Method for manufacturing solar cell module
CN105118870A (en) * 2015-08-31 2015-12-02 深圳市科纳能薄膜科技有限公司 Method of manufacturing back contact heterojunction single crystalline silicon solar cell
JP6302613B1 (en) * 2017-03-01 2018-03-28 ナノコイル株式会社 Manufacturing method of nano coil type GSR sensor element
WO2019182314A1 (en) * 2018-03-19 2019-09-26 엘지전자 주식회사 Solar cell and method for manufacturing solar cell
CN113054043A (en) * 2021-03-10 2021-06-29 苏州元昱新能源有限公司 Single-side light-receiving heterojunction photovoltaic cell grid line electrode structure
CN113823701A (en) * 2021-09-29 2021-12-21 西南石油大学 Electrode design and battery interconnection method of double-sided power generation heterojunction solar battery

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