CN114513411B - Unified peripheral interactive interface for internet of things terminal - Google Patents
Unified peripheral interactive interface for internet of things terminal Download PDFInfo
- Publication number
- CN114513411B CN114513411B CN202111653017.3A CN202111653017A CN114513411B CN 114513411 B CN114513411 B CN 114513411B CN 202111653017 A CN202111653017 A CN 202111653017A CN 114513411 B CN114513411 B CN 114513411B
- Authority
- CN
- China
- Prior art keywords
- peripheral
- data
- output
- pin
- gateway
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Images
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L41/00—Arrangements for maintenance, administration or management of data switching networks, e.g. of packet switching networks
- H04L41/08—Configuration management of networks or network elements
- H04L41/0803—Configuration setting
- H04L41/0806—Configuration setting for initial configuration or provisioning, e.g. plug-and-play
- H04L41/0809—Plug-and-play configuration
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L12/00—Data switching networks
- H04L12/28—Data switching networks characterised by path configuration, e.g. LAN [Local Area Networks] or WAN [Wide Area Networks]
- H04L12/40—Bus networks
- H04L12/40006—Architecture of a communication node
- H04L12/40013—Details regarding a bus controller
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L12/00—Data switching networks
- H04L12/28—Data switching networks characterised by path configuration, e.g. LAN [Local Area Networks] or WAN [Wide Area Networks]
- H04L12/40—Bus networks
- H04L12/40006—Architecture of a communication node
- H04L12/40032—Details regarding a bus interface enhancer
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L12/00—Data switching networks
- H04L12/66—Arrangements for connecting between networks having differing types of switching systems, e.g. gateways
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L67/00—Network arrangements or protocols for supporting network services or applications
- H04L67/01—Protocols
- H04L67/12—Protocols specially adapted for proprietary or special-purpose networking environments, e.g. medical networks, sensor networks, networks in vehicles or remote metering networks
- H04L67/125—Protocols specially adapted for proprietary or special-purpose networking environments, e.g. medical networks, sensor networks, networks in vehicles or remote metering networks involving control of end-device applications over a network
Landscapes
- Engineering & Computer Science (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Health & Medical Sciences (AREA)
- Computing Systems (AREA)
- General Health & Medical Sciences (AREA)
- Medical Informatics (AREA)
- Data Exchanges In Wide-Area Networks (AREA)
- Communication Control (AREA)
Abstract
The invention discloses a unified peripheral interactive interface for an internet of things terminal, and belongs to the technical field of the internet of things. The invention comprises the following steps: the pin configuration unit is used for automatically configuring the connection mode of each pin for the inserted peripheral under the control instruction sent by the gateway; an input signal generating unit for generating a specific physical signal required for accessing a specific peripheral according to a data communication protocol adopted by the peripheral; and the peripheral output coding unit is used for packaging output information such as data, state signals and the like of the peripheral and transmitting the output information to the gateway. The invention can change the gateway type, and can realize the control of different peripheral devices in all the devices capable of transmitting binary data streams with specific formats. According to the method, the compatibility of the terminal of the Internet of things to different peripherals is greatly improved, program update of the terminal of the Internet of things is avoided, the gateway generates a control instruction to control the terminal to communicate with the peripherals, and the technical cost of customized development of the terminal of the Internet of things is reduced.
Description
Technical Field
The invention belongs to the field of Internet of things, and particularly relates to a unified peripheral interaction interface for an Internet of things terminal.
Background
The internet of things (Internet of Things, ioT) expands applications such as the internet and the Web to the physical field by widely deploying spatially distributed devices with embedded recognition, sensing, and driving functions. The digital world and the physical entity are connected through proper information and communication technology, so that a brand new application and service category- "everything interconnection" is realized. At present, the technology of the Internet of things rapidly develops, and is widely applied to a plurality of fields such as industry, smart city, smart medical treatment and the like. By virtue of the development of the 5G network, the application of the Internet of things can collect, analyze and manage data in real time almost without delay, so that further technical innovation is realized. The internet of things wave brings great changes to various stages and various fields of the whole industry.
At present, a large number of domestic and foreign scholars have conducted extensive research in the field of the Internet of things, and a plurality of domestic and foreign large-scale Internet companies and manufacturers enter the industry of the Internet of things in a dispute, so that the Internet of things is driven to develop and extend to aspects of production, work and life. However, the application scene and the development technology of the Internet of things are fragmented, which brings a plurality of difficulties to the application development of the Internet of things. Under the prior art framework, the development and maintenance of the Internet of things are required to face complicated technical processes, and the rapid development and large-scale deployment of the Internet of things equipment are hindered.
The internet of things system is generally composed of a cloud server, a gateway, and internet of things devices. The Internet of things equipment is used as a functional unit at the tail end of the system and is responsible for the acquisition of environmental data (such as temperature and humidity detection) and the execution of actions (such as control of a street lamp switch, LED display and the like). The gateway is responsible for remote control of the internet of things equipment, such as working state switching (power on and power off), working parameter modification, firmware upgrading and the like. The cloud server is responsible for final internet of things applications such as big data, information management, etc. In the system, the terminals of the internet of things are the most number and the most important parts, and are just like nerve endings, deeply applied in all corners. To achieve the corresponding functionality, the internet of things devices are typically provided with a set of customized peripherals (peripherals, such as sensors, drive motors) and controlled by a microcontroller. For this reason, customizing terminal functions requires customizing the peripheral devices to which they are deployed, while customizing the programming firmware to control the operation of these peripheral devices.
In face of increasing application demands, the internet of things equipment needs to be iterated rapidly to update functions, and therefore the internet of things equipment needs to complete updating of functional peripherals in a short development period. However, in the current application development architecture of the internet of things, the update of the peripheral devices of the internet of things device is basically tightly coupled with the hardware and software modification thereof. Since different peripherals have completely different control logic, data structures, interface characteristics, signal timing, in actual operation, a developer may need to reconstruct the system firmware, redefine the hardware connections, and even make new Printed Circuit Boards (PCBs). The operation has stronger professionality and higher technical threshold, and when the actual demand is generated, the application demand party often needs to entrust professionals to develop, which not only can bring waiting time of several weeks to several months, but also the maintenance and upgrading of the subsequent equipment can not be independently completed by the demand party. At present, although solutions of modularized internet of things terminals exist, the internet of things terminals and The peripherals in The solutions are customized through plug and play updating functions of The peripherals, and The internet of things terminals and The peripherals in The solutions are not Commercial Off-The-Shelf (COTS). When new demands are generated, the schemes firstly need to carry out customized design on the peripheral equipment and the terminal to realize so-called plug-and-play, and the problem that the customization development of the Internet of things equipment is difficult is not fundamentally solved. In sum, the further development of the Internet of things is greatly hindered by the higher technical threshold and development cost of the Internet of things equipment in terms of development, maintenance, function upgrading and other operations.
Disclosure of Invention
The invention aims at: the unified peripheral interaction interface for the Internet of things terminal is provided to meet the electrical characteristics of different peripherals, and physical connection is established with the different peripherals, so that the different peripherals can be connected with a gateway of an Internet of things system through the unified interface, and development cost and technical threshold of customized development of the Internet of things terminal are reduced.
The unified peripheral interaction interface for the terminal of the Internet of things provided by the invention comprises the following steps:
the pin configuration unit is used for configuring the connection mode and the electrical characteristics of each pin for the inserted peripheral under the control instruction sent by the gateway; the connection mode comprises a connection mode of a control signal and a connection mode of a data signal; the connection mode of the data signal refers to: based on a preset mapping relation, matching data communication protocol cores corresponding to corresponding pins (pins for transmitting data) in a preset communication protocol core set;
the input signal generating unit is used for analyzing the control instruction sent by the gateway and generating specific physical signals required by accessing the target peripheral according to the data communication protocol core configured by the pin configuration unit, wherein the specific physical signals comprise data and control signals;
the peripheral output coding unit is used for carrying out data encapsulation on the peripheral output according to the appointed data encapsulation format based on the data communication protocol core configured by the pin configuration unit and uploading the data encapsulation to the gateway; wherein the peripheral output includes a data output and a status output.
Further, the data field of the control instruction sent by the gateway includes: the pin address of the target peripheral, the type of operation, and data input to the peripheral or control bits for controlling the pin level.
Further, the pin configuration unit includes a general input/output circuit, a first multiplexer and a communication protocol core set, the operation modes of different pins are configured by configuring the enable signal of the general input/output circuit, and the multiplexer is controlled by the control instruction sent by the gateway to configure a matched communication protocol core for the input or output pin of the general input/output circuit from the communication protocol core set.
Further, the general input/output port circuit comprises two branches, one branch comprises two tri-state logic gates, two complementary field effect transistors P-MOS and N-MOS, and the grid electrode of the P-MOS in the complementary field effect transistor also comprises a built-in pull-up resistor; the other branch comprises two field effect transistors N-MOS and a tri-state logic gate, wherein one of the two field effect transistors N-MOS comprises a pull-up resistor R PU The other includes a pull-down resistor R PD 。
Further, the input signal generating unit comprises a shift register with serial input and parallel output, a second multiplexer and a latch; the shift register is used for analyzing a control instruction sent by the gateway and outputting a pin address of a target peripheral in the control instruction to a first multiplexer of the pin configuration unit; and outputting the operation type in the control instruction, data or control bits input to the peripheral device to the second multiplexer; for data, the second multiplexer matches a corresponding data communication protocol core according to the operation type, and the data communication protocol core is used for generating a data signal and outputting the data signal to the first multiplexer; for the control bits, the second multiplexer matches corresponding latches according to the operation type, and the latches are used for generating control signals and outputting the control signals to the first multiplexer; the first multiplexer is matched with a corresponding target pin in the general input/output port circuit according to the pin address of the target peripheral in the control instruction, and sends the generated data signal and the control signal to the target peripheral.
Further, when the peripheral output encoding unit performs data encapsulation, the fields of the adopted data format include: status/data, further, the electrical characteristics include push-pull mode and open-drain mode, each mode being in turn divided into input and output.
The technical scheme provided by the invention has at least the following beneficial effects:
(1) The pin configuration unit can configure the working modes (such as push-pull mode or leakage-opening mode) of each pin of the peripheral according to the binary instruction data stream transmitted by the gateway, so that the pins of various peripheral can be physically connected with the unified peripheral interaction interface, when a user needs to replace the peripheral, the original peripheral can be disconnected from the interface, and the new peripheral is directly connected to the original interface, so that the step of customizing a new circuit board for the peripheral is omitted, and the technical cost of customizing and developing the terminal equipment of the Internet of things is obviously reduced;
(2) The input signal generating unit and the peripheral output encoding unit are mainly responsible for carrying out data communication with the peripheral according to different communication protocols, so that the unified peripheral interaction interface can carry out data communication with the peripheral according to the received command of the gateway, and the gateway can control different peripherals by using a fixed command set. When the new peripheral is replaced, the user can control the new peripheral by modifying the control instruction sent by the gateway without re-writing and burning the program of the terminal.
(3) For the unified peripheral interactive interface, the type of the gateway is changeable, and all devices capable of sending binary data streams with specific formats can realize the control of different peripheral devices through the unified peripheral interactive interface. The compatibility of the terminal of the Internet of things to different peripheral devices is obviously improved.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings required for the description of the embodiments will be briefly described below, and it is apparent that the drawings in the following description are only some embodiments of the present invention, and other drawings may be obtained according to these drawings without inventive effort for a person skilled in the art.
Fig. 1 is a schematic structural diagram of a pin configuration unit of a unified peripheral interactive interface adopted in the implementation of the present invention.
Fig. 2 is a schematic diagram of a processing procedure of the input signal generating unit in the implementation of the present invention.
Fig. 3 is a schematic diagram illustrating a processing procedure of a peripheral output encoding unit in the embodiment of the present invention.
Detailed Description
For the purpose of making the objects, technical solutions and advantages of the present invention more apparent, the embodiments of the present invention will be described in further detail with reference to the accompanying drawings.
The unified peripheral interaction interface for the terminal of the Internet of things provided by the embodiment of the invention comprises the following steps:
the pin configuration unit is used for automatically configuring the connection mode and the electrical characteristic (such as a push-pull mode or a leakage opening mode) of each pin for the inserted peripheral under the control instruction sent by the gateway (of the Internet of things system); the connection mode comprises a connection mode of a control signal and a connection mode of a data signal; the connection mode of the data signal refers to: based on a preset mapping relation, matching data communication protocol cores corresponding to corresponding pins (pins for transmitting data) in a preset communication protocol core set; i.e. the pins transmitting the control signals are directly transmitted without configuring the data communication protocol core.
An input signal generating unit for generating a signal according to a data communication protocol (such as I 2 C, UART, SPI and RS 485), generatesSpecific physical signals (e.g., address and control signals) required to access a specific peripheral;
and the peripheral output coding unit is used for packaging output information such as data, state signals and the like of the peripheral and transmitting the output information to the gateway.
In the traditional terminal equipment of the internet of things, the pins of the peripheral equipment are physically connected with the processor through the customized circuit board, so that in practical application, developers need to develop different circuit boards aiming at different peripheral equipment designs, and the workload and cost of the customized development of the terminal equipment of the internet of things are increased. The pin configuration unit in the embodiment of the invention can configure the working mode (such as push-pull mode or leakage-opening mode) of each pin of the peripheral according to the binary instruction data stream transmitted by the gateway, so that the pins of various peripheral can be physically connected with the unified peripheral interaction interface, when a user needs to replace the peripheral, the original peripheral can be disconnected from the interface, and the new peripheral is directly connected with the original interface, thereby omitting the step of customizing a new circuit board for the peripheral, and further obviously reducing the technical cost of customizing and developing the terminal equipment of the Internet of things.
In the terminal of the internet of things device, the communication between the processor and different peripheral devices often adopts a plurality of different communication protocols (such as SPI (Serial Peripheral Interface), I 2 C (Inter-Integrated Circuit), UART (Universal Asynchronous Receiver/Transmitter), etc. For the peripheral equipment adopting different communication protocols, a developer needs to customize a development driving program based on the communication protocol adopted by the peripheral equipment, and when a new peripheral equipment needs to be replaced, the software program of the terminal needs to be rewritten and burnt, so that the workload and the technical threshold of customizing development of the terminal equipment of the Internet of things are increased. The input signal generating unit and the peripheral output coding unit in the embodiment of the invention are mainly responsible for carrying out data communication with the peripheral according to different communication protocols, so that the unified peripheral interaction interface can carry out data communication with the peripheral according to the received instructions of the gateway, and the gateway can control different peripherals by using a fixed instruction set. When a new peripheral is replaced, the user does not need to re-write and burn the program of the terminal, and only needs to modifyThe control command sent by the gateway can control the new peripheral. For the unified peripheral interactive interface provided by the embodiment of the invention, the type of the gateway is changeable, and all the devices capable of sending binary data streams with specific formats can realize the control of different peripheral devices through the unified peripheral interactive interface. The unified peripheral interaction interface provided by the embodiment of the invention obviously improves the compatibility of the terminal of the Internet of things to different peripherals, avoids program update of the terminal of the Internet of things, and reduces the technical cost of customized development of the terminal of the Internet of things by controlling the communication between the terminal and the peripherals by generating the control instruction by the gateway.
In the embodiment of the invention, the pin configuration unit is responsible for configuring the pins of the peripheral equipment of the plug-and-play terminal under the instruction control of the gateway. The modes of operation (also referred to as electrical characteristics) of the peripheral pins can be divided into two types: push-pull mode and open drain mode. The two modes of operation have different electrical characteristics. In operation, some peripheral pins are required to operate in push-pull mode (e.g., SPI bus pins), and some peripheral pins are required to operate in open-drain mode (e.g., I 2 Pins of the C bus).
The push-pull circuit designed by the embodiment of the invention comprises two complementary field effect transistors (MOSFET) for outputting stable logic high and low levels. In addition, a field effect transistor is replaced with a tri-state logic gate in the open drain circuit to provide bi-directional data communication capability.
As shown in fig. 1, in order to flexibly configure a pin operation mode, a pin configuration unit in an embodiment of the present invention adopts a General Purpose Input Output (GPIO) scheme. The GPIO comprises two branches, wherein one branch comprises two tri-state logic gates and two complementary field effect transistors: P-MOS and N-MOS, wherein the enable signals of the two tri-state logic gates are EN1 and EN2 respectively, and the resistor R i Pull-up resistor for gate of P-MOS in complementary field effect transistor; the other branch comprises two field effect transistors N-MOS and a tri-state logic gate, the enabling signal of the tri-state logic gate is marked as EN3, the enabling signals corresponding to the two field effect transistors N-MOS are respectively marked as EN4 and EN5, and the two field effect transistors N-MIn OS, one includes a pull-up resistor R PU The other includes a pull-down resistor R PD . The operation modes of the different pins can be configured by programming control of 5 enable signals (EN). The specific configuration mode is as follows:
(1) Configuration of push-pull mode. In push-pull mode, the input signal and the output signal are divided into two pins that are isolated from each other. When the push-pull output pins are configured, EN1 and EN2 are set high and the other EN signals are set low. When the push-pull input pin is configured, EN3 is set to a high level, and all other EN signals are set to a low level;
(2) And (5) configuration of an open drain mode. In the open-drain mode, the input signal and the output signal are arranged on the same pin. Using a FET and its corresponding Pull-Up (Pull-Up) resistor R PU Or Pull-Down resistor R PD The output of the signal is realized, and the input of the signal is realized by using a three-state gate (TSL).
In addition to configuring the pin's mode of operation, the pin configuration unit also contains the logical functions of a typical data communication protocol (communication protocol core set, i.e., CPKs), and controls a Multiplexer (MUX), i.e., multiplexer B, via gateway instructions to configure the appropriate communication protocol for the input or output pins.
I.e., in an embodiment of the invention, the pin configuration unit includes a universal input-output port circuit, a multiplexer, and a communication protocol core. The working modes of different pins are configured through configuring the enabling signals of the input-output port circuit, and the multiplexer is controlled to configure a matched data communication protocol (data communication protocol core) for the input or output pins of the general input-output port circuit from the communication protocol core through a control instruction sent by the gateway;
as a possible implementation manner, in the embodiment of the present invention, a specific configuration manner of the 5 enable signals of the universal input/output circuit is as follows:
GPIO configuration table
The input signal generating unit is responsible for decoding the control instruction transmitted by the gateway, generating a corresponding physical signal and transmitting the generated signal to the target peripheral. As shown in fig. 2, a control instruction from the gateway includes: the pin address (nbit), the operation type (tbit), the DATA (DATA) input to the peripheral or the control bit (CF) used to control the pin level, i.e. 1/dbit control bit/DATA, of the target peripheral, wherein the values of d, t and n can be set by themselves. When the terminal receives a control command, the command is transferred to a serial-in-parallel-out shift register (SIPO SR). The shift register decodes the instruction and then outputs all control signals in the instruction to the multiplexer A, B. Next, the multiplexer B selects the target pin according to the pin address of the instruction. Then, if the instruction needs to input data to the peripheral device, the multiplexer A selects a communication protocol core according to the operation type of the instruction to generate a Data Signal (DS); if the instruction needs to control the level of the peripheral pins, the multiplexer a selects a latch according to the operation type of the instruction to generate the Control Signal (CS). Finally, a data signal is generated by the communication protocol core and a control signal is generated by the latch. The input signal generating unit can supply all signals required by all peripheral devices on the board and control the operation thereof as long as the reception and decoding of the instructions are completed according to predetermined timing requirements.
The peripheral output coding unit returns all the outputs of the peripheral to the gateway. The peripheral output includes a data output and a status output. As shown in fig. 3, the data signal output pins of the peripheral device are connected to the data communication protocol core matched with the data signal output pins of the peripheral device through a preset multiplexer (i.e. a multiplexer B), and the control signal output of the peripheral device is detected by a field effect transistor. When detecting the output of the data signal, the communication protocol core obtains the data/state output by the peripheral equipment, and encapsulates the data/state (1/dbit), the pin address (nbit), and the device address (PID address, mbit, m can be set by itself) of the terminal. The change of the pin level of the control signal output can cause the switching change of the field effect transistor, which can trigger the peripheral output coding unit to construct a new data packet, wherein the new data packet comprises a state bit, a corresponding pin address and a terminal equipment address. These packets are transmitted over the upstream connection to the gateway, which causes it to further process.
Finally, it should be noted that: the above embodiments are only for illustrating the technical solution of the present invention, and are not limiting; although the invention has been described in detail with reference to the foregoing embodiments, it will be understood by those of ordinary skill in the art that: the technical scheme described in the foregoing embodiments can be modified or some technical features thereof can be replaced by equivalents; such modifications and substitutions do not depart from the spirit and scope of the technical solutions of the embodiments of the present invention.
What has been described above is merely some embodiments of the present invention. It will be apparent to those skilled in the art that various modifications and improvements can be made without departing from the spirit of the invention.
Claims (2)
1. A unified peripheral hardware interactive interface for thing networking terminal, its characterized in that includes:
the pin configuration unit is used for configuring the connection mode and the electrical characteristics of each pin for the inserted peripheral under the control instruction sent by the gateway; the connection mode comprises a connection mode of a control signal and a connection mode of a data signal; the connection mode of the data signal refers to: based on a preset mapping relation, matching data communication protocol cores corresponding to the corresponding pins in a preset communication protocol core set; the data field of the control instruction sent by the gateway comprises: the pin address of the target peripheral, the operation type, and the data input to the peripheral or the control bit for controlling the pin level;
the input signal generating unit is used for analyzing the control instruction sent by the gateway and generating specific physical signals required by accessing the target peripheral according to the data communication protocol core configured by the pin configuration unit, wherein the specific physical signals comprise data and control signals;
the peripheral output coding unit is used for carrying out data encapsulation on the peripheral output according to the appointed data encapsulation format based on the data communication protocol core configured by the pin configuration unit and uploading the data encapsulation to the gateway; wherein the peripheral output comprises a data output and a status output;
the pin configuration unit comprises a general input/output circuit, a first multiplexer and a communication protocol core set, wherein the working modes of different pins are configured by configuring an enabling signal of the general input/output circuit, and the first multiplexer is controlled by a control instruction sent by a gateway to configure a matched communication protocol core for the input or output pin of the general input/output circuit from the communication protocol core set;
the general input/output port circuit comprises two branches, wherein one branch comprises two tri-state logic gates, two complementary field effect transistors P-MOS and N-MOS, and the grid electrode of the P-MOS in the complementary field effect transistor also comprises a pull-up resistor; the other branch comprises two field effect transistors N-MOS and a tri-state logic gate, wherein one of the two field effect transistors N-MOS comprises a pull-up resistor, and the other one comprises a pull-down resistor;
the input signal generating unit comprises a shift register with serial input and parallel output, a second multiplexer and a latch; the shift register is used for analyzing a control instruction sent by the gateway and outputting a pin address of a target peripheral in the control instruction to a first multiplexer of the pin configuration unit; and outputting the operation type in the control instruction, data or control bits input to the peripheral device to the second multiplexer; for data, the second multiplexer matches a corresponding data communication protocol core according to the operation type, and the data communication protocol core is used for generating a data signal and outputting the data signal to the first multiplexer; for the control bits, the second multiplexer matches corresponding latches according to the operation type, and the latches are used for generating control signals and outputting the control signals to the first multiplexer; the first multiplexer is matched with a corresponding target pin in the general input/output port circuit according to the pin address of the target peripheral in the control instruction, and sends the generated data signal and control signal to the target peripheral;
the data signal output pin of the peripheral equipment is connected to a data communication protocol core matched with the data signal output pin of the peripheral equipment through a first multiplexer, the control signal output of the peripheral equipment is detected by a field effect transistor, when the data signal output is detected, the communication protocol core obtains the data/state output by the peripheral equipment, and the data/state, the pin address and the equipment address of the terminal are packaged together; the pin level change of the control signal output can cause the switching change of the field effect transistor, trigger the peripheral output coding unit to construct a new data packet, wherein the new data packet comprises a status bit, a corresponding pin address and a terminal equipment address, and the data packet is transmitted to the gateway through uplink connection.
2. The peripheral interaction interface of claim 1, wherein the electrical characteristics comprise a push-pull mode and a leaky mode, each mode being in turn divided into an input and an output.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202111653017.3A CN114513411B (en) | 2021-12-30 | 2021-12-30 | Unified peripheral interactive interface for internet of things terminal |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202111653017.3A CN114513411B (en) | 2021-12-30 | 2021-12-30 | Unified peripheral interactive interface for internet of things terminal |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN114513411A CN114513411A (en) | 2022-05-17 |
| CN114513411B true CN114513411B (en) | 2023-06-23 |
Family
ID=81548304
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202111653017.3A Active CN114513411B (en) | 2021-12-30 | 2021-12-30 | Unified peripheral interactive interface for internet of things terminal |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN114513411B (en) |
Families Citing this family (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN115277778B (en) * | 2022-07-29 | 2023-09-15 | 平安科技（深圳）有限公司 | Configuration method and device of Internet of things system, electronic equipment and storage medium |
| CN116243147B (en) * | 2023-05-09 | 2023-08-18 | 武汉芯必达微电子有限公司 | PAD function matrix-based integrated control chip peripheral self-test method and device |
| CN116795755B (en) * | 2023-08-28 | 2023-12-08 | 上海移芯通信科技股份有限公司 | Equipment management method and device based on Internet of things chip |
Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US10289601B1 (en) * | 2017-12-21 | 2019-05-14 | Samsung Electronics Co., Ltd. | Host controller, secure element and serial peripheral interface communications system |
| CN109906444A (en) * | 2016-09-05 | 2019-06-18 | Iot耐科特有限公司 | The equipment interface system and method for software definition |
| KR102063910B1 (en) * | 2019-08-23 | 2020-01-09 | 김주섭 | IoT Terminal and IoT Trandsaction System using IoT Network |
| CN111949595A (en) * | 2020-08-28 | 2020-11-17 | 电子科技大学 | Programming-free processor-free Internet of things terminal architecture |
| CN112804128A (en) * | 2021-03-25 | 2021-05-14 | 广州智慧城市发展研究院 | Bus control system and method supporting multiple protocols |
Family Cites Families (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20040008725A1 (en) * | 2002-07-15 | 2004-01-15 | Analog Devices, Inc. | Method and an interface circuit configurable in two communication protocol modes |
| KR100618814B1 (en) * | 2003-07-04 | 2006-08-31 | 삼성전자주식회사 | Movable storage apparatus combined use of smart card capable of interfacing multi hosts and interfacing method of the same |
| US9439068B2 (en) * | 2014-12-05 | 2016-09-06 | Technical Consumer Products, Inc. | Dynamic configuration for a wireless peripheral device |
| CN110113322A (en) * | 2019-04-18 | 2019-08-09 | 佛山职业技术学院 | A kind of Internet of Things intelligence system applied to industry |
| CN111988417B (en) * | 2020-08-28 | 2022-07-19 | 电子科技大学 | Communication control method of terminal of Internet of things |
-
2021
- 2021-12-30 CN CN202111653017.3A patent/CN114513411B/en active Active
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN109906444A (en) * | 2016-09-05 | 2019-06-18 | Iot耐科特有限公司 | The equipment interface system and method for software definition |
| US10289601B1 (en) * | 2017-12-21 | 2019-05-14 | Samsung Electronics Co., Ltd. | Host controller, secure element and serial peripheral interface communications system |
| KR102063910B1 (en) * | 2019-08-23 | 2020-01-09 | 김주섭 | IoT Terminal and IoT Trandsaction System using IoT Network |
| CN111949595A (en) * | 2020-08-28 | 2020-11-17 | 电子科技大学 | Programming-free processor-free Internet of things terminal architecture |
| CN112804128A (en) * | 2021-03-25 | 2021-05-14 | 广州智慧城市发展研究院 | Bus control system and method supporting multiple protocols |
Also Published As
| Publication number | Publication date |
|---|---|
| CN114513411A (en) | 2022-05-17 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN114513411B (en) | Unified peripheral interactive interface for internet of things terminal | |
| CN102508533B (en) | Reset control device and method | |
| US20070283059A1 (en) | Method for configuring a Peripheral Component Interconnect Express (PCIE) | |
| KR20180050728A (en) | Bridging and virtualizing input / output signals on multi-node networks | |
| WO2011074708A1 (en) | Semiconductor system, semiconductor device, and electronic device initializing method | |
| CN108345555A (en) | Interface bridgt circuit based on high-speed serial communication and its method | |
| WO2022222292A1 (en) | Power amplifier adaptation method, terminal device, storage medium and computer program product | |
| CN114546394B (en) | Unified Internet of things peripheral access and control method | |
| US20070104219A1 (en) | System and method to facilitate testing of rapidio components | |
| CN111158731A (en) | CPLD-based network card firmware upgrading device and method | |
| CN106657115A (en) | Frequency converter control system and protocol conversion card thereof | |
| CN110096291A (en) | Power management chip upgrades circuit, method and the network equipment | |
| Corcoran | Two wires and 30 years: A tribute and introductory tutorial to the I2C two-wire bus | |
| CN210666783U (en) | Control circuit of high-density ARM micro server | |
| CN211015473U (en) | Upgrade configuration logic circuit, programmable logic device and upgrade configuration system | |
| TW200411557A (en) | Method for effectively re-downloading data to a field programmable gate array | |
| CN114513412B (en) | Plug-and-play system for peripheral equipment of Internet of things | |
| CN113132793A (en) | Far-field voice control method, smart television, far-field voice module and connecting line | |
| CN111431973B (en) | UART-based program online downloading system and method for practical teaching of computer system | |
| CN114999409A (en) | Mini LED backlight control circuit, display device and method | |
| CN208589013U (en) | A kind of device remotely updating FPGA by JTAG mode based on CPU | |
| CN210270888U (en) | Single-bus communication circuit | |
| CN109408151B (en) | Automatic switching device and switching method for configuration mode of field programmable gate array | |
| CN215895449U (en) | Module and server based on FPGA control peripheral hardware | |
| EP2752774A1 (en) | Electronic apparatus and data processing method thereof |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| GR01 | Patent grant | ||
| GR01 | Patent grant |