CN114513179B - High-voltage driver and driving method thereof - Google Patents
High-voltage driver and driving method thereof Download PDFInfo
- Publication number
- CN114513179B CN114513179B CN202210413230.5A CN202210413230A CN114513179B CN 114513179 B CN114513179 B CN 114513179B CN 202210413230 A CN202210413230 A CN 202210413230A CN 114513179 B CN114513179 B CN 114513179B
- Authority
- CN
- China
- Prior art keywords
- power
- signal
- switch tube
- power amplifier
- circuit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Images
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03G—CONTROL OF AMPLIFICATION
- H03G1/00—Details of arrangements for controlling amplification
- H03G1/0005—Circuits characterised by the type of controlling devices operated by a controlling current or voltage signal
- H03G1/0017—Circuits characterised by the type of controlling devices operated by a controlling current or voltage signal the device being at least one of the amplifying solid state elements of the amplifier
Landscapes
- Amplifiers (AREA)
Abstract
The invention discloses a high-voltage driver and a driving method thereof. The high voltage driver includes: the device comprises a drive control circuit, a voltage detection circuit, a dead time circuit and a bleeder switch tube; the control end of the power switch tube is switched on or switched off according to the first driving signal; a first end of the power switch tube is connected to a first power supply output end, and a first power supply signal output by the first power supply output end is output to the power amplifier through a second end of the power switch tube; the voltage detection circuit is electrically connected with the second end of the power switch tube and is used for acquiring a power amplifier power-on signal and generating a power amplifier power-down signal when the power amplifier power-on signal is lower than a set threshold value; the dead time circuit generates a second driving signal according to the control signal and the power amplifier power-down signal, and outputs the second driving signal to the control end of the bleeder switch tube so as to control the on/off of the bleeder switch tube. Through the scheme, the problem of power loss caused by the fact that the power switch tube and the bleeder switch tube are simultaneously conducted can be avoided, and the receiving and dispatching switching speed of the radar can be guaranteed.
Description
Technical Field
The invention relates to the technical field of high-voltage driving, in particular to a high-voltage driver and a driving method thereof.
Background
The high-voltage driver is a main circuit for modulating the power amplifier in the phased array radar, and the modulation of the power amplifier is realized by driving the power tube, so that the pulse emission of the radar is realized. In order to solve the problem of fast falling edge of the power amplifier, a concept of a leakage path is provided in the prior art, an output end of a high-voltage driver drives a leakage tube after passing through a high-level-to-low-level circuit and a dead time circuit, residual charges of the power tube are discharged into a leakage loop of the high-voltage driver, and the speed of modulating the falling edge of the power amplifier is increased.
The high-voltage driving circuit solves the problem of rapid modulation, but due to the introduction of the leakage path, when different power tubes are driven, the power tubes and the leakage path may be conducted simultaneously due to different turn-off delays of the power tubes, so that the driving loss is increased.
The increase of the loss can be avoided by adjusting the dead time circuit to increase the dead time, but the receiving and transmitting switching speed of the radar is limited, so the contradiction between the receiving and transmitting switching speed of the radar and the driving power consumption is always a problem which is difficult to solve.
Disclosure of Invention
The embodiment of the invention provides a high-voltage driver and a driving method thereof, which are compatible with different power tubes and simultaneously take driving loss and the receiving and transmitting switching speed of a radar into consideration.
In a first aspect, an embodiment of the present invention provides a high voltage driver, including: the device comprises a driving control circuit, a voltage detection circuit, a dead time circuit and a bleeder switch tube;
the drive control circuit is used for acquiring a control signal and generating a first drive signal according to the control signal; the drive control circuit is also used for outputting the first drive signal to a control end of the power switch tube; the first end of the power switch tube is connected to the first power supply output end; a first power supply signal output by the first power supply output end is output to the power amplifier through the second end of the power switch tube;
the voltage detection circuit is electrically connected with the second end of the power switch tube and is used for acquiring a power-up signal of the power amplifier; the voltage detection circuit is used for generating a power amplifier power-down signal when the power amplifier power-up signal is lower than a set threshold value; the set threshold is less than the first power signal;
the dead time circuit generates a second driving signal according to the control signal and the power amplifier power-down signal and outputs the second driving signal to the control end of the bleeder switch tube; the bleeder switch tube is used for connecting the second end of the power switch tube with the ground end.
In a second aspect, an embodiment of the present invention provides a driving method of a high voltage driver, which is applied to the high voltage driver according to the first aspect of the present invention, and the driving method of the high voltage driver includes:
when the power amplifier needs to be powered up, the control signal controls the drive control circuit to output a first drive signal to the control end of the power switch tube so as to conduct the power switch tube; the power amplifier power-on signal acquired by the voltage detection circuit is not lower than a set threshold value; the dead time circuit turns off a bleeder switch tube according to a power amplifier power-down signal generated by the voltage detection circuit according to the control signal;
when the power amplifier needs to be powered off, the control signal controls the drive control circuit to output a first drive signal to the control end of the power switch tube so as to switch off the power switch tube; the power amplifier power-on signal obtained by the voltage detection circuit is lower than a set threshold value; and the dead time circuit conducts the bleeder switch tube according to the power-off signal of the power amplifier generated by the control signal and the voltage detection circuit.
In the embodiment of the invention, a drive control circuit, a voltage detection circuit, a dead time circuit and a bleeder switch tube are arranged in a high-voltage driver; the control end of the power switch tube is switched on or switched off according to the first driving signal; a first end of the power switch tube is connected to a first power supply output end, and a first power supply signal output by the first power supply output end is output to the power amplifier through a second end of the power switch tube; the voltage detection circuit is electrically connected with the second end of the power switch tube and is used for acquiring a power amplifier power-on signal and generating a power amplifier power-down signal when the power amplifier power-on signal is lower than a set threshold value; the dead time circuit generates a second driving signal according to the control signal and the power amplifier power-down signal, and outputs the second driving signal to the control end of the bleeder switch tube so as to control the on/off of the bleeder switch tube. In the technical scheme, the voltage detection circuit is arranged, and when the voltage detection circuit detects that the power amplifier power-on signal is lower than the set threshold value, namely the power switch tube is switched off, the bleeder circuit is controlled to be switched on, so that the problem of power loss caused by simultaneous conduction of the power switch tube and the bleeder switch tube is effectively avoided; meanwhile, dead time in the dead time circuit does not need to be set too large, the turn-off speed of the power amplifier is guaranteed, and the receiving and transmitting switching speed of the radar is further guaranteed.
Drawings
FIG. 1 is a schematic diagram of a connection structure of a high voltage driving circuit in the prior art;
fig. 2 is a schematic circuit connection structure diagram of a high voltage driver according to an embodiment of the present invention;
fig. 3 is a schematic diagram of a connection structure of a dead time circuit according to an embodiment of the present invention;
fig. 4 is a schematic circuit connection structure diagram of another high voltage driver according to an embodiment of the present invention;
fig. 5 is a schematic diagram of a connection structure of another dead time circuit according to an embodiment of the present invention;
fig. 6 is a flowchart of a driving method of a high voltage driver according to an embodiment of the present invention.
Detailed Description
The present invention will be described in further detail with reference to the accompanying drawings and examples. It is to be understood that the specific embodiments described herein are merely illustrative of the invention and are not limiting of the invention. It should be further noted that, for the convenience of description, only some of the structures related to the present invention are shown in the drawings, not all of the structures.
In the design of phased array radar components, the system has higher and higher requirements on technical indexes such as power output, efficiency and working bandwidth of a power amplifier link, and therefore, the application research of the power amplifier in the phased array radar becomes very significant. Fig. 1 is a schematic diagram of a connection structure of a high voltage driving circuit in the prior art, and as shown in fig. 1, a high voltage driving circuit 1 'and a switching tube 5' connected with a power amplifier are arranged in a phased array radar system, and the high voltage driving circuit 1 'and the switching tube 5' form a modulation circuit to protect and control the power amplifier 7. The control end of the switch tube 5 'is connected with the output end of the high-voltage drive circuit 1', a power supply signal is input to the first end of the switch tube 5 ', the second end of the switch tube 5' is connected with the power amplifier 7, when the power amplifier 7 needs to be powered on, the switch tube 5 'is switched on, the power supply signal is transmitted to the power amplifier 7 through the switch tube 5', and when the power amplifier 7 needs to be powered off, the high-voltage drive circuit 1 'controls the switch tube 5' to be switched off. When the phased array radar works, the power-on end of the power amplifier 7 needs to be repeatedly switched between high and low levels, the repeated switching between the high and low levels is realized by controlling the on and off of the switch tube 5 ', but in the process of switching on and off the switch tube 5 ', the second end of the switch tube 5 ' has residual power signals, and the residual power signals can cause the voltage signals output by the power amplifier 7 to be delayed, so that the voltage tailing phenomenon occurs. In order to increase the falling edge speed of the power amplifier 7, a bleed path 4 'is provided in the high voltage driver circuit 1'. The drain path 4 'is connected to the second end of the switch tube 5', and when the switch tube 5 'is turned off, the charges remaining at the second end of the switch tube 5' will enter the drain path 4 'and drain to the ground through the drain path 4'.
Through research of the inventor, the problem of fast modulation is solved by the above arrangement, but due to the introduction of the bleeding path, when different switching tubes are driven, the switching tubes and the bleeding path are simultaneously conducted by different turn-off delays of the switching tubes, so that the driving loss is increased, and based on the above defects, the inventor provides a high-voltage driver, which includes: the device comprises a drive control circuit, a voltage detection circuit, a dead time circuit and a bleeder switch tube;
the drive control circuit is used for acquiring a control signal and generating a first drive signal according to the control signal; the drive control circuit is also used for outputting a first drive signal to the control end of the power switch tube; the first end of the power switch tube is connected to the first power supply output end; a first power supply signal output by the first power supply output end is output to the power amplifier through the second end of the power switch tube;
the voltage detection circuit is electrically connected with the second end of the power switch tube and is used for acquiring a power amplification power-on signal; the voltage detection circuit is used for generating a power amplifier power-down signal when the power amplifier power-up signal is lower than a set threshold value; setting a threshold value smaller than the first power supply signal;
the dead time circuit generates a second driving signal according to the control signal and the power amplifier power-down signal and outputs the second driving signal to the control end of the bleeder switch tube; the bleeder switch tube is used for connecting the second end of the power switch tube and the ground end.
In the embodiment of the invention, by arranging the voltage detection circuit, when the voltage detection circuit detects that the power amplifier power-on signal is lower than the set threshold, namely the power switch tube is controlled to be conducted after being turned off, the problem of power loss caused by the fact that the power switch tube and the bleeder switch tube are conducted simultaneously is effectively avoided; meanwhile, dead time in the dead time circuit does not need to be set too large, the turn-off speed of the power amplifier is guaranteed, and the receiving and transmitting switching speed of the radar is further guaranteed.
The above is the core idea of the present invention, and the technical solution in the embodiment of the present invention will be clearly and completely described below with reference to the accompanying drawings in the embodiment of the present invention. All other embodiments, which can be obtained by a person skilled in the art based on the embodiments of the present invention without any creative work, belong to the protection scope of the present invention.
Fig. 2 is a schematic diagram of a circuit connection structure of a high voltage driver according to an embodiment of the present invention, as shown in fig. 2, the high voltage driver includes: the device comprises a driving control circuit 1, a voltage detection circuit 2, a dead time circuit 3 and a bleeder switch tube 4; the drive control circuit 1 is used for acquiring a control signal and generating a first drive signal according to the control signal; the driving control circuit 1 is further configured to output a first driving signal to a control end of the power switch tube 5; a first end of the power switch tube 5 is connected to a first power output end 6; a first power supply signal output by the first power supply output end 6 is output to the power amplifier 7 through a second end of the power switch tube 5; the voltage detection circuit 2 is electrically connected with the second end of the power switch tube 5 and is used for acquiring a power amplification power-up signal; the voltage detection circuit 2 is used for generating a power amplifier power-down signal when the power amplifier power-up signal is lower than a set threshold value; setting a threshold value smaller than the first power supply signal; the dead time circuit 3 generates a second driving signal according to the control signal and the power amplifier power-down signal and outputs the second driving signal to the control end of the bleeder switch tube 4; the bleeder switch tube 4 is used for connecting the second end of the power switch tube 5 and the ground end.
Specifically, as shown in fig. 2, the high voltage driver provided by the embodiment of the present invention includes: the circuit comprises a drive control circuit 1, a voltage detection circuit 2, a dead time circuit 3 and a bleeder switch tube 4. The driving control circuit 1 is connected to the control end of the power switch tube 5, one end of the driving control circuit 1 is connected to the control end 101 of the high-voltage driver, and is configured to obtain a control signal and generate a corresponding first driving signal according to the control signal, and the other end of the driving control circuit is connected to the power switch tube 5, and outputs the first driving signal to the control end of the power switch tube 5. The control signal is a signal that needs to control the power switch tube 5 to be turned on or off, and the control signal is generally a TTL level or a CMOS level; the first driving signal is a signal generated by the driving control circuit 1 according to the control signal and used for controlling the power switch tube 5 to be turned on or off, and may be a low level or a high level, but is not limited thereto.
Further, a first end of the power switch tube 5 is connected to the first power output end 6; a first power supply signal output by the first power supply output end 6 is output to the power amplifier 7 through the second end of the power switch tube 5, when the power amplifier 7 needs to be powered up, the driving control circuit 1 generates a corresponding first driving signal according to the control signal to enable the power switch tube 5 to be conducted, and at the moment, the first power supply signal is transmitted to the second end of the power switch tube 5 through the first end of the power switch tube 5 and then transmitted to the power amplifier 7 to power up the power amplifier 7; when the power amplifier 7 needs to be powered down, the driving control circuit 1 generates a corresponding first driving signal according to the control signal, so that the power switch tube 5 is turned off, and at this time, the first power supply signal cannot be transmitted to the power amplifier 7.
The embodiment of the present invention is not limited to specific values of the first power signal, and those skilled in the art can set the values according to actual requirements, for example, the values can be a 28V voltage signal, but the present invention is not limited thereto. In addition, the embodiment of the present invention does not limit the specific arrangement manner of the driving control circuit 1, and those skilled in the art can also perform the arrangement according to actual requirements.
Further, in the embodiment of the present invention, the high-voltage driver is provided with a voltage detection circuit 2, a dead time circuit 3, and a bleeder switch tube 4, and the voltage detection circuit 2, the dead time circuit 3, and the bleeder switch tube 4 are sequentially connected to form a bleeder circuit, so as to bleed off charges remaining when the power switch tube 5 is just turned off. For the specific setting mode of the voltage detection circuit 2 and the dead time circuit 3, the embodiment of the invention is not limited, and the setting can be performed by a person skilled in the art according to the actual requirement; the specific type of the bleeder switch tube 4 can also be set according to actual requirements; it will be appreciated that when the bleeder switch tube 4 is of a different type, the arrangement of the respective dead-time circuit 3 may also be adjusted.
It is worth proposing that, different from the prior art, in the embodiment of the present invention, the voltage detection circuit 2 is respectively connected to the second terminal of the power switch tube 5 and the dead time circuit 3, and the voltage detection circuit 2 is used for obtaining the power amplifier power-on signal, that is, the second terminal of the power switch tube 5 is the power amplifier power-on terminal 201, and when the power switch tube 5 is conducted, the power amplifier power-on signal of the power amplifier power-on terminal 201 should be equal to the value of the first power signal output by the second terminal of the power switch tube 5; when the power switch tube 5 is turned off from on, the first power signal at the second end of the power switch tube 5 will gradually decrease, that is, the power amplifier power-up signal acquired by the voltage detection circuit 2 will be lower than the first power signal.
Specifically, the output end of the voltage detection circuit 2 is electrically connected to the input end of the dead time circuit 3, and the output end of the voltage detection circuit 2 is the power discharge end 202.
In the embodiment of the invention, when the acquired power amplifier power-on signal is lower than the set threshold value, the voltage detection circuit 2 generates a power amplifier power-off signal, and the power amplifier power-off signal is used for controlling the conduction of the discharge loop to complete the charge discharge work, thereby not only ensuring the voltage reduction speed of the power amplifier 7 during the power-off process and reducing the turn-off delay of the power switch tube 5, but also effectively avoiding the problem of power loss caused by the simultaneous conduction of the power switch tube 5 and the discharge switch tube 4. The set threshold is a voltage value smaller than the first power signal, and for the specific value of the set threshold, the embodiment of the present invention is not limited, and those skilled in the art can set the threshold according to actual requirements, for example, when the first power signal is 28V, the set threshold may be one of 24 to 26V, but is not limited thereto.
Furthermore, one end of the dead time circuit 3 connected with the voltage detection circuit 2 is also electrically connected with the control end 101 of the high-voltage driver, and can receive a control signal at the same time; the other end of the dead time circuit 3 is connected with the control end of the bleeder switch tube 4. The dead time circuit 3 generates a second driving signal according to the control signal and the power amplifier power-down signal, and transmits the second driving signal to the control end of the bleeder switch tube 4, the bleeder switch tube 4 is turned on or turned off according to the second driving signal, the bleeder switch tube 4 is further connected with the second end and the ground end of the power switch tube 5, and when the bleeder switch tube 4 is turned on, the charge of the second end of the power switch tube 5 is discharged to the ground. The dead time circuit 3 is used for generating a certain time delay to prevent the power switch tube 5 and the bleeder switch tube 4 from being conducted simultaneously.
In the embodiment of the invention, the existence of the voltage detection circuit enables the power amplifier power-on signal to be lower than the set threshold value, namely the bleeder circuit is opened after the power switch tube is turned off, thereby effectively avoiding the problem of power loss caused by the simultaneous conduction of the power switch tube and the bleeder switch tube; meanwhile, dead time in the dead time circuit does not need to be set to be overlarge, the turn-off speed of the power amplifier is guaranteed, and the receiving and transmitting switching speed of the radar is further guaranteed.
When the power amplifier 7 needs to work, that is, the power amplifier 7 needs to be powered on, the control signal is a signal that needs to control the power switch tube 5 to be turned on, the driving control circuit 1 controls the power switch tube 5 to be turned on, the power amplifier power-on end 201, that is, the power amplifier power-on signal of the second end of the power switch tube 5, should be equal to the first power signal, that is, the power amplifier power-on signal obtained by the voltage detection circuit 2 is not lower than the set threshold, and the power amplifier power-down signal generated by the voltage detection circuit 2 should be a signal that controls the bleeder switch tube 4 to be turned off at this time. The dead time circuit 3 can also control the bleeder switch tube 4 to be switched off according to the control signal and the power amplifier power-down signal at the moment.
Further, when the power amplifier 7 is not required to work, that is, when the power amplifier 7 needs to be powered down, the control signal is a signal that needs to control the power switch tube 5 to be turned off, the driving control circuit 1 controls the power switch tube 5 to be turned off, the power amplifier power-up end 201, that is, the power amplifier power-up signal of the second end of the power switch tube 5, is gradually reduced from the first power supply signal, and when the power amplifier power-up signal obtained by the voltage detection circuit 2 is lower than a set threshold, the power amplifier power-down signal generated by the voltage detection circuit 2 is a signal that controls the bleeder switch tube 4 to be turned on. The dead time circuit 3 controls the conduction of the bleeder switch tube 4 according to the control signal and the power amplifier power-down signal at the moment so as to complete the bleeder of the residual charge.
According to the technical scheme provided by the embodiment of the invention, a drive control circuit, a voltage detection circuit, a dead time circuit and a bleeder switch tube are arranged in a high-voltage driver; the control end of the power switch tube is switched on or switched off according to the first driving signal; a first end of the power switch tube is connected to a first power supply output end, and a first power supply signal output by the first power supply output end is output to the power amplifier through a second end of the power switch tube; the voltage detection circuit is electrically connected with the second end of the power switch tube and is used for acquiring a power amplifier power-on signal and generating a power amplifier power-down signal when the power amplifier power-on signal is lower than a set threshold value; the dead time circuit generates a second driving signal according to the control signal and the power-off signal of the power amplifier, and outputs the second driving signal to the control end of the bleeder switch tube so as to control the on/off of the bleeder switch tube. In the technical scheme, the voltage detection circuit is arranged, and when the voltage detection circuit detects that the power amplifier power-on signal is lower than the set threshold value, namely the power switch tube is switched off, the bleeder circuit is controlled to be switched on, so that the problem of power loss caused by simultaneous conduction of the power switch tube and the bleeder switch tube is effectively avoided; meanwhile, dead time in the dead time circuit does not need to be set too large, the turn-off speed of the power amplifier is guaranteed, and the receiving and transmitting switching speed of the radar is further guaranteed.
Optionally, in a possible embodiment, the voltage detection circuit 2 may be specifically configured to:
when the power-on signal of the power amplifier is lower than a set threshold value, the generated power-off signal of the power amplifier is at a high level; and when the power-on signal of the power amplifier is higher than the set threshold value, the generated power-down signal of the power amplifier is at a low level.
Specifically, when the power amplifier 7 needs to be powered up, the control signal is a signal that needs to control the power switch tube 5 to be turned on, for example, the control signal may be a high level signal, the driving control circuit 1 generates a first driving signal according to the high level signal, the first driving signal may be a low level signal, at this time, the power switch tube 5 may be a P-type tube, the control end of the power switch tube 5 receives the low level signal and then is turned on, the first power signal is transmitted to the second end of the power switch tube 5, that is, the power amplifier power-up end 201, and at this time, the power amplifier power-up signal is equal to the first power signal. Because the set threshold is smaller than the first power signal, the power amplifier power-on signal is higher than the set threshold, and then the power amplifier power-off signal generated by the voltage detection circuit 2 can be a low-level signal, the low-level signal is transmitted to the dead time circuit 3, the dead time circuit 3 can also generate a low-level signal to control the bleeder switch tube 4 to be turned off, and the bleeder switch tube 4 is an N-type tube at this time.
Further, when the power amplifier 7 needs to be powered down, the control signal is a signal that needs to control the power switch tube 5 to turn off, for example, it may be a low level signal, the driving control circuit 1 generates a first driving signal according to the low level signal, the first driving signal may also be a high level signal, the control end of the power switch tube 5 receives the high level signal and turns off, the power amplifier power-up signal of the power amplifier power-up end 201, that is, the second end of the power switch tube 5, is gradually reduced from the first power signal, that is, the power amplifier power-up signal obtained by the voltage detection circuit 2 changes from not being lower than the set threshold to being lower than the set threshold, when the power amplifier power-up signal obtained by the voltage detection circuit 2 is lower than the set threshold, the power down signal generated by the voltage detection circuit 2 may be a high level signal, and the high level signal is transmitted to the dead time circuit 3, the dead time circuit 3 can also generate a high level signal and output the high level signal to the bleeder switch tube 4 to control the conduction of the bleeder switch, thereby completing the bleeder of the residual charges.
The above-mentioned high and low levels are two relative numerical signals, which are two high and low levels of the pulse signal, and are not particularly limited to a certain numerical range, and the above-mentioned embodiment is described by taking an example that the control signal is a high level when the power amplifier needs to be powered on.
In the embodiment, when the power amplifier power-on signal of the set voltage detection circuit is lower than the set threshold, the generated power amplifier power-off signal is at a high level to control the conduction of the bleeder switch tube; when the power amplifier power-on signal is higher than the set threshold value, the power amplifier power-off signal that produces is the low level to control the shutoff of bleeder switch pipe, utilize the high of generation, low level signal control to adjust the operating condition of bleeder switch pipe, the mode of setting is simple, and is higher to the control accuracy of bleeder switch pipe, and the switching on and the shutoff of bleeder switch pipe are difficult for taking place the error.
Fig. 3 is a schematic diagram of a connection structure of a dead time circuit according to an embodiment of the present invention, and fig. 3 exemplarily shows an optional arrangement manner of the dead time circuit 3, as shown in fig. 3, the dead time circuit 3 may include: a first schmitt trigger 306, a first inverter 301, a second inverter 302, an and gate 303, a plurality of third inverters 304, and a plurality of fourth inverters 305;
the number of the first inverters 301 is odd; the first inverters 301 are connected in series; the input end of the first inverter in the series inverters acquires a control signal; the output end of the last inverter in the series-connected inverters is electrically connected with the first input end of the and gate 303;
the number of the second inverters 302 is an even number; the second inverters 302 are connected in series; the input end of the first schmitt trigger 306 acquires a power amplifier power-down signal; the output end of the first schmitt trigger 306 is electrically connected with the input end of the first inverter in the second inverters connected in series; the output end of the last inverter in the series of inverters is electrically connected with the second input end of the and gate 303;
a plurality of third inverters 304 are connected in parallel; a plurality of fourth inverters 305 are connected in parallel; the input end of the third inverter 304 is electrically connected to the output end of the and gate 303, and the output end of the third inverter 304 is electrically connected to the input end of the fourth inverter 305; the output end of the fourth inverter 305 is electrically connected to the control end of the bleeder switch tube 4.
Specifically, referring to fig. 2 and 3 in combination, in the embodiment of the present invention, a first schmitt trigger 306, a first inverter 301, a second inverter 302, an and gate 303, a plurality of third inverters 304, and a plurality of fourth inverters 305 may be provided in the dead-time circuit 3. The inverter can invert the phase of an input signal by 180 degrees, plays the same role as a NOT gate, and can realize high-low level conversion. The dead time circuit 3 includes a first inverter 301 therein. The number of the first inverters 301 may be an odd number, i.e., 1, 3, etc. first inverters 301 may be provided, and fig. 3 exemplarily shows 1 first inverter 301, but the actual arrangement is not limited thereto. When the number of the first inverters 301 is 1, the input terminal of the first inverter 301 is electrically connected to the control terminal 101 of the high voltage driver for obtaining the control signal, and the output terminal of the first inverter 301 is connected to the first input terminal of the and gate 303. When the number of the first inverters 301 is 3 or more, a plurality of the first inverters 301 are connected in series, and among the plurality of inverters, in a direction in which the control signal is transmitted in the dead time circuit 3, an input terminal of the first inverter 301 is electrically connected to the control terminal 101 of the high voltage driver for obtaining the control signal, and finally, an output terminal of the first inverter 301 is electrically connected to a first input terminal of the and gate 303. The serial connection among the inverters means that the output end of the previous inverter is connected with the input end of the next inverter.
The number of the first inverters 301 is set to an odd number, and the control signal output from the output terminal of the first inverter 301, i.e., the control signal received at the first input terminal of the and gate 303, is opposite to the control signal received at the input terminal of the first inverter 301. When the input control signal is at a high level, the signal received by the first input terminal of the and gate 303 is at a low level; when the input control signal is low, the first input terminal of the and gate 303 receives a high level.
In this embodiment, the first schmitt trigger 306 may be further disposed in the dead time circuit 3, and the first schmitt trigger 306 is disposed between the output end of the voltage detection circuit 2 and the second inverter 302, that is, the input end of the first schmitt trigger 306 is electrically connected to the output end of the voltage detection circuit 2, that is, the input end of the first schmitt trigger 306 receives the power down signal of the power amplifier, and the output end of the first schmitt trigger 306 is electrically connected to the input end of the first inverter in the second inverter 302. The power amplifier power-down signal is transmitted to the second inverter 302 through the first schmitt trigger 306, and the first schmitt trigger 306 can shape the power amplifier power-down signal to obtain a more regular rectangular pulse power amplifier power-down signal, so that the more regular high or low level signal enters the second inverter 302.
Further, a second inverter 302 is provided in the dead time circuit 3, and the second inverter 302 is provided in parallel with the first inverter 301. The number of the second inverters 302 may be an even number, that is, 2, 4, etc. second inverters 302 may be provided, and fig. 3 exemplarily shows 2 second inverters 302, which is not limited to this. The second inverters 302 are still connected in series, when the number of the second inverters 302 is 2 or more, along the direction of the power amplifier power down signal transmitted in the dead time circuit 3, the input terminal of the first second inverter 302 is electrically connected to the output terminal of the first schmitt trigger 306 to receive the power amplifier power down signal with the comparison rule output by the first schmitt trigger 306, and finally, the output terminal of the second inverter 302 is electrically connected to the second input terminal of the and gate 303.
The number of the second inverters 302 is set to be even, and the power amplifier power down signal output from the output end of the second inverter 302, that is, the power amplifier power down signal received by the second input end of the and gate 303 is the same as the power amplifier power down signal received by the input end of the second inverter 302. When the input power amplifier power-down signal is at a high level, the signal received by the second input end of the and gate 303 is also at a high level; when the input power amplifier power-down signal is at a low level, the signal received by the second input terminal of the and gate 303 is also at a low level.
Further, a plurality of third inverters 304 and a plurality of fourth inverters 305 may be further provided in the dead time circuit 3, the plurality of third inverters 304 being connected in parallel; a plurality of fourth inverters 305 are connected in parallel; the third inverter 304 and the fourth inverter 305 are connected in series. The input ends of the plurality of third inverters 304 are electrically connected to the output end of the and gate 303, and the output ends of the plurality of third inverters 304 are electrically connected to the input ends of the plurality of fourth inverters 305; the output end of the fourth inverter 305 is electrically connected to the control end of the bleeder switch tube 4. The electric signal output by the and gate 303 is transmitted to the bleeder switch tube 4 through the third inverter 304 and the fourth inverter 305, the third inverter 304 and the fourth inverter 305 also play a role of time delay, and in order to make the electric signal received by the control end of the bleeder switch tube 4 identical to the electric signal output by the and gate 303, the third inverter 304 and the fourth inverter 305 are arranged in series. In addition, in order to prevent the delay time from being too long, in the present embodiment, a plurality of third inverters 304 are connected in parallel, and a plurality of fourth inverters 305 are connected in parallel, and it is understood that the larger the number of inverters connected in parallel, the smaller the delay time is; however, the difficulty of circuit arrangement is also increased by too many inverters connected in parallel, in the practical application process, a person skilled in the art may set the number of the third inverter 304 and the fourth inverter 305 according to practical requirements, and the number of the third inverter 304 and the fourth inverter 305 shown in fig. 3 is only an example and does not represent a practical application situation. Of course, in other embodiments, one third inverter 304 and one fourth inverter 305 may be provided.
In the above embodiment and the corresponding drawings, the power switching tube 5 is a P-type tube, and the bleeder switching tube 4 is an N-type tube, which are taken as examples, and the setting manner of the dead time circuit 3 is described, it can be understood that, when the power switching tube 5 and the bleeder switching tube 4 are other types of switching tubes, the setting manner of the dead time circuit 3 also needs to be adjusted accordingly.
The operation of the dead time circuit 3 will be described with an embodiment in which the power switch 5 is a P-type tube and the bleed switch tube 4 is an N-type tube. When the power amplifier 7 needs to be powered up, the control end 101 of the high-voltage driver inputs a high level, a first driving signal with a low level is generated by the driving control circuit 1, the power switch tube 5 is conducted, and the power amplifier 7 is powered up; at this time, the power amplifier power-on signal at the input end of the voltage detection circuit 2 is not less than the set threshold value, and a low level signal is generated; the high-level control signal and the low-level power amplifier power-up signal enter the dead time circuit 3, the high-level control signal is changed into low level through the first phase inverter 301, the low-level power amplifier power-up signal is still low level through the second phase inverter 302, at the moment, the AND gate 303 outputs low level, the low level signal is still low level through the third phase inverter 304 and the fourth phase inverter 305, the low level signal is transmitted to the control end of the bleeder switch tube 4, the bleeder switch tube 4 is turned off, the bleeder circuit is closed, and the first power supply signal continuously powers up the power amplifier 7. When the power amplifier 7 is required to be powered off, the control end 101 of the high-voltage driver inputs a low level, a first driving signal of a high level is generated by the driving control circuit 1, the power switch tube 5 is turned off, and a power supply is no longer provided for the power amplifier 7; at the moment, the power amplifier power-on signal at the input end of the voltage detection circuit 2 is gradually reduced, and when the power amplifier power-on signal is smaller than a set threshold value, a high level signal is generated; the control signal of the low level and the power amplifier of the high level add the electric signal and enter the dead time circuit 3, the control signal of the low level becomes the high level through the first phase inverter 301, the power amplifier of the high level adds the electric signal and still is the high level through the second phase inverter 302, and the AND gate 303 outputs the high level at this moment, the high level signal still is the high level through the third phase inverter 304 and the fourth phase inverter 305, the high level signal is transmitted to the control end of the bleeder switch tube 4, the bleeder switch tube 4 is turned on, the bleeder circuit is opened, carry on the bleeder of the remaining electric charge.
Optionally, in a possible embodiment, the number of the first inverters 301 is M; the number of the second inverters 302 is M + 1; m is greater than or equal to 1.
In the embodiment of the present invention, the number of the second inverters 302 may be one more than the number of the first inverters 301, and as shown in fig. 3, one first inverter 301 and two second inverters 302 may be provided, which is advantageous in reducing the delay of receiving signals at the first input terminal and the second input terminal of the and gate 303 and improving the synchronization of receiving signals at the two input terminals of the and gate 303.
In the above embodiment, when the power amplifier power down signal output by the voltage detection circuit 2 is at a high level, the bleeder switch tube 4 is controlled to be turned on to perform charge bleeding. In other embodiments, the bleeder switch tube 4 may also be controlled to be turned on when the power down signal of the power amplifier is at a low level. Illustratively, the voltage detection circuit 2 may be further configured to: when the power-on signal of the power amplifier is lower than a set threshold value, the generated power-off signal of the power amplifier is at a low level; and when the power-on signal of the power amplifier is higher than the set threshold value, the generated power-down signal of the power amplifier is at a high level.
Specifically, in this embodiment, when the power amplifier power-on signal is lower than the set threshold, that is, when the power amplifier 7 needs to be powered down, the voltage detection circuit 2 may generate a power amplifier power-down signal of a low level, at this time, the control signal may also be of a low level, if the dead time circuit 3 is further provided with the first schmitt trigger 306, the first inverter 301, the second inverter 302, the and gate 303, the third inverter 304, and the fourth inverter 305, and the bleed off switch tube 4 is still an N-type tube, at this time, the number of the first inverters 301 and the number of the second inverters 302 may be set to be odd numbers, the control signal is changed into a high level through the first inverter 301, the power amplifier power-down signal is changed into a high level through the second inverter 302, the and gate 303 outputs a high level, and the control end of the bleed off switch tube 4 receives the high level, and the bleed off switch tube 4 is turned on.
It can be understood that, in the practical application process of the high voltage driver, a person skilled in the art can set the specific form of the power amplifier power-down signal generated by the voltage detection circuit 2 when the power amplifier power-up signal is lower than the set threshold according to the actual requirement, and when the generated power amplifier power-down signal changes, the specific setting mode of the dead time circuit 3 can be correspondingly adjusted, and only after the power amplifier power-up signal is lower than the set threshold, the bleeder switch tube 4 is turned on.
Optionally, fig. 4 is a schematic diagram of a circuit connection structure of another high-voltage driver according to an embodiment of the present invention, as shown in fig. 4, in a possible embodiment, the driving control circuit 1 may further include: the circuit comprises a second Schmitt trigger 102, a first level conversion module 103, a buffer stage circuit 104 and a driving switch tube 105;
the second Schmitt trigger 102 is used for controlling signal filtering to form a first pulse signal; the first level conversion module 103 is electrically connected with the second schmitt trigger 102 and is used for converting the first pulse signal into a second pulse signal;
the buffer stage circuit 104 is electrically connected to the first level shift module and is configured to increase the power of the second pulse signal; the driving switch tube 105 is electrically connected to the buffer stage circuit 104, and is used for outputting the first driving signal to the control end of the power switch tube 5 under the driving of the second pulse signal.
For example, as shown in fig. 4, in an optional setting manner of the driving control circuit 1 provided by the embodiment of the present invention, a second schmitt trigger 102, a first level shifting module 103, a buffer stage circuit 104, and a driving switch tube 105, which are sequentially connected, may be arranged inside the driving control circuit 1. The input end of the second schmitt trigger 102 is connected with the control end 101 of the high-voltage driver and used for receiving the control signal and shaping and filtering the control signal to form a first pulse signal; the output end of the second schmitt trigger 102 is electrically connected with the input end of the first level conversion module 103, the first pulse signal is transmitted to the first level conversion module 103 through the output end of the second schmitt trigger 102, and is boosted and converted into a second pulse signal in the first level conversion module; the output end of the first level conversion module 103 is electrically connected with the input end of the buffer stage circuit 104, and the buffer stage circuit 104 is used for increasing the power of the second pulse signal; the output end of the buffer stage circuit 104 is electrically connected to the control end of the driving switch tube 105, and the driving switch tube 105 is configured to output a first driving signal to the control end of the power switch tube 5 under the driving of the second pulse signal, so as to control the on/off of the power switch tube 5. It can be understood that, if the power switch 5 is a P-type transistor, when it is required to control the power switch 5 to be turned on, the first driving signal output after driving the above-mentioned components in the control circuit 1 should be a low level signal.
Optionally, referring still to fig. 4, in a possible embodiment, the driving control circuit 1 may further include: a third level shift module 106 and a fourth level shift module 107;
the third level conversion module 106 is electrically connected to the second power output terminal 61, and is configured to convert the second power signal into the first level and send the first level to the second schmitt trigger 102 and the first level conversion module 103;
the fourth level conversion module 107 is electrically connected to the second power output terminal 61, and is configured to convert the second power signal into the second level, and send the second level to the buffer circuit 104 and the driving switch 105.
Specifically, as shown in fig. 4, a third level shift module 106 and a fourth level shift module 107 may be disposed in the driving circuit, the third level shift module 106 is electrically connected to the second power output end 61, the second power output end 61 is a power end of the high voltage driver, the third level shift module 106 converts a second power signal of the second power output end 61 into a first level, and sends the first level to the second schmitt trigger 102 and the first level shift module 103, where the first level is a level signal required for normal operation of the second schmitt trigger 102 and the first level shift module 103.
Similarly, the fourth level shift module 107 is electrically connected to the second power output terminal 61, the fourth level shift module 107 converts the second power signal of the second power output terminal 61 into the second level, and sends the second level to the buffer circuit 104 and the driving switch tube 105, and the first level is a level signal required by the buffer circuit 104 and the driving switch tube 105 for normal operation.
In the embodiment of the present invention, a third level shift module 106 and a fourth level shift module 107 are disposed in the driving control circuit 1 to provide power for the second schmitt trigger 102, the first level shift module 103, the buffer stage circuit 104, and the driving switch tube 105. For the specific arrangement of the third level shift module 106 and the fourth level shift module 107, the embodiment of the present invention is not limited, and those skilled in the art can set the arrangement according to actual requirements, for example, the third level shift module 106 can be set as a VDD-to-V5 circuit, so that the control signal is converted into a first pulse signal of 0 to V5 after passing through the second schmitt trigger 102, and the fourth level shift module 107 can be set as a VDD-to-VDD-10V circuit, so that the first pulse signal is converted into a second pulse signal of VDD-10V to VDD, which is of course, the arrangement is only an example, and the actual arrangement is not limited thereto.
Optionally, fig. 5 is a schematic diagram of a connection structure of another dead time circuit provided in the embodiment of the present invention, as shown in fig. 5, in another embodiment, a first capacitor C1, a second capacitor C2, and a third capacitor C3 may be further disposed in the dead time circuit 3, a first end of the first capacitor C1 is electrically connected to the second inverter 302, a second end of the first capacitor C1 is electrically connected to a first end of the second capacitor C2, a first end of the first capacitor C1 is further electrically connected to a first end of the third capacitor C3, a second end of the third capacitor C3 is electrically connected to a first end of the second capacitor C2, and a second end of the second capacitor C2 is grounded. By adjusting the sizes of the first capacitor C1, the second capacitor C2 and the third capacitor C3, the delay time of the dead time circuit 3 can be adjusted, so that the dead time circuit 3 provides a proper delay time to adapt to power switching tubes of different models, and the on-off of the bleed-off circuit is ensured after the power switching tube 5 is turned off; meanwhile, the influence of overlong delay time on the receiving and transmitting speed of the radar can be avoided.
Based on the same inventive concept, an embodiment of the present invention further provides a driving method of a high voltage driver, which is applicable to the high voltage driver provided in any embodiment of the present invention, and fig. 6 is a flowchart of the driving method of the high voltage driver provided in the embodiment of the present invention, as shown in fig. 6, the driving method includes:
s110, when the power amplifier needs to be powered on, the control signal controls the drive control circuit to output a first drive signal to the control end of the power switch tube so as to conduct the power switch tube; the power amplifier power-on signal acquired by the voltage detection circuit is not lower than a set threshold value; the dead time circuit turns off the bleeder switch tube according to a power amplifier power-down signal generated by the control signal voltage detection circuit;
s120, when the power amplifier needs to be powered off, the control signal controls the drive control circuit to output a first drive signal to the control end of the power switch tube so as to turn off the power switch tube to be conducted; the power amplifier power-on signal obtained by the voltage detection circuit is lower than a set threshold value; the dead time circuit conducts the bleeder switch tube according to the power amplifier power-down signal generated by the control signal voltage detection circuit.
According to the driving method of the high-voltage driver provided by the embodiment of the invention, the voltage detection circuit opens the bleeder circuit only after the power amplifier power-on signal is lower than the set threshold value, namely the power switch tube is turned off, so that the problem of power loss caused by the simultaneous conduction of the power switch tube and the bleeder switch tube is effectively avoided; meanwhile, dead time in the dead time circuit does not need to be set too large, the turn-off speed of the power amplifier is guaranteed, and the receiving and transmitting switching speed of the radar is further guaranteed.
Optionally, in a possible embodiment, when the control signal is at a high level, the power switch tube is turned on; when the power-on signal of the power amplifier is lower than a set threshold value, the generated power-off signal of the power amplifier is at a high level;
the driving method of the high-voltage driver specifically comprises the following steps:
when the power amplifier needs to be powered up, the control signal outputs high level to the drive control circuit; the drive control circuit outputs low level to switch on the power switch tube; the power amplifier power-on signal acquired by the voltage detection circuit is not lower than a set threshold value; the power amplifier power-down signal generated by the voltage detection circuit is at a low level, and the dead time circuit outputs the low level to turn off the bleeder switch tube;
when the power amplifier needs to be powered off, the control signal outputs a low level to the drive control circuit; the drive control circuit outputs high level to turn off the power switch tube; the power amplifier power-on signal acquired by the voltage detection circuit is changed from not lower than a set threshold value to lower than the set threshold value; when the power amplifier power-on signal acquired by the voltage detection circuit is lower than a set threshold value, the power amplifier power-down signal generated by the voltage detection circuit is a high level, and the dead time circuit outputs the high level to conduct the bleeder switch tube.
The control method of the high-voltage driver provided in the embodiment of the present invention includes all technical features and corresponding beneficial effects of the high-voltage driver described in any embodiment of the present invention, and details are not repeated here.
It is to be noted that the foregoing is only illustrative of the preferred embodiments of the present invention and the technical principles employed. It will be understood by those skilled in the art that the present invention is not limited to the particular embodiments illustrated herein, but is capable of various obvious changes, rearrangements and substitutions as will now become apparent to those skilled in the art without departing from the scope of the invention. Therefore, although the present invention has been described in greater detail by the above embodiments, the present invention is not limited to the above embodiments, and may include other equivalent embodiments without departing from the spirit of the present invention, and the scope of the present invention is determined by the scope of the appended claims.
Claims (7)
1. A high voltage driver, comprising: the device comprises a drive control circuit, a voltage detection circuit, a dead time circuit and a bleeder switch tube;
the drive control circuit is used for acquiring a control signal and generating a first drive signal according to the control signal; the drive control circuit is also used for outputting the first drive signal to a control end of the power switch tube; the first end of the power switch tube is connected to the first power supply output end; a first power supply signal output by the first power supply output end is output to the power amplifier through the second end of the power switch tube;
the voltage detection circuit is electrically connected with the second end of the power switch tube and is used for acquiring a power amplification power-up signal; the voltage detection circuit is used for generating a power amplifier power-down signal when the power amplifier power-up signal is lower than a set threshold value; the set threshold is less than the first power signal;
the dead time circuit generates a second driving signal according to the control signal and the power amplifier power-down signal and outputs the second driving signal to the control end of the bleeder switch tube; the bleeder switch tube is used for connecting the second end of the power switch tube with the ground end;
wherein the dead-time circuit comprises: the first Schmitt trigger, the first inverter, the second inverter, the AND gate, the third inverters and the fourth inverters;
the number of the first inverters is odd; the first inverters are connected in series; the input end of the first inverter in the inverters connected in series obtains the control signal; the output end of the last inverter in the inverters connected in series is electrically connected with the first input end of the AND gate;
the number of the second inverters is an even number; the second inverters are connected in series; the input end of the first Schmitt trigger acquires the power-down signal of the power amplifier; the output end of the first Schmitt trigger is electrically connected with the input end of the first inverter in the second inverters which are connected in series; the output end of the last inverter in the inverters connected in series is electrically connected with the second input end of the AND gate;
the plurality of third inverters are connected in parallel; the plurality of fourth inverters are connected in parallel; the input end of the third inverter is electrically connected with the output end of the AND gate, and the output end of the third inverter is electrically connected with the input end of the fourth inverter; the output end of the fourth phase inverter is electrically connected with the control end of the bleeder switch tube.
2. The high voltage driver of claim 1, wherein the voltage detection circuit is configured to:
when the power-on signal of the power amplifier is lower than a set threshold value, the generated power-off signal of the power amplifier is at a high level; and when the power-on signal of the power amplifier is higher than a set threshold value, the generated power-down signal of the power amplifier is at a low level.
3. The high voltage driver of claim 1, wherein the number of the first inverters is M; the number of the second inverters is M + 1; m is greater than or equal to 1.
4. The high voltage driver of claim 1, wherein the drive control circuit comprises: the second Schmitt trigger, the first level conversion module, the buffer stage circuit and the driving switch tube;
the second Schmitt trigger is used for filtering the control signal to form a first pulse signal; the first level conversion module is electrically connected with the second Schmitt trigger and is used for converting the first pulse signal into a second pulse signal in a boosting way;
the buffer stage circuit is electrically connected with the first level conversion module and is used for increasing the power of the second pulse signal; the driving switch tube is electrically connected with the buffer stage circuit and used for outputting the first driving signal to the control end of the power switch tube under the driving of the second pulse signal.
5. The high voltage driver of claim 4, wherein the drive control circuit further comprises: a third level conversion module and a fourth level conversion module;
the third level conversion module is electrically connected with the second power supply output end and is used for converting a second power supply signal into a first level and sending the first level to the second Schmitt trigger and the first level conversion module;
and the fourth level conversion module is electrically connected with the output end of the second power supply, and is used for converting the second power supply signal into a second level and sending the second level to the buffer stage circuit and the driving switch tube.
6. A method for driving a high voltage driver, the method being applied to the high voltage driver of any one of claims 1-5, the method comprising:
when the power amplifier needs to be powered up, the control signal controls the drive control circuit to output a first drive signal to the control end of the power switch tube so as to conduct the power switch tube; the power amplifier power-on signal acquired by the voltage detection circuit is not lower than a set threshold value; the dead time circuit turns off a bleeder switch tube according to the control signal and a power amplifier power-down signal generated by the voltage detection circuit;
when the power amplifier needs to be powered off, the control signal controls the drive control circuit to output a first drive signal to the control end of the power switch tube so as to turn off the power switch tube to be conducted; the power amplifier power-on signal obtained by the voltage detection circuit is lower than a set threshold value; and the dead time circuit conducts the bleeder switch tube according to the control signal and the power amplifier power-down signal generated by the voltage detection circuit.
7. The driving method of the high voltage driver according to claim 6, wherein when the control signal is at a high level, the power switch tube is turned on; when the power amplifier power-on signal is lower than a set threshold value, the voltage detection circuit generates a power amplifier power-off signal which is at a high level;
the driving method of the high-voltage driver comprises the following steps:
when the power amplifier needs to be powered up, the control signal outputs high level to the drive control circuit; the drive control circuit outputs low level to switch on the power switch tube; the power amplifier power-on signal acquired by the voltage detection circuit is not lower than a set threshold value; the power amplifier power-down signal generated by the voltage detection circuit is at a low level, and the dead time circuit outputs the low level to turn off the bleeder switch tube;
when the power amplifier needs to be powered off, a control signal outputs a low level to the driving control circuit; the drive control circuit outputs high level to turn off the power switch tube; the power amplifier power-on signal acquired by the voltage detection circuit is changed from not lower than a set threshold value to lower than the set threshold value; when the power amplifier power-on signal acquired by the voltage detection circuit is lower than the set threshold, the power amplifier power-off signal generated by the voltage detection circuit is a high level, and the dead time circuit outputs the high level to conduct the bleeder switch tube.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202210413230.5A CN114513179B (en) | 2022-04-20 | 2022-04-20 | High-voltage driver and driving method thereof |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202210413230.5A CN114513179B (en) | 2022-04-20 | 2022-04-20 | High-voltage driver and driving method thereof |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN114513179A CN114513179A (en) | 2022-05-17 |
| CN114513179B true CN114513179B (en) | 2022-07-19 |
Family
ID=81555046
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202210413230.5A Active CN114513179B (en) | 2022-04-20 | 2022-04-20 | High-voltage driver and driving method thereof |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN114513179B (en) |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN116054356B (en) * | 2023-03-30 | 2023-06-20 | 苏州贝克微电子股份有限公司 | Quick response circuit under high pressure difference |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1667951A (en) * | 2005-03-08 | 2005-09-14 | 南京航空航天大学 | DC solid-state power switch circuit |
| CN107492875A (en) * | 2017-09-11 | 2017-12-19 | 广东美的制冷设备有限公司 | SPM and controller of air conditioner |
| CN112332812A (en) * | 2020-11-03 | 2021-02-05 | 宁波大学 | High-reliability PMOS power switch tube driving circuit |
-
2022
- 2022-04-20 CN CN202210413230.5A patent/CN114513179B/en active Active
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1667951A (en) * | 2005-03-08 | 2005-09-14 | 南京航空航天大学 | DC solid-state power switch circuit |
| CN107492875A (en) * | 2017-09-11 | 2017-12-19 | 广东美的制冷设备有限公司 | SPM and controller of air conditioner |
| CN112332812A (en) * | 2020-11-03 | 2021-02-05 | 宁波大学 | High-reliability PMOS power switch tube driving circuit |
Also Published As
| Publication number | Publication date |
|---|---|
| CN114513179A (en) | 2022-05-17 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN101465643B (en) | Level shift circuit, and driver and display system using the same | |
| CN109710113B (en) | Gate driving unit, gate driving circuit, driving method of gate driving circuit and display device | |
| CN108681772B (en) | Multi-mode neuron circuit and neuron implementation method | |
| US10984740B2 (en) | Display driving device | |
| CN114513179B (en) | High-voltage driver and driving method thereof | |
| CN108667453B (en) | Low-power-consumption driver circuit with adjustable slew rate | |
| CN101630956B (en) | NMOS power switch pipe drive circuit adopting starting strap circuit | |
| CN111338418B (en) | Variable slope discharge driving circuit | |
| CN111243502B (en) | Pixel driving circuit and display device | |
| CN111682399B (en) | Laser transmitter driving circuit, system and high-speed optical communication device | |
| CN108683329B (en) | Real-time detection system for load current | |
| CN108063549B (en) | Isolation control circuit | |
| CN103166623A (en) | Bumper | |
| CN210429268U (en) | LED display screen line scanning driving circuit and chip integrating blanking adjustable function | |
| CN101197125B (en) | Level shift circuit and display using same | |
| US10637454B2 (en) | Pulse-width modulation controller and tri-state voltage generation method | |
| CN101739937B (en) | Gate driving circuit | |
| CN110166071B (en) | Power amplifier tube drain electrode feed circuit | |
| TW200514435A (en) | Signal transmission circuit | |
| US7804339B2 (en) | Serial bus interface circuit | |
| US7477081B2 (en) | Pre-driver circuit and data output circuit using the same | |
| KR102287657B1 (en) | Bias control apparatus and method of power amplifier | |
| CN220440558U (en) | Driving circuit and high-voltage drop-out conversion circuit | |
| CN211128289U (en) | Switch circuit, L ED circuit and car light | |
| CN112886798B (en) | MOS field effect transistor driving circuit and control method |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| GR01 | Patent grant | ||
| GR01 | Patent grant |