CN114491399A - Data processing method and device, terminal equipment and computer readable storage medium - Google Patents
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Abstract
The application is applicable to the technical field of data processing, and provides a data processing method, a data processing device, terminal equipment and a computer readable storage medium, which are applied to a neural network processor, wherein the method comprises the following steps: acquiring an input tensor and a first calculation parameter of an operator to be processed; setting a second calculation parameter of a basic operator of the neural network processor according to the first calculation parameter; calculating the input tensor of the operator to be processed by using the basic operator based on the second calculation parameter to obtain the output tensor of the basic operator; and converting the tensor shape of the output tensor of the basic operator to obtain a target tensor, wherein the tensor shape of the target tensor is consistent with the tensor shape of the output tensor of the to-be-processed operator. By the method, the execution efficiency of the neural network processor on the logic complex operator can be improved.
Description
Technical Field
The present application belongs to the field of data processing technologies, and in particular, to a data processing method, an apparatus, a terminal device, and a computer-readable storage medium.
Background
A neural network processor is a processor for performing computational tasks of a neural network model, such as for performing neural network-based target detection tasks and target tracking tasks. The neural network model comprises a plurality of operators, such as convolution operators, conversion operators, reorg operators and the like. The neural network processor can efficiently execute the calculation tasks of operators with simpler logic, such as convolution operators, conversion operators and the like. However, for operators with more complex logic, such as reorg operators, the neural network processor performs less efficiently.
Disclosure of Invention
The embodiment of the application provides a data processing method, a data processing device, terminal equipment and a computer readable storage medium, which can improve the execution efficiency of a neural network processor on a logic complex operator.
In a first aspect, an embodiment of the present application provides a data processing method, which is applied to a neural network processor, and the method includes:
acquiring an input tensor and a first calculation parameter of an operator to be processed;
setting a second calculation parameter of a basic operator of the neural network processor according to the first calculation parameter, wherein the algorithm complexity of the basic operator is lower than that of the operator to be processed;
calculating the input tensor of the operator to be processed by using the basic operator based on the second calculation parameter to obtain the output tensor of the basic operator;
and converting the tensor shape of the output tensor of the basic operator to obtain a target tensor, wherein the tensor shape of the target tensor is consistent with the tensor shape of the output tensor of the to-be-processed operator.
In the embodiment of the application, a second calculation parameter of the basic operator is set according to a first calculation parameter of the operator to be processed, so that the calculation task of the operator to be processed is executed through the basic operator; and finally, converting the output tensor of the basic operator into a target tensor which is in accordance with the tensor shape of the output tensor of the operator to be processed. In the method, the calculation task corresponding to the operator to be processed is converted into the calculation task consisting of the basic operator, and the algorithm complexity of the basic operator is lower than that of the operator to be processed, so that the method can convert the processing task with complex logic into the processing task with simple logic when the neural network processor executes the image processing task or the audio/video processing task with complex logic, can effectively improve the execution efficiency of the neural network processor, and further effectively improve the processing efficiency of the image processing task or the audio/video processing task.
In a possible implementation manner of the first aspect, the basic operator is a two-dimensional convolution operator, and correspondingly, the second calculation parameter includes a weight matrix, a step size, and a convolution kernel;
the setting of the second calculation parameter of the basic operator of the neural network processor according to the first calculation parameter includes:
generating the weight matrix, wherein a tensor shape of the weight matrix is determined by the first calculation parameter;
setting the size of each dimension of the step size as the first calculation parameter;
setting the size of each dimension of the convolution kernel as the first calculation parameter.
In a possible implementation manner of the first aspect, the generating the weight matrix includes:
calculating a first tensor shape according to the first calculation parameter;
acquiring an identity matrix matched with the first calculation parameter;
converting the identity matrix into a weight matrix conforming to the first sheet size shape.
In a possible implementation manner of the first aspect, the calculating, by using the basic operator based on the second calculation parameter, an input tensor of the operator to be processed to obtain an output tensor of the basic operator includes:
converting the tensor shape of the input tensor of the operator to be processed to obtain a first intermediate tensor, wherein the tensor shape of the first intermediate tensor is matched with the second calculation parameter;
and calculating the first intermediate tensor by using the basic operator based on the second calculation parameter to obtain an output tensor of the basic operator.
In a possible implementation manner of the first aspect, the converting a tensor shape of an input tensor of the to-be-processed operator to obtain a first intermediate tensor includes:
calculating a second tensor shape according to the tensor shape of the input tensor of the operator to be processed and the first calculation parameter;
converting an input tensor of the operator to be processed into the first intermediate tensor conforming to the shape of the second tensor.
In a possible implementation manner of the first aspect, the transforming a tensor shape of an output tensor of the base operator to obtain a target tensor includes:
calculating a third tensor shape according to the tensor shape of the input tensor of the operator to be processed and the first calculation parameter;
converting an output tensor of the base operator into the target tensor that conforms to the shape of the third tensor.
In a second aspect, an embodiment of the present application provides a data processing apparatus, which is applied to a neural network processor, and the apparatus includes:
the acquisition unit is used for acquiring an input tensor and a first calculation parameter of an operator to be processed;
the setting unit is used for setting a second calculation parameter of a basic operator of the neural network processor according to the first calculation parameter;
the calculation unit is used for calculating the input tensor of the operator to be processed by using the basic operator based on the second calculation parameter to obtain the output tensor of the basic operator;
and the conversion unit is used for converting the tensor shape of the output tensor of the basic operator to obtain a target tensor, and the tensor shape of the target tensor is consistent with the tensor shape of the output tensor of the to-be-processed operator.
In a third aspect, an embodiment of the present application provides a terminal device, which includes a memory, a processor, and a computer program stored in the memory and executable on the processor, where the processor implements the data processing method according to any one of the above first aspects when executing the computer program.
In a fourth aspect, an embodiment of the present application provides a computer-readable storage medium, and the embodiment of the present application provides a computer-readable storage medium, where a computer program is stored, where the computer program, when executed by a processor, implements the data processing method according to any one of the foregoing first aspects.
In a fifth aspect, an embodiment of the present application provides a computer program product, which, when run on a terminal device, causes the terminal device to execute the data processing method described in any one of the above first aspects.
It is understood that the beneficial effects of the second aspect to the fifth aspect can be referred to the related description of the first aspect, and are not described herein again.
Drawings
In order to more clearly illustrate the technical solutions in the embodiments of the present application, the drawings needed to be used in the embodiments or the prior art descriptions will be briefly described below, and it is obvious that the drawings in the following description are only some embodiments of the present application, and it is obvious for those skilled in the art to obtain other drawings based on these drawings without inventive exercise.
FIG. 1 is a schematic diagram of a convolution process provided by an embodiment of the present application;
FIG. 2 is a schematic diagram of data conversion provided by an embodiment of the present application;
FIG. 3 is a schematic diagram of data processing of a reorg operator provided in an embodiment of the present application;
FIG. 4 is a schematic flow chart diagram illustrating a data processing method according to an embodiment of the present application;
fig. 5 is a block diagram of a data processing apparatus according to an embodiment of the present application;
fig. 6 is a schematic structural diagram of a terminal device according to an embodiment of the present application.
Detailed Description
In the following description, for purposes of explanation and not limitation, specific details are set forth, such as particular system structures, techniques, etc. in order to provide a thorough understanding of the embodiments of the present application. It will be apparent, however, to one skilled in the art that the present application may be practiced in other embodiments that depart from these specific details. In other instances, detailed descriptions of well-known systems, devices, circuits, and methods are omitted so as not to obscure the description of the present application with unnecessary detail.
It will be understood that the terms "comprises" and/or "comprising," when used in this specification and the appended claims, specify the presence of stated features, integers, steps, operations, elements, and/or components, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and/or groups thereof.
It should also be understood that the term "and/or" as used in this specification and the appended claims refers to and includes any and all possible combinations of one or more of the associated listed items.
As used in this specification and the appended claims, the term "if" may be interpreted contextually as "when", "upon" or "in response to" determining "or" in response to detecting ". Similarly, the phrase "if it is determined" or "if a [ described condition or event ] is detected" may be interpreted contextually to mean "upon determining" or "in response to determining" or "upon detecting [ described condition or event ]" or "in response to detecting [ described condition or event ]".
Furthermore, in the description of the present application and the appended claims, the terms "first," "second," "third," and the like are used for distinguishing between descriptions and not necessarily for describing or implying relative importance.
Reference throughout this specification to "one embodiment" or "some embodiments," or the like, means that a particular feature, structure, or characteristic described in connection with the embodiment is included in one or more embodiments of the present application. Thus, appearances of the phrases "in one embodiment," "in some embodiments," "in other embodiments," or the like, in various places throughout this specification are not necessarily all referring to the same embodiment, but rather "one or more but not all embodiments" unless specifically stated otherwise.
The technical background of the present application is first introduced.
The neural network model comprises a plurality of operators, such as convolution operators, conversion operators, reorg operators and the like. By way of example, the following operators are introduced.
The convolution operator is used to implement the convolution calculation. Referring to fig. 1, a schematic diagram of a convolution process provided in the embodiment of the present application is shown. As shown in fig. 1 (a), the left side is the image to be processed, each square indicates one pixel of the image to be processed, and the numbers on the squares indicate the pixel values. The right side is the convolution kernel, and the numbers in the convolution kernel are the weights. As shown in (b) of fig. 1, convolution is started from the top left start position of the image to be processed, and the convolution kernel is weighted with the pixels inside the shaded frame in the left image, so as to obtain a convolution value. Assuming that the step size of convolution is 1, i.e., the shadow frame is moved to the right by one pixel, as shown in (c) of fig. 1, the pixels in the shadow frame at this time are weighted with the convolution kernel to obtain a second convolution value. By analogy, the final convolution value can be obtained, as shown in (d) of fig. 1. The size of the convolution kernel determines the size of the receptive field, and the size of the step determines the accuracy of the extracted data.
The conversion operator is used for realizing the conversion of the data, such as reshape operator is used for converting the input data into the data of a specific dimension. As shown in fig. 2, the left side is a 3 × 4 matrix a, the target dimension is set to be 2 × 6, and a 2 × 6 matrix B is obtained after reshape conversion. The reshape operator can realize the conversion of data dimensionality and can ensure that original data are unchanged.
The reorg operator is used for realizing rearrangement of data and connecting feature graphs with different levels and different sizes. As shown in fig. 3, the left side is a feature map P of 2W × 2W, and the feature map is input to the reorg operator, whereby 4 feature maps Q of W × W on the right side can be obtained. Each time, 4 elements are taken from the feature map P and respectively allocated to 4 feature maps Q, and the feature maps Q of 4W × W can be obtained by traversing from top to bottom in this way from left to right.
The neural network processor is generally used for performing tasks such as image processing (e.g., target recognition, target tracking, etc.) and audio/video processing (e.g., sound detection, etc.), and some computational tasks with complex logic are often involved in the process of performing the above processing tasks. Such as the reorg operator described above, which is executed by the neural network processor to effect a rearrangement of the image or audiovisual features. The neural network processor can efficiently execute the calculation tasks of operators with simpler logic, such as convolution operators, conversion operators and the like. However, for an operator with complex logic, such as a reorg operator, the execution efficiency of the neural network processor is low, and the processing efficiency of an image processing task or an audio/video processing task is further affected.
In order to solve the above problem, an embodiment of the present application provides a data processing method. Referring to fig. 4, which is a schematic flow chart of a data processing method provided in the embodiment of the present application, by way of example and not limitation, the method may include the following steps:
s401, obtaining an input tensor of an operator to be processed and a first calculation parameter.
In the embodiment of the present application, the to-be-processed operator refers to an operator with a complex computational logic. For convenience of description, the following embodiments take the reorg operator as an example.
The input/output data of each layer in the neural network is generally tensor data, i.e., multidimensional data. In general, the dimensions of the input/output tensor are (N, C, H, W), where N denotes the number of batches (batch) of the two-dimensional data, C denotes the number of channels, H denotes the height of the two-dimensional data, and W denotes the width of the two-dimensional data.
The tensor shape of the input tensor of the reorg operator is (N, C, H, W), and as indicated by the computation logic code of the reorg operator above, the first computation parameter is the step size stride(s).
S402, setting a second calculation parameter of the basic operator of the neural network processor according to the first calculation parameter.
The basic operator in the embodiment of the application refers to an operator with simpler computing logic. It should be noted that, in the embodiment of the present application, one basic operator or a combination of multiple basic operators may be used to implement the computation task of the to-be-processed operator. For the sake of inexpensive description, the following embodiments are described taking convolution operators as examples.
In one embodiment, the base operator is a two-dimensional convolution operator, and accordingly, the second calculation parameters include a weight matrix, a step size, and a convolution kernel.
Accordingly, S402 includes:
generating the weight matrix, wherein a tensor shape of the weight matrix is determined by the first calculation parameter; setting the size of each dimension of the step size as the first calculation parameter; setting the size of each dimension of the convolution kernel as the first calculation parameter.
Optionally, the method for generating the weight matrix is as follows:
calculating a first tensor shape according to the first calculation parameter; acquiring an identity matrix matched with the first calculation parameter; converting the identity matrix into a weight matrix conforming to the first sheet size shape.
Specifically, the first vector shape may be determined according to the formula new _ shape1 ═ (S, 1, S)), where S is a first calculation parameter, i.e., a step size in the reorg operator.
The size of each dimension of the identity matrix is S × S, i.e., the tensor shape is (S × S ). For example, if S is 2, the identity matrix is:
the identity matrix can be transformed by using reshape operator, and the specific transformation principle can be referred to the description in the embodiment of fig. 2. Illustratively, the conversion process is represented by a function Weight _ out ═ resume (Weight _ in, new _ shape ═ (S, 1, S)). The first parameter in the Reshape function is input data, and the second parameter is a tensor shape of output data. In the above function, the input data is the unit matrix weight _ in, and the tensor shape of the output data is the first tensor shape new _ shape1 ═ (S × S,1, S)).
Illustratively, when the convolution kernel is two-dimensional, the size of the convolution kernel is [ S, S ], and correspondingly, the step size is also [ S, S ].
And S403, calculating the input tensor of the operator to be processed by using the basic operator based on the second calculation parameter to obtain the output tensor of the basic operator.
The tensor shape of the input tensor of the pending operator and the tensor shape of the input data of the base operator may be non-uniform. To solve this problem, the tensor shape of the input tensor of the processing operator needs to be converted first.
In one embodiment, S403 includes:
converting the tensor shape of the input tensor of the operator to be processed to obtain a first intermediate tensor, wherein the tensor shape of the first intermediate tensor is matched with the second calculation parameter; and calculating the first intermediate tensor by using the basic operator based on the second calculation parameter to obtain an output tensor of the basic operator.
Optionally, the manner of obtaining the first intermediate tensor is as follows:
calculating a second tensor shape according to the tensor shape of the input tensor of the operator to be processed and the first calculation parameter; converting an input tensor of the operator to be processed into the first intermediate tensor conforming to the shape of the second tensor.
Specifically, the second tensor shape can be determined by the formula new _ shape2 ═ (N,1, C × H/S, W × S). The reshape operator may be used to convert the tensor shape of the input tensor of the to-be-processed operator, and a specific conversion principle may be as described in the embodiment of fig. 2.
Setting the parameters of the basic operator as second calculation parameters. And after the first intermediate tensor is obtained, the first intermediate tensor is used as input data of the basic operator, and the output tensor of the basic operator is obtained after the basic operator calculates.
Illustratively, the calculation of the convolution operator is represented by the function Y ═ Conv2D (X, Weight _ out, strides ═ S, kernel _ size ═ S, S). Wherein X is a first intermediate tensor.
S404, converting the tensor shape of the output tensor of the basic operator to obtain a target tensor, wherein the tensor shape of the target tensor is consistent with the tensor shape of the output tensor of the to-be-processed operator.
The tensor shape of the output tensor of the basic operator is not consistent with the tensor shape of the output tensor of the to-be-processed operator, and in order to obtain a calculation result equivalent to the to-be-processed operator, the tensor shape of the output tensor of the basic operator needs to be converted.
In one embodiment, the way to obtain the target tensor is:
calculating a first tensor shape according to the tensor shape of the input tensor of the operator to be processed and the first calculation parameter; converting an output tensor of the base operator into the target tensor that conforms to the first tensor shape.
Specifically, the third tensor shape may be determined by the formula new _ shape3 ═ (N, C × S, H/S, W/S). Similarly, the reshape operator may be used to convert the tensor shape of the input tensor of the processing operator, and a specific conversion principle can be referred to the description in the embodiment of fig. 2.
In the embodiment of the application, a second calculation parameter of the basic operator is set according to a first calculation parameter of the operator to be processed, so that the calculation task of the operator to be processed is executed through the basic operator; and finally, converting the output tensor of the basic operator into a target tensor which is in accordance with the tensor shape of the output tensor of the operator to be processed. In the method, the calculation task corresponding to the operator to be processed is converted into the calculation task consisting of the basic operator, and the algorithm complexity of the basic operator is lower than that of the operator to be processed, so that the method can convert the processing task with complex logic into the processing task with simple logic when the neural network processor executes the image processing task or the audio/video processing task with complex logic, thereby effectively improving the execution efficiency of the neural network processor and further effectively improving the processing efficiency of the image processing task or the audio/video processing task.
In addition, data cannot be lost in the reorg process, and the original data can be guaranteed to be unchanged, so that the calculation task of the reorg operator is realized by reshape and conv (convolution operator), the execution efficiency of the neural network processor can be improved, and the execution result is guaranteed to be consistent with that of the reorg operator.
It should be understood that, the sequence numbers of the steps in the foregoing embodiments do not imply an execution sequence, and the execution sequence of each process should be determined by functions and internal logic of the process, and should not constitute any limitation to the implementation process of the embodiments of the present application.
Fig. 5 is a block diagram of a data processing apparatus according to an embodiment of the present application, which corresponds to the data processing method described in the foregoing embodiment, and only the relevant portions of the embodiment of the present application are shown for convenience of description.
Referring to fig. 5, the apparatus includes:
the obtaining unit 51 is configured to obtain an input tensor of the operator to be processed and the first calculation parameter.
A setting unit 52, configured to set a second calculation parameter of a basic operator of the neural network processor according to the first calculation parameter, where an algorithm complexity of the basic operator is lower than an algorithm complexity of the operator to be processed.
The calculating unit 53 is configured to calculate, based on the second calculation parameter, the input tensor of the to-be-processed operator by using the basic operator, and obtain the output tensor of the basic operator.
A converting unit 54, configured to convert a tensor shape of the output tensor of the basic operator to obtain a target tensor, where the tensor shape of the target tensor is consistent with the tensor shape of the output tensor of the to-be-processed operator.
Optionally, the basic operator is a two-dimensional convolution operator, and correspondingly, the second calculation parameter includes a weight matrix, a step size, and a convolution kernel.
Correspondingly, the setting unit 52 is further configured to:
generating the weight matrix, wherein a tensor shape of the weight matrix is determined by the first calculation parameter; setting the size of each dimension of the step size as the first calculation parameter; setting the size of each dimension of the convolution kernel as the first calculation parameter.
Optionally, the setting unit 52 is further configured to:
calculating a first tensor shape according to the first calculation parameter;
acquiring an identity matrix matched with the first calculation parameter;
converting the identity matrix into a weight matrix conforming to the first sheet size shape.
Optionally, the calculating unit 53 is further configured to:
converting the tensor shape of the input tensor of the operator to be processed to obtain a first intermediate tensor, wherein the tensor shape of the first intermediate tensor is matched with the second calculation parameter;
and calculating the first intermediate tensor by using the basic operator based on the second calculation parameter to obtain an output tensor of the basic operator.
Optionally, the calculating unit 53 is further configured to:
calculating a second tensor shape according to the tensor shape of the input tensor of the operator to be processed and the first calculation parameter;
converting an input tensor of the operator to be processed into the first intermediate tensor conforming to the shape of the second tensor.
Optionally, the conversion unit 54 is further configured to:
calculating a third tensor shape according to the tensor shape of the input tensor of the operator to be processed and the first calculation parameter;
converting an output tensor of the base operator into the target tensor that conforms to the shape of the third tensor.
It should be noted that, for the information interaction, execution process, and other contents between the above-mentioned devices/units, the specific functions and technical effects thereof are based on the same concept as those of the embodiment of the method of the present application, and specific reference may be made to the part of the embodiment of the method, which is not described herein again.
The data processing apparatus shown in fig. 5 may be a software unit, a hardware unit, or a combination of software and hardware unit built in the existing terminal device, may be integrated into the terminal device as a separate pendant, or may exist as a separate terminal device.
It will be apparent to those skilled in the art that, for convenience and brevity of description, only the above-mentioned division of the functional units and modules is illustrated, and in practical applications, the above-mentioned function distribution may be performed by different functional units and modules according to needs, that is, the internal structure of the apparatus is divided into different functional units or modules to perform all or part of the above-mentioned functions. Each functional unit and module in the embodiments may be integrated in one processing unit, or each unit may exist alone physically, or two or more units are integrated in one unit, and the integrated unit may be implemented in a form of hardware, or in a form of software functional unit. In addition, specific names of the functional units and modules are only for convenience of distinguishing from each other, and are not used for limiting the protection scope of the present application. The specific working processes of the units and modules in the system may refer to the corresponding processes in the foregoing method embodiments, and are not described herein again.
Fig. 6 is a schematic structural diagram of a terminal device according to an embodiment of the present application. As shown in fig. 6, the terminal device 6 of this embodiment includes: at least one processor 60 (only one shown in fig. 6), a memory 61, and a computer program 62 stored in the memory 61 and executable on the at least one processor 60, the processor 60 implementing the steps in any of the various data processing method embodiments described above when executing the computer program 62.
The terminal device can be a desktop computer, a notebook, a palm computer, a cloud server and other computing devices. The terminal device may include, but is not limited to, a processor, a memory. Those skilled in the art will appreciate that fig. 6 is only an example of the terminal device 6, and does not constitute a limitation to the terminal device 6, and may include more or less components than those shown, or combine some components, or different components, such as an input/output device, a network access device, and the like.
The Processor 60 may be a Central Processing Unit (CPU), and the Processor 60 may be other general purpose Processor, a Digital Signal Processor (DSP), an Application Specific Integrated Circuit (ASIC), an off-the-shelf Programmable Gate Array (FPGA) or other Programmable logic device, discrete Gate or transistor logic device, discrete hardware component, etc. A general purpose processor may be a microprocessor or the processor may be any conventional processor or the like.
The memory 61 may in some embodiments be an internal storage unit of the terminal device 6, such as a hard disk or a memory of the terminal device 6. The memory 61 may also be an external storage device of the terminal device 6 in other embodiments, such as a plug-in hard disk, a Smart Media Card (SMC), a Secure Digital (SD) Card, a Flash memory Card (Flash Card), and the like, which are equipped on the terminal device 6. Further, the memory 61 may also include both an internal storage unit and an external storage device of the terminal device 6. The memory 61 is used for storing an operating system, an application program, a BootLoader (BootLoader), data, and other programs, such as program codes of the computer program. The memory 61 may also be used to temporarily store data that has been output or is to be output.
The embodiments of the present application further provide a computer-readable storage medium, where a computer program is stored, and when the computer program is executed by a processor, the computer program implements the steps in the above-mentioned method embodiments.
The embodiments of the present application provide a computer program product, which when running on a terminal device, enables the terminal device to implement the steps in the above method embodiments when executed.
The integrated unit, if implemented in the form of a software functional unit and sold or used as a stand-alone product, may be stored in a computer readable storage medium. Based on such understanding, all or part of the processes in the methods of the embodiments described above can be implemented by a computer program, which can be stored in a computer-readable storage medium and can implement the steps of the embodiments of the methods described above when the computer program is executed by a processor. Wherein the computer program comprises computer program code, which may be in the form of source code, object code, an executable file or some intermediate form, etc. The computer readable medium may include at least: any entity or device capable of carrying computer program code to an apparatus/terminal device, recording medium, computer Memory, Read-Only Memory (ROM), Random-Access Memory (RAM), electrical carrier wave signals, telecommunications signals, and software distribution medium. Such as a usb-disk, a removable hard disk, a magnetic or optical disk, etc. In certain jurisdictions, computer-readable media may not be an electrical carrier signal or a telecommunications signal in accordance with legislative and patent practice.
In the above embodiments, the descriptions of the respective embodiments have respective emphasis, and reference may be made to the related descriptions of other embodiments for parts that are not described or illustrated in a certain embodiment.
Those of ordinary skill in the art will appreciate that the various illustrative elements and algorithm steps described in connection with the embodiments disclosed herein may be implemented as electronic hardware, or combinations of computer software and electronic hardware. Whether such functionality is implemented as hardware or software depends upon the particular application and design constraints imposed on the implementation. Skilled artisans may implement the described functionality in varying ways for each particular application, but such implementation decisions should not be interpreted as causing a departure from the scope of the present application.
In the embodiments provided in the present application, it should be understood that the disclosed apparatus/terminal device and method may be implemented in other ways. For example, the above-described embodiments of the apparatus/terminal device are merely illustrative, and for example, the division of the modules or units is only one logical division, and there may be other divisions when actually implemented, for example, a plurality of units or components may be combined or integrated into another system, or some features may be omitted, or not executed. In addition, the shown or discussed mutual coupling or direct coupling or communication connection may be an indirect coupling or communication connection through some interfaces, devices or units, and may be in an electrical, mechanical or other form.
The units described as separate parts may or may not be physically separate, and parts displayed as units may or may not be physical units, may be located in one place, or may be distributed on a plurality of network units. Some or all of the units can be selected according to actual needs to achieve the purpose of the solution of the embodiment.
The above-mentioned embodiments are only used for illustrating the technical solutions of the present application, and not for limiting the same; although the present application has been described in detail with reference to the foregoing embodiments, it should be understood by those of ordinary skill in the art that: the technical solutions described in the foregoing embodiments may still be modified, or some technical features may be equivalently replaced; such modifications and substitutions do not substantially depart from the spirit and scope of the embodiments of the present application and are intended to be included within the scope of the present application.
Claims (10)
1. A data processing method applied to a neural network processor, the method comprising:
acquiring an input tensor and a first calculation parameter of an operator to be processed;
setting a second calculation parameter of a basic operator of the neural network processor according to the first calculation parameter, wherein the algorithm complexity of the basic operator is lower than that of the operator to be processed;
calculating the input tensor of the operator to be processed by using the basic operator based on the second calculation parameter to obtain the output tensor of the basic operator;
and converting the tensor shape of the output tensor of the basic operator to obtain a target tensor, wherein the tensor shape of the target tensor is consistent with the tensor shape of the output tensor of the to-be-processed operator.
2. The data processing method of claim 1, wherein the base operator is a two-dimensional convolution operator, and accordingly, the second calculation parameters include a weight matrix, a step size, and a convolution kernel;
the setting of the second calculation parameter of the basic operator of the neural network processor according to the first calculation parameter comprises:
generating the weight matrix, wherein a tensor shape of the weight matrix is determined by the first calculation parameter;
setting the size of each dimension of the step size as the first calculation parameter;
setting the size of each dimension of the convolution kernel as the first calculation parameter.
3. The data processing method of claim 2, wherein the generating the weight matrix comprises:
calculating a first tensor shape according to the first calculation parameter;
acquiring an identity matrix matched with the first calculation parameter;
converting the identity matrix into a weight matrix conforming to the first scalar shape.
4. The data processing method as claimed in claim 1, wherein said calculating an input tensor of the operator to be processed using the base operator based on the second calculation parameter to obtain an output tensor of the base operator comprises:
converting the tensor shape of the input tensor of the operator to be processed to obtain a first intermediate tensor, wherein the tensor shape of the first intermediate tensor is matched with the second calculation parameter;
and calculating the first intermediate tensor by using the basic operator based on the second calculation parameter to obtain an output tensor of the basic operator.
5. The data processing method of claim 4, wherein the transforming the tensor shape of the input tensor of the to-be-processed operator to obtain a first intermediate tensor comprises:
calculating a second tensor shape according to the tensor shape of the input tensor of the operator to be processed and the first calculation parameter;
converting an input tensor of the operator to be processed into the first intermediate tensor conforming to the shape of the second tensor.
6. The data processing method of claim 1, wherein the converting a tensor shape of an output tensor of the base operator to obtain a target tensor comprises:
calculating a third tensor shape according to the tensor shape of the input tensor of the operator to be processed and the first calculation parameter;
converting an output tensor of the base operator into the target tensor that conforms to the shape of the third tensor.
7. A data processing apparatus, for application to a neural network processor, the apparatus comprising:
the acquisition unit is used for acquiring an input tensor and a first calculation parameter of an operator to be processed;
the setting unit is used for setting a second calculation parameter of a basic operator of the neural network processor according to the first calculation parameter, wherein the algorithm complexity of the basic operator is lower than that of the operator to be processed;
the calculation unit is used for calculating the input tensor of the operator to be processed by using the basic operator based on the second calculation parameter to obtain the output tensor of the basic operator;
and the conversion unit is used for converting the tensor shape of the output tensor of the basic operator to obtain a target tensor, and the tensor shape of the target tensor is consistent with the tensor shape of the output tensor of the to-be-processed operator.
8. The data processing apparatus of claim 7, wherein the base operator is a two-dimensional convolution operator, and accordingly, the second calculation parameters include a weight matrix, a step size, and a convolution kernel;
the setting unit is further configured to:
generating the weight matrix, wherein a tensor shape of the weight matrix is determined by the first calculation parameter;
setting the size of each dimension of the step size as the first calculation parameter;
setting the size of each dimension of the convolution kernel as the first calculation parameter.
9. A terminal device comprising a memory, a processor and a computer program stored in the memory and executable on the processor, characterized in that the processor implements the method according to any of claims 1 to 6 when executing the computer program.
10. A computer-readable storage medium, in which a computer program is stored which, when being executed by a processor, carries out the method according to any one of claims 1 to 6.
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CN114997397A (en) * | 2022-08-01 | 2022-09-02 | 北京健康有益科技有限公司 | Model conversion method, device, terminal equipment and storage medium |
WO2023125838A1 (en) * | 2021-12-30 | 2023-07-06 | 深圳云天励飞技术股份有限公司 | Data processing method and apparatus, terminal device, and computer readable storage medium |
CN116821019A (en) * | 2023-08-30 | 2023-09-29 | 腾讯科技(深圳)有限公司 | Data processing method, computer equipment and chip |
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CN110263913A (en) * | 2019-05-23 | 2019-09-20 | 深圳先进技术研究院 | A kind of deep neural network compression method and relevant device |
WO2021114143A1 (en) * | 2019-12-11 | 2021-06-17 | 中国科学院深圳先进技术研究院 | Image reconstruction method and apparatus, terminal device and storage medium |
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CN113468469A (en) * | 2021-06-02 | 2021-10-01 | 北京迈格威科技有限公司 | Convolution processing method and device of feature graph executed by computer and electronic equipment |
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CN114997397A (en) * | 2022-08-01 | 2022-09-02 | 北京健康有益科技有限公司 | Model conversion method, device, terminal equipment and storage medium |
CN116821019A (en) * | 2023-08-30 | 2023-09-29 | 腾讯科技(深圳)有限公司 | Data processing method, computer equipment and chip |
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