CN114461280B - BMC double-mirror image brushing method and related device - Google Patents

BMC double-mirror image brushing method and related device Download PDF

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CN114461280B
CN114461280B CN202111632451.3A CN202111632451A CN114461280B CN 114461280 B CN114461280 B CN 114461280B CN 202111632451 A CN202111632451 A CN 202111632451A CN 114461280 B CN114461280 B CN 114461280B
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refreshing
flash
mirror image
main processor
main
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CN114461280A (en
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杨磊
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Inspur Electronic Information Industry Co Ltd
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    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/44Arrangements for executing specific programs
    • G06F9/4401Bootstrapping

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Abstract

The application discloses a BMC double mirror image refreshing method, which comprises the following steps: after receiving the refreshing trigger message sent by the main processor, calling an image file from the shared memory; the mirror image file is written into the main FLASH through the SPI interface; reporting the brushing progress of the main FLASH to the main processor so that the main processor restarts the system after the main FLASH is completely brushed; and after receiving the refreshing trigger message sent by the main processor after restarting the system, refreshing the mirror image file into the standby FLASH through the SPI interface. The method effectively solves the problems of high occupation of processor resources, slow event processing response and the like in the traditional BMC double-mirror image refreshing process, can greatly improve the data interaction, man-machine real-time response, task processing and other aspects of the BMC double-mirror image refreshing process, and enhances the user experience. The application also discloses a BMC double-mirror image brushing device, equipment and a computer readable storage medium, which have the technical effects.

Description

BMC double-mirror image brushing method and related device
Technical Field
The application relates to the technical field of servers, in particular to a BMC double-mirror image brushing method; also relates to a BMC double-mirror image brushing device, equipment and a computer readable storage medium.
Background
The BMC (Baseboard Management Controller) reads the mirror image from the flash to the memory to run when the baseboard management controller is started. The current mainstream scene adopts a double flash backup scheme, namely mirror images are placed in two flash chips, and the commonly used flash is the main flash, and the other is the standby flash. By adopting the scheme, the failure of the single flash due to the abnormal reasons can be avoided. The switching of different flash can be realized through the power-on self-test, so that the reliability, stability, firmware selectivity and the like of the running of the BMC are greatly improved;
the dual-mirror image refreshing flow is that the BMC refreshes the main flash firstly, then starts the whole system (the mirror image is loaded into the memory to start the system through the processor), and after the system is started, simultaneously calls the processor core to refresh the standby flash in the background, and the mode of restarting the system to refresh the standby flash in the background is 'roller ack'.
Currently, a single core A7 is adopted to complete the whole rollback flow. And starting the system in the roller ack process, and enabling the single core A7 to call the process background to refresh the standby flash after the system environment is built. The following technical defects exist in the completion of the whole rollback process by adopting a single core A7: 1. the rollback process is slow; 2. after the system is started, other modules are slowly loaded and respond due to high resource occupation of the rollback process; 3. and the modules such as serial ports, IPMI commands, external information interaction and the like respond slowly about 5 minutes in the rollback process. The polling mechanism and task scheduling can enable the BMC to enter a loading process behind the system to synchronously carry out roller ack; because the same core is used and the temporary resources are more, the BMC cannot respond to external events in real time in the period, so that great delay is generated, and the emergency response under special conditions is influenced. The sensor module for part can operate after being started, but the real-time performance and accuracy cannot be guaranteed in part monitoring of the main board of the part server because the sensor module is still in the roller back after being started for a period of time, and the function use and the user use experience of the part server are affected in the process.
In view of this, how to solve the above technical defects has become a technical problem to be solved by those skilled in the art.
Disclosure of Invention
The purpose of the application is to provide a BMC double-mirror image refreshing method, which can improve the speed of various aspects such as data interaction, man-machine real-time response, task processing and the like in the BMC double-mirror image refreshing process, further release the performance of a processor and enhance the user experience. Another object of the present application is to provide a BMC dual-mirror image writing device, apparatus and computer readable storage medium, which have the above technical effects.
In order to solve the above technical problems, the present application provides a BMC dual mirror image writing method, including:
after receiving the refreshing trigger message sent by the main processor, calling an image file from the shared memory;
the mirror image file is written into the main FLASH through an SPI interface;
reporting the brushing progress of the main FLASH to the main processor so that the main processor restarts the system after the main FLASH brushing is completed;
and after receiving the refreshing trigger message sent by the main processor after restarting the system, refreshing the mirror image file into the standby FLASH through the SPI interface.
Optionally, the receiving the refresh trigger message sent by the main processor includes:
and receiving the brushing interrupt sent by the main processor.
Optionally, the reporting the progress of the writing to the main processor includes:
and reporting the brushing progress to the main processor in an interrupt mode.
Optionally, before the writing the image file into the main FLASH through the SPI interface, the method further includes:
and applying the use permission of the SPI interface to the main processor, so that after the use permission of the SPI interface is obtained, the mirror image file is written into the main FLASH through the SPI interface.
Optionally, the method further comprises:
and reporting the brushing progress of the standby FLASH to the main processor.
For solving the technical problem, the application also provides a BMC double-mirror image brushing device, which comprises:
the image file calling module is used for calling an image file from the shared memory after receiving the refreshing trigger message sent by the main processor;
the first mirror image file refreshing module is used for refreshing the mirror image file into the main FLASH through the SPI interface;
the main FLASH refreshing progress reporting module is used for reporting the refreshing progress of the main FLASH to the main processor so that the main processor restarts the system after the main FLASH refreshing is completed;
and the second mirror image file refreshing module is used for receiving a refreshing trigger message sent by the main processor after restarting the system, and refreshing the mirror image file into the standby FLASH through the SPI interface.
Optionally, the method further comprises:
the application module of the using authority is used for applying the using authority of the SPI interface to the main processor, so that after the using authority of the SPI interface is obtained, the main FLASH writing progress reporting module brushes the mirror image file into the main FLASH through the SPI interface.
Optionally, the method further comprises:
and the standby FLASH flashing progress reporting module is used for reporting the flashing progress of the standby FLASH to the main processor.
In order to solve the above technical problem, the present application further provides a BMC dual mirror image writing device, including:
a memory for storing a computer program;
a processor, configured to implement the steps of the BMC dual mirror swiping method according to any of the above claims when executing the computer program.
To solve the above technical problem, the present application further provides a computer readable storage medium, where a computer program is stored, where the computer program, when executed by a processor, implements the steps of the BMC dual mirror flashing method according to any one of the above.
The BMC double mirror image refreshing method provided by the application comprises the following steps: after receiving the refreshing trigger message sent by the main processor, calling an image file from the shared memory; the mirror image file is written into the main FLASH through an SPI interface; reporting the brushing progress of the main FLASH to the main processor so that the main processor restarts the system after the main FLASH brushing is completed; and after receiving the refreshing trigger message sent by the main processor after restarting the system, refreshing the mirror image file into the standby FLASH through the SPI interface.
Compared with the traditional technical scheme that the BMC double-mirror image refreshing is carried out by the main processor, the BMC double-mirror image refreshing method provided by the application is not in charge of the BMC to refresh the mirror image file to the FLASH, and other processors finish the operation of refreshing the mirror image file to the FLASH, so that the main processor has more resources to process other events, a series of problems of high occupation of processor resources, slow event processing response, process redundancy, partial real-time data loss, poor use experience and the like in the traditional BMC double-mirror image refreshing process are effectively solved, the data interaction, man-machine real-time response, task processing and other aspects of the BMC double-mirror image refreshing process can be greatly improved, the processor performance is further released, and the user experience is enhanced.
The BMC double-mirror image refreshing device, the equipment and the computer readable storage medium have the technical effects.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present application, the following description will briefly explain the drawings needed in the prior art and embodiments, and it is obvious that the drawings in the following description are only some embodiments of the present application, and that other drawings can be obtained according to these drawings without inventive effort for a person skilled in the art.
Fig. 1 is a schematic flow chart of a BMC dual mirror image refreshing method according to an embodiment of the present application;
fig. 2 is a schematic diagram of a BMC dual-mirror image brushing device according to an embodiment of the present application;
fig. 3 is a schematic diagram of a BMC dual mirror brush device according to an embodiment of the present application.
Detailed Description
The core of the application is to provide a BMC double-mirror image refreshing method, which can improve the speed of data interaction, man-machine real-time response, task processing and other aspects in the BMC double-mirror image refreshing process, further release the performance of a processor and enhance the user experience. Another core of the present application is to provide a BMC dual-mirror image writing device, apparatus and computer readable storage medium, which all have the above technical effects.
For the purposes of making the objects, technical solutions and advantages of the embodiments of the present application more clear, the technical solutions of the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application, and it is apparent that the described embodiments are some embodiments of the present application, but not all embodiments. All other embodiments, which can be made by one of ordinary skill in the art without undue burden from the present disclosure, are within the scope of the present disclosure.
Referring to fig. 1, fig. 1 is a flowchart of a BMC dual mirror refreshing method according to an embodiment of the present application, and referring to fig. 1, the method mainly includes:
s101: after receiving the refreshing trigger message sent by the main processor, calling an image file from the shared memory;
the BMC double-mirror-image refreshing method provided by the embodiment can be realized based on an expected 2600 chip. The BMC chip is of a dual-core Cortex-A7+ single-core Cortex-M3 architecture. A7 is used as a main processor for main performance calculation, task scheduling, interface response and the like, and M3 is used as a coprocessor for assisting in processing task matters issued by A7. In this embodiment, the coprocessor replaces the main processor to complete the operation of brushing the mirror image file to the main FLASH and the standby FLASH. The main processor releases the hardware resource control right required by the flushing, including the memory area where the image file exists and the SPI (Serial Peripheral Interface ) interface required by the flushing.
When the mirror image file needs to be written into the main FLASH, the main processor transmits a writing trigger message to the coprocessor so as to trigger the coprocessor to execute the operation of writing the mirror image file. After the coprocessor receives the refreshing trigger message sent by the main processor, the coprocessor firstly calls the mirror image file from the shared memory. The image file has been uploaded to the shared memory before this.
In some embodiments, the receiving the flush trigger message sent by the host processor includes: and receiving the brushing interrupt sent by the main processor.
In this embodiment, the event trigger mechanism between the main processor and the coprocessor is an interrupt, and the main processor triggers the coprocessor to execute the operation of brushing the image file by sending a brushing interrupt to the coprocessor. Because the interrupt mode is adopted between the main processor and the coprocessor, when the coprocessor receives the brushing interrupt sent by the main processor, the coprocessor immediately starts the flow of brushing the mirror image file, thereby improving the response rate.
S102: the mirror image file is written into the main FLASH through an SPI interface;
after the coprocessor calls the mirror image file from the shared memory, the mirror image file is further written into the main FLASH through the SPI interface.
In some embodiments, before the writing the image file into the main FLASH through the SPI interface, the method further includes: and applying the use permission of the SPI interface to the main processor, so that after the use permission of the SPI interface is obtained, the mirror image file is written into the main FLASH through the SPI interface.
The coprocessor may apply for multiplexing a portion of GPIO (General purpose input/output) ports of the SPI interface to the host processor after receiving the flush interrupt sent by the host processor. And further, after obtaining the use authority of the SPI interface, the mirror image file is written into the main FLASH through the SPI interface.
The coprocessor can apply multiplexing SPI interface to the main processor in an interrupt triggering mode.
S103: reporting the brushing progress of the main FLASH to the main processor so that the main processor restarts the system after the main FLASH brushing is completed;
the main processor generates a monitoring process aiming at the mirror image file refreshing event, the coprocessor firstly refreshes the mirror image file in the main FLASH and secondly reports the refreshing progress of the main FLASH to the main processor, so that the main processor can master the refreshing progress of the main FLASH, and when the main FLASH refreshing is completed, the main processor restarts the system.
In some embodiments, the manner of reporting the brushing schedule to the main processor may be: and reporting the brushing progress to the main processor in an interrupt mode.
S104: and after receiving the refreshing trigger message sent by the main processor after restarting the system, refreshing the mirror image file into the standby FLASH through the SPI interface.
After restarting the system, the main processor sends a refreshing trigger message to the coprocessor again, and at the moment, after the coprocessor receives the refreshing trigger message, the mirror image file is refreshed in the standby FLASH through the SPI interface.
In the process of refreshing the mirror image file into the standby FLASH, the coprocessor can call the mirror image file from the shared memory again, apply the use authority of the SPI interface to the main processor again, and refresh the mirror image file into the standby FLASH through the SPI interface after obtaining the use authority of the SPI interface.
Furthermore, in some embodiments, further comprising: and reporting the brushing progress of the standby FLASH to the main processor.
Specifically, after receiving the refresh trigger information sent by the main processor after restarting the system, the coprocessor firstly refreshes the mirror image file in the standby FLASH, and secondly reports the refresh progress of the standby FLASH to the main processor so that the main processor can master the refresh progress of the standby FLASH.
After restarting the system, the main processor can trigger the coprocessor to brush the mirror image file into the standby FLASH in an interrupt mode. After restarting the system, the main processor sends a brushing interrupt to the coprocessor so as to trigger the coprocessor to brush the mirror image file into the standby FLASH.
The main processor can further synchronize the writing progress to the web end, the serial port end and the like in real time for display on the basis of receiving the writing progress reported by the coprocessor.
In summary, the BMC double mirror image refreshing method provided by the application comprises the following steps: after receiving the refreshing trigger message sent by the main processor, calling an image file from the shared memory; the mirror image file is written into the main FLASH through an SPI interface; reporting the brushing progress of the main FLASH to the main processor so that the main processor restarts the system after the main FLASH brushing is completed; and after receiving the refreshing trigger message sent by the main processor after restarting the system, refreshing the mirror image file into the standby FLASH through the SPI interface. Compared with the traditional technical scheme that the BMC double-mirror image refreshing is carried out by the main processor, the BMC double-mirror image refreshing method provided by the application is not in charge of the BMC to refresh the mirror image file to the FLASH, and other processors finish the operation of refreshing the mirror image file to the FLASH, so that the main processor has more resources to process other events, a series of problems of high occupation of processor resources, slow event processing response, process redundancy, partial real-time data loss, poor use experience and the like in the traditional BMC double-mirror image refreshing process are effectively solved, the data interaction, man-machine real-time response, task processing and other aspects of the BMC double-mirror image refreshing process can be greatly improved, the processor performance is further released, and the user experience is enhanced.
The application also provides a BMC double-mirror image brushing device, and the device can be referred to in a mutual correspondence manner with the method. Referring to fig. 2, fig. 2 is a schematic diagram of a BMC dual-mirror image brushing device according to an embodiment of the present application, and in combination with fig. 2, the device includes:
the image file calling module 10 is used for calling an image file from the shared memory after receiving the refreshing trigger message sent by the main processor;
the first mirror image file refreshing module 20 is used for refreshing the mirror image file into the main FLASH through the SPI interface;
the main FLASH flashing progress reporting module 30 is configured to report the flashing progress of the main FLASH to the main processor, so that the main processor restarts the system after the main FLASH flashing is completed;
and the second image file refreshing module 40 is configured to receive a refreshing trigger message sent by the main processor after restarting the system, and then refresh the image file into the standby FLASH through the SPI interface.
Specifically, when the image file needs to be written into the main FLASH, the main processor issues a writing trigger message. After receiving the refresh trigger message sent by the main processor, the image file calling module 10 calls the image file from the shared memory. After the image file calling module 10 calls the image file from the shared memory, on one hand, the first image file refreshing module 20 uses the copper drum SPI interface to refresh the image file into the main FLASH, and on the other hand, the main FLASH refreshing progress reporting module 30 reports the refreshing progress of the main FLASH to the main processor, so that the main processor can master the refreshing progress of the main FLASH, and when the main FLASH refreshing is completed, the main processor restarts the system. After the system is restarted, the main processor sends the refreshing trigger message again, and at this time, after receiving the refreshing trigger message, the second mirror image file refreshing module 40 refreshes the mirror image file in the standby FLASH through the SPI interface.
Based on the above embodiment, as a specific implementation manner, the image file retrieving module 10 receives a brushing interrupt sent by the main processor.
Specifically, in this embodiment, the main processor triggers the image file refreshing operation by sending a refreshing interrupt. Because of the interrupt mode, when the image file retrieving module 10 receives the update interrupt sent by the host processor, the image file retrieving module 10 and the like immediately start the flow of updating the image file, thereby improving the response rate.
On the basis of the foregoing embodiment, as a specific implementation manner, the main FLASH writing progress reporting module 30 reports the writing progress to the main processor in an interrupt manner.
On the basis of the above embodiment, as a specific implementation manner, the method further includes:
the application module of the using authority is used for applying the using authority of the SPI interface to the main processor, so that after the using authority of the SPI interface is obtained, the main FLASH writing progress reporting module brushes the mirror image file into the main FLASH through the SPI interface.
Specifically, after receiving the refresh interrupt sent by the host processor, the image file retrieving module 10 applies the host processor for multiplexing a portion of GPIO ports of the SPI interface by the first image file refresh module 20. And further, after obtaining the use authority of the SPI interface, the first image file brushing module 20 brushes the image file into the main FLASH through the SPI interface.
The first image file writing module 20 may apply for multiplexing the SPI interface to the main processor in an interrupt trigger manner.
On the basis of the above embodiment, as a specific implementation manner, the method further includes:
and the standby FLASH flashing progress reporting module is used for reporting the flashing progress of the standby FLASH to the main processor.
Specifically, the main processor sends the refreshing trigger information after restarting the system, on one hand, the second mirror image file refreshing module 20 refreshes the mirror image file in the standby FLASH, and on the other hand, the standby FLASH refreshing progress reporting module reports the refreshing progress of the standby FLASH to the main processor, so that the main processor can master the refreshing progress of the standby FLASH.
The main processor can further synchronize the writing progress to the web end, the serial port end and the like in real time for display on the basis of receiving the writing progress reported by the coprocessor.
According to the BMC double-mirror image refreshing device, the main processor is not responsible for BMC to refresh the mirror image file to the FLASH, and other processors finish the operation of refreshing the mirror image file to the FLASH, so that the main processor has more resources to process other events, a series of problems that in a traditional BMC double-mirror image refreshing process, the processor resources occupy high, the event processing response is slow, the process redundancy is carried out, part of real-time data is lost, the use experience is poor and the like are effectively solved, the data interaction rate, the man-machine real-time response rate, the task processing rate and the like in the BMC double-mirror image refreshing process can be greatly improved, the processor performance is further released, and the user experience is enhanced.
The application also provides a BMC double mirror image brushing device, and referring to FIG. 3, the device comprises a memory 1 and a processor 2.
A memory 1 for storing a computer program;
a processor 2 for executing a computer program to perform the steps of:
after receiving the refreshing trigger message sent by the main processor, calling an image file from the shared memory; the mirror image file is written into the main FLASH through an SPI interface; reporting the brushing progress of the main FLASH to the main processor so that the main processor restarts the system after the main FLASH brushing is completed; and after receiving the refreshing trigger message sent by the main processor after restarting the system, refreshing the mirror image file into the standby FLASH through the SPI interface.
For the description of the apparatus provided in the present application, reference is made to the above method embodiments, and the description is omitted herein.
The present application also provides a computer readable storage medium having a computer program stored thereon, which when executed by a processor, performs the steps of:
after receiving the refreshing trigger message sent by the main processor, calling an image file from the shared memory; the mirror image file is written into the main FLASH through an SPI interface; reporting the brushing progress of the main FLASH to the main processor so that the main processor restarts the system after the main FLASH brushing is completed; and after receiving the refreshing trigger message sent by the main processor after restarting the system, refreshing the mirror image file into the standby FLASH through the SPI interface.
The computer readable storage medium may include: a U-disk, a removable hard disk, a Read-Only Memory (ROM), a random access Memory (Random Access Memory, RAM), a magnetic disk, or an optical disk, or other various media capable of storing program codes.
For the description of the computer-readable storage medium provided in the present application, reference is made to the above method embodiments, and the description is omitted herein.
In the description, each embodiment is described in a progressive manner, and each embodiment is mainly described by the differences from other embodiments, so that the same similar parts among the embodiments are mutually referred. For the apparatus, device and computer readable storage medium of the embodiment disclosure, since it corresponds to the method of the embodiment disclosure, the description is relatively simple, and the relevant points refer to the description of the method section.
Those of skill would further appreciate that the various illustrative elements and algorithm steps described in connection with the embodiments disclosed herein may be implemented as electronic hardware, computer software, or combinations of both, and that the various illustrative elements and steps are described above generally in terms of functionality in order to clearly illustrate the interchangeability of hardware and software. Whether such functionality is implemented as hardware or software depends upon the particular application and design constraints imposed on the solution. Skilled artisans may implement the described functionality in varying ways for each particular application, but such implementation decisions should not be interpreted as causing a departure from the scope of the present application.
The steps of a method or algorithm described in connection with the embodiments disclosed herein may be embodied directly in hardware, in a software module executed by a processor, or in a combination of the two. The software modules may be disposed in Random Access Memory (RAM), memory, read Only Memory (ROM), electrically programmable ROM, electrically erasable programmable ROM, registers, hard disk, a removable disk, a CD-ROM, or any other form of storage medium known in the art.
The method, the device, the equipment and the computer readable storage medium for BMC double mirror image refreshing provided by the application are described in detail above. Specific examples are set forth herein to illustrate the principles and embodiments of the present application, and the description of the examples above is only intended to assist in understanding the methods of the present application and their core ideas. It should be noted that it would be obvious to those skilled in the art that various improvements and modifications can be made to the present application without departing from the principles of the present application, and such improvements and modifications fall within the scope of the claims of the present application.

Claims (8)

1. A BMC dual-image swiping method, applied to a coprocessor, comprising:
after receiving the refreshing trigger message sent by the main processor, calling an image file from the shared memory;
the mirror image file is written into the main FLASH through an SPI interface;
reporting the brushing progress of the main FLASH to the main processor so that the main processor restarts the system after the main FLASH brushing is completed;
after receiving a refreshing trigger message sent by the main processor after restarting the system, refreshing the mirror image file into a standby FLASH through the SPI interface;
the receiving the refresh trigger message sent by the main processor includes:
receiving a brushing interrupt sent by the main processor;
the reporting of the progress of the brushing to the main processor comprises:
and reporting the brushing progress to the main processor in an interrupt mode.
2. The method for brushing the dual mirror image of the BMC according to claim 1, wherein before brushing the mirror image file into the main FLASH through the SPI interface, further comprises:
and applying the use permission of the SPI interface to the main processor, so that after the use permission of the SPI interface is obtained, the mirror image file is written into the main FLASH through the SPI interface.
3. The BMC dual mirror swiping method of claim 1, further comprising:
and reporting the brushing progress of the standby FLASH to the main processor.
4. A BMC dual-image swiping device applied to a coprocessor, comprising:
the image file calling module is used for calling an image file from the shared memory after receiving the refreshing trigger message sent by the main processor;
the first mirror image file refreshing module is used for refreshing the mirror image file into the main FLASH through the SPI interface;
the main FLASH refreshing progress reporting module is used for reporting the refreshing progress of the main FLASH to the main processor so that the main processor restarts the system after the main FLASH refreshing is completed;
the second mirror image file refreshing module is used for receiving a refreshing trigger message sent by the main processor after restarting the system, and refreshing the mirror image file into the standby FLASH through the SPI interface;
the mirror image file calling module is specifically used for receiving the refreshing interrupt sent by the main processor;
the main FLASH flashing progress reporting module is specifically configured to report the flashing progress to the main processor in an interrupt manner, so that the main processor restarts the system after the main FLASH flashing is completed.
5. The BMC dual-mirror swiping device according to claim 4, further comprising:
the application module of the using authority is used for applying the using authority of the SPI interface to the main processor, so that after the using authority of the SPI interface is obtained, the main FLASH writing progress reporting module brushes the mirror image file into the main FLASH through the SPI interface.
6. The BMC dual-mirror swiping device according to claim 4, further comprising:
and the standby FLASH flashing progress reporting module is used for reporting the flashing progress of the standby FLASH to the main processor.
7. A BMC dual-mirror image swiping device, comprising:
a memory for storing a computer program;
a processor for implementing the steps of the BMC dual mirror swiping method according to any of claims 1 to 3 when executing said computer program.
8. A computer readable storage medium, wherein a computer program is stored on the computer readable storage medium, and when the computer program is executed by a processor, the steps of the BMC double mirror swiping method according to any of claims 1 to 3 are implemented.
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Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2008153543A2 (en) * 2006-10-27 2008-12-18 Stowers Institute For Medical Research Fluorescent mouse model
WO2017128673A1 (en) * 2016-01-29 2017-08-03 努比亚技术有限公司 Dual-channel mobile terminal for reusing flash rom
CN109408145A (en) * 2018-10-18 2019-03-01 郑州云海信息技术有限公司 A kind of processor starting method, apparatus, system and computer readable storage medium
CN111538511A (en) * 2020-04-02 2020-08-14 国电南瑞南京控制***有限公司 Battery pack BMS software automatic flashing system and method
CN112579103A (en) * 2019-09-30 2021-03-30 上海度普新能源科技有限公司 BMS program flashing device
CN215181829U (en) * 2021-07-26 2021-12-14 成都申威科技有限责任公司 Server mainboard based on explain why a year in a year 3231 treater
CN113821083A (en) * 2020-06-18 2021-12-21 三星电子株式会社 System for storage and apparatus and method for performing communication management

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20120246385A1 (en) * 2011-03-22 2012-09-27 American Megatrends, Inc. Emulating spi or 12c prom/eprom/eeprom using flash memory of microcontroller

Patent Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2008153543A2 (en) * 2006-10-27 2008-12-18 Stowers Institute For Medical Research Fluorescent mouse model
WO2017128673A1 (en) * 2016-01-29 2017-08-03 努比亚技术有限公司 Dual-channel mobile terminal for reusing flash rom
CN109408145A (en) * 2018-10-18 2019-03-01 郑州云海信息技术有限公司 A kind of processor starting method, apparatus, system and computer readable storage medium
CN112579103A (en) * 2019-09-30 2021-03-30 上海度普新能源科技有限公司 BMS program flashing device
CN111538511A (en) * 2020-04-02 2020-08-14 国电南瑞南京控制***有限公司 Battery pack BMS software automatic flashing system and method
CN113821083A (en) * 2020-06-18 2021-12-21 三星电子株式会社 System for storage and apparatus and method for performing communication management
CN215181829U (en) * 2021-07-26 2021-12-14 成都申威科技有限责任公司 Server mainboard based on explain why a year in a year 3231 treater

Non-Patent Citations (2)

* Cited by examiner, † Cited by third party
Title
基于FPGA的SPI FLASH数据存储***设计;李嘉琛;杨光;;仪器仪表用户(06);全文 *
基于可信BMC的服务器安全启动机制;孙亮;陈小春;钟阳;林志鹏;任彤;;山东大学学报(理学版)(01);全文 *

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