CN114442793B - Method for adjusting operating frequency of storage controller, storage device and storage medium - Google Patents
Method for adjusting operating frequency of storage controller, storage device and storage medium Download PDFInfo
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
- G06F1/26—Power supply means, e.g. regulation thereof
- G06F1/32—Means for saving power
- G06F1/3203—Power management, i.e. event-based initiation of a power-saving mode
- G06F1/3234—Power saving characterised by the action undertaken
- G06F1/324—Power saving characterised by the action undertaken by lowering clock frequency
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
- G06F1/26—Power supply means, e.g. regulation thereof
- G06F1/32—Means for saving power
- G06F1/3203—Power management, i.e. event-based initiation of a power-saving mode
- G06F1/3234—Power saving characterised by the action undertaken
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
- G06F1/26—Power supply means, e.g. regulation thereof
- G06F1/32—Means for saving power
- G06F1/3203—Power management, i.e. event-based initiation of a power-saving mode
- G06F1/3234—Power saving characterised by the action undertaken
- G06F1/325—Power saving in peripheral device
- G06F1/3275—Power saving in memory, e.g. RAM, cache
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
- G06F3/0601—Interfaces specially adapted for storage systems
- G06F3/0602—Interfaces specially adapted for storage systems specifically adapted to achieve a particular effect
- G06F3/0625—Power saving in storage systems
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
- G06F3/0601—Interfaces specially adapted for storage systems
- G06F3/0628—Interfaces specially adapted for storage systems making use of a particular technique
- G06F3/0655—Vertical data movement, i.e. input-output transfer; data movement between one or more hosts and one or more storage devices
- G06F3/0658—Controller construction arrangements
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
- G06F3/0601—Interfaces specially adapted for storage systems
- G06F3/0628—Interfaces specially adapted for storage systems making use of a particular technique
- G06F3/0655—Vertical data movement, i.e. input-output transfer; data movement between one or more hosts and one or more storage devices
- G06F3/0659—Command handling arrangements, e.g. command buffers, queues, command scheduling
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
- Y02D10/00—Energy efficient computing, e.g. low power processors, power management or thermal management
Abstract
The application discloses an operating frequency adjustment method, a memory and a computer readable storage medium of a storage controller, wherein the method comprises the following steps: determining an operating load type of the storage controller; the operation load type comprises at least one of a sequential read load, a sequential write load, a random read load, a random write load and a default load; and adjusting the operation frequency of the storage controller to a preset frequency corresponding to the operation load type. By the mode, the power consumption of the memory controller can be reduced.
Description
Technical Field
The present application relates to storage of in the field of the controller, the control system, and more particularly, to an operating frequency adjustment method of a memory controller, a memory device, and a memory medium.
Background
Chips (integrated circuit, ICs) are circuit modules that integrate a variety of electronic components on a silicon board to perform a certain function, and are often manufactured on a semiconductor wafer surface. It is the most important part of the electronic device, bearing the computing and storage functions. The memory controller chip is a device that performs necessary control on access to a memory according to a certain timing rule, and includes control of address signals, data signals, and various command signals, so that a master device (a device that accesses the memory) can use a memory resource on the memory according to its own requirements, and is a memory core component. With the rapid development of the field of memory controller chips, the memory controller chip has smaller and smaller manufacturing process and higher performance, and the problems of temperature rise and power consumption increase are more obvious.
With the development of modern technology, the packaging of the memory controller chip is smaller and smaller, the heat dissipation is poor, and the generation temperature is higher and higher; on the other hand, with the improvement of the performance, the generated power consumption and temperature are correspondingly improved, and the service life is correspondingly shortened. The higher the storage operation frequency is, the larger the power consumption and the higher the temperature are, and under the conditions that the work load of the storage controller chip is light and the operation frequency is high, the resource waste is generated and the problems of larger power consumption and higher temperature are also caused; under the conditions that the working load of the memory controller chip is heavy and the running frequency is low, performance deficiency can be caused; therefore, it is necessary to dynamically adjust the chip operating frequency according to the operating condition of the memory controller chip to reduce the temperature and power consumption.
The existing method is to switch the operating frequency according to whether the chip has a load or not, lower the operating frequency to a low level when the chip is empty, and raise the operating frequency to a high level when the chip has a load. The method has the defects that the method is too rough, only has high and low gears, and cannot adjust the optimal operation frequency according to the real-time operation load condition, so that the problems of resource waste, overhigh temperature, overlarge power consumption, service life reduction and the like are caused.
Disclosure of Invention
The application mainly provides a method for adjusting the operating frequency of a storage controller, which can solve the problem that the operating frequency of the storage controller cannot be accurately adjusted according to the type of an operating load in the prior art.
In order to solve the above technical problem, a first aspect of the present application provides a method for adjusting an operating frequency of a storage controller, where the method includes: determining an operating load type of the storage controller; the operation load type comprises at least one of a sequential read load, a sequential write load, a random read load, a random write load and a default load; and adjusting the operation frequency of the storage controller to a preset frequency corresponding to the operation load type.
Wherein the determining the operation load type of the storage controller includes: acquiring a load command; determining the operation load type according to the command types and the pointing addresses of a plurality of continuous load commands; wherein the command types include a read type and a write type.
Wherein said determining said operational load type from a command type and a pointing address of a consecutive plurality of said load commands comprises: adding a tag to a command type accumulated value, the tag being used to characterize a command type of a load command that is accounted for in the command type accumulated value; sequentially analyzing the command type and the pointing address of each load command; if the command type of the current load command accords with the tag and the pointing address of the current load command is continuous with the ending address of the last load command, counting the current load command into the command type accumulated value, and counting the data amount transmitted by the current load command into the data amount accumulated value; and determining the operation load type by using the command type accumulated value, the label of the command type accumulated value and the data volume accumulated value.
Wherein said determining said running load type according to command types and address directives of a consecutive plurality of said load commands further comprises: if the command type of the current load command does not accord with the label, clearing the command type accumulated value and the data volume accumulated value, updating the label of the command type accumulated value, and re-accumulating the command type accumulated value and the data volume accumulated value; and if the pointing address of the current load command is not continuous with the pointing address of the last load command, clearing the data quantity accumulated value and re-accumulating the data quantity accumulated value.
Wherein said determining said running load type according to command types and address directives of a consecutive plurality of said load commands further comprises: executing the step of adding a label to the command type accumulated value to determine the operation load type by using the command type accumulated value, the label of the command type accumulated value and the data volume accumulated value once every first number of load commands; the label is determined by the operation load type obtained by the previous judgment.
Wherein the method further comprises: carrying out interference judgment once when a second number of load commands are received, counting the number of the interference commands in the second number of load commands, and if the number of the interference commands does not reach a first preset number, ignoring the interference commands; the interference command is a load command which does not accord with the operation load type obtained by the previous judgment; if the number of the interference commands reaches the third number, the command type accumulated value and the data quantity accumulated value are emptied, the label of the command type accumulated value is updated, and the command type accumulated value and the data quantity accumulated value are accumulated again; wherein the second number is less than the first number and the third number is less than the second number.
Wherein the method further comprises: when the running load class is judged not to be one of the sequential read load, the sequential write load, the random read load and the random write load at the previous time, after continuously receiving a fourth number of load commands meeting the preset judgment conditions, starting interference judgment corresponding to the preset conditions.
Wherein prior to said determining the operating load type of the storage controller, the method further comprises: and setting a preset frequency corresponding to each load type for the storage controller.
To solve the above technical problem, a second aspect of the present application provides a storage device, including a storage controller and a memory that are coupled to each other, where the controller is configured to perform the method provided in the first aspect, so as to perform adjustment of an operating frequency.
To solve the above technical problem, a third aspect of the present application provides a computer readable storage medium storing a computer program, where the computer program is executed by a processor to implement the method for adjusting an operating frequency of a storage controller provided in the first aspect.
The beneficial effects of this application are: compared with the prior art, the method and the device have the advantages that firstly, the operation load type is determined to comprise at least one of a sequential read load, a sequential write load, a random read load, a random write load and a default load, then, the operation frequency of the storage controller is adjusted according to the determined operation load type, the operation frequency of the storage controller can be accurately adjusted according to the operation load type, and the operation frequency of the storage controller can be accurately adjusted under the condition that the operation of the load is not influenced, so that the power consumption of the storage controller is saved, and the service life of a storage controller chip is prolonged.
Drawings
FIG. 1 is a schematic block flow diagram of one embodiment of a method of operating frequency adjustment of a memory controller of the present application;
FIG. 2 is a schematic block flow diagram of another embodiment of a method of operating frequency adjustment of a memory controller of the present application;
FIG. 3 is a schematic block flow diagram of yet another embodiment of a method of operating frequency adjustment of a memory controller of the present application;
FIG. 4 is a schematic block flow diagram of yet another embodiment of a method of operating frequency adjustment of a memory controller of the present application;
FIG. 5 is a schematic block flow chart diagram illustrating one embodiment of a present load command determination;
FIG. 6 is a schematic block diagram of a circuit configuration of an embodiment of a memory device of the present application;
fig. 7 is a schematic block diagram of a circuit configuration of an embodiment of a computer-readable storage medium of the present application.
Detailed Description
The following description of the technical solutions in the embodiments of the present application will be made clearly and completely with reference to the accompanying drawings in the embodiments of the present application, and it is apparent that the described embodiments are only some embodiments of the present application, not all embodiments. All other embodiments, which can be made by one of ordinary skill in the art without undue burden from the present disclosure, are within the scope of the present disclosure.
The terms "first," "second," and the like in this application are used for descriptive purposes only and are not to be construed as indicating or implying relative importance or implicitly indicating the number of features shown. Thus, a feature defining "a first" or "a second" may explicitly or implicitly include at least one such feature. Furthermore, the terms "comprise" and "have," as well as any variations thereof, are intended to cover a non-exclusive inclusion. For example, a process, method, system, article, or apparatus that comprises a list of steps or elements is not limited to only those listed steps or elements but may include other steps or elements not listed or inherent to such process, method, article, or apparatus.
Reference herein to "an embodiment" means that a particular feature, structure, or characteristic described in connection with the embodiment may be included in at least one embodiment of the present application. The appearances of such phrases in various places in the specification are not necessarily all referring to the same embodiment, nor are separate or alternative embodiments mutually exclusive of other embodiments. Those of skill in the art will explicitly and implicitly understand that the embodiments described herein may be combined with other embodiments.
Referring to fig. 1, fig. 1 is a schematic block flow diagram illustrating an embodiment of a method for operating frequency adjustment of a memory controller according to the present application. The operation frequency adjusting method of the storage controller of the embodiment comprises the following steps:
s10: the operating load type of the storage controller is determined. Wherein the operation load type includes at least one of a sequential read load, a sequential write load, a random read load, a random write load, and a default load.
When the load operation is read sequentially, data are read from the memory sequentially; when the load operation is written in sequence, the data are written into the memory in sequence; when the random read load operation is carried out, reading data from a memory according to a random address; when the random write load operation is performed, data is written into the memory according to the random address. Default loads are load types other than sequential read loads, sequential write loads, random read loads, random write loads.
The manner of determining the type of operating load may be: the method comprises the steps of determining an operation load type according to a command type of a plurality of continuous load commands and continuity of a pointing address, wherein the command type comprises a read type and a write type. For example, when a continuous number of load commands of the same type of command are acquired, if addresses pointed by the continuous number of load commands are continuous, it may be determined that the operation load type is a continuous read load or a continuous write load, if addresses pointed by the continuous number of load commands are discontinuous, it may be determined that the operation load type is a random read load or a random write load, and if none of the above conditions is satisfied, it may be determined that the operation load type is a default load type.
S20: the operating frequency of the storage controller is adjusted to a preset frequency corresponding to the type of operating load.
In order to be able to adjust the operating frequency of the storage controller according to the operating load type, a preset frequency corresponding to each load type may be set for the storage controller in advance, that is, a preset frequency is set corresponding to the sequential read load, the sequential write load, the random read load, the random write load and the default load, respectively, and when the operating load type is determined, the operating frequency of the storage controller is adjusted to the corresponding preset frequency.
Under the corresponding preset frequency, the normal operation of the load can be ensured, the data read-write is performed normally, the speed and the performance of data transmission are not influenced, the operation power consumption of the memory controller can be greatly saved, the memory controller is prevented from being overhigh in temperature, and the service life of the memory controller chip is effectively prolonged.
The preset frequency may be experimentally verified by those skilled in the art to ensure that the operating load is able to transmit data normally at this operating frequency. The operating frequency corresponding to the default load may be set to be the highest operating frequency of the five operating load types.
Alternatively, in step S10, the operation load type may be determined by the command type of the continuous plurality of load commands and the pointing address. Referring specifically to fig. 2, fig. 2 is a schematic flow chart diagram of another embodiment of an operating frequency adjustment method of a memory controller according to the present application. The operation frequency adjusting method of the storage controller of the embodiment comprises the following steps:
s100: a tag is added to the command type accumulated value.
The command type accumulated value is the number of continuous load commands with the same command type, and the label of the command type accumulated value is used for representing: the command type of the load command is counted in the command type accumulated value. The command type of the load command is as follows: in the direction of data transfer under this load command, there are two cases of "reading" and "writing".
In one embodiment, the command type of a first load command of the consecutive plurality of load commands may be tagged as a command type accumulation value.
S101: the command type and the pointing address of the current load command are analyzed.
This step performs command type and address-pointing analysis with each of a plurality of consecutive load commands as the current load command in turn.
S102: and judging whether the command type of the current load command accords with the label of the command type accumulated value.
The command type of the current load command has two cases of a read type and a write type. When the command type of the current load command meets the tag of the command type accumulated value (i.e., the command type of the current load command and the command type of the preset condition are both "read" type or "write" type), the process goes to step S104. Otherwise, step S103 is performed.
S103: the command type accumulated value and the data amount accumulated value are cleared, and the label of the command type accumulated value is updated.
Alternatively, the tag of the command type accumulated value is updated with the command type of the current load command, and the data amount accumulated value is accumulated starting from the current load command, and the command type accumulated value is accumulated starting from 1.
Returning to step S101, the steps are repeated for the current load command with the next load command.
S104: and judging whether the pointing address of the current load command is continuous with the pointing address of the last load command.
If the pointing address of the current load command is the ending address of the previous load command, the pointing address of the current load command is considered to be continuous with the pointing address of the previous load command, and step S105 is executed; otherwise, the pointing address of the current load command is not continuous with the pointing address of the previous load command, and step S106 is performed.
S106: the current load command is counted into a command type accumulated value and the data amount accumulated value is cleared.
If it is determined in step 104 that the pointing address of the current load command is not continuous with the pointing address of the previous load command, the current load command is counted into the command type accumulated value, and the data amount accumulated value is cleared. And returning to step S101, and analyzing the command type and the pointing address by taking the next load command as the current load command.
S105: the current load command is counted into a command type accumulated value, and the data amount transmitted by the current load command is counted into a data amount accumulated value.
The accumulated value of the command types is the number of the continuous load commands with the same command types, the accumulated value of the data quantity is the total quantity of data transmitted by the continuous load commands with the same command types, and the larger the accumulated value of the data quantity is, the more the continuously received continuous load commands with the same command types and continuous addresses are indicated, and the method can be used for judging the address continuity of the continuous multiple load commands.
S107: the operation load type is determined by using the command type accumulated value, the tag of the command type accumulated value, and the data amount accumulated value.
Alternatively, corresponding judgment conditions may be set according to the command type accumulated value, the label of the command type accumulated value, and the condition of the judgment conditions satisfied by the data amount accumulated value.
Wherein, the judging conditions at least comprise:
(1) Whether the command type accumulated value reaches a command type accumulated value threshold;
(2) Whether the label of the command type accumulated value is consistent with the preset type requirement or not;
(3) Whether the data amount accumulated value reaches a data amount accumulated value threshold.
Specifically, if the command type accumulated value reaches a command type accumulated value threshold, indicating that a certain number of load commands of the same command type are continuously detected; if the label of the command type accumulated value is consistent with the preset type requirement, determining the data transmission direction under the current continuously detected load command, for example, reading or writing; and if the data quantity accumulated value reaches the data quantity accumulated value threshold value, indicating that the current load command address is continuous.
For example, the judgment conditions may be similarly set to (4) to (6):
(4) The command type accumulated value exceeds n1;
(5) The label of the command type accumulated value is "read";
(6) The data amount accumulated value exceeds d1.
Wherein n1 and d1 are positive integers.
If the command type accumulated value, the label of the command type accumulated value and the data amount accumulated value meet the conditions (4) - (6), determining that the load type is a sequential read type, if the conditions (4) - (6) are only met, determining that the load type is a sequential write type, if the conditions (4) - (5) are only met, determining that the load type is a random read type, if the conditions (4) are only met, determining that the load type is a random write type, otherwise, determining that the load type is a default load.
After analyzing the command type and the directional address of each load command, determining whether the command type accumulated value reaches a command type accumulated threshold, if so, executing step S107 to determine the running load type; if the command type accumulated value does not reach the command type accumulated threshold, continuing to take the next load command as the current load command, returning to step S101 to continue to analyze the command type and the pointing address of the load command.
Or in other embodiments, the load command may be counted, if the command type and the number of load commands for address analysis reach the preset number of load commands, step S107 is executed to determine the running load type, otherwise, the operation of step S101 is executed with the next load command as the current load command.
S108: the operating frequency of the storage controller is adjusted to a preset frequency corresponding to the type of operating load.
The same as step S20 of the previous embodiment is not described in detail.
In this embodiment, steps S101 to S107 perform the judgment of the operation load type by using the feature that the data transmission is performed by using various operation load types, so that the operation load type can be accurately judged, and the reliability of the obtained judgment result is high, and further.
Alternatively, the respective judgment conditions (1) to (3) are set for the sequential read load, the sequential write load, the random read load, and the random write load, respectively, and when the operation load type is determined by the command type accumulated value, the tag of the command type accumulated value, and the data amount accumulated value in step S107, it is judged whether the command type accumulated value, the tag of the command type accumulated value, and the data amount accumulated value satisfy the respective judgment conditions, respectively. When judging that the judging condition of one of the operation load types is met, determining that the current operation load type is the operation load type corresponding to the judging condition; and when judging that the current operation load type does not meet the judging condition of any operation load type, determining that the current operation load type is a default load.
Alternatively, steps S101 to S108 are performed every first number of load commands. Specifically, the current operation load type is judged every first number of load commands, and the operation frequency of the storage controller is adjusted according to the operation load type. Therefore, whether the operation load type is changed or not can be continuously monitored, so that the operation frequency of the memory controller can be timely adjusted according to the operation load type, and the power consumption of a memory controller chip can be better saved.
Alternatively, in the case of "judging the current operation load type once every first number of load commands", the tag of the command type accumulated value is determined by the operation load type obtained by the previous judgment, that is, the tag whose data transmission direction corresponding to the operation load type obtained by the previous judgment is the command type accumulated value.
Referring specifically to fig. 3, fig. 3 is a schematic block flow diagram of another embodiment of an operating frequency adjustment method of a memory controller according to the present application. The operation frequency adjusting method of the storage controller of the embodiment comprises the following steps:
s200: the data transmission direction characteristic of the operation load type obtained by the previous judgment is a label of a command type accumulated value.
The data transmission direction characteristics of the operation load type obtained by the last judgment have two cases, for example, when the operation load type obtained by the last judgment is a sequential write load or a random write load, the data transmission direction characteristics of the operation load type obtained by the last judgment are "write", and the "write" is used as a label of the command type accumulated value; when the operation load type obtained by the last judgment is a sequential reading load or a random reading load, the data transmission direction of the operation load type obtained by the last judgment is characterized as 'reading', and the 'reading' is used as a label of a command type accumulated value.
S201: the command type and the pointing address of the current load command are analyzed.
This step performs command type and address-pointing analysis with each of the first number of load commands in turn as the current load command.
S202: and judging whether the command type of the current load command accords with the label of the command type accumulated value.
This step is the same as step S102 of the previous embodiment, and will not be described again.
S203: the command type accumulated value and the data amount accumulated value are cleared, and the label of the command type accumulated value is updated.
Alternatively, the tag of the command type accumulated value is updated with the command type of the current load command, and the data amount accumulated value is accumulated starting from the current load command, and the command type accumulated value is accumulated starting from 1.
Returning to step S201, the steps described above are repeated with the next load command as the current load command.
After step S203, it may be determined whether the load command count reaches the first number, and if the load command count reaches the first number, step S207 may be performed to determine the type of the running load.
S204: and judging whether the pointing address of the current load command is continuous with the pointing address of the last load command.
If the pointing address of the current load command is continuous with the pointing address of the previous load command, step S205 is executed; otherwise, step S206 is performed.
S206: the current load command is counted into a command type accumulated value and the data amount accumulated value is cleared.
After this step, step S201 is executed, and the above steps are repeated for the current load command with the next load command.
After step S206, it may be determined whether the load command count reaches the first number, and if the load command count reaches the first number, step S207 may be performed to determine the type of the running load.
S205: the current load command is counted into a command type accumulated value, and the data amount transmitted by the current load command is counted into a data amount accumulated value.
This step is the same as step S105 of the previous embodiment, and will not be described again.
S209: it is determined whether the load command count reaches a first number.
In this embodiment, the load commands are counted, and the count is incremented by one when the command type and the address of the direction are analyzed once for each load command. When the count reaches the first number, step S207 may be executed to determine the type of the running load; if the counted number does not reach the first number, the process returns to step S201, and the next load command is used as the current load command to continue the address pointing and command type analysis.
S207: the operation load type is determined by using the command type accumulated value, the tag of the command type accumulated value, and the data amount accumulated value.
S208: the operating frequency of the storage controller is adjusted to a preset frequency corresponding to the type of operating load.
Steps S207 to S208 are the same as steps S107 to S108 of the previous embodiment, and will not be described again. In addition, after the operation frequency is adjusted, the operation load type is continuously judged every other continuous first number of load commands, so that the operation frequency of the memory controller chip can be conveniently switched in time when the operation load type changes, the sensitivity is improved, the operation frequency is accurately adjusted, and the operation frequency of the memory controller chip corresponds to the load type well.
Further, the interference judgment can be performed once every time the second number of load commands are received, the number of the interference commands in the second number of load commands is counted, and if the number of the interference commands does not reach the preset number, the interference commands are ignored; the interference command is a load command which does not accord with the operation load type obtained by the previous judgment. And if the number of the interference commands reaches the preset number, clearing the command type accumulated value and the data quantity accumulated value, updating the label of the command type accumulated value, and re-accumulating the command type accumulated value and the data quantity accumulated value.
Referring specifically to fig. 4, fig. 4 is a schematic flow chart diagram of another embodiment of an operating frequency adjustment method of a memory controller of the present application, and specifically includes the following steps:
s301: the data transmission direction characteristic of the operation load type obtained by the previous judgment is a label of a command type accumulated value.
In this embodiment, the type of the running load is determined every first number of load commands, and after the type of the running load is determined in the previous time, the type of the running load obtained in the previous time is the command type accumulated value tag.
S302: the command type and the pointing address of the second number of load commands are analyzed.
The second number of load commands is a sequential load command acquired in sequence.
Optionally, the second number is smaller than the first number, and the first number is an integer multiple of the second number, so that in a process of judging a running load type, the first number of load commands can be subjected to complete and limited interference judgment, and each of the first number of load commands is ensured to be covered by an interference judgment operation.
S303: and judging whether the number of the interference commands in the second number of the load commands reaches a preset number.
And judging the number of the interference commands in the second number of the load commands after receiving the second number of the load commands. The interference command is a load command which does not accord with the operation load type obtained by the previous judgment.
If the number of the interference commands in the second number of the load commands reaches the preset number, step S305 is executed, otherwise, step S304 is executed.
Referring to fig. 5, determining whether the current load command meets the operation load type determined in the previous time may include the following steps S3031 to S3035:
s3031: and judging whether the command type of the current load command is consistent with the data transmission direction characteristics of the operation load type obtained by the previous judgment.
The step judges whether the command type of the current load command is a read type or a write type, judges that the data transmission direction characteristic of the operation load type obtained by the previous judgment is read or write, and judges whether the two types are consistent. If so, go to step S3032, otherwise, go to step S3033, and determine that the current load command does not conform to the type of the running load obtained by the previous determination.
S3032: and determining the continuity of the pointing address of the current load command and the pointing addresses of the first N load commands to obtain a current pointing address continuity judgment result.
The step can judge the continuity of the pointing address of the current load command and the front N load commands continuous with the current load command, and obtain the judgment result of 'continuous' or 'discontinuous'. Wherein N is a positive integer.
S3034: and judging whether the current pointing address continuity judging result is consistent with the pointing address continuity characteristic of the operation load type obtained by the previous judgment.
Because the continuous characteristic of the pointing address of the operation load type obtained by the previous judgment is one of "continuous" and "discontinuous", the consistency judgment is performed on the continuous or discontinuous judgment result obtained in the step S3032 and the continuous or discontinuous judgment result, and the consistency or non-consistency result of the current continuous judgment result of the pointing address and the continuous characteristic of the pointing address of the operation load type obtained by the previous judgment can be obtained.
Specifically, in this step, when it is determined that the pointing address of the current load command and the pointing addresses of the first N load commands that are consecutive to the current load command are consecutive, and at the same time, the operation load type obtained by the previous determination is a sequential read load or a sequential write load ", or when it is determined that the pointing address of the current load command and the pointing addresses of the first N load commands that are consecutive to the current load command are consecutive, and at the same time, the operation load type obtained by the previous determination is a random read load or a random write load, it is determined that the current pointing address continuity determination result is consistent with the pointing address continuity feature of the operation load type obtained by the previous determination; otherwise, determining that the continuity judging result of the current pointing address is inconsistent with the continuity characteristic of the pointing address of the operation load type obtained by the previous judgment.
If so, go to step S3035 to determine that the current load command meets the operation load type obtained by the previous determination, otherwise, go to step S3033 to determine that the current load command does not meet the operation load type obtained by the previous determination.
S3035: and determining that the current load command accords with the operation load type obtained by the previous judgment.
S3033: and determining that the current load command does not accord with the operation load type obtained by the previous judgment.
Thus, it can be determined whether the current load command meets the operation load type obtained by the previous judgment.
S304: the non-interference command is counted into a command type accumulated value.
This step counts all the non-interference commands judged in step S303 into a command type accumulated value.
S307: judging whether the operation load type obtained by the previous judgment is a sequential reading load or a sequential writing load.
If the operation load type obtained from the previous determination is the sequential read load or the sequential write load, step S308 is executed. Otherwise, step S309 is performed.
S308: the data amount transmitted by the non-interference command is counted into the data amount accumulation value.
S309: it is determined whether the pointing addresses of the non-interfering commands are consecutive.
If the operation load type obtained by the previous judgment is not the sequential reading load or the sequential writing load, the address continuity of the load command needs to be continuously monitored in the operation load type judgment at this time, so that whether the operation load type is switched to the sequential reading load or the sequential writing load can be monitored sharply.
If so, step S308 is performed to count the data amount transmitted by the non-interference command into a data amount accumulation value. Otherwise, the data amount accumulated value is not counted.
S310: it is determined whether the load command count reaches a first number.
In this embodiment, once the load command is received for the first number of load commands, the operation load type is determined, if the load command count does not reach the first number, the process goes to step S302, and the next load command is continued to determine the command type and the pointing address for the current load command.
S311: operations as in steps S207 to S208 are performed.
S305: and clearing the command type accumulated value and the data amount accumulated value, and updating the label of the command type accumulated value.
When the number of the interference commands in the second number of load commands reaches the preset number in step S303, the load type is considered to be changed, and the command type accumulated value and the data amount accumulated value are accumulated again.
The operations of updating the label of the command type accumulated value and re-accumulating the command type accumulated value and the data volume accumulated value may be performed based on the interference command in the current second number of load commands (that is, updating the label of the command type accumulated value based on the command type of the interference command in the current second number of load commands, and counting the interference command in the current second number of load commands into the command type accumulated value, and counting the data volume transmitted by the interference command in the current second number of load commands into the data volume accumulated value); the operation of updating the label of the command type accumulated value and re-accumulating the command type accumulated value and the data amount accumulated value may also be performed after the next interference judgment is performed on the second number of load commands.
S306: the next load command is the current load command, and the operations as in steps S201 to S209 are performed.
This step does not perform any interference determination.
Alternatively, step S306 may also be to redetermine the determination condition of the interference command according to the command type of the interference command, and then proceed with the interference determination using the new determination condition. For example, if the tag that updates the command type accumulated value after the present interference determination is "write", the determination condition of the interference command may be determined again as: whether the load command with the command type of "read" in the second number of commands reaches the preset number or not, and the steps S310 and the following steps are continued.
Optionally, when the operation load type is not one of the sequential read load, the sequential write load, the random read load and the random write load, after a preset number of load commands meeting the preset condition are continuously received, starting interference judgment corresponding to the preset condition.
Specifically, when the operation load type is judged to be not one of the sequential read load, the sequential write load, the random read load and the random write load in the previous time, the operation load type can be primarily judged through the continuous load commands with the same preset number of command types and the continuous pointing address thereof. For example, if it is detected that v1 write-type-acquisition continuous load commands are acquired, and then by judging the continuity of the addresses to which the v1 continuous load commands are directed, the current load type can be preliminarily judged. Wherein v1 is a positive integer and less than the first number.
The embodiment can perform interference judgment on the basis of the operation load type judged last time, if the interference quantity is extremely small, namely, the interference command quantity in each second preset quantity of load commands is smaller than a preset value, the interference command is ignored, when the interference command exceeds the preset value, the change of the operation load type is considered to occur, the judgment of the operation load type is prevented from being influenced by the abnormal command which rarely occurs, the matching rate of the judgment result and the current actual operation load is higher, the fault tolerance rate is greatly reduced, and the accuracy of judging the operation load type is further improved.
Referring to fig. 6, fig. 6 is a schematic block diagram illustrating a circuit structure of an embodiment of a memory device according to the present application. The storage device 11 includes a controller 111 and a memory 112 coupled to each other, and the controller 111 is configured to perform an operation frequency adjustment method of the storage controller as described above to perform adjustment of an operation frequency.
For the description of each step of the processing execution, please refer to the description of each step of the operation frequency adjusting method embodiment of the storage controller of the present application, and the description is omitted herein.
In the embodiments of the present application, the disclosed method and apparatus for adjusting the operating frequency of a memory controller may be implemented in other manners. For example, the embodiments of the storage device described above are merely illustrative, e.g., the division of the modules or units is merely a logical functional division, and there may be additional divisions in actual implementation, e.g., multiple units or components may be combined or integrated into another system, or some features may be omitted, or not performed. Alternatively, the coupling or direct coupling or communication connection shown or discussed with each other may be an indirect coupling or communication connection via some interfaces, devices or units, which may be in electrical, mechanical or other form.
The units described as separate units may or may not be physically separate, and units shown as units may or may not be physical units, may be located in one place, or may be distributed on a plurality of network units. Some or all of the units may be selected according to actual needs to achieve the purpose of the embodiment.
In addition, each functional unit in each embodiment of the present application may be integrated in one processing unit, or each unit may exist alone physically, or two or more units may be integrated in one unit. The integrated units may be implemented in hardware or in software functional units.
The integrated units, if implemented in the form of software functional units and sold or used as stand-alone products, may be stored in a computer readable storage medium. Based on such understanding, the technical solution of the present application may be embodied essentially or partly contributing to the prior art or in whole or in part in the form of a software product, which is stored in a storage medium.
Referring to fig. 7, fig. 7 is a schematic block diagram illustrating a circuit structure of an embodiment of a computer readable storage medium of the present application, where the computer storage medium 1000 stores a computer program 1001, and the computer program 1001 implements the steps of the embodiments of the operating frequency adjustment method of the storage controller of the present application when executed.
The computer storage medium 1000 may be a usb disk, a removable hard disk, a Read-Only Memory (ROM), a random access Memory (RAM, random Access Memory), a magnetic disk, or an optical disk, etc. various media capable of storing program codes.
The foregoing description is only exemplary embodiments of the present application and is not intended to limit the scope of the present application, and all equivalent structures or equivalent processes using the descriptions and the drawings of the present application, or direct or indirect application in other related technical fields are included in the scope of the present application.
Claims (8)
1. A method of operating frequency adjustment of a memory controller, the method comprising:
determining an operational load type of the storage controller, comprising: acquiring a load command; determining the operation load type according to the command types and the pointing addresses of a plurality of continuous load commands; wherein the command type comprises a read type and a write type, and the operation load type comprises at least one of a sequential read load, a sequential write load, a random read load, a random write load and a default load;
adjusting the operating frequency of the storage controller to a preset frequency corresponding to the operating load type;
wherein said determining said operational load type from a command type and a pointing address of a consecutive plurality of said load commands comprises: adding a tag to a command type accumulated value, the tag being used to characterize a command type of a load command that is accounted for in the command type accumulated value; sequentially analyzing the command type and the pointing address of each load command; if the command type of the current load command accords with the tag and the pointing address of the current load command is continuous with the pointing address of the last load command, counting the current load command into the command type accumulated value, and counting the data amount transmitted by the current load command into the data amount accumulated value; and determining the operation load type by using the command type accumulated value, the label of the command type accumulated value and the data volume accumulated value.
2. The method of claim 1, wherein the step of determining the position of the substrate comprises,
the determining the operation load type according to the command type and the pointing address of the continuous plurality of load commands further comprises:
if the command type of the current load command does not accord with the label, clearing the command type accumulated value and the data volume accumulated value, updating the label of the command type accumulated value, and re-accumulating the command type accumulated value and the data volume accumulated value;
and if the pointing address of the current load command is not continuous with the pointing address of the last load command, clearing the data quantity accumulated value and re-accumulating the data quantity accumulated value.
3. The method of claim 1, wherein the step of determining the position of the substrate comprises,
the determining the operation load type according to the command type and the pointing address of the continuous plurality of load commands further comprises:
executing the step of adding a label to the command type accumulated value every first number of load commands until the operation load type is determined by using the command type accumulated value, the label of the command type accumulated value and the data amount accumulated value;
the label is determined by the operation load type obtained by the previous judgment.
4. The method of claim 1, wherein the step of determining the position of the substrate comprises,
the method further comprises the steps of:
carrying out interference judgment once when a second number of load commands are received, counting the number of the interference commands in the second number of load commands, and if the number of the interference commands does not reach a first preset number, ignoring the interference commands; the interference command is a load command which does not accord with the operation load type obtained by the previous judgment;
if the number of the interference commands reaches the third number, the command type accumulated value and the data quantity accumulated value are emptied, the label of the command type accumulated value is updated, and the command type accumulated value and the data quantity accumulated value are accumulated again;
wherein the second number is less than the first number and the third number is less than the second number.
5. The method of claim 4, wherein the step of determining the position of the first electrode is performed,
the method further comprises the steps of:
when the running load class is judged not to be one of the sequential read load, the sequential write load, the random read load and the random write load at the previous time, after continuously receiving a fourth number of load commands meeting the preset judgment conditions, starting interference judgment corresponding to the preset conditions.
6. The method of claim 1, wherein the step of determining the position of the substrate comprises,
before said determining the operating load type of the storage controller, the method further comprises:
and setting a preset frequency corresponding to each load type for the storage controller.
7. A memory device comprising a controller and a memory coupled to each other; the controller is configured to perform the method of any one of claims 1-6 to make an adjustment of the operating frequency.
8. A computer readable storage medium, characterized in that the computer readable storage medium stores a computer program which, when executed by a processor, implements the steps of the method according to any of claims 1-6.
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| CN202011197778.8A CN114442793B (en) | 2020-10-30 | 2020-10-30 | Method for adjusting operating frequency of storage controller, storage device and storage medium |
| PCT/CN2020/126527 WO2022088214A1 (en) | 2020-10-30 | 2020-11-04 | Operating frequency adjusting method of memory controller, memory device, and storage medium |
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| CN202011197778.8A CN114442793B (en) | 2020-10-30 | 2020-10-30 | Method for adjusting operating frequency of storage controller, storage device and storage medium |
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