CN114418108B

CN114418108B - Unitary operator compiling method, computing device, apparatus and storage medium

Info

Publication number: CN114418108B
Application number: CN202210050122.6A
Authority: CN
Inventors: 王鑫; 余展; 赵炫强; 赵犇池
Original assignee: Beijing Baidu Netcom Science and Technology Co Ltd
Current assignee: Beijing Baidu Netcom Science and Technology Co Ltd
Priority date: 2022-01-17
Filing date: 2022-01-17
Publication date: 2022-10-18
Anticipated expiration: 2042-01-17
Also published as: CN114418108A

Abstract

The disclosure provides a unitary operator compiling method, a unitary operator compiling device, a unitary operator compiling apparatus and a unitary operator compiling storage medium, and relates to the field of data processing, in particular to the field of quantum computing. The specific implementation scheme is as follows: obtaining at least n +1 measurement results, wherein an ith measurement result in the at least n +1 measurement results represents an ith trace distance between an ith first output state and an ith target output state; calculating a loss value of a loss function representing an average trace distance based on the ith trace distance represented by the ith measurement result; and under the condition that the loss value of the loss function meets the iteration requirement, taking a preset parameterized quantum circuit with an adjustable parameter at a first parameter value as a target parameterized quantum circuit, wherein the target parameterized quantum circuit is an approximate quantum circuit of the target unitary operator to be compiled. In this way, the approximate quantum circuit of the target unitary operator is obtained by compiling.

Description

Unitary operator compiling method, computing device, apparatus and storage medium

Technical Field

The present disclosure relates to the field of data processing technology, and more particularly, to the field of quantum computing.

Background

With the rapid development of quantum computing technology, more and more quantum algorithms and applications are emerging continuously, and the quantum computer has great potential exceeding that of a classical computer. However, in recent Noisy medium-scale quantum (noise-scale) devices, it is still difficult to implement complex quantum algorithms due to limitations in the number of qubits, structure and circuit depth. To solve this problem, unitary operator compiling (Unitary compiling) technology is used to compile Unitary operators in the quantum algorithm into a series of quantum gate sequences, so that the quantum algorithm can be run on the recent quantum device. Therefore, how to use simple quantum circuits to simulate or compile unitary operators becomes a core problem in quantum computing.

Disclosure of Invention

The disclosure provides a unitary operator compiling method, a computing device, an apparatus and a storage medium.

According to one aspect of the disclosure, a unitary operator compiling method is provided, which is applied to a classical computing device; the method comprises the following steps:

obtaining at least n +1 measurement results, wherein an ith measurement result in the at least n +1 measurement results represents an ith trace distance between an ith first output state and an ith target output state; the ith first output state is an output state which is acted on the ith preset quantum state in at least n +1 preset quantum states under the condition that the self adjustable parameter of the preset parameterized quantum circuit is in the first parameter value; the ith target output state represents an output state of a target unitary operator to be compiled after the target unitary operator acts on the ith preset quantum state; the target unitary operator is a unitary operator containing n qubits; the preset parameterized quantum circuit is a quantum circuit containing the n quantum bits; n is a natural number greater than or equal to 1, and i is a natural number greater than or equal to 1 and less than or equal to n + 1;

calculating a loss value of a loss function representing an average trace distance based on the ith trace distance represented by the ith measurement result;

and under the condition that the loss value of the loss function meets the iteration requirement, taking a preset parameterized quantum circuit with the adjustable parameter at a first parameter value as a target parameterized quantum circuit, wherein the target parameterized quantum circuit is an approximate quantum circuit of the target unitary operator to be compiled.

According to another aspect of the present disclosure, there is provided a unitary operator compiling method applied to a quantum computing device; the method comprises the following steps:

under the condition that the self adjustable parameter of the preset parameterized quantum circuit is in the first parameter value, the preset parameterized quantum circuit acts on the ith preset quantum state in at least n +1 preset quantum states to obtain the ith first output state;

obtaining an ith measurement result, wherein the ith measurement result represents an ith trace distance between the ith first output state and an ith target output state; the ith target output state represents an output state of a target unitary operator to be compiled after the target unitary operator acts on the ith preset quantum state; the target unitary operator is a unitary operator containing n qubits; the preset parameterized quantum circuit is a quantum circuit comprising the n quantum bits; n is a natural number greater than or equal to 1, and i is a natural number greater than or equal to 1 and less than or equal to n + 1;

and sending the ith measurement result.

According to yet another aspect of the present disclosure, there is provided a classic computing device, comprising:

a first obtaining unit, configured to obtain at least n +1 measurement results, where an ith measurement result in the at least n +1 measurement results represents an ith trace distance between an ith first output state and an ith target output state; the ith first output state is an output state which is acted on the ith preset quantum state in at least n +1 preset quantum states under the condition that the self adjustable parameter of the preset parameterized quantum circuit is in the first parameter value; the ith target output state represents an output state of a target unitary operator to be compiled, wherein the target unitary operator acts on the ith preset quantum state; the target unitary operator is a unitary operator containing n quantum bits; the preset parameterized quantum circuit is a quantum circuit comprising n quantum bits; n is a natural number which is more than or equal to 1, and i is a natural number which is more than or equal to 1 and less than or equal to n + 1;

a loss value calculation unit, configured to calculate a loss value of a loss function representing an average trace distance based on the ith trace distance represented by the ith measurement result;

and the determining unit is used for taking the preset parameterized quantum circuit with the adjustable parameter at the first parameter value as a target parameterized quantum circuit under the condition that the loss value of the loss function meets the iteration requirement, wherein the target parameterized quantum circuit is an approximate quantum circuit of the target unitary operator to be compiled.

According to still another aspect of the present disclosure, there is provided a quantum computing device including:

the output state determining unit is used for applying the preset parameterized quantum circuit to the ith preset quantum state in at least n +1 preset quantum states under the condition that the self adjustable parameter is in the first parameter value to obtain the ith first output state;

a measurement unit, configured to obtain an ith measurement result, where the ith measurement result represents an ith trace distance between the ith first output state and an ith target output state; the ith target output state represents an output state of a target unitary operator to be compiled, wherein the target unitary operator acts on the ith preset quantum state; the target unitary operator is a unitary operator containing n qubits; the preset parameterized quantum circuit is a quantum circuit containing the n quantum bits; n is a natural number greater than or equal to 1, and i is a natural number greater than or equal to 1 and less than or equal to n + 1;

a second sending unit, configured to send the ith measurement result.

at least one processor; and

a memory communicatively coupled to the at least one processor; wherein the content of the first and second substances,

the memory stores instructions executable by the at least one processor to cause the at least one processor to perform the method as described above for a classical computing device.

According to yet another aspect of the present disclosure, there is provided a quantum computing device comprising:

at least one Quantum Processing Unit (QPU);

a memory coupled to the at least one QPU and configured to store executable instructions,

the instructions are executable by the at least one quantum processing unit to enable the at least one quantum processing unit to perform the methods described above as applied to a quantum computing device.

According to yet another aspect of the present disclosure, there is provided a computing device including:

the classical computing devices described above, and the quantum computing devices described above.

According to yet another aspect of the present disclosure, there is provided a non-transitory computer readable storage medium having stored thereon computer instructions for causing the computer to perform the method as applied to a classical computing device.

According to yet another aspect of the present disclosure, there is provided a non-transitory computer readable storage medium storing computer instructions that, when executed by at least one quantum processing unit, cause the at least one quantum processing unit to perform the method described above as applied to a quantum computing device.

According to yet another aspect of the present disclosure, there is provided a computer program product comprising a computer program which, when executed by a processor, implements the method as applied to a classical computing device;

alternatively, the computer program, when executed by at least one quantum processing unit, implements the method described above as applied to a quantum computing device.

Therefore, the target unitary operator is simulated or compiled based on the preset parameterized quantum circuit, and a core problem of quantum computation is solved.

It should be understood that the statements in this section do not necessarily identify key or critical features of the embodiments of the present disclosure, nor do they limit the scope of the present disclosure. Other features of the present disclosure will become apparent from the following description.

Drawings

The drawings are included to provide a better understanding of the present solution and are not to be construed as limiting the present disclosure. Wherein:

FIG. 1 is a schematic diagram of an implementation flow of a unitary operator compiling method applied to a classical computing device according to an embodiment of the present disclosure;

FIG. 2 is a schematic diagram of a pre-parameterized quantum circuit in one example, in accordance with embodiments of the present disclosure;

fig. 3 is a schematic diagram of a pre-parameterized quantum circuit in another example in accordance with an embodiment of the present disclosure;

fig. 4 is a schematic flow chart illustrating an implementation of a unitary operator compiling method applied to a quantum computing device according to an embodiment of the present disclosure;

fig. 5 is a schematic flow chart of an implementation of a unitary operator compiling method in a specific example according to an embodiment of the present disclosure;

fig. 6 is a scene schematic diagram of a unitary operator coding method in a specific example according to an embodiment of the present disclosure;

FIG. 7 is a schematic block diagram of a classic computing device, according to an embodiment of the present disclosure;

fig. 8 is a schematic structural diagram of a quantum computing device, according to an embodiment of the present disclosure;

FIG. 9 is a schematic structural diagram of a computing device according to an embodiment of the present disclosure;

fig. 10 is a block diagram of a classic electronic device used to implement the unitary operator compilation method of an embodiment of the present disclosure.

Detailed Description

Exemplary embodiments of the present disclosure are described below with reference to the accompanying drawings, in which various details of embodiments of the present disclosure are included to assist understanding, and which are to be considered as merely exemplary. Accordingly, those of ordinary skill in the art will recognize that various changes and modifications of the embodiments described herein can be made without departing from the scope and spirit of the present disclosure. Also, descriptions of well-known functions and constructions are omitted in the following description for clarity and conciseness.

The scheme mainly adopts a variational quantum circuit compiling technology to realize compiling of the unitary operator; here, the variational quantum circuit compilation is a process of simulating or learning an unknown unitary operator by optimizing a parameterized quantum circuit (parameterized quantum circuit). Specifically, for a target unitary operator U, a plurality of pairs of input states (and ith preset quantum states) rho are prepared _i And target output state (i.e. ith target output state)

And will be

As a training data set, a parameterized quantum circuit V (θ) prepared in advance is trained. At the same time, a loss function is defined as

And

the average trace distance between the two is minimized by training V (theta) to obtain an approximate circuit V (theta) of a target unitary operator U ^* ). Moreover, the present disclosure may also use quantum gate fidelity as an index for measuring the compiling effect, where the quantum gate fidelity formula is as follows:

tr (-) represents the trace of a matrix, n is the number of qubits, and fidelity close to 1 means that the training works well.

Under the existing quantum hardware technology, a large amount of resources are consumed for preparing and storing quantum states, and the number of the quantum states in the training data set directly determines the cost (such as resource cost, time cost and the like) required for training the parameterized quantum circuit, so that how to use as little training data as possible to achieve a good training effect becomes an important problem to be considered in the unitary operator compiling process of the scheme disclosed by the invention.

Based on this, the present disclosure provides a variational quantum circuit coding scheme using n +1 preset quantum states as a training set, and moreover, an arbitrary unitary operator (i.e., a target unitary operator) can be coded into a simple quantum gate sequence, so that the practicability, the universality and the high efficiency are strong. Here, the practicality means that the method can be realized on recent quantum equipment and can improve the practical application value of recent quantum equipment; the universality means that the method is effective to any unitary operator and is not limited by the number of quantum bits; the high efficiency means that the resource cost and the time cost required by the compiling of the unitary operator can be reduced.

Specifically, the scheme of the disclosure provides a unitary operator compiling method, which is applied to classical computing equipment; here, the classical computing device is with respect to a quantum computing device, i.e., a non-quantum computing device; specifically, as shown in fig. 1, the method includes:

step S101: at least n +1 metrology results are obtained, such as n +1 metrology results from a quantum computing device. Wherein an ith metric result of the at least n +1 metric results characterizes an ith trace distance between an ith first output state and an ith target output state; the ith first output state is an output state which is acted on the ith preset quantum state in at least n +1 preset quantum states under the condition that the self adjustable parameter of the preset parameterized quantum circuit is in the first parameter value; the ith target output state represents an output state of a target unitary operator to be compiled after the target unitary operator acts on the ith preset quantum state; the target unitary operator is a unitary operator containing n quantum bits; the preset parameterized quantum circuit is a quantum circuit comprising the n quantum bits; n is a natural number greater than or equal to 1, and i is a natural number greater than or equal to 1 and less than or equal to n + 1.

Step S102: and the classical calculation equipment calculates the loss value of the loss function representing the average trace distance based on the ith trace distance represented by the ith measurement result.

Step S103: and the classical computing device takes the preset parameterized quantum circuit with the adjustable parameter at the first parameter value as a target parameterized quantum circuit under the condition that the loss value of the loss function meets the iteration requirement (such as convergence, or the iteration number reaches the preset number), wherein the target parameterized quantum circuit is an approximate quantum circuit of the target unitary operator to be compiled.

Here, the first parameter value may be a parameter value at the time of initialization, and may also be a parameter value adjusted in the last iteration process, which is not limited in this disclosure.

Therefore, the compiling of the unitary operator can be realized by using at least n +1 preset quantum states, the resource cost and the time cost of the compiling of the unitary operator are reduced, and the practicability of the compiling of the unitary operator is greatly improved.

Moreover, the problem of compiling the unitary operator is solved, so that technical support is provided for the recent quantum equipment to run a complex quantum algorithm, and meanwhile, the practical application value of the recent quantum equipment is indirectly improved.

Meanwhile, the unitary operator is an unknown unitary operator, so that the scheme disclosed by the invention is wider in application range and higher in universality compared with a scheme which needs the unitary operator as input. Moreover, for an unknown unitary operator U, the scheme disclosed by the invention does not need to directly access the unknown unitary operator into a preset parameterized quantum circuit for training, and can complete a compiling task only by taking at least n +1 constructed pairs of quantum states as input data.

It can be understood that the adjustable parameter described in the present disclosure may be one parameter or multiple parameters, and the present disclosure is not limited to this, as long as the approximate quantum circuit of the target unitary operator can be obtained based on the preset parameterized quantum circuit training. Accordingly, when two or more adjustable parameters are provided, the first parameter value, and the second parameter value described later, are not a specific value, but refer to the parameter value corresponding to the corresponding parameter, for example, a group of parameter values corresponding to the group of parameters.

In a specific example of the present disclosure, the method further includes: in the case that the loss value of the loss function does not satisfy the iteration requirement (such as not converging, or the number of iterations is less than a preset number), the classical computing device adjusts the first parameter value of the adjustable parameter to a second parameter value; and sending a second parameter value of the adjustable parameter. For example, the parameter is adjusted by a gradient descent method or other optimization methods to a second parameter value, and the second parameter value of the adjustable parameter is sent to the quantum computing device, so that the quantum computing device obtains a new measurement result based on the updated parameter value. Therefore, technical support is provided for realizing the quantum-classical hybrid algorithm and obtaining the approximate quantum circuit of the target unitary operator.

In a specific example of the present disclosure, in a case that a loss value of the loss function does not satisfy the iteration requirement (for example, does not converge, or the iteration number is less than a preset number), and after sending the second parameter value of the adjustable parameter to the quantum computing device, the classical computing device further obtains an ith new measurement result and obtains n +1 new measurement results, where the ith new measurement result represents an ith new trace distance between an ith new first output state and the ith target output state; the ith new first output state is an output state after the preset parameterized quantum circuit acts on the ith preset quantum state under the condition that the self adjustable parameter is in the second parameter value; and calculating a new loss value of the loss function based on the ith new trace distance represented by the ith new measurement result, and determining whether the new loss value meets the iteration requirement again, and repeating the steps until the new loss value meets the iteration requirement.

That is to say, in the scheme of the present disclosure, the quantum computing device is configured to prepare a preset parameterized quantum circuit and obtain a measurement result, and the classical computing device is responsible for computing a loss value and updating a parameter, so as to train the preset parameterized quantum circuit, implement a quantum-classical hybrid algorithm, and provide technical support for obtaining an approximate quantum circuit of a target unitary operator.

In a specific example of the disclosure, the preset parameterized quantum circuit includes a D-layer circuit, and a D-layer circuit in the D-layer circuit includes: n qubits, n preset single qubit gates and n controlled non-CNOT gates; the D is related to the number n of quantum bits contained in the target unitary operator, the D is a natural number which is greater than or equal to 1, and the D is a natural number which is greater than or equal to 1 and less than or equal to D.

Thus, the circuit width (i.e. the number of quantum bits used by the preset parameterized quantum circuit) required by the scheme is n, which is smaller than the circuit width 2n required by the existing scheme, so that compared with the existing scheme, the scheme disclosed by the invention can compile a larger-scale unitary operator under the same quantum computing equipment.

In a specific example of the disclosed approach, the preset single qubit gate acts on the qubit. For example, the preset single qubit gates correspond to qubits one to one, that is, one preset single qubit gate is applied to one qubit. Therefore, circuit support is provided for the approximate quantum circuit of the target unitary operator obtained based on the preset parameterized quantum circuit training.

In a specific example of the disclosed solution, the predetermined single-quantum-bit gate is U ₃ A rotary door, U ₃ The revolving door comprises three adjustable parameters, and each adjustable parameter corresponds to an X axis, a Y axis and a Z axis respectively, so that circuit support is provided for compiling any target unitary operator.

In a specific example of the disclosed solution, the d-th layer contains 3 × n adjustable parameters. Thus, circuit support is provided for compiling any target unitary operator.

In a specific example of the disclosed scheme, a controlled non-CNOT gate is applied between two adjacent qubits, and a controlled non-CNOT gate is applied between a first qubit of the n qubits and a last qubit of the n qubits. Thus, circuit support is further provided for compiling any target unitary operator.

For example, the preset parameterized quantum circuit V (θ) includes: for a target unitary operator U with n qubits, the predetermined parameterized quantum circuit V (θ) to be trained also needs to include n qubits. At this time, each layer of the circuit includes: n qubits, n single qubit rotary gates U ₃ (i.e., a generalized rotation operation on a Bloch sphere, such as a rotation operation in the X, Y, or Z axis) and n CNOT gates. Here, D (a natural number equal to or greater than 1) is related to n, and for example, if n is larger, the target unitary operator is more complicated, and the number of layers is more necessary to increase the expression capability of the circuit.

Specifically, the D (D is a natural number of 1 or more and D or less) th layer circuit includes: n qubits, respectively qubits Q ₁ To Q _n And a single qubit rotary gate U acting on each qubit ₃ N in total; and a CNOT gate acting between two adjacent qubits, n-1 in total, and a first qubit Q ₁ And the last qubit Q _n A CNOT gate, namely n CNOT gates.

Here, the single qubit rotary gate U ₃ The circuit comprises 3 adjustable parameters theta, wherein each adjustable parameter corresponds to an X axis, a Y axis and a Z axis respectively, and each layer of circuit comprises 3X n adjustable parameters theta based on the adjustable parameters theta.

Further, as shown in fig. 2, for a preset parameterized quantum circuit V (θ) of 4 qubits, the first layer of circuits comprises:

quantum bit Q ₁ Qubit Q ₂ Qubit Q ₃ And a qubit Q ₄ ；

And, a single qubit rotary gate U for each qubit action ₃ Total 4 single quantum bit rotary gates U ₃ (ii) a Further, each single quantum bit revolving gate U ₃ All have three parameters, for acting on qubit Q ₁ Single quantum bit rotary gate U ₃ In other words, the three adjustable parameters can be respectively recorded as θ ₁₁ ，θ ₁₂ And theta ₁₃ I.e. the effect on qubit Q ₁ Single quantum bit rotary gate U ₃ Can be recorded as U ₃ (θ ₁₁ ，θ ₁₂ ，θ ₁₃ ) (ii) a Analogously, acting on qubit Q ₂ Single quantum bit rotary gate U ₃ Can be recorded as U ₃ (θ ₂₁ ，θ ₂₂ ，θ ₂₃ ) Acting on qubit Q ₃ Single quantum bit rotary gate U ₃ Can be recorded as U ₃ (θ ₃₁ ，θ ₃₂ ，θ ₃₃ ) And acts on qubit Q ₄ Single quantum bit rotary gate U ₃ Can be recorded as U ₃ (θ ₄₁ ，θ ₄₂ ，θ ₄₃ ) A total of 3 × 4=12 adjustable parameters;

and qubit Q ₁ And qubit Q ₂ CNOT gate, qubit Q acting between ₂ And qubit Q ₃ Cnet gate, qubit Q ₃ And qubit Q ₄ Interoperable CNOT gate, and qubit Q ₁ And qubit Q ₄ The CNOT gates acting in between, namely 4 CNOT gates in total.

In a specific example of the disclosed solution, each layer of circuit structure is the same. Continuing to take 4 qubits as an example, as shown in fig. 3, the circuit structure of the second layer circuit (i.e., the circuit structure of layer D = 2) is the same as the circuit structure of the first layer circuit (i.e., the circuit structure of layer D = 1), and is not described again here; the single qubit rotary gate U acting on the qubit Q1 in the second layer of circuitry can be implemented just to distinguish between the tunable parameters ₃ Can be recorded as U ₃ (θ ₅₁ ，θ ₅₂ ，θ ₅₃ ) (ii) a In the same way, the single-qubit rotary gate U acting on the qubit Q2 in the second layer circuit ₃ Can be recorded as U ₃ (θ ₆₁ ，θ ₆₂ ，θ ₆₃ ) A single-qubit rotation gate U acting on the qubit Q3 in the second-level circuit ₃ Can be recorded as U ₃ (θ ₇₁ ，θ ₇₂ ，θ ₇₃ ) And a single-qubit rotation gate U for applying a qubit Q4 in the second-level circuit ₃ Can be recorded as U ₃ (θ ₈₁ ，θ ₈₂ ，θ ₈₃ )。

It should be noted that, when the preset parameterized quantum circuit V (θ) is applied to a specific quantum state, the preset parameterized quantum circuit V (θ) may be applied layer by layer, for example, the circuit structure of the first layer is applied to the specific quantum state, then the second layer is applied to the specific quantum state, and so on. It is understood that fig. 3 is an exemplary illustration, only showing a two-layer structure, and in practical applications, there may be more layers, and the present disclosure is not limited thereto.

Thus, compared with a scheme which needs a unitary operator as input, the scheme disclosed by the invention has the advantages of wider application range and higher universality. Moreover, for an unknown unitary operator U, the scheme of the invention does not need to directly access the unknown unitary operator into a preset parameterized quantum circuit for training, and can complete a compiling task only by taking the constructed n +1 pairs of quantum states as input data. Moreover, even in a scene using an unknown unitary operator as an input, for an unknown unitary operator with a quantum bit number of n, a circuit width (i.e. the number of quantum bits used by a preset parameterized quantum circuit) required by the disclosed scheme is n, which is smaller than a circuit width 2n required by the existing scheme, so that compared with the existing scheme, the disclosed scheme can compile a larger-scale unitary operator under the same quantum computing equipment.

In a specific example of the disclosure, the at least n +1 predetermined quantum states satisfy the following requirements:

for the ith preset quantum state ρ of the at least n +1 preset quantum states _i And i is 0,1, \8230thatup to n, i.e. for n +1 preset quantum states, all satisfy

In the case of (1), obtaining

Wherein the U is the target unitary operator; and V (theta) is the preset parameterized quantum circuit, and theta is an adjustable parameter.

In this way, support is provided for the approximate quantum circuit that uses the least input states to train the resulting target unitary operator. Moreover, the solution of the present disclosure has great advantages in terms of efficiency and cost consumption compared to the existing solutions. For example, when n is larger, the scheme disclosed by the invention can effectively reduce the consumption of preparing and storing quantum states, and simultaneously reduce the time required for training the parameterized quantum circuit. Furthermore, the scheme of the present disclosure can use less data to calculate the loss function, which means that the scheme of the present disclosure has smaller error, so the accuracy is higher, and the practicability is stronger.

In a specific example of the presently disclosed subject matter, the at least n +1 predetermined quantum states include: one preset pure state and n preset mixed states.

Therefore, the pure state and the mixed state are innovatively used as training data in the scheme, and the high-efficiency general unitary operator compiling scheme is designed, so that technical support can be provided for running a complex quantum algorithm on recent quantum equipment, and the practicability of the recent quantum equipment is improved.

Moreover, compared with the existing scheme of only using a pure state as a training data set, the scheme disclosed by the invention has the advantages of higher efficiency and lower cost. For example, for an unknown unitary operator comprising n qubits, the number of pure states required to be used by the existing scheme is of the exponential order (O (2) ⁿ ) And the disclosed solution may use at least n +1 pairs of quantum states, or it may be said that the disclosed solution only needs to use n +1 pairs of quantum states.

In a specific example of the present disclosure, the preset pure state ρ is ₀ Comprises the following steps:

thus, support is provided for compiling unknown unitary operators using fewer input states.

In a specific example of the disclosed solution, the predetermined mixing state ρ is _i (i =1,2, \8230;, n) is the first precursorSetting tensor products of the single-bit quantum states and n second preset single-bit quantum states; different preset mixing states rho in the process of tensor product calculation _i In the above, the calculation positions of the first preset single-bit quantum states are different. Thus, support is provided for compiling unknown unitary operators using fewer input states.

In a specific example of the present disclosure, the first predetermined single-bit quantum state is

And/or the second predetermined single-bit quantum state is

For example, in one specific example, the predetermined pure state ρ is constructed ₀ The method comprises the following specific steps:

wherein, the first and the second end of the pipe are connected with each other,

n preset mixed states of construction

The method can be specifically as follows:

here, the calculation positions of σ differ in different preset mixture states. Further, σ is a single-bit quantum state, and the scheme of the present disclosure is referred to as a first preset single-bit quantum state, and specifically includes:

τ is also a single-bit quantum state, and the scheme of the present disclosure is referred to as a second predetermined single-bit quantum state, specifically:

it should be noted that the preset parameterized quantum circuit V (θ) is trained based on n +1 preset quantum states constructed by the scheme of the present disclosure, and then the approximate quantum circuit of the unknown unitary operator can be obtained.

Here, it should be noted that, in the present disclosure, if n +2 or more predetermined quantum states are used, at this time, only the first n +1 predetermined quantum states need to satisfy the above requirement, and the n +2 th predetermined quantum state may be any quantum state.

Therefore, the quantum-classical hybrid model is used in the scheme, the optimization algorithm in machine learning is combined, pure states and mixed states are innovatively used as training data, and a high-efficiency general unitary operator compiling scheme is designed, so that technical support can be provided for complex quantum algorithms running on recent quantum equipment, and the practicability of the recent quantum equipment is improved.

Moreover, compared with the existing scheme, the scheme disclosed by the invention has stronger universality and higher efficiency, and is a unitary operator compiling scheme with practicability, high efficiency and accuracy.

The utility model also provides a unitary operator compiling method, which is applied to quantum computing equipment; as shown in fig. 4, includes:

step S401: the quantum computing equipment acts the preset parameterized quantum circuit on the ith preset quantum state in at least n +1 preset quantum states under the condition that the self adjustable parameter is in the first parameter value, and the ith first output state is obtained.

Step S402: quantum computing equipment obtains an ith measurement result, wherein the ith measurement result represents an ith trace distance between the ith first output state and an ith target output state; the ith target output state represents an output state of a target unitary operator to be compiled after the target unitary operator acts on the ith preset quantum state; the target unitary operator is a unitary operator containing n quantum bits; the preset parameterized quantum circuit is a quantum circuit containing the n quantum bits; n is a natural number greater than or equal to 1, and i is a natural number greater than or equal to 1 and less than or equal to n + 1. According to the scheme, at least n +1 measurement results can be obtained by the quantum computing equipment.

Step S403: and sending the ith measurement result. And then at least n +1 measurement results are sent.

It should be noted that the quantum computing device may obtain one measurement result and then send the measurement result to the classical computing device, or may obtain all measurement results and send the measurement results to the classical computing device together, which is not limited in this disclosure.

Meanwhile, the unitary operator is an unknown unitary operator, so that the scheme disclosed by the invention is wider in application range and higher in universality compared with a scheme which needs the unitary operator as input. Moreover, for an unknown unitary operator U, the scheme disclosed by the invention does not need to directly access the unknown unitary operator into a preset parameterized quantum circuit for training, and can complete a compiling task by only taking at least n +1 constructed pairs of quantum states as input data.

It can be understood that the adjustable parameter described in the present disclosure may be one parameter or multiple parameters, and the present disclosure is not limited thereto, as long as the approximate quantum circuit of the target unitary operator can be obtained based on the preset parameterized quantum circuit training. Accordingly, when two or more adjustable parameters are provided, the first parameter value, and the second parameter value described later, are not a specific value, but refer to the parameter value corresponding to the corresponding parameter, for example, a group of parameter values corresponding to the group of parameters.

In a specific example of the present disclosure, the quantum computing device applies the target unitary operator to be compiled to the ith preset quantum state of the at least n +1 preset quantum states to obtain the ith target output state. Thus, a training data set is obtained, and data support is provided for compiling and obtaining an approximate circuit of the target unitary operator.

In a specific example of the disclosed aspect, the quantum computing device receives a second parameter value of the adjustable parameter; under the condition that the self-adjustable parameter of the preset parameterized quantum circuit is in the second parameter value, the preset parameterized quantum circuit acts on the ith preset quantum state in at least n +1 preset quantum states to obtain the ith new first output state; obtaining an ith new measurement result; wherein the ith new metric result characterizes an ith new trace distance between the ith new first output state and the ith target output state; and sending the ith new measurement result. That is to say, in the scheme of the present disclosure, the quantum computing device is configured to prepare a preset parameterized quantum circuit and obtain a measurement result, and the classical computing device is responsible for computing a loss value and updating a parameter, so as to train the preset parameterized quantum circuit, implement a quantum-classical hybrid algorithm, and provide technical support for obtaining an approximate quantum circuit of a target unitary operator.

In a specific example of the disclosure, the preset parameterized quantum circuit includes a D-layer circuit, and a D-layer circuit in the D-layer circuit includes:

n qubits, n preset single qubit gates and n controlled non-CNOT gates;

the D is related to the number n of quantum bits contained in the target unitary operator, the D is a natural number which is greater than or equal to 1, and the D is a natural number which is greater than or equal to 1 and less than or equal to D.

In a specific example of the disclosed approach, the preset single qubit gate acts on the qubit. For example, the preset single qubit gates correspond to qubits one-to-one, that is, one preset single qubit gate is applied to one qubit. Therefore, circuit support is provided for the approximate quantum circuit of the target unitary operator obtained based on the preset parameterized quantum circuit training.

In a specific example of the disclosed solution, the predetermined single-quantum-bit gate is U ₃ A revolving door of U ₃ The revolving door comprises three adjustable parameters, and each adjustable parameter corresponds to an X axis, a Y axis and a Z axis respectively, so that circuit support is provided for compiling any target unitary operator.

In a specific example of the disclosed scheme, a controlled non-CNOT gate is operated between two adjacent qubits, and a controlled non-CNOT gate is operated between a first qubit of the n qubits and a last qubit of the n qubits. Thus, circuit support is further provided for compiling any target unitary operator.

For example, the preset parameterized quantum circuit V (θ) comprises: for a D (D is a natural number greater than or equal to 1) layer circuit with the same layer structure, that is, including a D layer circuit, for a target unitary operator U with n qubits, the preset parameterized quantum circuit V (θ) to be trained also needs to contain n qubits. At this time, each layer of the circuit includes: n quantum bits, n single quantum bit revolving gates U ₃ (i.e., a generalized rotation operation on a Bloch sphere, such as a rotation operation in the X, Y, or Z axis) and n CNOT gates. Here, D (a natural number of 1 or more) is related to n, and for example, if n is larger, the target unitary operator is more complicated, and the likeThe more layers are required to increase the expressive power of the circuit.

Specifically, the D (D is a natural number of 1 or more and D or less) th layer circuit includes: n qubits, respectively qubits Q ₁ To Q _n And a single qubit rotary gate U acting on each qubit _３ N in total; and a CNOT gate acting between two adjacent qubits, n-1 in total, and a first qubit Q ₁ And the last qubit Q _n A CNOT gate, namely n CNOT gates.

quantum bit Q ₁ Qubit Q ₂ Qubit Q ₃ And a qubit Q ₄ ；

And, a single qubit rotary gate U for each qubit action ₃ Total 4 single quantum bit revolving gates U ₃ (ii) a Further, each single quantum bit revolving gate U _３ All have three parameters, for acting on qubit Q ₁ Single quantum bit rotary gate U _３ In other words, the three adjustable parameters can be respectively recorded as θ _１１，θ _１2 And theta ₁₃ I.e. the effect on qubit Q ₁ Single quantum bit rotary gate U ₃ Can be recorded as U ₃ (θ ₁₁ ，θ ₁₂ ，θ ₁₃ ) (ii) a Analogously, acting on qubit Q ₂ Single quantum bit rotary gate U ₃ Can be recorded as U ₃ (θ ₂₁ ，θ ₂₂ ，θ ₂₃ ) Acting on qubit Q ₃ Single quantum bit rotary gate U ₃ Can be recorded as U ₃ (θ ₃₁ ，θ _３２，θ ₃₃ ) And acts on qubit Q ₄ Single quantum bit rotary gateU ₃ Can be recorded as U ₃ (θ ₄₁ ，θ ₄₂ ，θ ₄₃ ) A total of 3 × 4=12 adjustable parameters;

and a qubit Q ₁ And qubit Q ₂ CNOT gate, qubit Q acting between ₂ And qubit Q ₃ Cnet gate, qubit Q ₃ And qubit Q ₄ Interoperable CNOT gate, and qubit Q ₁ And qubit Q ₄ The CNOT gates acting in between, namely 4 CNOT gates in total.

In a specific example of the disclosed solution, each layer of circuit structure is the same. Continuing to take 4 qubits as an example, as shown in fig. 3, the circuit structure of the second layer circuit (i.e., the circuit structure of layer D = 2) is the same as the circuit structure of the first layer circuit (i.e., the circuit structure of layer D = 1), and is not described again here; the single qubit rotary gate U acting on the qubit Q1 in the second layer of circuitry can be implemented just to distinguish between the tunable parameters ₃ Can be recorded as U ₃ (θ ₅₁ ，θ ₅₂ ，θ ₅₃ ) (ii) a Similarly, the single-quantum bit rotary gate U acting on the quantum bit Q2 in the second layer circuit ₃ Can be recorded as U ₃ (θ ₆₁ ，θ ₆₂ ，θ ₆₃ ) A single-quantum bit rotary gate U acting on the quantum bit Q3 in the second layer circuit ₃ Can be recorded as U ₃ (θ ₇₁ ，θ ₇₂ ，θ ₇₃ ) And a single qubit rotary gate U for acting on the qubit Q4 in the second layer circuit ₃ Can be recorded as U ₃ (θ ₈₁ ，θ ₈₂ ，θ ₈₃ )。

It should be noted that, when the preset parameterized quantum circuit V (θ) is applied to a specific quantum state, the preset parameterized quantum circuit V (θ) may be applied layer by layer, for example, a circuit structure of a first layer is applied to the specific quantum state, then a second layer is applied to the specific quantum state, and so on. It is understood that fig. 3 is an exemplary illustration, only showing a two-layer structure, and in practical applications, there may be more layers, and the present disclosure is not limited thereto.

Thus, compared with a scheme which needs a unitary operator as input, the scheme disclosed by the invention has the advantages of wider application range and higher universality. Moreover, for an unknown unitary operator U, the scheme disclosed by the invention does not need to directly access the unknown unitary operator into a preset parameterized quantum circuit for training, and can complete a compiling task only by taking the constructed n +1 pairs of quantum states as input data. Moreover, even in a scene using an unknown unitary operator as an input, for an unknown unitary operator with a quantum bit number of n, a circuit width (i.e. the number of quantum bits used by a preset parameterized quantum circuit) required by the disclosed scheme is n, which is smaller than a circuit width 2n required by the existing scheme, so that compared with the existing scheme, the disclosed scheme can compile a larger-scale unitary operator under the same quantum computing equipment.

In the case of (1), obtaining

In this way, support is provided for the approximate quantum circuit trained to the target unitary operator using the fewest input states. Moreover, the disclosed solution has great advantages in terms of efficiency and cost consumption compared to existing solutions. For example, when n is large, the scheme disclosed by the invention can effectively reduce the consumption of preparing and storing quantum states, and simultaneously reduce the time required for training the parameterized quantum circuit. Moreover, the scheme of the disclosure can use less data to calculate the loss function, which means that the scheme of the disclosure has smaller error, so the accuracy is higher and the practicability is stronger.

In a specific example of the presently disclosed subject matter, the at least n +1 predetermined quantum states include: a predetermined pure state and n predetermined mixed states.

Moreover, compared with the existing scheme of only using the pure state as the training data set, the scheme disclosed by the invention has the advantages of higher efficiency and lower cost. For example, for an unknown unitary operator comprising n qubits, the number of pure states required to be used by the existing scheme is of the exponential order (O (2) ⁿ ) And the disclosed scheme requires at least n +1 pairs of quantum states.

In a specific example of the disclosed solution, the predetermined mixing state ρ is _i (i =1,2, \8230;, n) is the tensor product of a first preset single-bit quantum state and n second preset single-bit quantum states; different preset mixing states rho in the process of tensor product calculation _i In the above, the calculation positions of the first preset single-bit quantum states are different. Thus, support is provided for compiling unknown unitary operators using fewer input states.

In a specific example of the disclosed solution, the first predetermined single-bit quantum state is

And/or the second predetermined single-bit quantum state is

For example, in one specific example, the predetermined pure state ρ of the structure is ₀ The method comprises the following specific steps:

wherein the content of the first and second substances,

n preset mixed states of construction

The method can be specifically as follows:

here, the calculation positions of σ differ in different preset mixture states. Further, σ is a single-bit quantum state, and the scheme of the present disclosure is referred to as a first preset single-bit quantum state, specifically:

Thus, for the unitary operator compilation task, the significant advantages of the disclosed scheme are as follows:

first, compared with a scheme that needs a unitary operator as input, the scheme disclosed by the invention has the advantages of wider application range and higher universality. Moreover, for an unknown unitary operator U, the scheme disclosed by the invention does not need to directly access the unknown unitary operator into a preset parameterized quantum circuit for training, and can complete a compiling task only by taking at least n +1 constructed pairs of quantum states as input data. Moreover, even in a scene using an unknown unitary operator as an input, for an unknown unitary operator with a quantum bit number of n, a circuit width (i.e. the number of quantum bits used by a preset parameterized quantum circuit) required by the disclosed scheme is n, which is smaller than a circuit width 2n required by the existing scheme, so that compared with the existing scheme, the disclosed scheme can compile a larger-scale unitary operator under the same quantum computing equipment.

Second, the disclosed scheme is more efficient and less costly than existing schemes that use only the pure state as the training data set. In particular, for an unknown unitary operator comprising n qubits, the number of pure states required to be used by the existing scheme is of the exponential order (O (2) ⁿ ) And the disclosed scheme requires at least n +1 pairs of quantum states, and thus has great advantages in terms of efficiency and cost consumption compared to the existing scheme. Moreover, when n is larger, the scheme disclosed by the invention can effectively reduce the consumption of preparing and storing the quantum state, and simultaneously reduce the time required for training the parameterized quantum circuit. Furthermore, the scheme of the present disclosure can use less data to calculate the loss function, which means that the scheme of the present disclosure has smaller error, so the accuracy is higher, and the practicability is stronger.

Generally speaking, compared with the existing scheme, the scheme disclosed by the invention has stronger universality and higher efficiency, and is a unitary operator compiling scheme with practicability, high efficiency and accuracy.

The disclosed aspects are described in further detail below with reference to specific examples, in particular, the disclosed aspects make innovative use of pure forms andcompared with the existing scheme, the hybrid state is used as training data to compile the unitary operator, so that the method has stronger universality, reduces resource consumption and has better operation efficiency. Specifically, for any unitary operator (i.e. target unitary operator) U containing n qubits, the disclosed scheme only needs to use n +1 pairs of quantum states (i.e. at least n +1 pairs of quantum states) as training data set to optimize the preset parameterized quantum circuit V (θ) containing n qubits, so as to obtain an approximate quantum circuit V (θ) of the target unitary operator U ^* )。

The first section, which explains the pre-set parameterized quantum circuit:

in the present example, the preset parameterized quantum circuit V (θ) includes: for a target unitary operator U with n qubits, the predetermined parameterized quantum circuit V (θ) to be trained also needs to include n qubits. At this time, each layer of the circuit includes: n qubits, n single qubit rotary gates U ₃ (i.e., a generalized rotation operation on a bloch sphere, e.g., a rotation operation in the X, Y, or Z axis) and n CNOT gates. Here, D (a natural number equal to or greater than 1) is related to n, and for example, if n is larger, the target unitary operator is more complicated, and the number of layers is more necessary to increase the expression capability of the circuit.

Specifically, the D (D is a natural number of 1 or more and D or less) th layer circuit includes: n qubits, respectively qubits Q ₁ To Q _n And a single qubit rotary gate U acting on each qubit ₃ N in total; and a CNOT gate acting between two adjacent qubits, n-1 in total, and a first qubit Q ₁ And the last qubit Q _n A CNOT gate, i.e. n CNOT gates.

Here, the single qubit rotary gate U ₃ The circuit comprises 3 adjustable parameters theta, wherein each adjustable parameter corresponds to an X axis, a Y axis and a Z axis respectively, and each layer of circuit comprises 3 multiplied by n adjustable parameters theta.

For example, as shown in fig. 2, for a preset parameterized quantum circuit V (θ) of 4 qubits, the first layer of circuits comprises:

quantum bit Q ₁ Qubit Q ₂ Qubit Q ₃ And a qubit Q ₄ ；

And, a single qubit rotary gate U for each qubit action ₃ Total 4 single quantum bit rotary gates U ₃ (ii) a Further, each single quantum bit revolving gate U ₃ All have three parameters, for acting on qubit Q ₁ Single quantum bit rotary gate U ₃ In other words, the three adjustable parameters may be respectively recorded as θ ₁₁ ，θ ₁₂ And theta ₁₃ I.e. the effect on qubit Q ₁ Single quantum bit rotary gate U ₃ Can be recorded as U ₃ (θ ₁₁ ，θ ₁₂ ，θ ₁₃ ) (ii) a Analogously, acting on qubit Q ₂ Single quantum bit rotary gate U ₃ Can be recorded as U ₃ (θ ₂₁ ，θ ₂₂ ，θ ₂₃ ) Acting on qubit Q ₃ Single quantum bit rotary gate U ₃ Can be recorded as U ₃ (θ ₃₁ ，θ ₃₂ ，θ ₃₃ ) And acts on qubit Q ₄ Single quantum bit rotary gate U ₃ Can be recorded as U ₃ (θ ₄₁ ，θ ₄₂ ，θ ₄₃ ) Total 3 × 4=12 adjustable parameters;

and a qubit Q ₁ And qubit Q ₂ Cnet gate, qubit Q ₂ And qubit Q ₃ CNOT gate, qubit Q acting between ₃ And qubit Q ₄ CNOT gate acting in between, and qubit Q ₁ And qubit Q ₄ The CNOT gates acting in between, namely 4 CNOT gates in total.

Further, as shown in fig. 3, the circuit structure of the second layer circuit (i.e., the circuit structure of the D =2 layer) is the same as the circuit structure of the first layer circuit (i.e., the circuit structure of the D =1 layer), and is not described herein again; acting on qubits Q in the second layer of circuitry only to distinguish between tunable parameters ₁ Single quantum bit rotary gate U ₃ Can be recorded as U ₃ (θ ₅₁ ，θ ₅₂ ，θ ₅₃ ) (ii) a In the same way, the second layer circuit acts on the quantum bit Q ₂ Single quantum bit rotary gate U ₃ Can be recorded as U ₃ (θ ₆₁ ，θ ₆₂ ，θ ₆₃ ) Acting on qubit Q in the second layer of circuitry ₃ Single quantum bit rotary gate U ₃ Can be recorded as U ₃ (θ ₇₁ ，θ ₇₂ ，θ ₇₃ ) And acting on qubit Q in the second layer of circuitry ₄ Single quantum bit rotary gate U ₃ Can be recorded as U ₃ (θ ₈₁ ，θ ₈₂ ，θ ₈₃ )。

It should be noted that, when the preset parameterized quantum circuit V (θ) is applied to a specific quantum state, the preset parameterized quantum circuit V (θ) may be applied layer by layer, for example, the circuit structure of the first layer is applied to the specific quantum state, then the second layer is applied to the specific quantum state, and so on.

It is understood that fig. 3 is an exemplary illustration, only showing a two-layer structure, and in practical applications, there may be more layers, and the present disclosure is not limited thereto.

A second part: constructing n +1 preset quantum states and providing data support for training a preset parameterized quantum circuit; specifically, the method comprises the following steps:

for a given quantum state (i.e., a predetermined quantum state) ρ, an output state (i.e., a first output state) is obtained by applying the predetermined parameterized quantum circuit V (θ) to the predetermined quantum state ρ

May be denoted as V for convenience _θ (ρ). Similarly, a unitary operator U (i.e. the target unitary operator to be compiled) acts on the preset quantum state ρ to obtain an output state (target output state)

Based on this, the input of the scheme of the present disclosure may specifically include:

n +1 PresetThe quantum state specifically includes: n preset mixing states

And a predetermined pure state rho ₀ ；

And a target output state obtained by applying an unknown unitary operator (i.e. unity, also called target unitary operator, or unknown quantum circuit) containing n qubits to n +1 predetermined quantum states

That is, in this example, the ith input state (i.e., the ith predetermined quantum state) ρ _i And ith target output state

Formed data pair

The training data set used for training for this example.

At the same time, a loss function is defined as

And

the average trace distance between the two, and then the preset parameterized quantum circuit V (theta) is trained in a parameter optimization mode to minimize the loss function, so that an approximate quantum circuit V (theta) of the target unitary operator U is obtained ^* ) I.e. preset parameterized quantum circuits V (theta) obtained after training ^* ) As an approximate quantum circuit of the target unitary operator U.

Here, the pure state and the mixed state of the present disclosure are briefly described; specifically, in quantum mechanics, a quantum state (quantum state) can be represented by a density matrix (density matrix), and can be divided into a pure state (pure state) and a mixed state (mixed state). To facilitate the disclosureIn distinction from the specific examples herein, the pure state may be denoted as ρ _p Mixed state is denoted as ρ _m (ii) a It can be understood that the preset pure state and the preset mixed state in the scheme of the disclosure both meet the following requirements; in particular, the amount of the solvent to be used,

pure state rho _p The density matrix of (d) can be expressed as p _p ＝|ψ><ψ | and mixed state ρ _m It can be expressed in the form of ensemble (ensemble) of more than two pure states, i.e. mixed state ρ _m The density matrix of (a) may be expressed as:

therein, sigma _i c _i And =1. Further, if the density matrix corresponding to a mixed state is full rank (full rank), the mixed state is called a full rank mixed state.

Further, in the scheme of the disclosure, the preset pure state rho of the structure ₀ The method specifically comprises the following steps:

n preset mixed states of construction

The method can be specifically as follows:

here, σ is a single-bit quantum state, and the present disclosure is referred to as a first preset single-bit quantum state, specifically:

it should be noted that the preset parameterized quantum circuit V (θ) is trained based on n +1 preset quantum states constructed by the scheme of the present disclosure, and the approximate quantum circuit of the unknown unitary operator can be obtained. The following simple demonstration proves that the n +1 preset quantum states constructed based on the scheme of the present disclosure can make the preset parameterized quantum circuit V (θ) and the target unitary operator (which may also be referred to as a target unitary matrix) U the same, i.e., V (θ) = U; the idea is as follows:

from the properties of the unitary matrix, it can be known that:

wherein I represents an identity matrix.

Based on this, in the case of V (θ) = U, there are:

thus, the emphasis turns to: applying a preset parameterized quantum circuit V (theta) and a target unitary operator U to an input state (i-th preset quantum state) rho in a preset training data set _i Then, the loss function when training is 0, i.e.

Slightly transformed to obtain

Then, the following equation proves to hold, namely:

i.e., V (θ) = U.

First, it can be demonstrated that: rho of the scheme of the disclosure ₁ ,…,ρ _n When the condition is satisfied

When the utility model is used, the water is discharged,

is a full rank diagonal matrix.

Second, when ρ ₀ Satisfy the requirements of

It can be shown that a full rank diagonal matrix is obtained

All diagonal elements are equal, and thus, one can obtain

Further description of the invention

Here, in a quantum system, the global phase is negligible.

Thus, it is proved that the preset parameterized quantum circuit V (θ) and the target unitary operator (also referred to as a target unitary matrix) U can be the same by obtaining n +1 preset quantum states constructed based on the scheme disclosed herein, in other words, the n +1 preset quantum states constructed based on the scheme disclosed herein are enough to ensure that the target unitary operator U is obtained by learning through training the preset parameterized quantum circuit V (θ). Namely, the output of the disclosed scheme is approximate quantum circuit V (theta) of target unitary operator U ^* )。

And a third part: the main steps of model training of quantum-classical mixture include:

as shown in fig. 5 and 6, the method includes:

step 1: a preset parameterized quantum circuit V (theta) is prepared on a quantum computing device. Meanwhile, a target unitary operator U is acted on a preset quantum state on quantum computing equipment

In the above, the obtained target output state

And 2, step: respectively acting preset parameterized quantum circuits V (theta) on preset quantum states on a quantum computing device

In the above, the corresponding output state (i.e. the first output state) is obtained

And step 3: in quantum computing devices, a metric is applied to the ith quantum state ρ _i The ith first output state V is obtained _θ (ρ _i ) And applied to the i-th quantum state ρ _i The ith target output state U (rho) obtained above _i ) Track distance between T (V) _θ (ρ _i ),U(ρ _i ))。

And 4, step 4: on a classical computing device, a first output state

And target output state

The average Trace distance (Trace distance) between them as a loss function C (θ), i.e.:

where T (·, ·) represents the trace distance between the two quantum states.

The loss value of the loss function is obtained based on step 3.

And 5: in a classical computing device, parameters are adjusted by a gradient descent method or other optimization methodsCounting theta, repeating the steps 2 to 4 to minimize the loss value of the loss function C (theta), and obtaining the target parameterized quantum circuit V (theta) under the condition that the loss value of the loss function C (theta) is smaller than a preset threshold value or converges to a fixed value ^* ) The V (θ) ^* ) Namely an approximate quantum circuit of the target unitary operator U.

It is worth noting that the scheme of the present disclosure adopts a quantum-classical hybrid algorithm, sets a preset parameterized quantum circuit V (θ) on a quantum computer (i.e., a quantum computing device), measures a trace distance between an output state (a first output state) and a target output state, calculates a loss function C (θ) on the classical computer (i.e., the classical computing device), optimizes the parameter θ by using a conventional optimization method, and then returns the optimized θ to the quantum computer to update the preset parameterized quantum circuit, so as to complete training.

The method uses a quantum-classical hybrid model, combines an optimization algorithm commonly used in machine learning, innovatively uses a pure state and a mixed state as training data, and designs a high-efficiency general unitary operator compiling scheme, so that technical support can be provided for running a complex quantum algorithm on recent quantum equipment, and the practicability of the recent quantum equipment is improved.

The fourth part: a specific example; namely, a randomly generated target unitary operator U is compiled based on the disclosed scheme, specifically:

this example compiles a target unitary operator U comprising 2 qubits, 3 qubits and 4 qubits and calculates a quantum gate fidelity F (U, V) between the target unitary operator U and the resulting approximated quantum circuit V, the results of which are shown in the table below.

Number of qubits	2	3	4
				Quantum gate fidelity	0.99998040	0.99994125	0.99974797

The experimental result shows that the quantum gate fidelity between the approximate quantum circuit V and the target unitary operator U obtained by the scheme is very high. It is noted that, considering the efficiency of the experiment, the present example has a loss function of less than 10 ^-4 The optimization is stopped. In fact, if the loss function is optimized to 0, the fidelity of the disclosed scheme will reach 1 exactly, i.e. the target unitary operator is compiled perfectly.

In summary, for the unitary operator compilation task, the disclosed scheme has the following significant advantages:

first, compared with a scheme that requires a unitary operator as an input, the scheme disclosed by the present disclosure has a wider application range and higher generality. Moreover, for an unknown unitary operator U, the scheme of the invention does not need to directly access the unknown unitary operator into a preset parameterized quantum circuit for training, and can complete a compiling task only by taking the constructed n +1 pairs of quantum states as input data. Moreover, even in a scene using an unknown unitary operator as an input, for an unknown unitary operator with a quantum bit number of n, a circuit width (i.e., the number of quantum bits used by a preset parameterized quantum circuit) required by the disclosed scheme is n, which is smaller than a circuit width 2n required by the existing scheme, so that compared with the existing scheme, the disclosed scheme can compile a larger-scale unitary operator under the same quantum computing equipment.

Second, the disclosed scheme is more efficient and less costly than existing schemes that use only the pure state as the training data set. In particular for a composition comprising n quantitiesThe number of pure states required by the prior art scheme for the unknown unitary operator of a sub-bit is exponential (O (2) ⁿ ) And the disclosed scheme requires at least n +1 pairs of quantum states, and thus has great advantages in terms of efficiency and cost consumption compared to the existing scheme. Moreover, when n is larger, the scheme disclosed by the invention can effectively reduce the consumption of preparing and storing the quantum state, and simultaneously reduce the time required for training the parameterized quantum circuit. Furthermore, the scheme of the present disclosure can use less data to calculate the loss function, which means that the scheme of the present disclosure has smaller error, so the accuracy is higher, and the practicability is stronger.

In general, compared with the existing scheme, the scheme disclosed by the invention has stronger universality and higher efficiency, and is a unitary operator compiling scheme with practicability, high efficiency and accuracy.

The present disclosure also provides a classic computing device, as shown in fig. 7, including:

a first obtaining unit 701, configured to obtain at least n +1 measurement results, where an ith measurement result in the at least n +1 measurement results represents an ith trace distance between an ith first output state and an ith target output state; the ith first output state is an output state which is acted on the ith preset quantum state in at least n +1 preset quantum states under the condition that the self adjustable parameter of the preset parameterized quantum circuit is in the first parameter value; the ith target output state represents an output state of a target unitary operator to be compiled after the target unitary operator acts on the ith preset quantum state; the target unitary operator is a unitary operator containing n qubits; the preset parameterized quantum circuit is a quantum circuit comprising n quantum bits; n is a natural number which is more than or equal to 1, and i is a natural number which is more than or equal to 1 and less than or equal to n + 1;

a loss value calculating unit 702, configured to calculate a loss value of a loss function representing an average trace distance based on the ith trace distance represented by the ith measurement result;

a determining unit 703, configured to use, when the loss value of the loss function meets an iteration requirement, a preset parameterized quantum circuit with the adjustable parameter at the first parameter value as a target parameterized quantum circuit, where the target parameterized quantum circuit is an approximate quantum circuit of the target unitary operator to be compiled.

In a specific example of the present disclosure, the method further includes: a first transmitting unit; wherein, the first and the second end of the pipe are connected with each other,

the determining unit is further configured to adjust the first parameter value of the adjustable parameter to a second parameter value if the loss value of the loss function does not meet the iteration requirement;

the first sending unit is configured to send a second parameter value of the adjustable parameter.

In a specific example of the disclosed aspect, wherein,

the first obtaining unit is further configured to obtain an ith new metric result, and obtain n +1 new metric results, where the ith new metric result represents an ith new trace distance between an ith new first output state and the ith target output state; the ith new first output state is an output state acted on the ith preset quantum state by the preset parameterized quantum circuit under the condition that the self adjustable parameter is in the second parameter value;

and the loss value calculating unit is further configured to calculate a new loss value of the loss function based on the ith new trace distance represented by the ith new metric result until the new loss value meets the iteration requirement.

In a specific example of the disclosure, the preset parameterized quantum circuit includes D-layer circuits, and a D-layer circuit in the D-layer circuits includes:

n qubits, n preset single qubit gates and n controlled non-CNOT gates;

In a specific example of the disclosed approach, the preset single qubit gate acts on the qubit.

In a specific example of the disclosed solution, the predetermined single-quantum-bit gate is U ₃ A rotary door, U ₃ The revolving door comprises three adjustable parameters.

In a specific example of the disclosure, the d-th layer contains 3 × n adjustable parameters.

In a specific example of the disclosed scheme, a controlled non-CNOT gate is applied between two adjacent qubits, and a controlled non-CNOT gate is applied between the first and last qubits of the n qubits.

In a specific example of the disclosed solution, each layer of circuit structure is the same.

for the ith preset quantum state ρ of the at least n +1 preset quantum states _i And i is 0,1, \ 8230, and up to n, i.e. for n +1 preset quantum states, all satisfy

In the case of (1), obtaining

in one specific example of the disclosed solution,

the preset mixed state rho _i (i =1,2, \8230;, n) is a first presetA tensor product of the single-bit quantum state and n second preset single-bit quantum states; different preset mixing states rho in the process of tensor product calculation _i In the above, the calculation positions of the first preset single-bit quantum states are different.

And/or the second preset single-bit quantum state is

The specific functions of the units in the classic computing device can be described with reference to the above method, and are not described here again.

Therefore, the quantum-classical hybrid model is used in the scheme, the optimization algorithm in machine learning is combined, pure states and hybrid states are innovatively used as training data, and the high-efficiency general unitary operator compiling scheme is designed, so that technical support can be provided for running complex quantum algorithms on recent quantum equipment, and the practicability of the recent quantum equipment is improved.

Compared with the existing scheme, the scheme disclosed by the invention has stronger universality and higher efficiency, and is a unitary operator compiling scheme with practicability, high efficiency and accuracy.

The present disclosure also provides a quantum computing apparatus, as shown in fig. 8, including:

an output state determining unit 801, configured to apply the preset parameterized quantum circuit to an ith preset quantum state of the at least n +1 preset quantum states under a condition that an adjustable parameter of the preset parameterized quantum circuit is in a first parameter value, so as to obtain an ith first output state;

a measurement unit 802, configured to obtain an ith measurement result, where the ith measurement result represents an ith trace distance between the ith first output state and an ith target output state; the ith target output state represents an output state of a target unitary operator to be compiled, wherein the target unitary operator acts on the ith preset quantum state; the target unitary operator is a unitary operator containing n quantum bits; the preset parameterized quantum circuit is a quantum circuit containing the n quantum bits; n is a natural number greater than or equal to 1, and i is a natural number greater than or equal to 1 and less than or equal to n + 1;

a second sending unit 803, configured to send the ith metric result.

In a specific example of the disclosed aspect, wherein,

the output state determining unit is further configured to apply the unitary operator to be compiled to the ith preset quantum state of the at least n +1 preset quantum states to obtain the ith target output state.

In a specific example of the disclosed solution, the system further comprises a receiving unit; wherein the content of the first and second substances,

the receiving unit is used for receiving a second parameter value of the adjustable parameter;

the output state determining unit is further configured to apply the preset parameterized quantum circuit to an ith preset quantum state of at least n +1 preset quantum states under the condition that the self adjustable parameter is in the second parameter value, so as to obtain an ith new first output state;

the measurement unit is also used for obtaining the ith new measurement result; wherein the ith new metric result characterizes an ith new trace distance between the ith new first output state and the ith target output state;

the second sending unit is further configured to send the ith new metric result.

n qubits, n preset single qubit gates and n controlled non-CNOT gates;

In a specific example of the disclosed solution, the preset single qubit gate acts on the qubit.

In the case of (1), obtaining

in a specific example of the present disclosure, the preset mixed state ρ is _i (i =1,2, \8230;, n) is the tensor product of a first preset single-bit quantum state and n second preset single-bit quantum states; different preset mixing states rho in the process of tensor product calculation _i In the above, the calculation positions of the first preset single-bit quantum states are different.

And/or the second predetermined single-bit quantum state is

The specific functions of the units in the quantum computing device may be described with reference to the above method, and are not described herein again.

The present disclosure further provides a computing apparatus, as shown in fig. 9, including:

the classic computing device 901 described above; and

the quantum computing device 902 described above.

The specific structure of the classical computing device and the specific functions of each unit in the classical computing device may be described with reference to the above method, and similarly, the specific structure of the quantum computing device and the specific functions of each unit in the quantum computing device may be described with reference to the above method, and are not described here again.

The present disclosure also provides a non-transitory computer-readable storage medium storing computer instructions that, when executed by at least one quantum processing unit, cause the at least one quantum processing unit to perform the method of applying the above quantum computing device.

The present disclosure also provides a computer program product comprising a computer program which, when executed by a processor, implements the method described above as applied to a classical computing device;

alternatively, the computer program, when executed by at least one quantum processing unit, implements the method described for application to a quantum computing device.

The present disclosure also provides a quantum computing device, including:

at least one quantum processing unit;

the instructions are executable by the at least one quantum processing unit to enable the at least one quantum processing unit to perform the method as applied to a quantum computing device.

It is understood that a Quantum Processing Unit (QPU), also referred to as a quantum processor or quantum chip, used in the aspects of the present disclosure may refer to a physical chip comprising a plurality of qubits interconnected in a specific manner.

Moreover, it is understood that a qubit in accordance with aspects of the present disclosure may refer to a fundamental unit of information of a quantum computing device. Qubits are contained in QPUs and generalize the concept of classical digital bits.

According to the embodiment of the present disclosure, the present disclosure also provides a classic computing device (hereinafter, the classic computing device is specifically exemplified as an electronic device), a readable storage medium and a computer program product.

FIG. 10 illustrates a schematic block diagram of an example electronic device 1000 that can be used to implement embodiments of the present disclosure. Electronic devices are intended to represent various forms of digital computers, such as laptops, desktops, workstations, personal digital assistants, servers, blade servers, mainframes, and other appropriate computers. The electronic device may also represent various forms of mobile devices, such as personal digital processing, cellular phones, smart phones, wearable devices, and other similar computing devices. The components shown herein, their connections and relationships, and their functions, are meant to be examples only, and are not meant to limit implementations of the disclosure described and/or claimed herein.

As shown in fig. 10, the apparatus 1000 includes a computing unit 1001 that can perform various appropriate actions and processes according to a computer program stored in a Read Only Memory (ROM) 1002 or a computer program loaded from a storage unit 1008 into a Random Access Memory (RAM) 1003. In the RAM 1003, various programs and data necessary for the operation of the device 1000 can be stored. The calculation unit 1001, the ROM 1002, and the RAM 1003 are connected to each other by a bus 1004. An input/output (I/O) interface 1005 is also connected to bus 1004.

A number of components in device 1000 are connected to I/O interface 1005, including: an input unit 1006 such as a keyboard, a mouse, and the like; an output unit 1007 such as various types of displays, speakers, and the like; a storage unit 1008 such as a magnetic disk, optical disk, or the like; and a communication unit 1009 such as a network card, a modem, a wireless communication transceiver, or the like. The communication unit 1009 allows the device 1000 to exchange information/data with other devices through a computer network such as the internet and/or various telecommunication networks.

Computing unit 1001 may be a variety of general and/or special purpose processing components with processing and computing capabilities. Some examples of the computing unit 1001 include, but are not limited to, a Central Processing Unit (CPU), a Graphics Processing Unit (GPU), various dedicated Artificial Intelligence (AI) computing chips, various computing units running machine learning model algorithms, a Digital Signal Processor (DSP), and any suitable processor, controller, microcontroller, and so forth. The calculation unit 1001 performs the various methods and processes described above, such as the unitary operator compilation method applied to classical calculation devices. For example, in some embodiments, the unitary operator compilation method applied to classical computing devices can be implemented as a computer software program tangibly embodied in a machine-readable medium, such as storage unit 1008. In some embodiments, part or all of the computer program may be loaded and/or installed onto device 1000 via ROM 1002 and/or communications unit 1009. When the computer program is loaded into RAM 1003 and executed by computing unit 1001, one or more steps of the unitary operator compilation method described above as applied to classical computing devices may be performed. Alternatively, in other embodiments, the computing unit 1001 may be configured by any other suitable means (e.g., by means of firmware) to perform the unitary operator compilation method applied to classical computing devices.

Various implementations of the systems and techniques described here above may be implemented in digital electronic circuitry, integrated circuitry, field Programmable Gate Arrays (FPGAs), application Specific Integrated Circuits (ASICs), application Specific Standard Products (ASSPs), system on a chip (SOCs), load programmable logic devices (CPLDs), computer hardware, firmware, software, and/or combinations thereof. These various embodiments may include: implemented in one or more computer programs that are executable and/or interpretable on a programmable system including at least one programmable processor, which may be special or general purpose, receiving data and instructions from, and transmitting data and instructions to, a storage system, at least one input device, and at least one output device.

Program code for implementing the methods of the present disclosure may be written in any combination of one or more programming languages. These program codes may be provided to a processor or controller of a general purpose computer, special purpose computer, or other programmable data processing apparatus, such that the program codes, when executed by the processor or controller, cause the functions/operations specified in the flowchart and/or block diagram to be performed. The program code may execute entirely on the machine, partly on the machine, as a stand-alone software package partly on the machine and partly on a remote machine or entirely on the remote machine or server.

In the context of this disclosure, a machine-readable medium may be a tangible medium that can contain, or store a program for use by or in connection with an instruction execution system, apparatus, or device. The machine-readable medium may be a machine-readable signal medium or a machine-readable storage medium. A machine-readable medium may include, but is not limited to, an electronic, magnetic, optical, electromagnetic, infrared, or semiconductor system, apparatus, or device, or any suitable combination of the foregoing. More specific examples of a machine-readable storage medium would include an electrical connection based on one or more wires, a portable computer diskette, a hard disk, a Random Access Memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), an optical fiber, a compact disc read-only memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination of the foregoing.

To provide for interaction with a user, the systems and techniques described here can be implemented on a computer having: a display device (e.g., a CRT (cathode ray tube) or LCD (liquid crystal display) monitor) for displaying information to a user; and a keyboard and a pointing device (e.g., a mouse or a trackball) by which a user may provide input to the computer. Other kinds of devices may also be used to provide for interaction with a user; for example, feedback provided to the user can be any form of sensory feedback (e.g., visual feedback, auditory feedback, or tactile feedback); and input from the user can be received in any form, including acoustic, speech, or tactile input.

The systems and techniques described here can be implemented in a computing system that includes a back-end component (e.g., as a data server), or that includes a middleware component (e.g., an application server), or that includes a front-end component (e.g., a user computer having a graphical user interface or a web browser through which a user can interact with an implementation of the systems and techniques described here), or any combination of such back-end, middleware, or front-end components. The components of the system can be interconnected by any form or medium of digital data communication (e.g., a communication network). Examples of communication networks include: local Area Networks (LANs), wide Area Networks (WANs), and the Internet.

The computer system may include clients and servers. A client and server are generally remote from each other and typically interact through a communication network. The relationship of client and server arises by virtue of computer programs running on the respective computers and having a client-server relationship to each other. The server may be a cloud server, a server of a distributed system, or a server with a combined blockchain.

It should be understood that various forms of the flows shown above may be used, with steps reordered, added, or deleted. For example, the steps described in the present disclosure may be executed in parallel, sequentially or in different orders, and are not limited herein as long as the desired results of the technical solutions disclosed in the present disclosure can be achieved.

The above detailed description should not be construed as limiting the scope of the disclosure. It should be understood by those skilled in the art that various modifications, combinations, sub-combinations and substitutions may be made in accordance with design requirements and other factors. Any modification, equivalent replacement, and improvement made within the spirit and principle of the present disclosure should be included in the scope of protection of the present disclosure.

Claims

1. A unitary operator compiling method is applied to classical computing equipment; the method comprises the following steps:

obtaining at least n +1 measurement results, wherein an ith measurement result in the at least n +1 measurement results represents an ith trace distance between an ith first output state and an ith target output state; the ith first output state is an output state which acts on the ith preset quantum state in at least n +1 preset quantum states under the condition that the self adjustable parameter of the preset parameterized quantum circuit is in the first parameter value; the ith target output state represents an output state of a target unitary operator to be compiled after the target unitary operator acts on the ith preset quantum state; the target unitary operator is a unitary operator containing n qubits; the preset parameterized quantum circuit is a quantum circuit containing the n quantum bits; n is a natural number greater than or equal to 1, and i is a natural number greater than or equal to 1 and less than or equal to n + 1; the at least n +1 preset quantum states include: a predetermined pure state and n predetermined mixed states;

calculating a loss value of a loss function representing an average trace distance based on the ith trace distance represented by the ith measurement result; wherein the average trace distance is based on n +1 trace distances;

2. The method of claim 1, further comprising:

adjusting a first parameter value of the adjustable parameter to a second parameter value if a loss value of the loss function does not meet the iteration requirement;

and sending a second parameter value of the adjustable parameter.

3. The method of claim 2, further comprising:

obtaining an ith new measurement result, and obtaining at least n +1 new measurement results, wherein the ith new measurement result represents an ith new trace distance between an ith new first output state and the ith target output state; the ith new first output state is an output state acted on the ith preset quantum state by the preset parameterized quantum circuit under the condition that the self adjustable parameter is in the second parameter value;

and calculating a new loss value of the loss function based on the ith new trace distance represented by the ith new measurement result until the new loss value meets the iteration requirement.

4. The method of any one of claims 1 to 3, wherein the pre-set parameterized quantum circuit comprises D-layer circuits, a D-layer circuit of the D-layer circuits comprising:

n qubits, n preset single qubit gates and n controlled non-CNOT gates;

5. The method of claim 4, wherein the preset single qubit gate acts on the qubit.

6. The method of claim 4, wherein the predetermined single qubit gate is U ₃ A rotary door, U ₃ The revolving door comprises three adjustable parameters.

7. The method of claim 4, wherein the d-th layer contains a total of 3 x n tunable parameters.

8. The method of claim 4, wherein a controlled non-CNOT gate is operated between two adjacent qubits, and wherein a controlled non-CNOT gate is operated between a first qubit and a last qubit of the n qubits.

9. The method of claim 4, wherein each layer of circuit structure is the same.

10. The method of claim 1, wherein the at least n +1 preset quantum states satisfy the following requirement:

for in the at least n +1 predetermined quantum statesThe ith predetermined quantum state ρ _i And i is 0,1, \ 8230, and up to n, all satisfy

In the case of (2) to obtain

Wherein the U is the target unitary operator; the V (theta) is the preset parameterized quantum circuit, and theta is an adjustable parameter.

11. The method of claim 1 or 10, wherein the preset pure state p ₀ Comprises the following steps:

12. the method of claim 1 or 10, wherein the preset mixing state p _i (i =1,2, \8230;, n) is the tensor product of a first preset single-bit quantum state and n second preset single-bit quantum states; different preset mixing states rho in the process of tensor product calculation _i In the above, the calculation positions of the first preset single-bit quantum states are different.

13. The method of claim 12, wherein the first predetermined single-bit quantum state is

And/or the second predetermined single-bit quantum state is

14. A unitary operator compiling method is applied to quantum computing equipment; the method comprises the following steps:

under the condition that the self adjustable parameter of the preset parameterized quantum circuit is in the first parameter value, the preset parameterized quantum circuit acts on the ith preset quantum state in at least n +1 preset quantum states to obtain an ith first output state;

and sending the ith measurement result.

15. The method of claim 14, further comprising:

and applying the target unitary operator to be compiled to the ith preset quantum state in the at least n +1 preset quantum states to obtain the ith target output state.

16. The method of claim 14 or 15, further comprising:

receiving a second parameter value of the adjustable parameter;

under the condition that the self-adjustable parameter of the preset parameterized quantum circuit is in the second parameter value, the preset parameterized quantum circuit acts on the ith preset quantum state in at least n +1 preset quantum states to obtain the ith new first output state;

obtaining an ith new measurement result; wherein the ith new metric result characterizes an ith new trace distance between the ith new first output state and the ith target output state;

and sending the ith new measurement result.

17. The method of claim 14, wherein the pre-set parameterized quantum circuit comprises D-layer circuits, a D-th layer circuit of the D-layer circuits comprising:

n qubits, n preset single qubit gates and n controlled non-CNOT gates;

18. The method of claim 17, wherein the preset single qubit gate acts on the qubit.

19. The method of claim 17, wherein the predetermined single qubit gate is U ₃ A revolving door of U ₃ The revolving door comprises three adjustable parameters.

20. The method of claim 17, wherein the d-th layer contains a total of 3 x n adjustable parameters.

21. The method of claim 17, wherein a controlled non-CNOT gate is operated between two adjacent qubits, and wherein a controlled non-CNOT gate is operated between a first qubit and a last qubit of the n qubits.

22. The method of claim 17, wherein each layer of circuit structure is the same.

23. The method of claim 14, wherein the at least n +1 preset quantum states satisfy the following requirement:

for the ith preset quantum state ρ of the at least n +1 preset quantum states _i And i is 0,1, \ 8230, and up to n, all satisfy

In the case of (1), obtaining

24. The method of claim 23, wherein the at least n +1 preset quantum states comprise: one preset pure state and n preset mixed states.

25. The method of claim 24, wherein the preset pure state p ₀ Comprises the following steps:

26. the method of claim 24 or 25, wherein the preset mixing state p _i (i =1,2, \8230;, n) is the tensor product of a first preset single-bit quantum state and n second preset single-bit quantum states; different preset mixing states rho in the process of tensor product calculation _i In the above, the calculation positions of the first preset single-bit quantum states are different.

27. The method of claim 26, wherein the first predetermined single-bit quantum state is

And/or the second preset single-bit quantum state is

28. A classic computing device, comprising:

a first obtaining unit, configured to obtain at least n +1 measurement results, where an ith measurement result in the at least n +1 measurement results represents an ith trace distance between an ith first output state and an ith target output state; the ith first output state is an output state which acts on the ith preset quantum state in at least n +1 preset quantum states under the condition that the self adjustable parameter of the preset parameterized quantum circuit is in the first parameter value; the ith target output state represents an output state of a target unitary operator to be compiled, wherein the target unitary operator acts on the ith preset quantum state; the target unitary operator is a unitary operator containing n qubits; the preset parameterized quantum circuit is a quantum circuit comprising n quantum bits; n is a natural number greater than or equal to 1, and i is a natural number greater than or equal to 1 and less than or equal to n + 1; the at least n +1 preset quantum states include: a predetermined pure state and n predetermined mixed states;

a loss value calculation unit, configured to calculate a loss value of a loss function representing an average trace distance based on the ith trace distance represented by the ith measurement result; wherein the average trace distance is based on n +1 trace distances;

29. The classic computing device of claim 28, further comprising: a first transmitting unit; wherein the content of the first and second substances,

the determining unit is further configured to adjust a first parameter value of the adjustable parameter to a second parameter value when the loss value of the loss function does not meet the iteration requirement;

30. The classic computing device of claim 29, wherein,

the first obtaining unit is further configured to obtain an ith new metric result, and obtain at least n +1 new metric results, where the ith new metric result represents an ith new trace distance between an ith new first output state and the ith target output state; the ith new first output state is an output state after the preset parameterized quantum circuit acts on the ith preset quantum state under the condition that the self adjustable parameter is in the second parameter value;

31. The classical computing device according to any one of claims 28 to 30, wherein said preset parameterized quantum circuit comprises D-layer circuits, a D-layer circuit of said D-layer circuits comprising:

n qubits, n preset single qubit gates and n controlled non-CNOT gates;

32. The classic computing device of claim 31, wherein the preset single qubit gate acts on the qubit.

33. The classic computing device of claim 31, wherein the preset single qubit gate is U ₃ A rotary door, U ₃ The revolving door comprises three adjustable parameters.

34. The classic computing device of claim 31, wherein the d-th layer contains a total of 3 x n tunable parameters.

35. The classic computing device of claim 31, wherein a controlled non-CNOT gate is active between two adjacent qubits, and a controlled non-CNOT gate is active between a first qubit and a last qubit of the n qubits.

36. The classic computing device of claim 31, wherein each layer of circuit structure is the same.

37. The classical computing device according to claim 28, wherein said at least n +1 preset quantum states satisfy the following requirements:

In the case of (2) to obtain

Wherein, the U is the target unitary operator; and V (theta) is the preset parameterized quantum circuit, and theta is an adjustable parameter.

38. The classical computing device according to claim 28 or 37, wherein the preset pure state p ₀ Comprises the following steps:

39. the classic computing device of claim 28 or 37,

the preset mixed state rho _i (i =1,2, \8230;, n) is the tensor product of a first preset single-bit quantum state and n second preset single-bit quantum states; different preset mixing states rho in the process of tensor product calculation _i In (3), the first preset single-bit quantum states have different calculation positions.

40. The classic computing device of claim 39, wherein the first preset single-bit quantum state is

And/or the second preset single-bit quantum state is

41. A quantum computing device, comprising:

a measurement unit, configured to obtain an ith measurement result, where the ith measurement result represents an ith trace distance between the ith first output state and an ith target output state; the ith target output state represents an output state of a target unitary operator to be compiled after the target unitary operator acts on the ith preset quantum state; the target unitary operator is a unitary operator containing n qubits; the preset parameterized quantum circuit is a quantum circuit comprising the n quantum bits; n is a natural number greater than or equal to 1, and i is a natural number greater than or equal to 1 and less than or equal to n + 1;

a second sending unit, configured to send the ith measurement result.

42. The quantum computing device of claim 41, wherein,

43. The quantum computing device of claim 41 or 42, further comprising: a receiving unit; wherein the content of the first and second substances,

the output state determining unit is further configured to apply the preset parameterized quantum circuit to an ith preset quantum state of at least n +1 preset quantum states under the condition that the adjustable parameter of the preset parameterized quantum circuit is in the second parameter value, so as to obtain an ith new first output state;

44. The quantum computing device of claim 41, wherein the pre-set parameterized quantum circuit comprises D-layer circuits, a D-layer circuit of the D-layer circuits comprising:

n qubits, n preset single qubit gates and n controlled non-CNOT gates;

45. The quantum computing device of claim 44, wherein the preset single qubit gate acts on the qubit.

46. The quantum computing device of claim 44, wherein the predetermined single qubit gate is U ₃ A rotary door, U ₃ The revolving door comprises three adjustable parameters.

47. The quantum computing device of claim 44, wherein the d-th layer contains a total of 3 x n tunable parameters.

48. The quantum computing device of claim 44, wherein a controlled non-CNOT gate is operated between two adjacent qubits, and wherein a controlled non-CNOT gate is operated between a first qubit and a last qubit of the n qubits.

49. The quantum computing device of claim 44, wherein each layer of circuit structure is the same.

50. The quantum computing device of claim 41, wherein the at least n +1 preset quantum states satisfy the following requirement:

In the case of (1), obtaining

51. The quantum computing device of claim 50, wherein the at least n +1 preset quantum states comprise: a predetermined pure state and n predetermined mixed states.

52. The quantum computing device of claim 51, wherein the preset pure state p ₀ Comprises the following steps:

53. the quantum computing device of claim 51 or 52, wherein the preset mixing state p _i (i =1,2, \8230;, n) is the tensor product of a first preset single-bit quantum state and n second preset single-bit quantum states; different preset mixing states rho in the process of tensor product calculation _i In (3), the first preset single-bit quantum states have different calculation positions.

54. The quantum computing device of claim 53, wherein the first preset single-bit quantum state is

And/or the second preset single-bit quantum state is

55. A classic computing device, comprising:

at least one processor; and

a memory communicatively coupled to the at least one processor; wherein, the first and the second end of the pipe are connected with each other,

the memory stores instructions executable by the at least one processor to enable the at least one processor to perform the method of any one of claims 1-13.

56. A quantum computing device, comprising:

at least one quantum processing unit;

the instructions are executable by the at least one quantum processing unit to enable the at least one quantum processing unit to perform the method of any one of claims 14 to 27.

57. A computing device, comprising:

the classic computing device of any of claims 28-40,

the quantum computing device of any one of claims 41 to 54.

58. A non-transitory computer readable storage medium having stored thereon computer instructions for causing the computer to perform the method of any one of claims 1-13.

59. A non-transitory computer readable storage medium storing computer instructions which, when executed by at least one quantum processing unit, cause the at least one quantum processing unit to perform the method of any one of claims 14 to 27.

60. A computer program product comprising a computer program which, when executed by a processor, implements the method according to any one of claims 1-13;

alternatively, the computer program, when executed by at least one quantum processing unit, implements the method of any of claims 14-27.