CN114389715B - Synchronous optical detection and monitoring correction system of QKD - Google Patents
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L9/00—Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols
- H04L9/08—Key distribution or management, e.g. generation, sharing or updating, of cryptographic keys or passwords
- H04L9/0816—Key establishment, i.e. cryptographic processes or cryptographic protocols whereby a shared secret becomes available to two or more parties, for subsequent use
- H04L9/0852—Quantum cryptography
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04B—TRANSMISSION
- H04B10/00—Transmission systems employing electromagnetic waves other than radio-waves, e.g. infrared, visible or ultraviolet light, or employing corpuscular radiation, e.g. quantum communication
- H04B10/70—Photonic quantum communication
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04J—MULTIPLEX COMMUNICATION
- H04J14/00—Optical multiplex systems
- H04J14/02—Wavelength-division multiplex systems
- H04J14/0201—Add-and-drop multiplexing
- H04J14/0202—Arrangements therefor
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04J—MULTIPLEX COMMUNICATION
- H04J3/00—Time-division multiplex systems
- H04J3/16—Time-division multiplex systems in which the time allocation to individual channels within a transmission cycle is variable, e.g. to accommodate varying complexity of signals, to vary number of channels transmitted
- H04J3/1676—Time-division multiplex with pulse-position, pulse-interval, or pulse-width modulation
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L9/00—Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols
- H04L9/08—Key distribution or management, e.g. generation, sharing or updating, of cryptographic keys or passwords
- H04L9/0816—Key establishment, i.e. cryptographic processes or cryptographic protocols whereby a shared secret becomes available to two or more parties, for subsequent use
- H04L9/0852—Quantum cryptography
- H04L9/0855—Quantum cryptography involving additional nodes, e.g. quantum relays, repeaters, intermediate nodes or remote nodes
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- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
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- Y02D30/70—Reducing energy consumption in communication networks in wireless communication networks
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Abstract
The invention discloses a QKD synchronous optical detection and monitoring correction system, which comprises an Alice end and a Bob end, wherein the Alice end comprises an optical transmission module, a first communication unit and a quantum channel; the Bob end comprises an optical receiving module, a synchronous optical detection system, an FPGA management unit and a second communication unit; the optical transmission module is configured to generate and transmit a synchronous optical pulse; the quanta provide a physical medium for synchronous optical pulse transmission; the synchronous light detection system is configured to convert the synchronous light pulse light signal into an electric signal, output a synchronous clock signal for a subsequent circuit and monitor the synchronous signal; the FPGA management unit is configured to process the information uploaded by the monitoring circuit and process the synchronous signals in real time. The synchronous optical detection and monitoring system realizes synchronous optical detection and monitoring correction with high efficiency and high precision, recovers a strict synchronous clock signal and improves the working efficiency and the code rate of the QKD system. The circuit is simple and reliable, strong in flexibility and low in cost.
Description
Technical Field
The invention relates to the field of quantum key synchronous detection and monitoring, in particular to a QKD synchronous light detection and monitoring correction system.
Background
QKD (quantum key distribution) systems use quantum mechanical properties to ensure communication security. It enables both parties to the communication to generate and share a random, secure key to encrypt and decrypt messages. With the forward advancement of quantum technology, synchronization performance is always one of the important indicators for measuring the merits of QKD systems. Synchronization means that the sending end Alice and the receiving end Bob synchronize information. In a strict sense, synchronization refers to the strict synchronization of the rising edge of a signal with the rising edge of a synchronization signal. In today's QKD systems, a single photon is the carrier information that serves as a key, and since a single photon is an extremely weak light, the time of arrival of a synchronous light pulse at Bob's end is needed as a reference during transmission to measure the time of arrival of the single photon signal at Bob's end. The advantages of the synchronous system such as rapidness, high efficiency, low delay, low noise interference, low power consumption and the like can meet the requirements of synchronous optical detection and signal frequency recovery. Therefore, a multi-channel synchronous output laser light source system which is improved in the prior art and has better precision and ensures the safety of the system is required.
Transmission of a synchronization optical signal in a QKD system as shown in fig. 1, in a quantum key distribution system, the synchronization optical pulse is a strong light. Due to the physical characteristics of the equipment, the external conditions of a transmission channel, transmission delay, crosstalk between a synchronous optical signal and signal light and other objective factors, intensity fluctuation and phase deviation of synchronous optical pulses can be caused, discrimination judgment of a synchronous optical detection system at the Bob end is interfered, and deviation exists in output time of the synchronous optical detection system, and the time deviation is called synchronous error. The synchronization error may cause the subsequent single photon detector to not detect the signal photon within a predetermined time, resulting in reduced system efficiency and increased bit error rate. Therefore, the synchronization error of the signals is reduced, and the overall performance of the quantum key distribution system can be improved. The synchronous optical detection system at the Bob end needs to detect and monitor the synchronous optical signals in real time, improves the accuracy of synchronous clock signal output, reduces synchronous errors and reduces error rate.
As a result of interference that may occur in the transmission of the synchronization light pulses, as shown in fig. 2, the first line pulse sequence represents the transmission of a synchronization light pulse pattern at Alice's end in the QKD system. And the second, third and fourth rows of Bob end synchronous light pulse receiving diagrams. The Bob receives the synchronous light pulse to have the phenomena of delay, attenuation, overshoot and the like, and is mainly interfered by transmission. And (3) injection: the third and fourth rows of red pulses represent synchronous light pulses with perfect sending ends, are arranged for visually representing overshoot and attenuation phenomena, and mainly play a role in comparison.
The synchronous optical pulse is transmitted in a channel, is influenced by delay, overshoot and attenuation, and the output waveform of the synchronous optical detection system at the Bob end is as shown in the figure:
as shown in fig. 3, synchronous optical pulses with different interference degrees generate different synchronous clock sequences at Bob end, and have errors from normal pulses. Therefore, high-precision synchronous light detection determines the working efficiency of a subsequent circuit and the stability of a system.
The existing synchronous light detection is mainly realized by detecting the existence of synchronous light through an optical coupler and a multistage amplifying circuit, is easily influenced by external environment light, has poor signal to noise ratio, smaller working bandwidth, influences the transmission rate of a channel, is complicated to debug, and has more devices required by a system, high circuit design complexity, high cost and poor portability.
Therefore, there is a need for further improvements in the prior art to provide a synchronous optical detection and monitoring system, which can efficiently and precisely implement synchronous optical detection and monitoring correction, recover a strictly synchronous clock signal, and improve the working efficiency and the bitrate of the QKD system. The circuit is simple and reliable, strong in flexibility and low in cost.
Disclosure of Invention
In order to solve the technical problems, the synchronous light detection and monitoring system is provided, realizes synchronous light detection and monitoring correction with high efficiency and high precision, recovers a strict synchronous clock signal, and improves the working efficiency and the code rate of the QKD system.
In order to achieve the above purpose, the technical scheme adopted by the invention is as follows: a QKD synchronous optical detection and monitoring correction system comprises an Alice end and a Bob end,
the Alice terminal comprises an optical transmitting module and a first communication unit;
the Bob end comprises an optical receiving module, a synchronous optical detection system, a management unit and a second communication unit;
the optical transmission module is configured to generate and transmit a synchronous optical pulse;
the optical transmitting module is connected with the optical receiving module through a quantum channel; the light receiving module is sequentially connected with the synchronous light detection system, the management unit and the second communication unit in an electric signal manner; the first communication unit is connected with the second communication unit through a classical channel; the first communication unit receives feedback information and sends the feedback information to the optical sending module;
the synchronous light detection system comprises a light/electricity conversion circuit, a signal conditioning circuit, a synchronous clock signal generation circuit and a synchronous signal monitoring circuit;
after receiving the synchronous light pulse, the light/electric conversion circuit converts the light signal into a current signal, inputs the current signal into the signal conditioning circuit to convert the current signal into a voltage signal and gain the voltage signal, then divides the voltage signal into two paths, inputs one path of the voltage signal into the synchronous signal monitoring circuit to monitor the voltage signal, and sends monitoring data to the management unit for processing; the other path of the signal is input into a synchronous clock signal generating circuit for hysteresis processing and is used for detecting a single photon signal by a subsequent synchronous detector to provide a synchronous clock signal;
the signal management unit outputs one path of data processed by the monitoring data to the signal conditioning circuit, and adjusts the gain of the signal conditioning circuit; and the other path of the synchronous light emission power is output to the light transmission module at the Alice end, and the light transmission module is controlled to readjust the synchronous light emission power.
Preferably, the frequency of the synchronization light pulses is 80-150KHZ.
Preferably, the optical/electrical conversion circuit includes a photodiode that converts the synchronous optical signal into a current signal.
Preferably, the signal conditioning circuit includes a transimpedance amplifier that converts and gains a current signal to a voltage signal.
Preferably, the transimpedance amplifier adopts an LMH32401 series chip.
Preferably, the synchronous clock signal generating circuit comprises a hysteresis comparing circuit, and the hysteresis comparing circuit is used for performing hysteresis processing on the received voltage signal and providing a synchronous clock signal for a subsequent synchronous detector to detect the single photon signal.
Preferably, the hysteresis comparison circuit comprises a comparator employing an ADCMP573 series chip.
Preferably, the synchronization signal monitoring circuit includes an ADC conversion circuit that converts an analog quantity into a digital quantity.
Preferably, the ADC conversion circuit comprises an analog-to-digital converter, and the analog-to-digital converter adopts an ADS8370 series chip.
The beneficial technical effects of the invention are as follows: the synchronous optical detection and monitoring system realizes synchronous optical detection and monitoring correction with high efficiency and high precision, recovers a strict synchronous clock signal and improves the working efficiency and the code rate of the QKD system.
Drawings
FIG. 1 is a prior art synchronous optical signal transmission diagram;
FIG. 2 is a graph of the results of prior art Bob-side synchronous light pulses being disturbed;
FIG. 3 is a graph showing the waveform output comparison of normal and disturbed synchronous optical signals according to the prior art;
FIG. 4 is a block diagram of the overall structure of the technique of the present invention;
FIG. 5 is a flow chart of the monitoring of the synchronous optical detection system in the present invention;
FIG. 6 is a block diagram of a synchronous light detection system according to the present invention;
FIG. 7 is a schematic block diagram of a synchronous light detection system according to the present invention;
FIG. 8 is a circuit diagram of an equivalent model of a photodiode according to the present invention;
FIG. 9 is a schematic diagram of the internal components of a transimpedance amplifier of the present invention;
FIG. 10 is a graph of the transimpedance gain versus input current for the present invention;
FIG. 11 is a block diagram showing the internal construction of a comparator according to the present invention;
FIG. 12 is a graph showing the hysteresis transfer function of the comparator of the present invention;
FIG. 13 is a graph of hysteresis versus RHYS control resistance for the present invention.
Detailed Description
The present invention will be further described in detail with reference to the following examples, for the purpose of making the objects, technical solutions and advantages of the present invention more apparent, but the scope of the present invention is not limited to the following specific examples.
As shown in fig. 1-13, a QKD synchronous optical detection and monitoring correction system, including Alice side and Bob side,
the Alice terminal comprises an optical transmitting module, a first communication unit and a quantum channel;
the Bob end comprises an optical receiving module, a synchronous optical detection system, a management unit and a second communication unit, wherein the management unit adopts an FPGA management unit;
the optical transmission module is configured to generate and transmit a synchronous optical pulse;
the first communication unit and the second communication unit adopt classical networks to carry out communication and data transmission between an Alice end and a Bob end;
the optical transmitting module is connected with the optical receiving module through a quantum channel; the light receiving module is sequentially connected with the synchronous light detection system, the management unit and the second communication unit in an electric signal manner; the first communication unit is connected with the second communication unit through a classical channel; the first communication unit receives feedback information and sends the feedback information to the optical sending module;
the quantum channel provides a physical medium for synchronous optical pulse transmission;
the synchronous light detection system is configured to convert the synchronous light pulse light signal into an electric signal, output a synchronous clock signal for a subsequent circuit and monitor the synchronous signal;
the FPGA management unit is configured to process the information uploaded by the synchronous light detection system and process the synchronous signals in real time;
after receiving the synchronous light pulse, the light/electric conversion circuit converts the light signal into a current signal, inputs the current signal into the signal conditioning circuit to convert the current signal into a voltage signal and gain the voltage signal, then divides the voltage signal into two paths, inputs one path of the voltage signal into the synchronous signal monitoring circuit to monitor the voltage signal, and sends monitoring data to the management unit for processing; the other path of the signal is input into a synchronous clock signal generating circuit for hysteresis processing and is used for detecting a single photon signal by a subsequent synchronous detector to provide a synchronous clock signal;
the signal management unit outputs one path of data processed by the monitoring data to the signal conditioning circuit, and adjusts the gain of the signal conditioning circuit; and the other path of the synchronous light emission power is output to the light transmission module at the Alice end, and the light transmission module is controlled to readjust the synchronous light emission power.
Specifically, the photoelectric conversion circuit is mainly composed of photodiodes; the signal conditioning circuit mainly comprises a transimpedance amplifier; the synchronous clock signal generating circuit mainly comprises a hysteresis comparison circuit; the synchronous optical monitoring circuit mainly comprises an ADC conversion circuit and is used for monitoring the real-time state of the synchronous signal in real time and uploading information to the FPGA management unit. One path of the signal is output to a signal conversion circuit after being processed by an FPGA management unit, and the gain of the circuit is adjusted; the other path of the clock signal is output to the Alice synchronous optical pulse transmitting end, and according to the sampling judgment result of the synchronous signal by the Bob end, the Alice end optical transmitting module is required to adjust the synchronous optical transmitting power, so that the purpose of high-precision clock signal output is achieved, clock signal assurance is provided for single photon detection of a subsequent detector, and the detection efficiency and the code rate of the QKD system are improved.
The synchronous signal monitoring circuit is mainly used for monitoring the intensity of synchronous optical pulses and providing comparison and judgment for generating synchronous clocks for synchronous optical signals by monitoring and outputting the same-frequency periodical converted digital signals.
The working flow of the synchronous signal monitoring circuit is as follows: in ideal communication equipment and environment, the synchronous optical pulse finally synchronizes the synchronous clock signal required by the output system, and the same-frequency periodical conversion digital signal can be sampled in the monitoring circuit as a synchronous monitoring standard. The monitoring result of the synchronous signal monitoring circuit is judged by the FPGA management unit to directly reflect the synchronous clock generation result.
The FPGA management unit inputs the same-frequency digital signal and the same-frequency synchronous clock pulse through the synchronous signal monitoring circuit.
The duty cycle of the pulse signal is compared with the on-channel digital signal to monitor whether the generated synchronous clock sequence deviates from the system requirement. If certain deviation exists, the FPGA management unit judges whether the gain in the system accords with the gain through scanning, if not, the FPGA management unit outputs an adjusting signal to adjust the gain of the system; the system continues to scan the intensity of the light pulses in the system, and optimizes the synchronous clock signal output by adjusting the intensity of the light pulses. And monitoring and feedback are provided for synchronous clock output, so that the aim of optimizing the synchronous clock sequence is fulfilled.
The synchronous clock signal generating circuit is used for generating synchronous clock signals and providing synchronous clocks which are strict with the single photon signals for the subsequent detector to detect the single photon signals.
The synchronous light detection step of the Bob end is as follows:
the Bob end receives a 100KHZ synchronization light pulse from Alice end. The synchronous light pulse converts the synchronous light signal into a current signal through a photodiode in the light/electricity conversion circuit. At this stage, the photodiode is mainly responsible for converting the optical signal into a current signal, and the transimpedance amplifier in the signal conditioning circuit mainly converts the current signal into a voltage signal and provides a certain gain. The pre-stage formed by the inside of the transimpedance amplifier amplifies and outputs to the amplifier inside the transimpedance amplifier, and provides a certain gain.
Preferably, in the synchronous light detection step of the Bob end, a low-gain mode is reserved, a reserved design of high-gain amplification is reserved for the subsequent application needs, the requirements of different application scenes and environments are met, and the output mode is configured into differential signal output for enhancing the anti-interference capability of the output signal. The synchronous optical pulse input by a single end is converted into a voltage signal VOUT+ and VOUT-output by a transimpedance amplifier of the signal conditioning circuit, and the voltage signal VOUT+ and VOUT-are transmitted to the hysteresis comparison circuit, and the transimpedance amplifier is realized by adopting LMH32401 series chips.
Preferably, the hysteresis comparison circuit comprises a comparator using an ADCMP573 series chip, which can generate variable hysteresis by connecting an external pull-down resistor between the HYS pin and GND. The synchronous analog differential voltage signals pass through a comparator, and high-low digital signals required by the system are output as clock differential signals SYN_CLK_IN_P and SYN_CLK_IN_N to provide synchronous clock signals for the subsequent synchronous detector to detect the single photon signals.
The synchronous optical monitoring circuit has the following hardware principle:
the synchronous optical signal monitoring circuit is mainly used for monitoring synchronous optical signals, an analog-digital converter in the synchronous optical signal monitoring circuit is used for converting analog quantity into digital quantity, and an ADS8370 series chip is adopted by the analog-digital converter. The synchronous optical signal monitoring circuit monitors the real-time change of the synchronous optical intensity in real time, the periodic sequence state of the synchronous light is reflected through the monitoring of the synchronous optical intensity, and the detection data are transmitted to the FPGA management unit through the SPI bus.
Preferably, data is sent to the Alice sending end at the same time, the synchronous light pulse sending power is adjusted, the interference of the synchronous light pulse in transmission is reduced, the anti-interference performance of a signal source is improved, and therefore the output precision of the synchronous clock is improved. And feeding back to the transimpedance amplifier circuit, adjusting the gain, and providing a proper gain value for signal amplification.
Specifically, the photodiode adopts an NR2001 model, and the product has the advantages of equivalent capacitance of 0.3pF, response time of 0.3ns, saturated light power of 2mW, detection of dark current of 0.3nA/5V and the like; the photodiode and TIA constitute a pre-amplifier and provide a gain.
The transimpedance amplifier, photodiode and TIA constitute a pre-amplifier and provide a gain. The 100mA clamping current protection is integrated at the input end, so that the function of protecting the integrated internal amplifier is achieved, meanwhile, the pulse broadening is reduced, and the blind area of the system response is prevented. The GAIN level can be externally configured according to the system requirement through the GAIN pin. In the low gain mode, the maximum input current is 650uA, and in the high gain mode, the maximum input current is 65uA, as shown in fig. 9. An ambient light cancellation circuit is integrated inside the chip to cancel the ac coupling between the photodiode to the amplifier. When the multiple modules are used together, the signal channels needing to be collected can be configured through the enabling pins, so that the flexibility of the circuit is enhanced.
The comparator is manufactured by adopting an ADCMP573 chip and an XFCB3 silicon germanium (SiGe) bipolar process. The chip can be in a pin setting mode, a comparator with hysteresis is integrated inside, and the magnitude of hysteresis voltage can be configured through a pin HYS.
If the input voltage approaches the threshold value (in this example 0.0V) from the negative direction, the comparator will switch from a low level to a high level when the input crosses +vh/2. The new switching threshold becomes-VH/2. The comparator remains high until the threshold-VH/2 is crossed from the positive direction. In this way, noise centered at the 0.0V input does not cause the comparator to switch states unless it exceeds the region bounded by + -VH/2.
The ADC chip adopts an ADS8370 series chip, and the series chip is applied to a high-precision data acquisition system. The ADS8370 series chip has the performance advantages of 16-bit wide sampling precision, 600KHZ sampling speed, high-speed serial interface up to 40MHz, low power consumption, zero delay and the like. In order to improve the acquisition precision, the design uses an external reference voltage, and U21 is a miniature precision reference voltage source, and has the characteristics of high precision, low temperature drift, low power consumption and the like. The system is provided with high-precision reference electricity, and the ADS8370 series chip sends the collected data to the FPGA management unit in real time through the SPI interface to monitor the synchronous light in real time.
Variations and modifications to the above would be obvious to persons skilled in the art to which the invention pertains from the foregoing description and teachings. Therefore, the invention is not limited to the specific embodiments disclosed and described above, but some modifications and changes of the invention should be also included in the scope of the claims of the invention. In addition, although specific terms are used in the present specification, these terms are for convenience of description only and do not constitute any limitation on the invention.
Claims (8)
1. A QKD synchronous optical detection and monitoring correction system is characterized by comprising an Alice end and a Bob end,
the Alice terminal comprises an optical transmitting module and a first communication unit;
the Bob end comprises an optical receiving module, a synchronous optical detection system, a management unit and a second communication unit;
the optical transmission module is configured to generate and transmit a synchronous optical pulse;
the optical transmitting module is connected with the optical receiving module through a quantum channel; the light receiving module is sequentially connected with the synchronous light detection system, the management unit and the second communication unit in an electric signal manner;
the first communication unit is connected with the second communication unit through a classical channel; the first communication unit receives feedback information of the second communication unit and sends the feedback information to the optical sending module;
the synchronous light detection system comprises a light/electricity conversion circuit, a signal conditioning circuit, a synchronous clock signal generation circuit and a synchronous signal monitoring circuit;
after receiving the synchronous light pulse, the optical/electrical conversion circuit converts the light signal into a current signal, inputs the current signal into the signal conditioning circuit to convert the current signal into a voltage signal and gain, then divides the voltage signal into two paths, inputs one path of the voltage signal into the synchronous signal monitoring circuit to monitor the voltage signal, is used for monitoring the change of the synchronous light pulse intensity in real time, reflects the periodic sequence state of the synchronous light pulse through monitoring the synchronous light pulse intensity, and sends monitoring data to the management unit for processing; the other path of the signal is input into a synchronous clock signal generating circuit for hysteresis processing and is used for detecting a single photon signal by a subsequent synchronous detector to provide a synchronous clock signal;
the management unit outputs one path of monitoring data processed by the synchronous signal monitoring circuit to the signal conditioning circuit, and adjusts the gain of the signal conditioning circuit; the other path of the synchronous light emission power is output to the light transmission module at the Alice end, and the light transmission module is controlled to readjust the synchronous light emission power;
the frequency of the synchronous light pulse is 80-150KHZ.
2. The QKD synchronous light detection and monitoring correction system of claim 1, wherein the photo/electrical conversion circuit includes a photodiode for converting the synchronous light signal to a current signal.
3. The QKD synchronous optical detection and monitoring correction system of claim 1, wherein the signal conditioning circuit includes a transimpedance amplifier that converts and gains a current signal to a voltage signal.
4. The QKD synchronous optical detection and monitoring correction system of claim 3, wherein the transimpedance amplifier employs LMH32401 series chips.
5. The QKD synchronous optical detection and monitoring correction system of claim 1, wherein the synchronous clock signal generation circuit includes a hysteresis comparison circuit for hysteresis processing the received voltage signal to provide a synchronous clock signal for subsequent synchronous detector detection of the single photon signal.
6. The QKD synchronous light detection and monitoring correction system of claim 5, wherein the hysteresis comparison circuit includes a comparator employing an ADCMP573 series chip.
7. The QKD synchronous light detection and monitoring correction system of claim 1, wherein the synchronization signal monitoring circuit includes an ADC conversion circuit that converts analog quantities to digital quantities.
8. The QKD synchronous light detection and monitoring correction system of claim 7, wherein the ADC conversion circuit includes an analog-to-digital converter employing an ADS8370 series chip.
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