CN114389691A

CN114389691A - Optical module

Info

Publication number: CN114389691A
Application number: CN202210079617.1A
Authority: CN
Inventors: 王凤来
Original assignee: Hisense Broadband Multimedia Technology Co Ltd
Current assignee: Hisense Broadband Multimedia Technology Co Ltd
Priority date: 2022-01-24
Filing date: 2022-01-24
Publication date: 2022-04-22
Anticipated expiration: 2042-01-24
Also published as: CN114389691B

Abstract

The optical module comprises a circuit board and an optical receiving assembly, wherein the optical receiving assembly comprises an optical detector, a transimpedance amplifier and an MCU (microprogrammed control unit), the transimpedance amplifier generates a real-time RXLOS state value and reports the real-time RXLOS state value to the MCU, and the MCU writes the real-time RXLOS state value into a second register and waits for an upper computer to read the real-time RXLOS state value; the MCU judges the current RXLOS state value in the second register after monitoring the reading action of the upper computer, and does not perform zero writing operation on the second register when the current RXLOS state value is a first preset value, wherein the first preset value represents a no-light state, so that the situation that the upper computer wrongly reads a zero value in the zero writing operation process is avoided, and the reliability of the RXLOS warning function of the optical module is ensured.

Description

Optical module

Technical Field

The application relates to the technical field of optical communication, in particular to an optical module.

Background

The RXLOS (received Loss of Signal) warning function can reflect whether the received Signal is normal or not, and when the received Signal is not lost, the RXLOS state value is 0; when a received signal is lost, the RXLOS status value is 1, usually, in an optical module product, an RXLOS signal pin is designed, and an upper computer receives a response value of RXLOS through the RXLOS signal pin, so that the response value is responded and processed in time.

Due to the advantages of high speed, small package, low power consumption and the like, a 40G QSFP (four-channel SFP interface) + packaged optical module is developed rapidly, but due to the small package, an RXLOS signal pin is not designed in the structure, and an upper computer cannot acquire the RXLOS state through the RXLOS signal pin.

Disclosure of Invention

The embodiment of the application provides an optical module, and the optical module provides an RXLOS function for a 40G QSFP + packaged optical module.

The optical module provided by the embodiment of the application comprises:

a circuit board;

a light receiving assembly electrically connected to the circuit board, comprising:

a photodetector for converting the received optical signal into a current signal;

the trans-impedance amplifier is electrically connected with the optical detector and used for amplifying the current signal, converting the current signal into a voltage signal and generating a real-time RXLOS state value according to the voltage signal;

an MCU comprising a second register for storing a current RXLOS state value for:

after monitoring that an upper computer reads from the second register, and when the current RXLOS state value in the second register is a first preset value, performing no zero writing operation on the second register, wherein the first preset value represents a no light state;

and is also used for: writing the real-time RXLOS status value into the second register.

Drawings

In order to more clearly illustrate the technical solutions in the present disclosure, the drawings needed to be used in some embodiments of the present disclosure will be briefly described below, and it is apparent that the drawings in the following description are only drawings of some embodiments of the present disclosure, and other drawings can be obtained by those skilled in the art according to the drawings. Furthermore, the drawings in the following description may be regarded as schematic diagrams, and do not limit the actual size of products, the actual flow of methods, the actual timing of signals, and the like, involved in the embodiments of the present disclosure.

FIG. 1 is a connection diagram of an optical communication system according to some embodiments;

FIG. 2 is a block diagram of an optical network terminal according to some embodiments;

FIG. 3 is a block diagram of a light module according to some embodiments;

FIG. 4 is an exploded view of a light module according to some embodiments;

FIG. 5 is a schematic diagram of an internal structure of a light module according to some embodiments;

FIG. 6 is an interaction diagram of structures of a light module according to some embodiments.

Detailed Description

Technical solutions in some embodiments of the present disclosure will be clearly and completely described below with reference to the accompanying drawings, and it is obvious that the described embodiments are only a part of the embodiments of the present disclosure, and not all of the embodiments. All other embodiments obtained by a person of ordinary skill in the art based on the embodiments provided by the present disclosure belong to the protection scope of the present disclosure.

Unless the context requires otherwise, throughout the description and the claims, the term "comprise" and its other forms, such as the third person's singular form "comprising" and the present participle form "comprising" are to be interpreted in an open, inclusive sense, i.e. as "including, but not limited to". In the description of the specification, the terms "one embodiment", "some embodiments", "example", "specific example" or "some examples" and the like are intended to indicate that a particular feature, structure, material, or characteristic associated with the embodiment or example is included in at least one embodiment or example of the present disclosure. The schematic representations of the above terms are not necessarily referring to the same embodiment or example. Furthermore, the particular features, structures, materials, or characteristics described may be included in any suitable manner in any one or more embodiments or examples.

In the following, the terms "first", "second" are used for descriptive purposes only and are not to be understood as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of that feature. In the description of the embodiments of the present disclosure, "a plurality" means two or more unless otherwise specified.

In describing some embodiments, expressions of "coupled" and "connected," along with their derivatives, may be used. For example, the term "connected" may be used in describing some embodiments to indicate that two or more elements are in direct physical or electrical contact with each other. As another example, some embodiments may be described using the term "coupled" to indicate that two or more elements are in direct physical or electrical contact. However, the terms "coupled" or "communicatively coupled" may also mean that two or more elements are not in direct contact with each other, but yet still co-operate or interact with each other. The embodiments disclosed herein are not necessarily limited to the contents herein.

"at least one of A, B and C" has the same meaning as "A, B or at least one of C," each including the following combination of A, B and C: a alone, B alone, C alone, a and B in combination, a and C in combination, B and C in combination, and A, B and C in combination.

"A and/or B" includes the following three combinations: a alone, B alone, and a combination of A and B.

The use of "adapted to" or "configured to" herein is meant to be an open and inclusive language that does not exclude devices adapted to or configured to perform additional tasks or steps.

As used herein, "about," "approximately," or "approximately" includes the stated values as well as average values that are within an acceptable range of deviation for the particular value, as determined by one of ordinary skill in the art in view of the measurement in question and the error associated with measurement of the particular quantity (i.e., the limitations of the measurement system).

In the optical communication technology, light is used to carry information to be transmitted, and an optical signal carrying the information is transmitted to information processing equipment such as a computer through information transmission equipment such as an optical fiber or an optical waveguide, so as to complete information transmission. Because the optical signal has the passive transmission characteristic when being transmitted through the optical fiber or the optical waveguide, the information transmission with low cost and low loss can be realized. Further, since a signal transmitted by an information transmission device such as an optical fiber or an optical waveguide is an optical signal and a signal that can be recognized and processed by an information processing device such as a computer is an electrical signal, it is necessary to perform interconversion between the electrical signal and the optical signal in order to establish an information connection between the information transmission device such as an optical fiber or an optical waveguide and the information processing device such as a computer.

The optical module realizes the function of interconversion between the optical signal and the electrical signal in the technical field of optical fiber communication. The optical module comprises an optical port and an electrical port, the optical module realizes optical communication with information transmission equipment such as optical fibers or optical waveguides and the like through the optical port, realizes electrical connection with an optical network terminal (such as an optical modem) through the electrical port, and the electrical connection is mainly used for realizing power supply, I2C signal transmission, data signal transmission, grounding and the like; the optical network terminal transmits the electric signal to the computer and other information processing equipment through a network cable or a wireless fidelity (Wi-Fi).

Fig. 1 is a connection diagram of an optical communication system according to some embodiments. As shown in fig. 1, the optical communication system mainly includes a remote server 1000, a local information processing device 2000, an optical network terminal 100, an optical module 200, an optical fiber 101, and a network cable 103.

One end of the optical fiber 101 is connected to the remote server 1000, and the other end is connected to the optical network terminal 100 through the optical module 200. The optical fiber itself can support long-distance signal transmission, for example, signal transmission of several kilometers (6 kilometers to 8 kilometers), on the basis of which if a repeater is used, ultra-long-distance transmission can be theoretically achieved. Therefore, in a typical optical communication system, the distance between the remote server 1000 and the optical network terminal 100 may be several kilometers, tens of kilometers, or hundreds of kilometers.

One end of the network cable 103 is connected to the local information processing device 2000, and the other end is connected to the optical network terminal 100. The local information processing apparatus 2000 may be any one or several of the following apparatuses: router, switch, computer, cell-phone, panel computer, TV set etc..

The physical distance between the remote server 1000 and the optical network terminal 100 is greater than the physical distance between the local information processing apparatus 2000 and the optical network terminal 100. The connection between the local information processing device 2000 and the remote server 1000 is completed by the optical fiber 101 and the network cable 103; and the connection between the optical fiber 101 and the network cable 103 is completed by the optical module 200 and the optical network terminal 100.

The optical module 200 includes an optical port and an electrical port. The optical port is configured to connect with the optical fiber 101, so that the optical module 200 establishes a bidirectional optical signal connection with the optical fiber 101; the electrical port is configured to be accessed into the optical network terminal 100, so that the optical module 200 establishes a bidirectional electrical signal connection with the optical network terminal 100. The optical module 200 converts an optical signal and an electrical signal to each other, so that a connection is established between the optical fiber 101 and the optical network terminal 100. For example, an optical signal from the optical fiber 101 is converted into an electrical signal by the optical module 200 and then input to the optical network terminal 100, and an electrical signal from the optical network terminal 100 is converted into an optical signal by the optical module 200 and input to the optical fiber 101.

The optical network terminal 100 includes a housing (housing) having a substantially rectangular parallelepiped shape, and an optical module interface 102 and a network cable interface 104 provided on the housing. The optical module interface 102 is configured to access the optical module 200, so that the optical network terminal 100 establishes a bidirectional electrical signal connection with the optical module 200; the network cable interface 104 is configured to access the network cable 103 such that the optical network terminal 100 establishes a bi-directional electrical signal connection with the network cable 103. The optical module 200 is connected to the network cable 103 via the optical network terminal 100. For example, the optical network terminal 100 transmits an electrical signal from the optical module 200 to the network cable 103, and transmits a signal from the network cable 103 to the optical module 200, so that the optical network terminal 100 can monitor the operation of the optical module 200 as an upper computer of the optical module 200. The upper computer of the Optical module 200 may include an Optical Line Terminal (OLT) and the like in addition to the Optical network Terminal 100.

The remote server 1000 establishes a bidirectional signal transmission channel with the local information processing device 2000 through the optical fiber 101, the optical module 200, the optical network terminal 100, and the network cable 103.

Fig. 2 is a structural diagram of an optical network terminal according to some embodiments, and fig. 2 only shows a structure of the optical module 100 related to the optical module 200 in order to clearly show a connection relationship between the optical module 200 and the optical network terminal 100. As shown in fig. 2, the optical network terminal 100 further includes a PCB circuit board 105 disposed in the housing, a cage 106 disposed on a surface of the PCB circuit board 105, and an electrical connector disposed inside the cage 106. The electrical connector is configured to access an electrical port of the optical module 200; the heat sink 107 has a projection such as a fin that increases a heat radiation area.

The optical module 200 is inserted into a cage 106 of the optical network terminal 100, the cage 106 holds the optical module 200, and heat generated by the optical module 200 is conducted to the cage 106 and then diffused by a heat sink 107. After the optical module 200 is inserted into the cage 106, an electrical port of the optical module 200 is connected to an electrical connector inside the cage 106, and thus the optical module 200 establishes a bidirectional electrical signal connection with the optical network terminal 100. Further, the optical port of the optical module 200 is connected to the optical fiber 101, and the optical module 200 establishes bidirectional electrical signal connection with the optical fiber 101.

Fig. 3 is a block diagram of a light module according to some embodiments, and fig. 4 is an exploded view of a light module according to some embodiments. As shown in fig. 3 and 4, the optical module 200 includes a housing, a circuit board 105 disposed in the housing, and an optical transceiver module.

The shell comprises an upper shell 201 and a lower shell 202, wherein the upper shell 201 is covered on the lower shell 202 to form the shell with two

openings

204 and 205; the outer contour of the housing generally appears square.

In some embodiments of the present disclosure, the lower housing 202 includes a bottom plate and two lower side plates located at two sides of the bottom plate and disposed perpendicular to the bottom plate; the upper housing 201 includes a cover plate, and two upper side plates disposed on two sides of the cover plate and perpendicular to the cover plate, and is combined with the two side plates by two side walls to cover the upper housing 201 on the lower housing 202.

The direction of the connecting line of the two

openings

204 and 205 may be the same as the length direction of the optical module 200, or may not be the same as the length direction of the optical module 200. For example, the opening 204 is located at an end (left end in fig. 3) of the optical module 200, and the opening 205 is also located at an end (right end in fig. 3) of the optical module 200. Alternatively, the opening 204 is located at an end of the optical module 200, and the opening 205 is located at a side of the optical module 200. Wherein, the opening 204 is an electrical port, and the gold finger of the circuit board 105 extends out of the opening 204 and is inserted into an upper computer (such as the optical network terminal 100); the opening 205 is an optical port configured to receive the external optical fiber 101 so that the optical fiber 101 is connected to an optical transceiver module inside the optical module 200.

The upper shell 201 and the lower shell 202 are combined to assemble the circuit board 105, the optical transceiver module and other devices in the shell, and the upper shell 201 and the lower shell 202 can form package protection for the devices. In addition, when the devices such as the circuit board 105 and the like are assembled, the positioning components, the heat dissipation components and the electromagnetic shielding components of the devices are convenient to arrange, and the automatic implementation production is facilitated.

In some embodiments, the upper housing 201 and the lower housing 202 are generally made of metal materials, which is beneficial to achieve electromagnetic shielding and heat dissipation.

In some embodiments, the optical module 200 further includes an unlocking component 203 located on an outer wall of a housing thereof, and the unlocking component 203 is configured to realize a fixed connection between the optical module 200 and an upper computer or release the fixed connection between the optical module 200 and the upper computer.

Illustratively, the unlocking members 203 are located on the outer walls of the two lower side plates of the lower housing 202, and include snap-fit members that mate with a cage of an upper computer (e.g., the cage 106 of the optical network terminal 100). When the optical module 200 is inserted into the cage of the upper computer, the optical module 200 is fixed in the cage of the upper computer by the engaging member of the unlocking member 203; when the unlocking member 203 is pulled, the engaging member of the unlocking member 203 moves along with the unlocking member, and the connection relationship between the engaging member and the upper computer is changed, so that the engagement relationship between the optical module 200 and the upper computer is released, and the optical module 200 can be drawn out from the cage of the upper computer.

The circuit board 105 includes circuit traces, electronic components, and chips, and the electronic components and the chips are connected together by the circuit traces according to a circuit design to implement functions of power supply, electrical signal transmission, grounding, and the like. The electronic components may include, for example, capacitors, resistors, transistors, Metal-Oxide-Semiconductor Field-Effect transistors (MOSFETs). The chip may include, for example, a Micro Controller Unit (MCU), a limiting amplifier (limiting amplifier), a Clock and Data Recovery (CDR) chip, a power management chip, and a Digital Signal Processing (DSP) chip.

The circuit board 105 is generally a rigid circuit board, which can also perform a bearing function due to its relatively rigid material, for example, the rigid circuit board can stably bear a chip; the rigid circuit board can also be inserted into an electric connector in the cage of the upper computer.

The circuit board 105 further includes a gold finger formed on an end surface thereof, the gold finger being composed of a plurality of pins independent of each other. The circuit board 105 is inserted into the cage 106 and electrically connected to an electrical connector in the cage 106 by gold fingers. The gold fingers may be disposed on only one side of the circuit board 105 (e.g., the upper surface shown in fig. 4), or may be disposed on both the upper and lower sides of the circuit board 105, so as to adapt to the situation where the requirement of the number of pins is large. The golden finger is configured to establish an electrical connection with the upper computer to achieve power supply, grounding, I2C signal transmission, data signal transmission and the like. Of course, a flexible circuit board is also used in some optical modules. Flexible circuit boards are commonly used in conjunction with rigid circuit boards to supplement the rigid circuit boards.

The optical transceiver module includes an optical transmitter 206 and an optical receiver 207, which are respectively used for transmitting and receiving optical signals. In this embodiment, the optical transmit assembly 206 may be a coaxial TO package, physically separated from the circuit board, electrically connected via a flex board; the light receiving package 207 is also a coaxial TO package, physically separated from the circuit board, and electrically connected through a flex board. In another common implementation, may be provided on the surface of the circuit board 105; in addition, the light emitting module 206 and the light receiving module 207 may be combined together to form a light transceiving integrated structure.

Fig. 5 is a schematic partial structure diagram of an optical module according to an embodiment of the present invention. As shown in fig. 5, in the optical module provided in this embodiment of the present application, a row of gold fingers is disposed on a surface of one end of the circuit board 105, the MCU is disposed on the circuit board 105, the row of gold fingers is composed of one gold finger that is independent from each other, the circuit board 105 is inserted into the electrical connector in the cage, the gold fingers are electrically connected to the upper computer, and the MCU is electrically connected to the gold fingers. The light receiving assembly 207 includes a light detector 301, a transimpedance amplifier chip (also called TIA)302, and a limiting amplifier chip (also called limiting amplifier, LIA) 303. The chip is essentially the integration of circuits, the circuits can be integrated into the chip, and part of functions in the chip can also be realized by the circuits on the circuit board. The functions of the chip can be realized by the chip, the circuit or the main chip combined with the peripheral circuit. Different functions can be integrated by the same chip, and the change of the circuit integration form still belongs to the protection scope of the invention. Specifically, the form of the photodetector in the embodiment of the present application may be a PIN photodiode in addition to the avalanche photodiode; the purpose of the photodetector is to convert the received optical signal into an electrical signal with low linearity and to introduce as little additional noise as possible, and the type of photodetector that has a wavelength in the low loss region of the optical fiber and can be reliably used in an optical fiber communication system is mainly composed of PIN photodiodes and Avalanche Photodiodes (APDs). The PIN photodiode has low sensitivity to light power overload, a bias circuit needs to be designed for APD, and the reverse working voltage required by the lock is large during working; the 40G QSFP SR4 optical module is a low-power-consumption optical module for short-distance transmission, and a PIN photodiode can be selected.

In the process of receiving the optical signal, the optical detector 301 is configured to receive the optical signal sent by the external device and convert the optical signal sent by the external device into an electrical signal; an input pin of the transimpedance amplifier chip 302 is connected to an output pin of the light receiving component 207, and is configured to convert an electrical signal output by the light receiving component 207 into a voltage signal; a high-frequency signal input pin of the amplitude limiting amplification chip 303 is connected with an output pin of the transimpedance amplification chip 302, and is used for amplifying a first voltage signal output by the transimpedance amplification chip 302; an input pin of the clock data recovery chip is connected with a high-frequency signal output pin of the amplitude limiting amplification chip 303 and used for shaping a voltage signal output by the amplitude limiting amplification chip 303, and an output pin of the clock data recovery chip is connected with the golden finger. The optical module is connected with an upper computer through the golden finger, and then signals received by the optical module can be sent to the upper computer.

In actual operation, whether a receiving Signal of a receiving assembly is normal or not is related to whether an optical module can work normally or not, the function of RXLOS (received Loss of Signal Alarm) can reflect whether the receiving Signal is normal or not, and when the receiving Signal is not lost, the state value of the RXLOS is 0; when a received signal is lost, the RXLOS status value is 1, usually, in an optical module product, an RXLOS signal pin is designed, and an upper computer receives a response value of RXLOS through the RXLOS signal pin, so that the response value is responded and processed in time. "1" indicates no light state, i.e., light signal loss state; "0" indicates a light state, i.e. the light signal is received normally; it will be appreciated that other numbers may be used to characterize the no light condition or related conditions.

The 40G QSFP + packaged optical module includes four transmission channels, and in this embodiment, first, a transmission channel is taken as an example for description.

In order to highlight the purpose, implementation manner and technical effect of the embodiment of the present application, the embodiment of the present application will be specifically described below with reference to fig. 6.

An input pin of the transimpedance amplifier chip 302 is connected to an output pin of the optical receiver assembly 207, and is configured to convert an electrical signal output by the optical receiver assembly 207 into a voltage signal, generate a real-time RXLOS status value according to the voltage signal, and report the real-time RXLOS status value to the MCU, where the MCU stores the real-time RXLOS status value in the first register. The process of generating the real-time RXLOS status value by the transimpedance amplification chip according to the voltage signal may include: the TIA converts the current signal into a voltage signal, and holds the voltage signal as an RSSI signal (light reception intensity indication signal); an analog-to-digital converter in the TIA samples the voltage of the RSSI signal, converts the analog voltage of the RSSI signal into a digital signal, the digital signal is called as a sampling value (ADC value), acquires received optical power according to the sampling value, and generates a corresponding RXLOS state value according to a comparison relation between the received optical power and a threshold, specifically, when the received optical power is less than the threshold, the optical signal is considered to be lost, and the RXLOS state value is 1; when the received optical power is greater than the threshold value, the received optical signal is considered to be normal, and the RXLOS state value is 0; then reporting 1 or 0 to the MCU, and storing the MCU into a first register; thus, stored within the first register is the RXLOS status value generated by the TIA in real time.

The 40G QSFP + packaged optical module complies with the SFF8436 protocol, the SFF8436 protocol specifies a register for the upper computer to read, and for convenience of distinction, the register specified by the protocol is described as a second register in the embodiment of the application and used for storing the RXLOS state value for the upper computer to read.

It can be understood that, since the protocol specifies that the upper computer reads the RXLOS status value from the second register, the upper computer cannot directly read the corresponding RXLOS status value from the first register. Based on this, in this embodiment of the present application, the MCU periodically reads the real-time RXLOS status value from the first register, and then writes it into the second register to wait for the upper computer to read. Whenever the upper computer reads the value in the second register, the upper computer can read the current LOS state of the optical module due to the fact that the RXLOS state value of the real-time state in the first register is stored in the second register, and therefore the upper computer can respond to and process the RXLOS signal in time. In this sense, stored in the first register is the real-time RXLOS status value, stored in the second register is the current RXLOS status value, "current" is relative to the upper computer read time.

Therefore, the MCU periodically reads the RXLOS status value from the first register and then writes into the second register, and waits for the host to read, for example, the MCU reads the RXLOS status value from the first register and then writes into the second register at a cycle of 50 ms.

The SFF8436 protocol specifies that the upper computer performs zero writing operation on the second register after reading the RXLOS state value from the second register. Since the zero value is also used for representing a no-light state, the MCU is just collided with the zero writing operation of the second register when the second register is read at a certain time, if the value stored in the second register is 1, the optical signal LOS occurs, after the zero writing action, the upper computer reads 0 at the moment, the host computer can think that the optical module does not report the RX LOS, but the real situation is not the case, the higher the frequency of the upper computer accessing the second register is, the higher the probability of misreading 0 is, and the authenticity reported by the RX LOS is abnormal in the scene.

It should be noted that the "zero" value during the zero-write operation in the embodiment of the present application does not represent the RXLOS status value.

In the embodiment of the application, the upper computer communicates with the optical module through an I2C bus, when the upper computer reads a value from the second register, the action can be monitored through the I2C bus, when the MCU monitors that the upper computer reads a value from the second register, it is determined whether the current RXLOS state value in the second register is "1", and when the current RXLOS state value in the second register is "1", the MCU does not write zero to the second register, so that the actual optical signal loss can be avoided, and the upper computer mistakenly regards that the optical signal loss does not occur.

In the embodiment of the application, the upper computer and the optical module communicate through an I2C bus, when the upper computer reads a value from the second register, the action can be monitored through the I2C bus, when the MCU monitors that the upper computer reads the value from the second register, whether the current RXLOS state value in the second register is "1" is determined, and when the current RXLOS state value in the second register is "0", the MCU performs a zero writing operation on the second register.

In the embodiment of the application, before the MCU performs the zero writing operation on the second register, it may determine what RXLOS status value stored in the second register is, and then determine whether to perform the zero writing operation, so as to avoid that the upper computer erroneously reads a zero value in the zero writing operation process, thereby ensuring the reliability of the RXLOS alarm function of the optical module.

In the embodiment of the application, "after monitoring that the upper computer reads a value from the second register, the MCU determines whether the current RXLOS state value in the second register is" 1 ", when the current RXLOS state value in the second register is" 1 ", the MCU does not perform a zero writing operation on the second register" or "when the upper computer reads a value from the second register, the MCU can monitor the operation through the I2C bus, when the MCU monitors that the upper computer reads a value from the second register, the MCU determines whether the current RXLOS state value in the second register is" 1 ", and when the current RXLOS state value in the second register is" 0 ", the MCU performs a zero writing operation on the second register, which is defined as a first thread.

And defining that the MCU periodically reads the RXLOS state value from the first register, then writes the RXLOS state value into the second register and waits for the upper computer to read as a second thread.

In the embodiment of the application, the first thread and the second thread run independently.

In some embodiments, when the cycle time of the upper computer accessing the second register is short, that is, after the first access to the second register is finished, the MCU just finishes the zero writing operation on the second register, and then the upper computer accesses the second register for the second time, but the MCU does not write the real-time RX LOS status value in the first register into the second register yet, if the value stored in the second register is 1, that is, the optical signal LOS occurs, and after the zero writing operation, the upper computer reads 0 at this time, the host computer may consider that the optical module does not report the RX LOS, but the reality is not the case, and the higher the frequency of the upper computer accessing the second register is, the higher the probability of misreading 0 is, the reality reported by the RX LOS is abnormal in this scenario, for this reason, in the embodiment of the present application, before the zero writing operation is performed on the second register, the RXLOS status value stored in the second register is determined specifically, and then, whether the zero writing operation is carried out or not is determined, so that the condition that an upper computer wrongly reads a zero value in the zero writing operation process can be avoided, and the reliability of the RXLOS alarm function of the optical module is ensured. The method specifically comprises the following steps: the upper computer and the optical module communicate through an I2C bus, when the upper computer reads a value from the second register, the action can be monitored through the I2C bus, when the MCU monitors that the upper computer reads the value from the second register, whether the current RXLOS state value in the second register is '1' or not is judged, when the current RXLOS state value in the second register is '1', the MCU does not perform zero writing operation on the second register, and when the current RXLOS state value in the second register is '0', the MCU performs zero writing operation on the second register.

In some embodiments, the time when the upper computer reads from the second register for the first time is time T1, the time when the MCU writes a zero operation to the second register is time T2, the time when the MCU writes the real-time RXLOS status value stored in the first register to the second register is time T3, and the time when the upper computer reads from the second register for the second time is time T4. The time interval from the time T1 to the time T4 is long enough to complete the writing of zero and the writing of the real-time RXLOS state value of the MCU to the second register, so that the RXLOS state value read by the upper computer is a real value, if the time interval from the time T1 to the time T4 is short enough to complete the writing of zero and the writing of the real-time RXLOS state value of the MCU to the second register, the writing of the zero and the writing of the real-time RXLOS state value of the second register by the MCU is just finished for a period of time when the MCU is read, but the MCU does not successfully write the real-time RX LOS state value in the first register into the second register, if the value stored in the second register is 1, the optical signal LOS occurs, the upper computer reads 0 after the zero writing action, the host considers that the optical module does not report the RX LOS, but the real situation is not the same, and the higher the frequency of the upper computer accessing the second register is, the probability of reading 0 by mistake is higher, in this scenario, the authenticity of RX LOS report is abnormal, and for this reason, in the embodiment of the present application, before performing the zero writing operation on the second register, the MCU in the embodiment may determine what the RXLOS status value stored in the second register is, and then determine whether to perform the zero writing operation, so as to prevent the upper computer from misreading the zero value in the zero writing operation process, and ensure the reliability of the RXLOS alarm function of the optical module.

In summary, in the embodiment of the present application, before the MCU performs the zero writing operation on the second register, it may determine what RXLOS status value stored in the second register is, and then determine whether to perform the zero writing operation, so as to avoid that the upper computer erroneously reads a zero value in the zero writing operation process, and ensure the reliability of the RXLOS alarm function of the optical module.

The above description is only for the specific embodiments of the present disclosure, but the scope of the present disclosure is not limited thereto, and any person skilled in the art will appreciate that changes or substitutions within the technical scope of the present disclosure are included in the scope of the present disclosure. Therefore, the protection scope of the present disclosure shall be subject to the protection scope of the claims.

Claims

1. A light module, comprising:

a circuit board;

2. The light module of claim 1, wherein the MCU is further configured to:

and after monitoring that the upper computer reads the action from the second register, and when the current RXLOS state value in the second register is a second preset value, performing zero writing operation on the second register, wherein the second preset value represents a light state.

3. The light module of claim 1, wherein the MCU further comprises a first register;

the first register is to store the real-time RXLOS state value from the transimpedance amplifier;

the MCU is used for reading the real-time RXLOS state value from the first register and writing the real-time RXLOS state value into the second register.

4. The optical module according to claim 1, wherein a first thread runs independently of a second thread, the first thread comprises not performing a zero write operation on the second register after monitoring that an upper computer reads from the second register and a current RXLOS status value in the second register is a first preset value;

the second thread includes reading the real-time RXLOS status value from the first register and writing to the second register.

5. The optical module according to claim 1, wherein a first thread runs independently of a second thread, the first thread comprises a zero write operation to the second register after monitoring that an upper computer reads from the second register and a current RXLOS status value in the second register is a second preset value;

6. The light module of claim 3, wherein the MCU periodically reads the real-time RXLOS status value from the first register.

7. The optical module of claim 1, wherein the write zero operation does not characterize an RXLOS condition.

8. The optical module according to claim 1, wherein the first preset value is 1, and the second preset value is 0.

9. The light module of claim 1, wherein the light receiving assembly further comprises:

and the limiting amplifier is used for limiting the voltage signal output by the trans-impedance amplifier.

10. The optical module of claim 1, wherein the photodetector is a PIN photodiode or an APD photodiode.