CN114362754A - Multichannel analog signal acquisition and processing system - Google Patents
Multichannel analog signal acquisition and processing system Download PDFInfo
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Abstract
The invention discloses a multi-channel analog signal acquisition and processing system, which relates to the field of signal acquisition and comprises a signal acquisition device, a channel selection switching circuit, a filtering amplitude limiting protection circuit, an analog-digital conversion circuit and an FPGA circuit which are sequentially connected; the FPGA circuit is connected with the output end of the temperature acquisition circuit. Aiming at various analog quantity electric signals input by electronic equipment, the invention completes the sequential rapid switching and acquisition of 64 channels of analog quantity signals in a fixed period; a plurality of A/D converters and filtering amplitude limiting protection circuits are not needed to be added, only 1 path of filtering amplitude limiting protection circuit is needed to be used in front of the analog-digital conversion circuit, the weight and the size of the module can be effectively reduced, and the defects that a traditional acquisition module is large in number of used components, high in cost, large in size and high in fault probability are avoided. Common mode interference can be filtered, output signals are filtered to remove differential mode interference through active filtering, the accuracy of the collected signals is integrally improved, and the high anti-interference capability is achieved.
Description
Technical Field
The invention relates to the field of signal acquisition, in particular to a multi-channel analog signal acquisition and processing system.
Background
In each stage of airplane flight, various measured parameters need to be collected in real time to realize the functions of controlling, displaying, guiding pilot to drive, guaranteeing flight safety and the like, and the measured parameters comprise: the temperature, the flow, the pressure, the liquid level, the distance and the like are converted into analog quantity signals such as voltage, current, resistance, inductance, electric charge and the like through the sensor, and the accuracy of measured parameters and the stability of data of the analog quantity signals greatly improve the safety and the reliability of the electronic device.
In a traditional analog quantity signal acquisition device, a signal is converted into a voltage signal through conditioning, filtering and processing, the voltage signal is transmitted into an analog-digital converter to convert an analog quantity into a digital quantity, an input channel of the analog-digital converter (an A/D converter) is usually a single channel or a double channel, and the acquisition of the analog quantity is limited. Firstly, because the analog quantity is an electrical signal, the signal needs to be subjected to amplitude limiting inhibition processing, the phenomenon that the externally coupled high-voltage signal damages low-voltage chips such as an analog-digital converter, a microprocessor and the like is avoided, an amplitude limiting protection circuit needs to be configured from each channel to the low-voltage chips, the number of electronic components and circuits is increased, and the number of channels of the acquired analog quantity can be reduced and limited in modules with the same size; and secondly, the sequential control of the analog-digital converter is mainly completed by a singlechip and a Digital Signal Processor (DSP), the data interaction adopts a parallel bus, the analog-digital converter starts conversion, and the reading of the data occupies the program cycle time of the microprocessor, the singlechip and the embedded software of the Digital Signal Processor (DSP) are in a serial working mode, the data processing and calculation can be performed only when the conversion of analog quantity signals into digital signals is completed, and the digital quantity data is sequentially read into an internal memory of the microprocessor. If the number of channels of the acquired analog quantity signals is large, the analog-digital converter needs to be expanded, the program period can be greatly prolonged, the requirement on a control system or equipment with high dynamic response cannot be met, the types and the number of devices are large, and the reliability of a product is greatly reduced.
Disclosure of Invention
Aiming at the defects in the prior art, the channel analog signal acquisition and processing system provided by the invention solves the problems of more components, higher cost, large volume and more fault opportunities in the traditional acquisition module.
In order to achieve the purpose of the invention, the invention adopts the technical scheme that:
the system comprises a signal collector, a channel selection switching circuit, a filtering amplitude limiting protection circuit, an analog-digital conversion circuit and an FPGA circuit which are sequentially connected; the FPGA circuit is connected with the output end of the temperature acquisition circuit;
the signal collector is used for collecting a signal of a target and sending the collected analog signal to the channel selection switching circuit;
the channel selection switching circuit is used for selecting the analog signal acquired by the corresponding signal acquisition device according to the control signal of the FPGA circuit and inputting the analog signal into the filtering amplitude limiting protection circuit;
the filtering amplitude limiting protection circuit filters an input analog signal and ground, clamps the filtered signal to +/-15V and inputs the signal to the analog-digital conversion circuit;
the analog-digital conversion circuit is used for converting the analog quantity into the digital quantity to obtain a digital signal and sending the digital signal to the FPGA circuit through a parallel data bus;
the temperature acquisition circuit is used for acquiring the ambient temperature of the target object during working;
the FPGA circuit is used for acquiring a correction coefficient according to the environment temperature of the target object during working to correct each digital signal and storing and/or displaying the corrected data; for generating control signals for the channel selection switching circuit.
Furthermore, the channel selection switching circuit comprises at least one stage of switching switch, each stage of switching switch at least comprises an 8-channel analog switch, and the output end of the nth stage of 8-channel analog switch is connected with the input end of the (n-1) th stage of 8-channel analog switch; the output end of the 1 st-stage 8-channel analog switch is connected with a filtering amplitude limiting protection circuit; the input end of the last 1-stage 8-channel analog switch is connected with a signal collector; and the control end of each 8-channel analog switch is respectively connected with the FPGA circuit.
Further, the model of the 8-channel analog switch is HI-548-2.
Furthermore, the filtering amplitude limiting protection circuit comprises a first low-pass filtering module, a second low-pass filtering module, a difference module, a +15V amplitude limiting module and a-15V amplitude limiting module; the input end of the first low-pass filtering module is connected with the output end of the channel selection switching circuit; the input end of the second low-pass filtering module is connected with the analog ground; the output end of the first low-pass filtering module and the output end of the second low-pass filtering module are respectively connected with the inverting input end and the non-inverting input end of the differential module; the input end of the +15V amplitude limiting module is connected with 10V reference voltage; the input end of the 15V amplitude limiting module is connected with a-10V reference voltage; the output end of the difference module is respectively connected with the output end of the +15V amplitude limiting module and the output end of the-15V amplitude limiting module and is used as the output end of the filtering amplitude limiting protection circuit.
Further, the first low-pass filtering module comprises an operational amplifier N1, and a non-inverting input terminal of the operational amplifier N1 is connected with an output terminal of the channel selection switching circuit through a resistor R4; the inverting input end of the operational amplifier N1 is respectively connected with one end of a resistor R2 and one end of a capacitor C1, and the other end of the resistor R2 is respectively connected with the other end of a capacitor C1, the output end of the operational amplifier N1 and one end of a resistor R3; the other end of the resistor R3 is used as the output end of the first low-pass filtering module.
Further, the second low-pass filtering module comprises an operational amplifier N2, and a non-inverting input terminal of the operational amplifier N2 is connected to the analog ground, the ground resistor R6 and the ground capacitor C4 through a resistor R3, respectively; the inverting input end of the operational amplifier N2 is respectively connected with one end of a resistor R5 and one end of a capacitor C3, and the other end of the resistor R5 is respectively connected with the other end of a capacitor C3, the output end of the operational amplifier N2 and one end of a resistor R7; the other end of the resistor R7 is used as the output end of the second low-pass filtering module.
Further, the differential module comprises an operational amplifier N3, wherein the inverting input terminal of the operational amplifier N3 is respectively connected with the output terminal of the first low-pass filtering module, one terminal of a capacitor C2 and one terminal of a resistor R1; the non-inverting input end of the operational amplifier N3 is connected with the output end of the second low-pass filtering module; the other end of the capacitor C2 is respectively connected with the other end of the resistor R1 and the output end of the operational amplifier N3; the output terminal of the operational amplifier N3 is the output terminal of the differential block.
Further, the +15V clipping module includes an operational amplifier N4C, and a non-inverting input terminal of the operational amplifier N4C is connected to the 10V reference voltage; the inverting input end of the operational amplifier N4C is connected with the anode of the switch diode V1 and serves as the output end of the +15V amplitude limiting module; the cathode of the switching diode V1 is connected to the output terminal of the operational amplifier N4C.
Further, the-15V amplitude limiting module comprises an operational amplifier N4D, wherein the non-inverting input end of the operational amplifier N4D is connected with a-10V reference voltage; the non-inverting input end of the operational amplifier N4D is used as the output end of the-15V amplitude limiting module; the inverting input terminal of the operational amplifier N4D is connected to the cathode of the switching diode V2, and the anode of the switching diode V2 is connected to the output terminal of the operational amplifier N4D.
Further, the analog-to-digital conversion circuit includes an a/D converter D1 of type AD1674, and the digital ground of the a/D converter D1 is shorted to the analog ground by a 0 ohm resistor.
Further, the temperature acquisition circuit comprises a temperature sensor N5 with the model number of AD590, wherein a pin 1 of the temperature sensor N5 is respectively connected with a 15V power supply and a grounding capacitor C8; pin 3 of temperature sensor N5 is grounded; a pin 2 of the temperature sensor N5 is respectively connected with one end of a resistor R15 and a grounding resistor R16; the other end of the resistor R15 is respectively connected with a grounding resistor R14 and the non-inverting input end of the operational amplifier N6; the inverting input end of the operational amplifier N6 is respectively connected with one end of the resistor R18 and the grounding resistor R17; the output end of the operational amplifier N6 is connected with the other end of the resistor R18 and serves as the output end of the temperature acquisition circuit.
Further, the FPGA circuit comprises an FPGA chip with the model number of A3P1000-PQ208M and a memory with the model number of X5323S8 IZ-2.7A.
The invention has the beneficial effects that:
1. the system aims at various analog quantity electric signals input by electronic equipment, and completes sequential rapid switching and acquisition of 64 channels of analog quantity signals in a fixed period through the expansion of an analog switch; a plurality of A/D converters and filtering amplitude limiting protection circuits are not needed to be added, only 1 path of filtering amplitude limiting protection circuit is needed to be used in front of the analog-digital conversion circuit, the weight and the size of the module can be effectively reduced, and the defects that a traditional acquisition module is large in number of used components, high in cost, large in size and high in fault probability are avoided.
2. The channel selection switching circuit forms a two-stage framework channel selection switching circuit through the analog switch, can simultaneously expand and collect 64 analog quantity signals, is more than the quantity of signals collected by a traditional collection module, can also increase the analog switch according to the quantity of analog quantities of an actual electronic device, forms a 3-stage framework and expands more analog quantity collection channels.
3. The filtering amplitude limiting protection circuit simultaneously carries out RC first-order filtering processing on the collected signals output by the analog ground and the analog switch, the collected signals and the processed analog ground signals are subtracted through a difference module formed by the amplifier, common-mode interference is filtered, and the output signals are filtered to remove differential-mode interference through active filtering, so that the precision of the collected signals is integrally improved, and the filtering amplitude limiting protection circuit has high anti-interference capability.
4. And the FPGA circuit reads a corresponding correction coefficient in an EEPROM memory according to the product environment temperature value, performs temperature compensation correction and digital filtering on the analog quantity, and stores a processing result in an RAM area of the FPGA. The upper computer or the CPU processor reads the processed data at a high speed through the parallel data bus or the serial bus according to the task requirement, performs related calculation and task processing, does not occupy a program cycle, and has good dynamic response.
Drawings
FIG. 1 is a block diagram of the present system;
FIG. 2 is a schematic diagram of a channel selection switch circuit;
FIG. 3 is a circuit diagram of a single 8-channel analog switch;
FIG. 4 is a circuit diagram of a filter clipping protection circuit;
FIG. 5 is a circuit diagram of the A/D converter D1;
fig. 6 is a circuit diagram of a temperature acquisition circuit.
Detailed Description
The following description of the embodiments of the present invention is provided to facilitate the understanding of the present invention by those skilled in the art, but it should be understood that the present invention is not limited to the scope of the embodiments, and it will be apparent to those skilled in the art that various changes may be made without departing from the spirit and scope of the invention as defined and defined in the appended claims, and all matters produced by the invention using the inventive concept are protected.
As shown in fig. 1, the multi-channel analog signal acquisition and processing system includes a signal collector, a channel selection switching circuit, a filtering amplitude limiting protection circuit, an analog-digital conversion circuit and an FPGA circuit, which are connected in sequence; the FPGA circuit is connected with the output end of the temperature acquisition circuit;
the signal collector is used for collecting a signal of a target and sending the collected analog signal to the channel selection switching circuit;
the channel selection switching circuit is used for selecting the analog signal acquired by the corresponding signal acquisition device according to the control signal of the FPGA circuit and inputting the analog signal into the filtering amplitude limiting protection circuit;
the filtering amplitude limiting protection circuit filters an input analog signal and ground, clamps the filtered signal to +/-15V and inputs the signal to the analog-digital conversion circuit;
the analog-digital conversion circuit is used for converting the analog quantity into the digital quantity to obtain a digital signal and sending the digital signal to the FPGA circuit through a parallel data bus;
the temperature acquisition circuit is used for acquiring the ambient temperature of the target object during working;
the FPGA circuit is used for acquiring a correction coefficient according to the environment temperature of the target object during working to correct each digital signal and storing and/or displaying the corrected data; for generating control signals for the channel selection switching circuit.
As shown in fig. 2 and fig. 3, the channel selection switching circuit includes at least one stage of switches, each stage of switches includes at least one 8-channel analog switch, and the output terminal of the nth stage 8-channel analog switch is connected to the input terminal of the (n-1) th stage 8-channel analog switch; the output end of the 1 st-stage 8-channel analog switch is connected with a filtering amplitude limiting protection circuit; the input end of the last 1-stage 8-channel analog switch is connected with a signal collector; and the control end of each 8-channel analog switch is respectively connected with the FPGA circuit.
The model of the 8-channel analog switch is HI-548-2. The analog switch has an overvoltage protection function, can continuously bear 70V peak-to-peak voltage, prevents an externally input analog quantity signal from damaging the analog switch during overvoltage, improves the safety of the acquisition module, has the switching-on time not exceeding 1uS and the signal input range +/-15V, and can meet the switching of alternating current signals and direct current signals. The enable signal of the Analog switch and the address signal of the channel switching are controlled and output by the FPGA circuit, and input signals Analog _ IN1, Analog _ IN2 to Analog _ IN8 and an output channel Analog _ MUX1_ OUT1 are sequentially switched on and output to the rear-stage Analog switch.
As shown in fig. 4, the filtering clipping protection circuit includes a first low-pass filtering module, a second low-pass filtering module, a difference module, a +15V clipping module, and a-15V clipping module; the input end of the first low-pass filtering module is connected with the output end of the channel selection switching circuit; the input end of the second low-pass filtering module is connected with the analog ground; the output end of the first low-pass filtering module and the output end of the second low-pass filtering module are respectively connected with the inverting input end and the non-inverting input end of the differential module; the input end of the +15V amplitude limiting module is connected with 10V reference voltage; the input end of the 15V amplitude limiting module is connected with a-10V reference voltage; the output end of the difference module is respectively connected with the output end of the +15V amplitude limiting module and the output end of the-15V amplitude limiting module and is used as the output end of the filtering amplitude limiting protection circuit. The +/-15V amplitude limiting module can avoid the voltage signal from damaging the A/D converter, and the safety performance of the acquisition module is improved. LM118 is selected for the single-channel high-speed operational amplifier for filtering processing, and the deviation of output voltage signals caused by the characteristics of the device can be reduced by connecting low bias voltage and bias current, so that the acquisition precision is improved.
The first low-pass filtering module comprises an operational amplifier N1, wherein the non-inverting input end of the operational amplifier N1 is connected with the output end of the channel selection switching circuit through a resistor R4; the inverting input end of the operational amplifier N1 is respectively connected with one end of a resistor R2 and one end of a capacitor C1, and the other end of the resistor R2 is respectively connected with the other end of a capacitor C1, the output end of the operational amplifier N1 and one end of a resistor R3; the other end of the resistor R3 is used as the output end of the first low-pass filtering module.
The second low-pass filtering module comprises an operational amplifier N2, wherein the non-inverting input end of the operational amplifier N2 is respectively connected with an analog ground, a grounding resistor R6 and a grounding capacitor C4 through a resistor R3; the inverting input end of the operational amplifier N2 is respectively connected with one end of a resistor R5 and one end of a capacitor C3, and the other end of the resistor R5 is respectively connected with the other end of a capacitor C3, the output end of the operational amplifier N2 and one end of a resistor R7; the other end of the resistor R7 is used as the output end of the second low-pass filtering module.
The difference module comprises an operational amplifier N3, and the inverting input end of the operational amplifier N3 is respectively connected with the output end of the first low-pass filter module, one end of a capacitor C2 and one end of a resistor R1; the non-inverting input end of the operational amplifier N3 is connected with the output end of the second low-pass filtering module; the other end of the capacitor C2 is respectively connected with the other end of the resistor R1 and the output end of the operational amplifier N3; the output terminal of the operational amplifier N3 is the output terminal of the differential block.
The +15V amplitude limiting module comprises an operational amplifier N4C, wherein the non-inverting input end of the operational amplifier N4C is connected with 10V reference voltage; the inverting input end of the operational amplifier N4C is connected with the anode of the switch diode V1 and serves as the output end of the +15V amplitude limiting module; the cathode of the switching diode V1 is connected to the output terminal of the operational amplifier N4C.
The 15V amplitude limiting module comprises an operational amplifier N4D, wherein the non-inverting input terminal of the operational amplifier N4D is connected with a-10V reference voltage; the non-inverting input end of the operational amplifier N4D is used as the output end of the-15V amplitude limiting module; the inverting input terminal of the operational amplifier N4D is connected to the cathode of the switching diode V2, and the anode of the switching diode V2 is connected to the output terminal of the operational amplifier N4D.
As shown in fig. 5, the analog-to-digital conversion circuit includes an a/D converter D1 of model AD1674, the digital ground of the a/D converter D1 being shorted to the analog ground by a 0 ohm resistor. The AD1674 is internally provided with a reference voltage source of 10V, has the acquisition rate of 100KSPS and acquires the input voltage range +/-10V of an analog quantity signal. The A/D converter is connected with 10uF and 0.1uF bypass capacitors in parallel, and low-frequency and high-frequency interference is filtered. The digital ground of the a/D converter is shorted to the analog ground near the chip by a 0 ohm resistor (resistor R3 in fig. 5) to form an equipotential.
Because the electronic components are at high and low temperatures, the characteristic changes and the parameters drift, which leads to the reduction of the acquisition precision, the system adopts the temperature sensor to acquire and monitor the temperature of the target electronic device. As shown in fig. 6, the temperature acquisition circuit includes a temperature sensor N5 with model number AD590, and pin 1 of the temperature sensor N5 is connected to a 15V power supply and a ground capacitor C8, respectively; pin 3 of temperature sensor N5 is grounded; a pin 2 of the temperature sensor N5 is respectively connected with one end of a resistor R15 and a grounding resistor R16; the other end of the resistor R15 is respectively connected with a grounding resistor R14 and the non-inverting input end of the operational amplifier N6; the inverting input end of the operational amplifier N6 is respectively connected with one end of the resistor R18 and the grounding resistor R17; the output end of the operational amplifier N6 is connected with the other end of the resistor R18 and serves as the output end of the temperature acquisition circuit. The output of the temperature acquisition circuit can be input into the FPGA circuit after being subjected to A/D conversion.
The FPGA circuit comprises an FPGA chip with the model number of A3P1000-PQ208M and a memory with the model number of X5323S8 IZ-2.7A. And during high and low temperature, based on the temperature value of the current target electronic device, correcting the acquired data at high and low temperatures, and compensating the influence of the temperature on a hardware circuit. When the analog switch works specifically, the FPGA circuit controls an enabling signal and an address control signal of the analog switch, sequentially selects and connects an input signal, and inputs the input signal to an analog acquisition interface of the A/D converter; controlling the A/D converter to perform analog-to-digital conversion according to a set period T (T can be set through existing software programming), and storing converted digital quantity; the correction coefficient memory can adopt an EEPROM (electrically erasable programmable read-only memory) to store the correction coefficient of the data, the FPGA reads the correction coefficient of the memory through an SPI (serial peripheral interface) bus, and the temperature correction of the digital quantity data is carried out based on a preset optimization fitting algorithm.
In summary, the invention, aiming at various analog quantity electric signals input by the electronic equipment, completes the sequential and rapid switching and acquisition of the analog quantity signals of 64 channels in a fixed period through the expansion of the analog switch; a plurality of A/D converters and filtering amplitude limiting protection circuits are not needed to be added, only 1 path of filtering amplitude limiting protection circuit is needed to be used in front of the analog-digital conversion circuit, the weight and the size of the module can be effectively reduced, and the defects that a traditional acquisition module is large in number of used components, high in cost, large in size and high in fault probability are avoided. Common mode interference can be filtered, output signals are filtered to remove differential mode interference through active filtering, the accuracy of the collected signals is integrally improved, and the high anti-interference capability is achieved.
Claims (12)
1. A multi-channel analog signal acquisition and processing system is characterized by comprising a signal acquisition device, a channel selection switching circuit, a filtering amplitude limiting protection circuit, an analog-digital conversion circuit and an FPGA circuit which are sequentially connected; the FPGA circuit is connected with the output end of the temperature acquisition circuit;
the signal collector is used for collecting a signal of a target and sending the collected analog signal to the channel selection switching circuit;
the channel selection switching circuit is used for selecting an analog signal acquired by a corresponding signal acquisition device according to a control signal of the FPGA circuit and inputting the analog signal into the filtering amplitude limiting protection circuit;
the filtering amplitude limiting protection circuit filters an input analog signal and ground, clamps the filtered signal to +/-15V and inputs the signal to the analog-digital conversion circuit;
the analog-digital conversion circuit is used for converting the analog quantity into the digital quantity to obtain a digital signal and sending the digital signal to the FPGA circuit through the parallel data bus;
the temperature acquisition circuit is used for acquiring the ambient temperature of the target object during working;
the FPGA circuit is used for acquiring a correction coefficient according to the environment temperature of the target object during working to correct each digital signal and storing and/or displaying the corrected data; for generating control signals for the channel selection switching circuit.
2. The multi-channel analog signal acquisition and processing system of claim 1, wherein the channel selection switching circuit comprises at least one stage of switches, each stage of switch comprises at least one 8-channel analog switch, and the output terminal of the nth stage 8-channel analog switch is connected with the input terminal of the (n-1) th stage 8-channel analog switch; the output end of the 1 st-stage 8-channel analog switch is connected with a filtering amplitude limiting protection circuit; the input end of the last 1-stage 8-channel analog switch is connected with a signal collector; and the control end of each 8-channel analog switch is respectively connected with the FPGA circuit.
3. The multi-channel analog signal acquisition and processing system as claimed in claim 2, wherein the model of the 8-channel analog switch is HI-548-2.
4. The multi-channel analog signal acquisition and processing system of claim 1, wherein the filtering amplitude limiting protection circuit comprises a first low-pass filtering module, a second low-pass filtering module, a difference module, a +15V amplitude limiting module and a-15V amplitude limiting module; the input end of the first low-pass filtering module is connected with the output end of the channel selection switching circuit; the input end of the second low-pass filtering module is connected with the analog ground; the output end of the first low-pass filtering module and the output end of the second low-pass filtering module are respectively connected with the inverting input end and the non-inverting input end of the differential module; the input end of the +15V amplitude limiting module is connected with 10V reference voltage; the input end of the 15V amplitude limiting module is connected with a-10V reference voltage; the output end of the difference module is respectively connected with the output end of the +15V amplitude limiting module and the output end of the-15V amplitude limiting module and is used as the output end of the filtering amplitude limiting protection circuit.
5. The multi-channel analog signal acquisition and processing system as claimed in claim 4, wherein the first low-pass filtering module comprises an operational amplifier N1, and the non-inverting input terminal of the operational amplifier N1 is connected with the output terminal of the channel selection switching circuit through a resistor R4; the inverting input end of the operational amplifier N1 is respectively connected with one end of a resistor R2 and one end of a capacitor C1, and the other end of the resistor R2 is respectively connected with the other end of a capacitor C1, the output end of the operational amplifier N1 and one end of a resistor R3; the other end of the resistor R3 is used as the output end of the first low-pass filtering module.
6. The multi-channel analog signal acquisition and processing system as claimed in claim 4, wherein the second low-pass filtering module comprises an operational amplifier N2, the non-inverting input terminal of the operational amplifier N2 is connected with an analog ground, a ground resistor R6 and a ground capacitor C4 through a resistor R3 respectively; the inverting input end of the operational amplifier N2 is respectively connected with one end of a resistor R5 and one end of a capacitor C3, and the other end of the resistor R5 is respectively connected with the other end of a capacitor C3, the output end of the operational amplifier N2 and one end of a resistor R7; the other end of the resistor R7 is used as the output end of the second low-pass filtering module.
7. The multi-channel analog signal acquisition and processing system as claimed in claim 4, wherein the difference module comprises an operational amplifier N3, and the inverting input terminal of the operational amplifier N3 is respectively connected with the output terminal of the first low-pass filtering module, one terminal of a capacitor C2 and one terminal of a resistor R1; the non-inverting input end of the operational amplifier N3 is connected with the output end of the second low-pass filtering module; the other end of the capacitor C2 is respectively connected with the other end of the resistor R1 and the output end of the operational amplifier N3; the output terminal of the operational amplifier N3 is the output terminal of the differential block.
8. The multi-channel analog signal acquisition and processing system of claim 4, wherein the +15V clipping module comprises an operational amplifier N4C, a non-inverting input terminal of the operational amplifier N4C is connected to a 10V reference voltage; the inverting input end of the operational amplifier N4C is connected with the anode of the switch diode V1 and serves as the output end of the +15V amplitude limiting module; the cathode of the switching diode V1 is connected to the output terminal of the operational amplifier N4C.
9. The multi-channel analog signal acquisition and processing system of claim 4, wherein the-15V clipping module comprises an operational amplifier N4D, a non-inverting input terminal of the operational amplifier N4D being connected to a-10V reference voltage; the non-inverting input end of the operational amplifier N4D is used as the output end of the-15V amplitude limiting module; the inverting input terminal of the operational amplifier N4D is connected to the cathode of the switching diode V2, and the anode of the switching diode V2 is connected to the output terminal of the operational amplifier N4D.
10. The multi-channel analog signal acquisition and processing system as claimed in claim 1, wherein the analog-to-digital conversion circuit comprises an A/D converter D1 with model number AD1674, and the digital ground of the A/D converter D1 is shorted with the analog ground by a 0 ohm resistor.
11. The multi-channel analog signal acquisition and processing system as claimed in claim 1, wherein the temperature acquisition circuit comprises a temperature sensor N5 with model number AD590, and pin 1 of the temperature sensor N5 is respectively connected with a 15V power supply and a grounding capacitor C8; pin 3 of temperature sensor N5 is grounded; a pin 2 of the temperature sensor N5 is respectively connected with one end of a resistor R15 and a grounding resistor R16; the other end of the resistor R15 is respectively connected with a grounding resistor R14 and the non-inverting input end of the operational amplifier N6; the inverting input end of the operational amplifier N6 is respectively connected with one end of the resistor R18 and the grounding resistor R17; the output end of the operational amplifier N6 is connected with the other end of the resistor R18 and serves as the output end of the temperature acquisition circuit.
12. The multi-channel analog signal acquisition and processing system as claimed in claim 1, wherein the FPGA circuit comprises an FPGA chip with a model number of A3P1000-PQ208M and a memory with a model number of X5323S8 IZ-2.7A.
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Cited By (6)
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CN114636672A (en) * | 2022-05-11 | 2022-06-17 | 之江实验室 | Photoacoustic and ultrasonic multiplexing acquisition system and method |
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CN114636672A (en) * | 2022-05-11 | 2022-06-17 | 之江实验室 | Photoacoustic and ultrasonic multiplexing acquisition system and method |
CN115390614A (en) * | 2022-08-02 | 2022-11-25 | 重庆鲲量科技有限公司 | High-precision AC/DC dual-purpose constant-voltage source circuit and temperature output double-feedback compensation method thereof |
CN115813406A (en) * | 2022-12-24 | 2023-03-21 | 北京津发科技股份有限公司 | EEG sensor circuit, method and device |
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CN115844390B (en) * | 2022-12-24 | 2023-09-29 | 北京津发科技股份有限公司 | Near infrared light acquisition circuit, method, system and device |
CN117850326A (en) * | 2024-03-08 | 2024-04-09 | 安吉泰心(天津)健康产业有限公司 | Acquisition method and device for multipath tiny analog signals |
CN117850326B (en) * | 2024-03-08 | 2024-05-28 | 安吉泰心(天津)健康产业有限公司 | Acquisition method and device for multipath tiny analog signals |
CN118282407A (en) * | 2024-05-31 | 2024-07-02 | 江苏莱提电气股份有限公司 | Temperature digital-to-analog conversion method, device, equipment and multichannel temperature sampling device |
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