CN114355307A - Radar echo state monitoring method and device - Google Patents

Radar echo state monitoring method and device Download PDF

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Publication number
CN114355307A
CN114355307A CN202111602492.8A CN202111602492A CN114355307A CN 114355307 A CN114355307 A CN 114355307A CN 202111602492 A CN202111602492 A CN 202111602492A CN 114355307 A CN114355307 A CN 114355307A
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echo
echo data
sign bit
leading
bit
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朱鹏
陈焕然
时亚丽
李孟洋
何佳敏
谈璐璐
马志娟
王震
王飞
蒋千
龚俊亮
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CETC 38 Research Institute
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    • GPHYSICS
    • G01MEASURING; TESTING
    • G01SRADIO DIRECTION-FINDING; RADIO NAVIGATION; DETERMINING DISTANCE OR VELOCITY BY USE OF RADIO WAVES; LOCATING OR PRESENCE-DETECTING BY USE OF THE REFLECTION OR RERADIATION OF RADIO WAVES; ANALOGOUS ARRANGEMENTS USING OTHER WAVES
    • G01S7/00Details of systems according to groups G01S13/00, G01S15/00, G01S17/00
    • G01S7/02Details of systems according to groups G01S13/00, G01S15/00, G01S17/00 of systems according to group G01S13/00
    • G01S7/41Details of systems according to groups G01S13/00, G01S15/00, G01S17/00 of systems according to group G01S13/00 using analysis of echo signal for target characterisation; Target signature; Target cross-section

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  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Radar, Positioning & Navigation (AREA)
  • Remote Sensing (AREA)
  • Radar Systems Or Details Thereof (AREA)

Abstract

The invention discloses a radar echo state monitoring method and a device, wherein the method comprises the following steps: acquiring echo data; respectively carrying out leading zero prediction and leading one prediction on echo data to obtain the sign bit number results of positive numbers and the sign bit number results of negative numbers; carrying out numerical value statistics according to the number of sign bits of the positive numbers and the number of sign bits of the negative numbers to obtain the bit width of the sign bits of the echoes; and determining the state of the echo data according to the bit width of the sign bit of the echo. The data bit width of the positive number and the negative number of the echo data is judged through the leading zero and the leading one respectively, the size of the echo data is judged through the range of positive and negative integers, the reliability of the monitoring result is high, the data range is counted by adopting a method for predicting the number of the sign bits, the data size is simpler and more efficient than the data size judged through a circuit, and the occupied resources are less.

Description

Radar echo state monitoring method and device
Technical Field
The invention relates to the technical field of radar signal processing, in particular to a radar echo state monitoring method and device.
Background
The radar imaging technology develops towards high resolution, high integration and high reliability, and higher requirements are put forward on a radar sampling channel and data transmission speed. And after the AD sampling equipment samples and quantizes the radar echo, a series of digital signal processing such as digital demodulation, decimation filtering, beam forming, FFT (fast Fourier transform), pulse compression and the like is carried out. Meanwhile, echo data of one SAR image has hundreds of GB and the size of TB. In order to avoid errors such as system faults, abnormal parameter configuration and the like, which cause abnormal echo states and waste of manpower and material resources, the method is particularly important for detecting the echo data states.
At present, transmission links of radar echo data are all based on high-speed interface transmission, and the amount of echo data is large. The state monitoring of the echo data in the early debugging process is based on the state capture by connecting a debugging simulator. The problem can be quickly positioned in the early debugging process of the monitoring means, but human resources are wasted in the middle debugging process, and the monitoring means is not applicable in the later product delivery process.
Another common method is to count the size of the echo data, noise is below the lower threshold of the valid data, overflow above the upper threshold, and valid data is between the thresholds. For example, the radar echo data processing method disclosed in the invention patent application with application number 202010512096.5 replaces the corresponding initial judgment parameter according to at least one of the determined top echo threshold, the vertical gradient value, and the echo change threshold, and screens the radar base data according to the replaced initial judgment parameter. Because the echo data size is counted, the resource occupation is more, and the echo processing delay is large.
Disclosure of Invention
The invention aims to solve the technical problem of how to realize the efficient monitoring of the echo data state and save resources.
The invention solves the technical problems through the following technical means:
in one aspect, a radar echo state monitoring method is used, and the method includes:
acquiring echo data;
respectively carrying out leading zero prediction and leading one prediction on the echo data to obtain the sign bit number results of positive numbers and the sign bit number results of negative numbers;
carrying out numerical value statistics according to the sign bit number of the positive number and the sign bit number of the negative number to obtain the sign bit width of the echo;
and determining the state of the echo data according to the bit width of the sign bit of the echo.
The data bit width of the positive number and the negative number of the echo data is judged through the leading zero and the leading one respectively, the size of the echo data is judged through the range of positive and negative integers, the reliability of the monitoring result is high, the data range is counted by adopting a method for predicting the number of the sign bits, the data size is simpler and more efficient than the data size judged through a circuit, and the occupied resources are less.
Further, after the acquiring the echo data, the method further includes:
judging whether the bit width N of the echo data is a positive power of 2;
if so, determining the echo data as effective echo data;
if not, performing bit complementing on the echo data, and determining the echo data as effective echo data after the bit width N of the echo data is an integer power of 2;
and respectively carrying out leading zero prediction and leading one prediction on the effective echo data.
Further, the performing leading zero prediction and leading one prediction on the echo data respectively to obtain the sign bit number of positive numbers and the sign bit number of negative numbers, includes:
performing leading zero prediction on the echo data, and calculating the position of the first 1 of the highest bit of each echo data to obtain the number of high-order zeros of the echo data as the sign bit number of the positive number;
and performing leading-one prediction on the echo data, and calculating the position of the first 0 of the highest bit of each echo data to obtain the number of the high bits 1 of the echo data as the sign bit number of the negative number.
Further, the performing numerical statistics according to the sign bit number of the positive number and the sign bit number of the negative number to obtain the echo sign bit width includes:
and taking the minimum value of the sign bit number of the positive number and the sign bit number of the negative number as the sign bit width of the echo.
Further, the determining the state of the echo data according to the echo sign bit width includes:
determining that the state of the echo data is no signal when the echo sign bit width is equal to 0 or N-1;
when the echo sign bit width is equal to 1, determining that the state of the echo data is overflow risk;
determining that the state of the echo data is noise when the echo sign bit width is between M and N-2;
determining that the state of the echo data is a valid signal when the echo sign bit width is between M +1 and 2;
and obtaining the M value by calibrating the system, wherein N is the bit width of the echo data, and the M value is the bit width of a system noise sign bit.
In a second aspect, a radar echo state monitoring device is used, the device comprising:
the acquisition module is used for acquiring echo data;
the processing module is used for respectively carrying out leading zero prediction and leading one prediction on the echo data to obtain the sign bit number results of positive numbers and the sign bit number results of negative numbers;
the counting module is used for carrying out numerical value counting according to the sign bit number of the positive number and the sign bit number of the negative number to obtain the sign bit width of the echo;
and the state determining module is used for determining the state of the echo data according to the echo sign bit width.
Further, the processing module includes a leading zero submodule and a leading one-word module, wherein the leading zero module includes n 4-bit zero-guiding units, n/2 8-bit zero-guiding units and n/4 16-bit zero-guiding units, an input of each 8-bit zero-guiding unit is connected with two 4-bit zero-guiding units, and an output of each 8-bit zero-guiding unit is connected with the 16-bit zero-guiding unit, where n is an echo data bit width complemented to 2 to an integer power/4.
It should be noted that the zero leading unit with a 4-bit width is the minimum processing unit, the echo data bit width is a multiple of 4 after being complemented to an integer power of 2, the multiple is the number of processing units with a 4-bit width, and if the echo bit width is 32 bits, 8 processing units with a 4-bit width are required.
Furthermore, the leading one module includes n 4-bit leading one units, n/2 8-bit leading one units, and n/4 16-bit leading one units, wherein the input of each 8-bit leading one unit is connected with two 4-bit leading one units, and the output of each 8-bit leading one unit is connected with the 16-bit leading one unit, wherein n is the echo data bit width which is complemented with an integer power/4 of 2.
Further, the statistical module is specifically configured to:
and taking the minimum value of the sign bit number of the positive number and the sign bit number of the negative number as the sign bit width of the echo.
Further, the state determination module is specifically configured to:
determining that the state of the echo data is no signal when the echo sign bit width is equal to 0 or N-1;
when the echo sign bit width is equal to 1, determining that the state of the echo data is overflow risk;
determining that the state of the echo data is noise when the echo sign bit width is between M and N-2;
determining that the state of the echo data is a valid signal when the echo sign bit width is between M +1 and 2;
and obtaining the M value by calibrating the system, wherein N is the bit width of the echo data, and the M value is the bit width of a system noise sign bit.
The invention has the advantages that:
(1) the data bit width of the positive number and the negative number of the echo data is judged through the leading zero and the leading one respectively, the size of the echo data is judged through the range of positive and negative integers, the reliability of the monitoring result is high, the data range is counted by adopting a method for predicting the number of the sign bits, the data size is simpler and more efficient than the data size judged through a circuit, and the occupied resources are less.
(2) The leading zero submodule and the leading one submodule can be expanded to data monitoring with larger bit width by utilizing cascade connection of the processing unit with the minimum 4-bit width, the processing method is simple, and the monitoring result delay is low.
Additional aspects and advantages of the invention will be set forth in part in the description which follows and, in part, will be obvious from the description, or may be learned by practice of the invention.
Drawings
FIG. 1 is a flow chart of a radar echo state monitoring method according to a first embodiment of the present invention;
FIG. 2 is a schematic diagram illustrating an echo data validity determination according to a first embodiment of the present invention;
fig. 3 is a structural diagram of a radar echo state monitoring apparatus in a second embodiment of the present invention;
FIG. 4 is a block diagram of a leading zero submodule in a second embodiment of the present invention;
FIG. 5 is a block diagram of a leading word block in a second embodiment of the present invention;
FIG. 6 is a block diagram of a statistics module in a second embodiment of the present invention;
fig. 7 is a schematic view of the monitoring process in the present invention.
Detailed Description
In order to make the objects, technical solutions and advantages of the embodiments of the present invention clearer, the technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the embodiments of the present invention, and it is obvious that the described embodiments are some embodiments of the present invention, but not all embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
As shown in fig. 1, a first embodiment of the present invention discloses a radar echo state monitoring method, which includes the following steps:
s10, acquiring echo data;
s20, respectively carrying out leading zero prediction and leading one prediction on the echo data to obtain the sign bit number results of positive numbers and negative numbers;
s30, carrying out numerical value statistics according to the sign bit number of the positive number and the sign bit number of the negative number to obtain the sign bit width of the echo;
and S40, determining the state of the echo data according to the echo sign bit width.
It should be noted that, by performing leading zero prediction and leading one prediction on echo data, data bit widths of positive numbers and negative numbers of the echo data are respectively judged, the size of the echo data is jointly judged through the range of positive integers and negative integers, the reliability of the monitoring result is high, and the data range is counted by adopting the method for predicting the number of sign bits, which is simpler and more efficient than the method for judging the size of the echo data through a circuit, and occupies less resources.
In some embodiments, as shown in fig. 2, after the step S10, the method further includes the steps of:
s1, judging whether the bit width N of the echo data is a positive power of 2, if so, executing a step S3, otherwise, executing a step S2;
s2, complementing the echo data to enable the bit width N to be an integral power of 2, and then executing the step S3;
and S3, determining the echo data as effective echo data, and respectively performing leading zero prediction and leading one prediction on the effective echo data.
Specifically, the echo data bit width is divided into 4-bit integer multiples, the integer multiples enter a processing unit with 4-bit width for processing, when the bit width N of the echo data is not a positive power of 2, 1 is complemented to low bits, the bit width is enabled to be an integer power of 2, and leading zero prediction is carried out. And (4) complementing 0 to the low bit to enable the bit width to reach the integral power of 2, and performing leading one prediction.
In some embodiments, the step S20 includes the following steps:
s201, performing leading zero prediction on the echo data, and calculating the position of the first 1 of the highest bit of each echo data to obtain the number of high-order zeros of the echo data as the sign bit number of the positive number;
s202, performing leading-one prediction on the echo data, and calculating the position of the first 0 of the highest bit of each echo data to obtain the number of the high bits 1 of the echo data as the sign bit number of the negative number.
It should be noted that the leading zero prediction is used to perform leading zero prediction on data input by radar echo, and calculate the position of the first 1 of the highest bit of each echo data, and for a positive integer, the number is the number of sign bits 0. The leading-one prediction is used for leading-one prediction of data input by radar echo, and calculating the position of the first 0 of the highest bit of each echo data, and for a negative integer, the number of sign bits is 1.
In some embodiments, the step S30 includes:
and taking the minimum value of the sign bit number of the positive number and the sign bit number of the negative number as the sign bit width of the echo.
It should be noted that, the results of leading zero prediction and leading one prediction are counted, the sign bit of the positive integer and the sign bit of the negative integer of the radar echo data are counted, and the minimum sign bit value is taken as the echo sign bit width.
In some embodiments, the step S40 includes:
determining that the state of the echo data is no signal when the echo sign bit width is equal to 0 or N-1;
when the echo sign bit width is equal to 1, determining that the state of the echo data is overflow risk;
determining that the state of the echo data is noise when the echo sign bit width is between M and N-2;
determining that the state of the echo data is a valid signal when the echo sign bit width is between M +1 and 2;
and obtaining the M value by calibrating the system, wherein N is the bit width of the echo data, and the M value is the bit width of a system noise sign bit.
As shown in fig. 3, a second embodiment of the present invention discloses a radar echo state monitoring device, which includes:
an obtaining module 10, configured to obtain echo data;
the processing module 20 is configured to perform leading zero prediction and leading one prediction on the echo data respectively to obtain sign bit number results of positive numbers and sign bit number results of negative numbers;
the counting module 30 is configured to perform numerical value counting according to the sign bit number of the positive number and the sign bit number of the negative number to obtain an echo sign bit width;
and the state determining module 40 is configured to determine the state of the echo data according to the echo sign bit width.
It should be noted that, the processing module is used for respectively judging the data bit width of the positive number and the negative number of the echo data for the leading zero and the leading one of the echo data, the size of the echo data is jointly judged through the range of positive and negative integers, the reliability of the monitoring result is high, the data range is counted by adopting the method for predicting the number of the sign bits, the method is simpler and more efficient than the method for judging the size of the data through a circuit, and the occupied resources are less.
Further, the processing module includes a leading zero submodule and a leading one-word module, wherein the leading zero module includes n 4-bit zero-guiding units, n/2 8-bit zero-guiding units and n/4 16-bit zero-guiding units, an input of each 8-bit zero-guiding unit is connected with two 4-bit zero-guiding units, and an output of each 8-bit zero-guiding unit is connected with the 16-bit zero-guiding unit, where n is an echo data bit width complemented to 2 to an integer power/4.
It should be noted that the zero leading unit with a 4-bit width is the minimum processing unit, the echo data bit width is a multiple of 4 after being complemented to an integer power of 2, the multiple is the number of processing units with a 4-bit width, and if the echo bit width is 32 bits, 8 processing units with a 4-bit width are required.
As shown in fig. 4, for example, 16-bit input data is taken as an example, and a 4-bit zero-leading unit LZD4 is taken as a minimum unit to perform 16-bit data zero-leading prediction processing and output a 4-bit result.
The logic expression of the 4-bit zero-leading unit LZD4 is:
V=D[0]|D[1]|D[2]|D[3];
P={~(D[2]|D[3]),((D[2]|D[3])?~D[3]:~D[1]};
the logic expression of the 8-bit zero leading unit LZD8 is as follows:
V=V[0]|V[1];
P={~V[1],((V[1])?P[1]:P[0]};
by analogy, in the 16-bit leading zero unit LZD16, the logical expressions are similar, but only result P is output, which is the leading zero result, the position where the highest bit of data appears as the first 1, i.e., the number of sign bits 0.
Furthermore, the leading one module includes n 4-bit leading one units, n/2 8-bit leading one units, and n/4 16-bit leading one units, wherein the input of each 8-bit leading one unit is connected with two 4-bit leading one units, and the output of each 8-bit leading one unit is connected with the 16-bit leading one unit, wherein n is the echo data bit width which is complemented with an integer power/4 of 2.
It should be noted that, as shown in fig. 5, taking 16-bit input data as an example, a 4-bit derivative one unit LOD4 is a minimum unit, and 16-bit data derivative one prediction processing is performed to output a 4-bit derivative one result.
The logical expression of the 4-bit lead one cell LOD4 is:
V=D[0]&D[1]&D[2]&D[3];
P={D[2]&D[3],(~(D[2]&D[3])?D[3]:D[1]};
the logical expression of the 8-bit lead-one unit LOD8 is:
V=V[0]&V[1];
P={V[1],((~V[1])?P[1]:P[0]};
by analogy, at the 16-bit lead one cell LOD16, the logical expression is similar, but only the result P is output.
It should be noted that the leading zero submodule and the leading one submodule are cascaded by using the minimum processing unit with 4-bit width, and can be extended to data monitoring with larger bit width, the processing method is simple, and the monitoring result delay is low.
It should be noted that, in this embodiment, the 4-bit wide processing unit is cascaded as the minimum processing module, is logically built by using an and gate, and is implemented on the FPGA by using a hardware programming language, which has the advantages of modularly implementing data judgment of different bit widths, simple use, parallel cascade of processing units, small data output delay, implementation by using a most basic and or gate circuit, less resources used by the FPGA, and the like.
Further, the statistical module 30 is specifically configured to:
and taking the minimum value of the sign bit number of the positive number and the sign bit number of the negative number as the sign bit width of the echo.
As shown in fig. 6, the counting module counts the zero-leading result and the zero-leading result of the echo data, counts the number of sign bits of the echo data, where the radar echo is a positive or negative integer, the minimum value of the zero-leading result is 0, and the second-smallest value represents the number of sign bits of the positive number. The resulting minimum value is 0 and the next minimum value represents the number of sign bits of a negative number. And taking the minimum value of the two secondary small values to obtain the symbol bit width of the echo data.
Further, the state determining module 40 is specifically configured to:
determining that the state of the echo data is no signal when the echo sign bit width is equal to 0 or N-1;
when the echo sign bit width is equal to 1, determining that the state of the echo data is overflow risk;
determining that the state of the echo data is noise when the echo sign bit width is between M and N-2;
determining that the state of the echo data is a valid signal when the echo sign bit width is between M +1 and 2;
and obtaining the M value by calibrating the system, wherein N is the bit width of the echo data, and the M value is the bit width of a system noise sign bit.
The monitoring process is as shown in fig. 7, and one radar return data with bit width of 8 is input, and the data length is 24 bytes. The known system noise amplitude bit width is 4. So an echo bit width equal to 0 or 7 indicates no data, a bit width equal to 1 indicates data at risk of overflow, a bit width equal to 2 or 3 indicates an echo as valid data, and a value between 4 and 6 indicates an echo as noise. And (3) the echo is detected by leading zeros and leading ones, the secondary minimum value of the result counting module is 2, the bit width of the echo is 2, and the echo data is valid data in the valid data range interval.
It should be noted that the logic and/or steps represented in the flowcharts or otherwise described herein, such as an ordered listing of executable instructions that can be considered to implement logical functions, can be embodied in any computer-readable medium for use by or in connection with an instruction execution system, apparatus, or device, such as a computer-based system, processor-containing system, or other system that can fetch the instructions from the instruction execution system, apparatus, or device and execute the instructions. For the purposes of this description, a "computer-readable medium" can be any means that can contain, store, communicate, propagate, or transport the program for use by or in connection with the instruction execution system, apparatus, or device. More specific examples (a non-exhaustive list) of the computer-readable medium would include the following: an electrical connection (electronic device) having one or more wires, a portable computer diskette (magnetic device), a Random Access Memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), an optical fiber device, and a portable compact disc read-only memory (CDROM). Additionally, the computer-readable medium could even be paper or another suitable medium upon which the program is printed, as the program can be electronically captured, via for instance optical scanning of the paper or other medium, then compiled, interpreted or otherwise processed in a suitable manner if necessary, and then stored in a computer memory.
It should be understood that portions of the present invention may be implemented in hardware, software, firmware, or a combination thereof. In the above embodiments, the various steps or methods may be implemented in software or firmware stored in memory and executed by a suitable instruction execution system. For example, if implemented in hardware, as in another embodiment, any one or combination of the following techniques, which are known in the art, may be used: a discrete logic circuit having a logic gate circuit for implementing a logic function on a data signal, an application specific integrated circuit having an appropriate combinational logic gate circuit, a Programmable Gate Array (PGA), a Field Programmable Gate Array (FPGA), or the like.
In the description herein, references to the description of the term "one embodiment," "some embodiments," "an example," "a specific example," or "some examples," etc., mean that a particular feature, structure, material, or characteristic described in connection with the embodiment or example is included in at least one embodiment or example of the invention. In this specification, the schematic representations of the terms used above do not necessarily refer to the same embodiment or example. Furthermore, the particular features, structures, materials, or characteristics described may be combined in any suitable manner in any one or more embodiments or examples.
Furthermore, the terms "first", "second" and "first" are used for descriptive purposes only and are not to be construed as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include at least one such feature. In the description of the present invention, "a plurality" means at least two, e.g., two, three, etc., unless specifically limited otherwise.
Although embodiments of the present invention have been shown and described above, it is understood that the above embodiments are exemplary and should not be construed as limiting the present invention, and that variations, modifications, substitutions and alterations can be made to the above embodiments by those of ordinary skill in the art within the scope of the present invention.

Claims (10)

1. A radar echo state monitoring method, characterized in that the method comprises:
acquiring echo data;
respectively carrying out leading zero prediction and leading one prediction on the echo data to obtain the sign bit number results of positive numbers and the sign bit number results of negative numbers;
carrying out numerical value statistics according to the sign bit number of the positive number and the sign bit number of the negative number to obtain the sign bit width of the echo;
and determining the state of the echo data according to the bit width of the sign bit of the echo.
2. The radar echo status monitoring method according to claim 1, further comprising, after said acquiring echo data:
judging whether the bit width N of the echo data is a positive power of 2;
if so, determining the echo data as effective echo data;
if not, performing bit complementing on the echo data, and determining the echo data as effective echo data after the bit width N of the echo data is an integer power of 2;
and respectively carrying out leading zero prediction and leading one prediction on the effective echo data.
3. The radar echo status monitoring method according to claim 1, wherein said performing leading zero prediction and leading one prediction on said echo data respectively to obtain positive sign bit number and negative sign bit number results comprises:
performing leading zero prediction on the echo data, and calculating the position of the first 1 of the highest bit of each echo data to obtain the number of high-order zeros of the echo data as the sign bit number of the positive number;
and performing leading-one prediction on the echo data, and calculating the position of the first 0 of the highest bit of each echo data to obtain the number of the high bits 1 of the echo data as the sign bit number of the negative number.
4. The radar echo state monitoring method according to claim 3, wherein the obtaining an echo sign bit width by performing numerical statistics according to the number of sign bits of the positive number and the number of sign bits of the negative number includes:
and taking the minimum value of the sign bit number of the positive number and the sign bit number of the negative number as the sign bit width of the echo.
5. The radar echo status monitoring method according to claim 1, wherein said determining the status of the echo data according to the echo sign bit width comprises:
determining that the state of the echo data is no signal when the echo sign bit width is equal to 0 or N-1;
when the echo sign bit width is equal to 1, determining that the state of the echo data is overflow risk;
determining that the state of the echo data is noise when the echo sign bit width is between M and N-2;
determining that the state of the echo data is a valid signal when the echo sign bit width is between M +1 and 2;
and obtaining the M value by calibrating the system, wherein N is the bit width of the echo data, and the M value is the bit width of a system noise sign bit.
6. A radar echo state monitoring device, characterized in that the device comprises:
the acquisition module is used for acquiring echo data;
the processing module is used for respectively carrying out leading zero prediction and leading one prediction on the echo data to obtain the sign bit number results of positive numbers and the sign bit number results of negative numbers;
the counting module is used for carrying out numerical value counting according to the sign bit number of the positive number and the sign bit number of the negative number to obtain the sign bit width of the echo;
and the state determining module is used for determining the state of the echo data according to the echo sign bit width.
7. The radar echo status monitoring device according to claim 6, wherein the processing module includes a leading zero submodule and a leading one-word module, wherein the leading zero module includes n 4-bit leading zero units, n/2 8-bit leading zero units and n/4 16-bit leading zero units, each 8-bit leading zero unit has two 4-bit leading zero units connected to its input and 16-bit leading zero units connected to its output, and wherein n is echo data bit width to be an integer power/4 of 2.
8. The radar echo status monitoring device of claim 7, wherein the leading-one module includes n 4-bit leading-one units, n/2 8-bit leading-one units, and n/4 16-bit leading-one units, each of the 8-bit leading-one units has two of the 4-bit leading-one units connected to its input and 16-bit leading-one units connected to its output, where n is echo data bit width complemented by 2 to an integer power/4.
9. The radar echo status monitoring device of claim 6, wherein the statistics module is specifically configured to:
and taking the minimum value of the sign bit number of the positive number and the sign bit number of the negative number as the sign bit width of the echo.
10. The radar echo status monitoring device of claim 6, wherein the status determination module is specifically configured to:
determining that the state of the echo data is no signal when the echo sign bit width is equal to 0 or N-1;
when the echo sign bit width is equal to 1, determining that the state of the echo data is overflow risk;
determining that the state of the echo data is noise when the echo sign bit width is between M and N-2;
determining that the state of the echo data is a valid signal when the echo sign bit width is between M +1 and 2;
and obtaining the M value by calibrating the system, wherein N is the bit width of the echo data, and the M value is the bit width of a system noise sign bit.
CN202111602492.8A 2021-12-24 2021-12-24 Radar echo state monitoring method and device Pending CN114355307A (en)

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