CN114337220A

CN114337220A - Starting impact current suppression circuit

Info

Publication number: CN114337220A
Application number: CN202111599942.2A
Authority: CN
Inventors: 宋旭东; 曹志东; 杨帆; 汤晖斌; 郝英杰; 阳良春; 朱刘英; 王凯; 肖化
Original assignee: Shanghai Jieruizhao New Information Technology Co ltd
Current assignee: Shanghai Jieruizhao New Information Technology Co ltd
Priority date: 2021-12-24
Filing date: 2021-12-24
Publication date: 2022-04-12

Abstract

The invention discloses a starting impact current suppression circuit, which comprises a rectifier bridge, a first current-limiting starting circuit, a second current-limiting starting circuit and a Boost circuit, wherein the rectifier bridge is connected with the first current-limiting starting circuit; the input end of the rectifier bridge is connected with an alternating current power supply, the positive output end of the rectifier bridge is connected with the positive input end of the first current-limiting starting circuit and the positive input end of the Boost circuit, and the negative output end of the rectifier bridge is connected with the negative input end of the first current-limiting starting circuit and the source electrode of the MOSFET of the second current-limiting starting circuit; the first output end of the first current-limiting starting circuit is connected with the input end of the second current-limiting starting circuit, and the second output end of the first current-limiting starting circuit is connected with the output negative end of the Boost circuit; boost powerThe output negative end of the circuit is connected with the drain electrode of the MOSFET of the second current-limiting starting circuit, and the output positive end of the Boost circuit is V_OUT. The invention can effectively restrain the starting impact current in the power factor correction circuit, and limit the current within 4A, thereby ensuring the reliable operation of the circuit.

Description

Starting impact current suppression circuit

Technical Field

The invention belongs to the technical field of electronics and electricity, and particularly relates to a starting impact current suppression circuit applied to electronic equipment such as Active Power Factor Correction (APFC).

Background

In order to improve the quality and electromagnetic compatibility of a switching power supply, an APFC circuit is generally built in an electronic device for eliminating current harmonics and improving power factors, a main power circuit of a traditional APFC circuit is completed by a Boost circuit, alternating current commercial power is converted into direct current voltage through a rectifier bridge and is input to the Boost circuit, and the Boost circuit boosts the voltage into about 380V for output. Usually, a large number of filter capacitors (energy storage capacitors in a Boost circuit) are added at the output end of the APFC circuit to reduce the output ripple of the post-stage DC/DC converter, so that the capacitors draw a large amount of current at the moment of power-up and start-up, which is the start-up inrush current, and can usually reach tens of times or even hundreds of times of the steady-state operating current of the power supply. The large starting rush current can cause several hazards:

1. the components (such as a power switch, a fuse, a rectifier and the like) of the power input part are damaged by great electrical stress, the failure rate of the components is improved, and the Mean Time Between Failures (MTBF) of the whole machine is obviously reduced.

2. Additional electromagnetic interference is generated that interferes with other nearby electronic devices in both conducted and radiated forms, potentially causing them to malfunction momentarily.

3. Causing a transient drop in the voltage on the supply line, which can have a serious impact on, or even cause a failure of, the equipment on the same supply line.

In order to limit the starting inrush current, a common method is to increase the input loop resistance during starting to reduce the magnitude of the capacitor charging current to achieve the purpose of limiting the current. In practical application, for a low-power supply, a resistor is connected in series in an input loop, and the resistance value cannot be too large, otherwise the efficiency and the stability of the power supply are affected. For a power supply with high efficiency and high power, in order to reduce unnecessary loss on a resistor, a relay, a thyristor, a MOSFET tube, etc. are generally connected in parallel, and after a capacitor is basically charged (i.e., after a charging period elapses), the resistor is short-circuited. The conventional methods for suppressing the starting rush current include the following 3 methods:

1. the method for inhibiting starting impact current by the NTC resistance is to serially connect one or a plurality of NTC (negative temperature coefficient) power type current limiting resistors on an input loop. When the power supply is turned on, the resistor is in a cold state and presents a high resistance, so that the amplitude of starting impact current can be effectively limited. After a few seconds, the resistance is low because the self-heating is changed into a hot state, and the resistance value at the moment is 1/10-1/100 of the cold resistance, so that the contradiction between the current limiting problem and the power consumption is solved, and the circuit is simple. However, the current limiting effect of the NTC resistor is greatly influenced by the ambient temperature, and when the NTC resistor is started at a low temperature, the resistance value is large, so that although the suppression effect on the starting impact current is good, the charging current of the capacitor is small, and the starting of the power supply may be influenced; when the high-temperature start is performed, the resistance value becomes relatively small, the suppression capability of the impact current becomes poor, and the required impact current suppression effect may not be achieved, so that the scheme has high environmental requirements and cannot work in a high-temperature or low-temperature environment. In addition, the method has requirements on the power-on time interval, and because the NTC resistor needs a certain time to be cooled to recover the nominal resistance value, the switching power supply is prevented from being restarted immediately after power failure, and the NTC resistor cannot play a role in inhibiting the impact current.

2. The method for suppressing starting impact current of the power resistor parallel relay is to connect a current-limiting power resistor in series in an input loop and connect a relay in parallel at two ends of the resistor. When the power supply is started, the relay is in an off state, current is limited through the power resistor, the capacitor is charged, when the voltage on the capacitor rises to a normal working voltage, the relay is controlled to be closed by the delay monitoring circuit, the power resistor is short-circuited, and the capacitor enters a normal working state. The starting impact current suppression mode avoids the defect that continuous starting cannot be realized by using an NTC resistor, and has a very good impact current suppression effect. However, the disadvantages of this approach are: relays require control circuitry, the voltage of which often affects circuit complexity. Meanwhile, when the relay is switched from an open state to a closed state, an arc discharge phenomenon easily occurs on high-voltage direct current, so that secondary impact current is formed. The mechanical relay has the fatal defect of poor anti-vibration performance and is not suitable for being used in a severe vibrating environment. In order to prevent the power resistor from failing at the moment of starting, the impact-resistant wire-wound resistor with the resistance power of about 5W-20W is generally selected.

3. The method is to connect a current-limiting power resistor in series in an input loop and connect a thyristor in parallel at both ends of the resistor. The working principle is that when the power supply is started, the controllable silicon is not conducted, and the capacitor is charged in a current-limiting manner through the power resistor. When the voltage of the capacitor rises to a certain value, the trigger circuit enables the silicon controlled rectifier to be conducted, the power resistor is short-circuited, and the power supply enters a normal working state. The starting impact current suppression mode avoids the defects that the relay cannot work in a severe environment with high vibration intensity and cannot be continuously started, has a very good impact current suppression effect, and the resistance power also needs to be selected to be about 5W-20W. The thyristors can here also be replaced by MOSFET tubes. However, the trigger circuit of the conventional design is complex and not easy to be used flexibly, and the starting current cannot be limited within the range of the specified requirement due to the very large starting impact current in the switching power supply applying the APFC circuit.

In a switching power supply applying an APFC circuit, the value of a power resistor cannot be too large by adopting the traditional methods, otherwise, at the moment that a relay or a thyristor is closed, because the charging voltage of a capacitor is not equal to the input peak voltage, the sudden change of impedance in a loop can also cause starting secondary impact current, and the larger the resistance value of the power resistor is, the larger the starting secondary impact current is. In addition, for a special power supply environment, due to the fact that space is small, capacity of a power supply generator is relatively small, input impact current of each electronic device adopting a switching power supply is limited specially, for example, in GJB 181B-2012, explicit requirements are made on starting impact current of an onboard device power supply, and impact current peak value of an electric device with power larger than 200W is not larger than 5 times of rated current. In this case, it is not always appropriate to use a conventional inrush current suppression circuit for the switching power supplies of these electric devices.

Disclosure of Invention

The invention aims to provide a circuit for restraining starting impact current, which effectively restrains the starting impact current of a switching power supply using APFC and ensures the reliable operation of the circuit.

The technical solution for realizing the purpose of the invention is as follows: a starting impact current suppression circuit comprises a rectifier bridge, a first current-limiting starting circuit, a second current-limiting starting circuit and a Boost circuit; the input end of the rectifier bridge is connected with an alternating current power supply, the output positive end of the rectifier bridge is connected with the input positive end of the first current-limiting starting circuit and the input positive end of the Boost circuit, and the output negative end of the rectifier bridge is connected with the input negative end of the first current-limiting starting circuit and the MOSFET source electrode of the second current-limiting starting circuit; the first output end of the first current-limiting starting circuit is connected with the input end of the second current-limiting starting circuit, and the second output end of the first current-limiting starting circuit is connected with the output negative end of the Boost circuit; the output negative end of the Boost circuit is connected with the drain electrode of the MOSFET of the second current-limiting starting circuit, and the output positive end of the Boost circuit is V_OUT。

Further, the first current-limiting starting circuit comprises a second capacitor, a third diode, a second MOSFET, a fourth triode, and first to fifth resistors; one end of a second resistor is connected with the positive output end of the rectifier bridge, and the other end of the second resistor is respectively connected with the cathode of a third diode, the anode of a second capacitor, the collector of a fourth triode, the grid of a second MOSFET and a second current-limiting starting circuit; the source electrode of the second MOSFET and the first resistor are connected in series in the ground circuit; the third resistor and the fourth resistor are connected in series and then connected in parallel at two ends of the first resistor; the voltage at the two ends of the first resistor is divided by the third resistor and the fourth resistor and then is connected in series with the fifth resistor to provide base driving voltage for the fourth triode; after the third diode and the second capacitor are connected in parallel, the anode of the third diode is connected to the emitter of the fourth triode, and the cathode of the third diode is connected to the collector of the fourth triode.

Furthermore, the second current-limiting starting circuit comprises a delay control circuit and a third MOSFET, the input end of the delay control circuit is connected with the first current-limiting starting circuit, the other end of the delay control circuit is connected with the grid electrode of the third MOSFET, the drain electrode of the third MOSFET is connected with the output negative terminal of the Boost circuit, and the source electrode of the third MOSFET is connected with the output negative terminal of the rectifier bridge.

Furthermore, the input end of the delay control circuit is connected with the collector of the fourth triode in the first current-limiting starting circuit.

Furthermore, the Boost circuit comprises a first inductor, a first diode, a second diode, a first MOSFET, a first energy storage capacitor and a load; the input end of the first inductor is connected with the positive output end of the rectifier bridge and the anode of the first diode, and the output end of the first inductor is connected with the anode of the second diode and the drain of the first MOSFET; the cathode of the second diode is connected with the cathode of the first diode and the positive output end of the Boost circuit; the source electrode of the first MOSFET is connected with the output negative end of the Boost circuit; after the first energy storage capacitor is connected with the load in parallel, the positive electrode of the first energy storage capacitor is connected to the positive output end of the Boost circuit, and the negative electrode of the first energy storage capacitor is connected to the negative output end of the Boost circuit.

Compared with the prior art, the invention has the following remarkable advantages:

1) the starting impact current in the APFC circuit can be effectively inhibited, and the reliable operation of the circuit is ensured.

2) The starting rush current can be suppressed to 4A or less.

The present invention is described in further detail below with reference to the attached drawing figures.

Drawings

Fig. 1 is a schematic diagram of a start-up inrush current suppression circuit in one embodiment.

Fig. 2 is a waveform diagram of the measured start-up inrush current according to an embodiment, in which (a) is a waveform diagram of the measured start-up inrush current at 230V input, and (b) is a waveform diagram of the measured start-up inrush current at 115V input.

Detailed Description

In order to make the objects, technical solutions and advantages of the present application more apparent, the present application is described in further detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative of the present application and are not intended to limit the present application.

It should be noted that if the description of "first", "second", etc. is provided in the embodiment of the present invention, the description of "first", "second", etc. is only for descriptive purposes and is not to be construed as indicating or implying relative importance or implicitly indicating the number of indicated technical features. Thus, a feature defined as "first" or "second" may explicitly or implicitly include at least one such feature. In addition, technical solutions between various embodiments may be combined with each other, but must be realized by a person skilled in the art, and when the technical solutions are contradictory or cannot be realized, such a combination should not be considered to exist, and is not within the protection scope of the present invention.

In one embodiment, referring to fig. 1, the operation principle of the inrush current suppression circuit is initiated according to the present invention.

The specific embodiment provides a starting impact current suppression circuit, which comprises a rectifier bridge DB₁The power supply circuit comprises a first current-limiting starting circuit, a second current-limiting starting circuit and a Boost circuit. Wherein the first current-limiting start-up circuit comprises a second capacitor C₂A third diode D₃A second MOSFET Q₂And a fourth triode Q₄First to fifth resistors R₁-R₅(ii) a The second current-limiting starting circuit comprises a time delay control circuit and a third MOSFET Q₃(ii) a The Boost circuit comprises a first inductor L₁A first diode D₁A second diode D₂First MOSFET Q₁And an energy storage capacitor C₁And a load R_L。

The main power circuit of the APFC circuit is completed by adopting a Boost circuit, alternating current is converted into direct current voltage through a rectifier bridge and is input to the Boost circuit, and the voltage is boosted into about 380V by the Boost circuit and is output.

When the circuit is powered on, the current flows through the rectifier bridge DB₁Rear pair of second capacitors C₂Charging when C₂The voltage on the second MOSFET tube Q₂After the grid electrode is switched on, the second MOSFET Q₂The off state is changed into a linear operation state, namely, the leakage current flowing on the gate increases along with the increase of the gate voltage. When the second MOSFET Q₂Is turned on, current flows through the first diode D₁A second diode D2, a first inductor L1, and a first energy-storage capacitor C₁A second MOSFET Q₂And a first power resistor R₁Rear to rectifier bridge DB₁The negative output terminal. Along with flowing through the second MOSFET Q₂Increase in current, power resistance R₁The voltage over the third resistor R is also increased₃A fourth resistor R₄After being detected and divided, the voltage is passed through a fifth resistor R₅To the fourth triode Q₄As a fourth triode Q₄The base drive voltage of (1). When the voltage reaches the fourth triode Q₄After the base drives the voltage, the fourth triode Q₄Turn on and pull down the second MOSFET Q₂Gate voltage of, Q₂Is turned off while the second capacitor C is turned on₂The voltage on the second triode is transmitted through the fourth triode Q₄And (6) quickly discharging. Following the second MOSFET Q₂Is turned off, the current passes through the first diode D₁A second diode D2, a first inductor L1, and a first energy-storage capacitor C₁A second MOSFET Q₂And a first power resistor R₁Is cut off. Current is recoupled to the second capacitor C₂Charging and then restarting the second MOSFET Q₂. By constantly restarting the second MOSFET Q₂In such a way that the input starting current is limited, following the first capacitor C₁After the charging voltage rises to be close to the rectification peak voltage, a second current-limiting starting circuit is started, and a second current-limiting starting circuit is started through a time delay control circuitThree MOSFET Q₃A power resistor R₁And a second MOSFET Q₂Bypassing the main circuit.

At the initial start-up of the circuit, the second MOSFET Q in the first current-limiting start-up circuit is utilized₂Controllability of operation in the linear region by detecting the power resistance R₁Two-terminal voltage to control the second MOSFET Q₂Thereby controlling the line impedance and thereby defining a first capacitance C₁A charging current limiting the starting rush current to within 4A; meanwhile, a second current-limiting starting circuit is utilized, after a certain delay time and APFC (active Power Filter) starts to work normally, a third MOSFET (Metal oxide semiconductor field Effect transistor) Q is switched on through a delay control circuit₃A power resistor R₁And a second MOSFET Q₂The bypass is arranged in the main circuit, and the reliability and the efficiency of the power supply are ensured.

The first diode D1 is used for preventing the first inductor L1 from being saturated due to overlarge starting current, and part of surge current is divided; the third diode D3 is a voltage regulator tube for limiting the MOSFET tube Q₂Gate voltage of the second MOSFET Q₂The grid works in a safe voltage area; a second resistor R₂For limiting the operating current of the third diode D3 while controlling the second capacitor C₂The charging current of (1); third resistor R₃A fourth resistor R₄For detecting the first MOSFET Q₁The voltage at both ends is divided to control the fourth triode Q₄By adjusting the third resistance R₃A fourth resistor R₄Can control the fourth triode Q₄On-time of the fifth resistor R₅For limiting the supply to the fourth transistor Q₄The base current of (1).

The switching power supply in the embodiment is a 300W 3U CPCI power supply, and the main parameters of the circuit are as follows:

the models of the first MOSFET Q1 to the third MOSFET Q3 are SPA21N50C 3; a third zener D3 model BZX84C 15. The first resistor R1 is selected to be 2W-4.7 omega, the second resistor R2 is a 132k omega resistor, the third resistor R3 and the third resistor R4 are 33k omega, and the fifth resistor R5 is 20k omega; the second inductance L2 is 220 μ H; the second capacitor C2 is 25V/10 μ F, and the first energy-storage capacitor C1 is 450V/300 μ F.

FIG. 2 is a current waveform of the circuit at power-on when 115V/50Hz and 230V/50Hz AC power are input, respectively, and the AC phase is 90 deg. under full load of 300W. U in FIG. 2_iFor inputting 220V (or 115V) AC voltage, u_oFor APFC output voltage, i_iTo input a starting current. Wherein the current grid is 2A/div. As can be seen from the current waveform diagram, the input rush current is suppressed below 4A from the instant the voltage is applied until the output voltage is established.

In conclusion, the invention can effectively restrain the starting impact current in the power factor correction circuit, and limit the current within 4A, thereby ensuring the reliable operation of the circuit.

The above embodiments are only for more clearly illustrating the technical solutions of the present invention, and the scope of the present invention includes but is not limited to the above embodiments, and any suitable changes or substitutions that are consistent with the claims of the present invention and are made by those skilled in the art shown should fall within the scope of the present invention.

Claims

1. A starting impact current suppression circuit is characterized by comprising a rectifier bridge, a first current-limiting starting circuit, a second current-limiting starting circuit and a Boost circuit; the input end of the rectifier bridge is connected with an alternating current power supply, and the output positive end (V) of the rectifier bridge_IN) The output negative terminal (GND1) of the rectifier bridge is connected with the input negative terminal of the first current-limiting starting circuit and the MOSFET source electrode of the second current-limiting starting circuit; the first output end of the first current-limiting starting circuit is connected with the input end of the second current-limiting starting circuit, and the second output end of the first current-limiting starting circuit is connected with the output negative end (GND) of the Boost circuit; the output negative end of the Boost circuit is connected with the drain electrode of the MOSFET of the second current-limiting starting circuit, and the output positive end of the Boost circuit is V_OUT。

2. The start-up inrush current suppression circuit of claim 1, wherein the first current limiting start-up circuit comprises a second current limiting start-up circuitTwo capacitors (C)₂) A third diode (D)₃) And a second MOSFET (Q)₂) And a fourth triode (Q)₄) First to fifth resistors (R)₁-R₅) (ii) a A second resistor (R)₂) One end of the second resistor is connected with the positive output end of the rectifier bridge, and the second resistor (R)₂) Respectively with a third diode (D)₃) Cathode, second capacitor (C)₂) Anode of (2), fourth triode (Q)₄) Collector electrode of (1), second MOSFET (Q)₂) The grid electrode of the first current-limiting starting circuit is connected with the second current-limiting starting circuit; second MOSFET tube (Q)₂) Source and first resistor (R)₁) Is connected in series in the ground circuit; third resistance (R)₃) A fourth resistor (R)₄) Connected in parallel with a first resistor (R) after being connected in series₁) Two ends; a first resistor (R)₁) The voltage at both ends is passed through a third resistor (R)₃) A fourth resistor (R)₄) A fifth resistor (R) is connected in series after voltage division₅) To the fourth triode (Q)₄) Providing a base driving voltage; third diode (D)₃) A second capacitor (C)₂) After parallel connection, a third diode (D)₃) Is connected to the fourth triode (Q)₄) An emitter of, a third diode (D)₃) The cathode of the transistor is connected to a fourth triode (Q)₄) The collector electrode of (1).

3. The start-up inrush current suppression circuit of claim 1, wherein the second current limiting start-up circuit comprises a delay control circuit and a third MOSFET transistor (Q)₃) The input end of the delay control circuit is connected with the first current-limiting starting circuit, and the other end of the delay control circuit is connected with a third MOSFET (Q)₃) Is connected to the gate of the third MOSFET (Q)₃) The drain electrode of the rectifier is connected with the output negative end of the Boost circuit, and the source electrode of the rectifier is connected with the output negative end of the rectifier bridge.

4. A start-up inrush current suppression circuit as claimed in claim 3, wherein the input of the delay control circuit is connected to the fourth transistor (Q) of the first current-limiting start-up circuit₄) Is connected to the collector of the collector.

5. According toThe startup surge current suppression circuit of claim 1, wherein the Boost circuit comprises a first inductor (L)₁) A first diode (D)₁) A second diode (D)₂) A first MOSFET (Q)₁) A first energy storage capacitor (C)₁) And a load (R)_L) (ii) a First inductance (L)₁) With the positive output terminal of the rectifier bridge, a first diode (D)₁) Is connected to the anode of the first diode (D) and has an output terminal connected to the second diode (D)₂) Anode of (1), first MOSFET tube (Q)₁) The drain electrodes of the two electrodes are connected; second diode (D)₂) And the first diode (D)₁) The cathode of the power-on circuit is connected with the positive output end of the Boost circuit; first MOSFET tube (Q)₁) The source electrode of the power amplifier is connected with the negative output end of the Boost circuit; a first energy storage capacitor (C)₁) And a load (R)_L) After being connected in parallel, the first energy storage capacitor (C)₁) The positive electrode of the positive electrode is connected to the positive output end of the Boost circuit, and the negative electrode of the positive electrode is connected to the negative output end of the Boost circuit.

6. The inrush current suppression circuit of any one of claims 1 to 5, wherein the MOSFET transistors from the first MOSFET transistor (Q1) to the third MOSFET transistor (Q3) are of the type SPA21N50C 3; a third stabilivolt (D3) model BZX84C 15.

7. The inrush current suppression circuit of claim 6, wherein the first resistor (R1) is selected to be 2W-4.7 Ω, the second resistor (R2) is 132k Ω, the third resistor (R3) and the third resistor (R4) are 33k Ω, and the fifth resistor (R5) is 20k Ω; the second inductance (L2) is 220 μ H; the second capacitor (C2) is 25V/10 μ F, and the first energy storage capacitor (C1) is 450V/300 μ F.