CN114335175A - Semiconductor structure and preparation method thereof - Google Patents

Abstract

The invention relates to a semiconductor structure and a preparation method thereof, wherein the semiconductor structure comprises: the first AlGaN/AlN/GaN heterostructure, wherein a first two-dimensional electron gas channel is arranged at the interface of an AlN layer and a GaN layer in the first AlGaN/AlN/GaN heterostructure; a second AlGaN/AlN/GaN heterostructure, wherein a second two-dimensional electron gas channel is arranged at the interface of an AlN layer and a GaN layer in the second AlGaN/AlN/GaN heterostructure; a third AlGaN/AlN/GaN heterostructure, wherein a third two-dimensional electron gas channel is arranged at the interface of an AlN layer and a GaN layer in the third AlGaN/AlN/GaN heterostructure; the difference value between the electron concentration in the first two-dimensional electron gas channel, the electron concentration in the second two-dimensional electron gas channel and the electron concentration in the third two-dimensional electron gas channel is smaller than a preset value, and then the distribution of current carriers is adjusted, so that the purposes of reducing the resistance value of the device, reducing reverse leakage current and reducing the heat productivity of the device in the working state are achieved.

Description

Semiconductor structure and preparation method thereof

Technical Field

The present invention relates to the field of semiconductor technologies, and in particular, to a semiconductor structure and a method for manufacturing the semiconductor structure.

Background

Since the AlGaN/GaN heterojunction interface has 2DEG (two-dimensional electron gas) with high carrier concentration and mobility, various multi-heterojunction AlGaN/GaN heterojunction materials have been designed in order to reduce the series resistance of electronic devices based on AlGaN/GaN heterojunction materials. Common heterojunction materials are multi-heterojunction AlGaN/GaN heterojunction materials with the same thickness of each AlGaN barrier layer, because the GaN/AlGaN heterojunction interface has negative polarization charges, the 2DEG concentration difference at each AlGaN/GaN heterojunction interface is large, and because the 2DEG concentration closest to the substrate is large, the depletion is difficult, the reverse leakage current of the electronic device with the groove gate prepared on the basis of the multi-heterojunction AlGaN/GaN heterojunction materials is high; and because the concentration difference of each 2DEG is large, the heating value of each layer is different during operation, and the performance of the device is affected.

Disclosure of Invention

In order to solve the technical problems, the invention designs a semiconductor structure and a preparation method of the semiconductor structure, which can adjust the distribution of current carriers, reduce the resistance value of a device, reduce the reverse leakage current of an electronic device and reduce the heat productivity of the device in a working state.

The present invention contemplates a semiconductor structure, comprising:

a first AlGaN/AlN/GaN heterostructure having a first two-dimensional electron gas channel at an interface of the AlN layer and the GaN layer;

a second AlGaN/AlN/GaN heterostructure having a second two-dimensional electron gas channel at an interface of the AlN layer and the GaN layer;

a third AlGaN/AlN/GaN heterostructure having a third two-dimensional electron gas channel at an interface of the AlN layer and the GaN layer;

and the difference value between the electron concentration in the first two-dimensional electron gas channel, the electron concentration in the second two-dimensional electron gas channel and the electron concentration in the third two-dimensional electron gas channel is smaller than a preset value.

In one embodiment, the thickness of the AlGaN layer in the first AlGaN/AlN/GaN heterostructure is the same as the thickness of the AlGaN layer in the third AlGaN/AlN/GaN heterostructure and is less than the thickness of the AlGaN layer in the second AlGaN/AlN/GaN heterostructure.

In one embodiment, the thickness of the GaN layer in the first AlGaN/AlN/GaN heterostructure, the thickness of the GaN layer in the second AlGaN/AlN/GaN heterostructure and the thickness of the GaN layer in the third AlGaN/AlN/GaN heterostructure are the same; the thickness of the AlN layer in the first AlGaN/AlN/GaN heterostructure, the thickness of the AlN layer in the second AlGaN/AlN/GaN heterostructure and the thickness of the AlN layer in the third AlGaN/AlN/GaN heterostructure are the same.

In one embodiment, the first, second and third AlGaN/AlN/GaN heterostructures are all unintentionally doped heterostructures, and the background carrier concentration of the first, second and third AlGaN/AlN/GaN heterostructures are all 0.5 x 10¹⁶cm^-3～1.5×10¹⁶cm^-3。

In one embodiment, the semiconductor structure further comprises:

a substrate;

a nucleation layer located on a surface of the substrate;

a buffer layer located on a surface of the nucleation layer away from the substrate; the first AlGaN/AlN/GaN heterostructure is located at a surface of the buffer layer remote from the nucleation layer.

The invention also designs a preparation method of the semiconductor structure, which comprises the following steps:

forming a first AlGaN/AlN/GaN heterostructure in which a first two-dimensional electron gas channel is present at an interface of the AlN layer and the GaN layer;

forming a second AlGaN/AlN/GaN heterostructure on the surface of the first AlGaN/AlN/GaN heterostructure, wherein a second two-dimensional electron gas channel exists at the interface of the AlN layer and the GaN layer in the second AlGaN/AlN/GaN heterostructure;

forming a third AlGaN/AlN/GaN heterostructure on the surface of the second AlGaN/AlN/GaN heterostructure, wherein a third two-dimensional electron gas channel exists at the interface of the AlN layer and the GaN layer in the third AlGaN/AlN/GaN heterostructure;

and the difference value between the electron concentration in the first two-dimensional electron gas channel, the electron concentration in the second two-dimensional electron gas channel and the electron concentration in the third two-dimensional electron gas channel is smaller than a preset value.

In one embodiment, the AlGaN layer in the first AlGaN/AlN/GaN heterostructure is formed to have the same thickness as the AlGaN layer in the third AlGaN/AlN/GaN heterostructure and is each formed to have a thickness less than the AlGaN layer in the second AlGaN/AlN/GaN heterostructure.

In one embodiment, the thickness of the GaN layer in the first AlGaN/AlN/GaN heterostructure formed, the thickness of the GaN layer in the second AlGaN/AlN/GaN heterostructure formed and the thickness of the GaN layer in the third AlGaN/AlN/GaN heterostructure formed are the same; the thickness of the AlN layer in the first AlGaN/AlN/GaN heterostructure formed, the thickness of the AlN layer in the second AlGaN/AlN/GaN heterostructure formed and the thickness of the AlN layer in the third AlGaN/AlN/GaN heterostructure formed are the same.

In one embodiment, the first, second and third AlGaN/AlN/GaN heterostructures are epitaxially grown using a metal organic chemical vapor deposition process, the first, second and third AlGaN/AlN/GaN heterostructures are all unintentionally doped heterostructures, and the background carrier concentration of the first, second and third AlGaN/AlN/GaN heterostructures is 0.5 × 10¹⁶cm^-3～1.5×10¹⁶cm^-3。

In one embodiment, the forming of the first AlGaN/AlN/GaN heterostructure further comprises:

providing a substrate;

forming a nucleation layer on the surface of the substrate;

forming a buffer layer on the surface of the nucleation layer far away from the substrate; the first AlGaN/AlN/GaN heterostructure is formed on a surface of the buffer layer away from the nucleation layer.

The invention has the following beneficial effects:

the semiconductor structure comprises a first AlGaN/AlN/GaN heterostructure, a second AlGaN/AlN/GaN heterostructure and a third AlGaN/AlN/GaN heterostructure, wherein a first two-dimensional electron gas channel is arranged at the interface of an AlN layer and a GaN layer in the first AlGaN/AlN/GaN heterostructure; a second two-dimensional electron gas channel exists at the interface of the AlN layer and the GaN layer in the second AlGaN/AlN/GaN heterostructure; a third two-dimensional electron gas channel exists at the interface of the AlN layer and the GaN layer in the third AlGaN/AlN/GaN heterostructure; the purposes of reducing the resistance value of the device, reducing reverse leakage current and reducing the heat productivity of the device in the working state are achieved by the fact that the difference value between the electron concentration in the first two-dimensional electron gas channel, the electron concentration in the second two-dimensional electron gas channel and the electron concentration in the third two-dimensional electron gas channel is smaller than the preset value. The invention also designs a preparation method of the semiconductor structure, the preparation method discloses the position relationship among the first AlGaN/AlN/GaN heterostructure, the second AlGaN/AlN/GaN heterostructure and the third AlGaN/AlN/GaN heterostructure, the position relationship among layers of different structures and the position of each two-dimensional electron gas channel, and the semiconductor structure can be prepared according to the method.

Drawings

FIG. 1 is a schematic diagram of a semiconductor structure in one embodiment of the invention.

Fig. 2 is a distribution of carriers of a semiconductor structure as a function of structure depth in one embodiment of the present invention.

Figure 3 is a graph of the energy band of a semiconductor structure as a function of structure depth in one embodiment of the present invention. The dotted line is the fermi level position line; the solid line is the band curve of the semiconductor structure.

Figure 4 is a flow chart of a method of fabricating a semiconductor structure in one embodiment of the present invention.

Fig. 5 is a flow chart of a method of fabricating a semiconductor structure in another embodiment of the invention.

Description of reference numerals:

1. a first AlGaN/AlN/GaN heterostructure; 11. a GaN layer of a first AlGaN/AlN/GaN heterostructure; 12. an AlN layer of the first AlGaN/AlN/GaN heterostructure; 13. an AlGaN layer of a first AlGaN/AlN/GaN heterostructure; 2. a second AlGaN/AlN/GaN heterostructure; 21. a GaN layer of a second AlGaN/AlN/GaN heterostructure; 22. an AlN layer of a second AlGaN/AlN/GaN heterostructure; 23. an AlGaN layer of a second AlGaN/AlN/GaN heterostructure; 3. a third AlGaN/AlN/GaN heterostructure; 31. a GaN layer of a third AlGaN/AlN/GaN heterostructure; 32. an AlN layer of a third AlGaN/AlN/GaN heterostructure; 33. an AlGaN layer of a third AlGaN/AlN/GaN heterostructure; 4. a substrate; 5. a nucleation layer; 6. a buffer layer.

Detailed Description

In order to make the aforementioned objects, features and advantages of the present invention comprehensible, embodiments accompanied with figures are described in detail below. In the following description, numerous specific details are set forth in order to provide a thorough understanding of the present invention. This invention may, however, be embodied in many different forms and should not be construed as limited to the embodiments set forth herein.

In the description of the present invention, it is to be understood that the terms "central," "longitudinal," "lateral," "length," "width," "thickness," "upper," "lower," "front," "rear," "left," "right," "vertical," "horizontal," "top," "bottom," "inner," "outer," "clockwise," "counterclockwise," "axial," "radial," "circumferential," and the like are used in the orientations and positional relationships indicated in the drawings for convenience in describing the invention and to simplify the description, and are not intended to indicate or imply that the referenced device or element must have a particular orientation, be constructed and operated in a particular orientation, and are not to be considered limiting of the invention.

Furthermore, the terms "first", "second" and "first" are used for descriptive purposes only and are not to be construed as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include at least one such feature. In the description of the present invention, "a plurality" means at least two, e.g., two, three, etc., unless specifically limited otherwise.

In the present invention, unless otherwise expressly stated or limited, the terms "mounted," "connected," "secured," and the like are to be construed broadly and can, for example, be fixedly connected, detachably connected, or integrally formed; can be mechanically or electrically connected; they may be directly connected or indirectly connected through intervening media, or they may be connected internally or in any other suitable relationship, unless expressly stated otherwise. The specific meanings of the above terms in the present invention can be understood by those skilled in the art according to specific situations.

In the present invention, unless otherwise expressly stated or limited, the first feature "on" or "under" the second feature may be directly contacting the first and second features or indirectly contacting the first and second features through an intermediate. Also, a first feature "on," "over," and "above" a second feature may be directly or diagonally above the second feature, or may simply indicate that the first feature is at a higher level than the second feature. A first feature being "under," "below," and "beneath" a second feature may be directly under or obliquely under the first feature, or may simply mean that the first feature is at a lesser elevation than the second feature.

It will be understood that when an element is referred to as being "secured to" or "disposed on" another element, it can be directly on the other element or intervening elements may also be present. When an element is referred to as being "connected" to another element, it can be directly connected to the other element or intervening elements may also be present. The terms "vertical," "horizontal," "upper," "lower," "left," "right," and the like as used herein are for illustrative purposes only and do not denote a unique embodiment.

In order to make the objects, technical solutions and advantages of the present invention more apparent, the present invention is described in further detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative of the invention and are not intended to limit the invention.

For a semiconductor abrupt heterojunction, "spikes" and "notches" occur near the interface due to the presence of the conduction band bottom energy abrupt change Δ Ec; in fact, for the action of conduction band electrons in the heterojunction, the "spike" is the potential barrier of the electron and the "notch" is the potential well of the electron. Thus, in effect, the electric field in the "spike" has the effect of driving electrons, i.e. forming a depletion layer; the electric field in the notch has the functions of driving holes and accumulating electrons, and when the conditions are proper, an electron accumulation layer (namely a surface conduction channel) can be formed. If the depth of the potential well of the notch is large enough, the electrons in the potential well can only move along all directions of a plane (namely, move close to the heterojunction interface) in the potential well, namely, the electrons move in two dimensions; further, if the effective mass concept is introduced, these electrons can be considered to be classical free electrons, and thus the electrons in the heterojunction potential well can be considered as a "two-dimensional electron gas" (2DEG) with a certain effective mass.

Since the AlGaN/GaN heterojunction interface has 2DEG (two-dimensional electron gas) with high carrier concentration and mobility, various multi-heterojunction AlGaN/GaN heterojunction materials have been designed in order to reduce the series resistance of electronic devices based on AlGaN/GaN heterojunction materials. Common heterojunction materials are multi-heterojunction AlGaN/GaN heterojunction materials with the same thickness of each AlGaN barrier layer, because the GaN/AlGaN heterojunction interface has negative polarization charges, the 2DEG concentration difference at each AlGaN/GaN heterojunction interface is large, and because the 2DEG concentration closest to the substrate is large, the depletion is difficult, the reverse leakage current of the electronic device with the groove gate prepared on the basis of the multi-heterojunction AlGaN/GaN heterojunction materials is high; and because the concentration difference of each 2DEG is large, the heating value of each layer is different during operation, and the performance of the device is affected.

In order to solve the technical problems, the invention designs a semiconductor structure and a preparation method of the semiconductor structure, which can adjust the distribution of current carriers, reduce the resistance value of a device, and reduce the reverse leakage current of an electronic device and the heat productivity of the device in a working state.

The present invention relates to a semiconductor structure, as shown in fig. 1, the semiconductor structure includes: a first AlGaN/AlN/GaN heterostructure 1, wherein a first two-dimensional electron gas channel is arranged at the interface of an AlN layer 12 and a GaN layer 11 in the first AlGaN/AlN/GaN heterostructure 1; a second AlGaN/AlN/GaN heterostructure 2, wherein a second two-dimensional electron gas channel is arranged at the interface of the AlN layer 22 and the GaN layer 21 in the second AlGaN/AlN/GaN heterostructure 2; a third AlGaN/AlN/GaN heterostructure 3, wherein a third two-dimensional electron gas channel is arranged at the interface of the AlN layer 32 and the GaN layer 31 in the third AlGaN/AlN/GaN heterostructure 3; the difference between the electron concentration in the first two-dimensional electron gas channel, the electron concentration in the second two-dimensional electron gas channel and the electron concentration in the third two-dimensional electron gas channel is smaller than a preset value.

In one embodiment, the concentration of electrons in the first two-dimensional electron gas channel, the concentration of electrons in the second two-dimensional electron gas channel, and the concentration of electrons in the third two-dimensional electron gas channel are the same.

Specifically, in order to make the electron concentration in the first two-dimensional electron gas channel, the electron concentration in the second two-dimensional electron gas channel, and the electron concentration in the third two-dimensional electron gas channel the same, and based on the consideration of process errors, it is necessary to make the difference between the electron concentration in the first two-dimensional electron gas channel, the electron concentration in the second two-dimensional electron gas channel, and the electron concentration in the third two-dimensional electron gas channel as small as possible, that is, the preset value as small as possible.

The semiconductor structure comprises a first AlGaN/AlN/GaN heterostructure 1, a second AlGaN/AlN/GaN heterostructure 2 and a third AlGaN/AlN/GaN heterostructure 3, wherein a first two-dimensional electron gas channel is arranged at the interface of an AlN layer 12 and a GaN layer 11 in the first AlGaN/AlN/GaN heterostructure 1; a second two-dimensional electron gas channel exists at the interface of the AlN layer 22 and the GaN layer 21 in the second AlGaN/AlN/GaN heterostructure 2; a third two-dimensional electron gas channel exists at the interface of the AlN layer 32 and the GaN layer 31 in the third AlGaN/AlN/GaN heterostructure 3; the difference value between the electron concentration in the first two-dimensional electron gas channel, the electron concentration in the second two-dimensional electron gas channel and the electron concentration in the third two-dimensional electron gas channel is smaller than a preset value, so that the purposes of reducing the resistance value of the device, reducing reverse leakage current and reducing the heat productivity of the device in the working state are achieved.

In one of the embodiments, the thickness of the AlGaN layer 13 in the first AlGaN/AlN/GaN heterostructure 1 is the same as the thickness of the AlGaN layer 33 in the third AlGaN/AlN/GaN heterostructure 3, and is each smaller than the thickness of the AlGaN layer 23 in the second AlGaN/AlN/GaN heterostructure 2.

Specifically, the thickness of the AlGaN layer 13 in the first AlGaN/AlN/GaN heterostructure 1 and the thickness of the AlGaN layer 33 in the third AlGaN/AlN/GaN heterostructure 3 may include 6 to 10nm, such as 6nm, 7nm, 8nm, 9nm or 10 nm; in this example, the thickness of the AlGaN layer 13 in the first AlGaN/AlN/GaN heterostructure 1 and the AlGaN layer 33 in the third AlGaN/AlN/GaN heterostructure 3 are both 8 nm.

Specifically, the thickness of the AlGaN layer 23 in the second AlGaN/AlN/GaN heterostructure 2 may include 30 to 50nm, such as 30nm, 35nm, 40nm, 45nm or 50 nm; in this embodiment, the thickness of the AlGaN layer 23 in the second AlGaN/AlN/GaN heterostructure 2 is 40 nm.

In one of the embodiments, the thickness of the GaN layer 11 in the first AlGaN/AlN/GaN heterostructure 1, the thickness of the GaN layer 21 in the second AlGaN/AlN/GaN heterostructure 2 and the thickness of the GaN layer 31 in the third AlGaN/AlN/GaN heterostructure 3 are the same; the thickness of the AlN layer 12 in the first AlGaN/AlN/GaN heterostructure 1, the thickness of the AlN layer 22 in the second AlGaN/AlN/GaN heterostructure 2 and the thickness of the AlN layer 32 in the third AlGaN/AlN/GaN heterostructure 3 are the same.

Specifically, the thickness of the GaN layer 11 in the first AlGaN/AlN/GaN heterostructure 1, the thickness of the GaN layer 21 in the second AlGaN/AlN/GaN heterostructure 2, and the thickness of the GaN layer 31 in the third AlGaN/AlN/GaN heterostructure 3 may include 8 to 12nm, such as 8nm, 9nm, 10nm, 11nm, or 12 nm; in this example, the thickness of the GaN layer 11 in the first AlGaN/AlN/GaN heterostructure 1, the thickness of the GaN layer 21 in the second AlGaN/AlN/GaN heterostructure 2 and the thickness of the GaN layer 31 in the third AlGaN/AlN/GaN heterostructure 3 are all 10 nm.

Specifically, the thickness of the AlN layer 12 in the first AlGaN/AlN/GaN heterostructure 1, the thickness of the AlN layer 22 in the second AlGaN/AlN/GaN heterostructure 2 and the thickness of the AlN layer 32 in the third AlGaN/AlN/GaN heterostructure 3 may include 0.5 to 1.5nm, such as 0.5nm, 0.8nm, 1nm, 1.2nm or 1.5 nm; in this example, the thickness of the AlN layer 12 in the first AlGaN/AlN/GaN heterostructure 1, the thickness of the AlN layer 22 in the second AlGaN/AlN/GaN heterostructure 2 and the thickness of the AlN layer 32 in the third AlGaN/AlN/GaN heterostructure 3 are all 1 nm.

In one embodiment, the first AlGaN/AlN/GaN heterostructure 1, the second AlGaN/AlN/GaN heterostructure 2 and the third AlGaN/AlN/GaN heterostructure 3 are all unintentionally doped heterostructures, the background carrier concentration of the first AlGaN/AlN/GaN heterostructure 1, the background carrier concentration of the second AlGaN/AlN/GaN heterostructure 2 and the background carrier concentration of the third AlGaN/AlN/GaN heterostructure 3 all being 0.5 × 10¹⁶cm^-3～1.5×10¹⁶cm^-3。

In particular, the background carrier concentration of the first AlGaN/AlN/GaN heterostructure 1, the background carrier concentration of the second AlGaN/AlN/GaN heterostructure 2 and the background carrier concentration of the third AlGaN/AlN/GaN heterostructure 3 may all be 0.5 × 10¹⁶cm^-3、1×10¹⁶cm^-3Or 1.5X 10¹⁶cm^-3And so on.

Specifically, if the polarization charge at the AlGaN/GaN heterojunction interface takes into account both the spontaneous polarization effect and the piezoelectric polarization effect, and the influence of the piezoelectric polarization on the dielectric constant of the AlGaN/GaN heterojunction, the total polarization strength P of the AlGaN/GaN heterojunction at the interface can be expressed as the following equation (1):

wherein, a₀And a is the lattice constant of AlGaN and GaN, respectively; ε is the dielectric constant of AlGaN; n is_2DEGIs the concentration of electrons in the two-dimensional electron gas; delta P_SPThe difference value of GaN spontaneous polarization intensity and AlGaN spontaneous polarization intensity is obtained; e.g. of the type_ijAnd C_ijPiezoelectric coefficient and elastic constant, i.e. e, of AlGaN, respectively₃₁And e₃₃Is the piezoelectric coefficient of AlGaN, C₁₃And C₃₃Is the elastic constant of AlGaN.

Then, the poisson equation describing the charge distribution in the AlGaN/GaN heterostructure can be expressed as the following equation (2):

wherein epsilon₁₁And ε₃₃Is the component of the dielectric constant of the second order tensor form of the material in the direction perpendicular to the c-axis and the direction parallel to the c-axis;

represents an electrostatic potential; the charge ρ comprises a free charge and an ionic charge; p is the polarization; e.g. of the type₃₃Is the piezoelectric coefficient of AlGaN; c₃₃Is the elastic constant of AlGaN.

For AlGaN/GaN heterojunction materials, there is a large amount of negative polarization charge on the surface that, if not compensated by positive charge, will completely deplete the 2DEG near the AlGaN/GaN interface. It is generally believed that these negative polarization charges are compensated by the ionized donor-like surface states at the AlGaN/GaN heterojunction surface, and the ionized electrons are collected near the AlGaN/GaN heterojunction interface to form a 2 DEG. In the present invention, the surface donor state distribution n of the AlGaN/GaN heterojunction material is set_surfaceAs shown in equation (3) below:

where n is the maximum value of the surface donor state density, n may be set to 0.5X 10¹⁶cm^-2·eV^-1～1.5×10¹⁶cm^-2·eV^-1In the present embodiment, n is preferably 1 × 10¹⁶cm^-2·eV^-1(ii) a E is an energy level; eg is forbidden bandwidth; CBM is the energy level at the bottom of the conduction band at the surface; e_sThe range of distribution of the surface donor state is determined and can be set to 0.6; the highest energy level occupied by the surface donor state is set to be 1eV below the conduction band, i.e., phi _c1 eV. By adjusting the thickness of each AlGaN barrier layer, the concentration of free electrons in the first two-dimensional electron gas channel, the second two-dimensional electron gas channel and the third two-dimensional electron gas channel at the AlN/GaN interface is close, for the first AlGaN/AlN/GaN heterostructure 1, the second AlGaN/AlN/GaN heterostructure 2 and the third AlGaN/AlN/GaN heterostructure 3 of the present invention, all are unintentionally doped heterostructures, the semiconductor structure comprising the first AlGaN/AlN/GaN heterostructure 1, the second AlGaN/AlN/GaN heterostructure 2 and the third AlGaN/AlN/GaN heterostructure 3 may be an N-type semiconductor structure, the carrier profile of which is shown in figure 2, the energy band distribution diagram of the corresponding semiconductor structure is shown in fig. 3, wherein the broken line in fig. 3 is a fermi level position line; the solid line is the band curve of the semiconductor structure. Wherein the background carrier concentration of the first AlGaN/AlN/GaN heterostructure 1, the background carrier concentration of the second AlGaN/AlN/GaN heterostructure 2 and the background carrier concentration of the third AlGaN/AlN/GaN heterostructure 3 may be 0.5 x 10¹⁶cm^-3～1.5×10¹⁶cm^-3In particular, the background carrier concentration of the first AlGaN/AlN/GaN heterostructure 1, the background carrier concentration of the second AlGaN/AlN/GaN heterostructure 2 and the background carrier concentration of the third AlGaN/AlN/GaN heterostructure 3 may be 0.5 × 10¹⁶cm^-3、1×10¹⁶cm^-3Or 1.5X 10¹⁶cm^-3In the present example, the background carrier concentration of the first AlGaN/AlN/GaN heterostructure 1, the background carrier concentration of the second AlGaN/AlN/GaN heterostructure 2 and the secondThe background carrier concentration of the three AlGaN/AlN/GaN heterostructure 3 is preferably 1 × 10¹⁶cm^-3。

In one embodiment, with continued reference to fig. 1, the semiconductor structure further includes: a substrate 4; a nucleation layer 5 on the surface of the substrate 4; a buffer layer 6 positioned on the surface of the nucleation layer 5 far away from the substrate 4; the first AlGaN/AlN/GaN heterostructure 1 is located at the surface of the buffer layer 6 remote from the nucleation layer 5.

Specifically, the substrate 4 may include, but is not limited to, a silicon substrate, a silicon carbide substrate, or a sapphire substrate; in this embodiment, a silicon carbide substrate is used as the substrate 4.

Specifically, the nucleation layer 5 may include, but is not limited to, a GaN layer or an AlN layer; in this embodiment, the nucleation layer 5 is an AlN layer.

Specifically, the buffer layer 6 may include, but is not limited to, a GaN layer or an AlN layer; in this embodiment, the buffer layer 6 is a GaN layer.

Specifically, the thickness of the buffer layer 6 may be 2000-3000 nm, such as 2000nm, 2500nm or 3000 nm.

With reference to fig. 4 in conjunction with fig. 1, the present invention also provides a method for fabricating a semiconductor structure, the method comprising:

s401: forming a first AlGaN/AlN/GaN heterostructure 1, wherein a first two-dimensional electron gas channel exists at the interface of an AlN layer 12 and a GaN layer 11 in the first AlGaN/AlN/GaN heterostructure 1;

s402: forming a second AlGaN/AlN/GaN heterostructure 2 on the surface of the first AlGaN/AlN/GaN heterostructure 1, wherein a second two-dimensional electron gas channel exists at the interface of the AlN layer 22 and the GaN layer 21 in the second AlGaN/AlN/GaN heterostructure 2;

s403: forming a third AlGaN/AlN/GaN heterostructure 3 on the surface of the second AlGaN/AlN/GaN heterostructure 2, wherein a third two-dimensional electron gas channel exists at the interface of the AlN layer 32 and the GaN layer 31 in the third AlGaN/AlN/GaN heterostructure 3;

the difference between the electron concentration in the first two-dimensional electron gas channel, the electron concentration in the second two-dimensional electron gas channel and the electron concentration in the third two-dimensional electron gas channel is smaller than a preset value.

Specifically, the semiconductor structure may be the semiconductor structure in the embodiment shown in fig. 1 to 3, and the specific structure of the semiconductor structure is described with reference to fig. 1 to 3 and the related text, which will not be described herein again.

The invention discloses a method for preparing a semiconductor structure, which discloses the position relationship among a first AlGaN/AlN/GaN heterostructure 1, a second AlGaN/AlN/GaN heterostructure 2 and a third AlGaN/AlN/GaN heterostructure 3 and the positions of a first two-dimensional electron gas channel, a second two-dimensional electron gas channel and a third two-dimensional electron gas channel.

In one of the embodiments, the thickness of the AlGaN layer 13 in the first AlGaN/AlN/GaN heterostructure 1 is formed to be the same as the thickness of the AlGaN layer 33 in the third AlGaN/AlN/GaN heterostructure 3 and is each smaller than the thickness of the AlGaN layer 23 in the second AlGaN/AlN/GaN heterostructure 2.

Specifically, the thickness of the AlGaN layer 13 in the first AlGaN/AlN/GaN heterostructure 1 and the thickness of the AlGaN layer 33 in the third AlGaN/AlN/GaN heterostructure 3 may include 6 to 10nm, such as 6nm, 7nm, 8nm, 9nm or 10 nm; in this example, the thickness of the AlGaN layer 13 in the first AlGaN/AlN/GaN heterostructure 1 and the AlGaN layer 33 in the third AlGaN/AlN/GaN heterostructure 3 are both 8 nm.

Specifically, the thickness of the AlGaN layer 23 in the second AlGaN/AlN/GaN heterostructure 2 may include 30 to 50nm, such as 30nm, 35nm, 40nm, 45nm or 50 nm; in this embodiment, the thickness of the AlGaN layer 23 in the second AlGaN/AlN/GaN heterostructure 2 is 40 nm.

In one of the embodiments, the thickness of the GaN layer 11 in the first AlGaN/AlN/GaN heterostructure 1 formed, the thickness of the GaN layer 21 in the second AlGaN/AlN/GaN heterostructure 2 formed and the thickness of the GaN layer 31 in the third AlGaN/AlN/GaN heterostructure 3 formed are the same; the thickness of the AlN layer 12 in the first AlGaN/AlN/GaN heterostructure 1 formed, the thickness of the AlN layer 22 in the second AlGaN/AlN/GaN heterostructure 2 formed and the thickness of the AlN layer 32 in the third AlGaN/AlN/GaN heterostructure 3 formed are the same.

Specifically, the thickness of the GaN layer 11 in the first AlGaN/AlN/GaN heterostructure 1, the thickness of the GaN layer 21 in the second AlGaN/AlN/GaN heterostructure 2, and the thickness of the GaN layer 31 in the third AlGaN/AlN/GaN heterostructure 3 may include 8 to 12nm, such as 8nm, 9nm, 10nm, 11nm, or 12 nm; in this example, the thickness of the GaN layer 11 in the first AlGaN/AlN/GaN heterostructure 1, the thickness of the GaN layer 21 in the second AlGaN/AlN/GaN heterostructure 2 and the thickness of the GaN layer 31 in the third AlGaN/AlN/GaN heterostructure 3 are all 10 nm.

Specifically, the thickness of the AlN layer 12 in the first AlGaN/AlN/GaN heterostructure 1, the thickness of the AlN layer 22 in the second AlGaN/AlN/GaN heterostructure 2 and the thickness of the AlN layer 32 in the third AlGaN/AlN/GaN heterostructure 3 may include 0.5 to 1.5nm, such as 0.5nm, 0.8nm, 1nm, 1.2nm or 1.5 nm; in this example, the thickness of the AlN layer 12 in the first AlGaN/AlN/GaN heterostructure 1, the thickness of the AlN layer 22 in the second AlGaN/AlN/GaN heterostructure 2 and the thickness of the AlN layer 32 in the third AlGaN/AlN/GaN heterostructure 3 are all 1 nm.

In one embodiment, a metal organic chemical vapor deposition process may be used to epitaxially grow a first AlGaN/AlN/GaN heterostructure 1, a second AlGaN/AlN/GaN heterostructure 2, and a third AlGaN/AlN/GaN heterostructure 3, where the first AlGaN/AlN/GaN heterostructure 1, the second AlGaN/AlN/GaN heterostructure 2, and the third AlGaN/AlN/GaN heterostructure 3 are all unintentionally doped heterostructures, and the background carrier concentration of the first AlGaN/AlN/GaN heterostructure 1, the background carrier concentration of the second AlGaN/AlN/GaN heterostructure 2, and the background carrier concentration of the third AlGaN/AlN/GaN heterostructure 3 are all 0.5 × 10¹⁶cm^-3～1.5×10¹⁶cm^-3。

In particular, the background carrier concentration of the first AlGaN/AlN/GaN heterostructure 1, the background carrier concentration of the second AlGaN/AlN/GaN heterostructure 2 and the background carrier concentration of the third AlGaN/AlN/GaN heterostructure 3 may all be 0.5 × 10¹⁶cm^-3、1×10¹⁶cm^-3Or 1.5X 10¹⁶cm^-3And so on.

In particular, the background carrier concentration of the first AlGaN/AlN/GaN heterostructure 1, the background carrier concentration of the second AlGaN/AlN/GaN heterostructure 2 and the third AlGaN/AlN/GaN heterojunctionThe background carrier concentration of structure 3 may be 0.5 × 10¹⁶cm^-3、1×10¹⁶cm^-3Or 1.5X 10¹⁶cm^-3In the present embodiment, the background carrier concentration of the first AlGaN/AlN/GaN heterostructure 1, the background carrier concentration of the second AlGaN/AlN/GaN heterostructure 2 and the background carrier concentration of the third AlGaN/AlN/GaN heterostructure 3 are all preferably 1 × 10¹⁶cm^-3。

With continued reference to fig. 5, in one embodiment, the forming of the first AlGaN/AlN/GaN heterostructure 1 further includes:

providing a substrate 4;

forming a nucleation layer 5 on the surface of the substrate 4;

forming a buffer layer 6 on the surface of the nucleation layer 5 far away from the substrate 4; the first AlGaN/AlN/GaN heterostructure 1 is formed at the surface of the buffer layer 6 remote from the nucleation layer 5.

As shown in fig. 5, the method for manufacturing the semiconductor structure in this embodiment includes the following steps:

s501: providing a substrate 4;

s502: forming a nucleation layer 5 on the surface of the substrate 4;

s503: forming a buffer layer 6 on the surface of the nucleation layer 5 far away from the substrate 4;

s504: forming a first AlGaN/AlN/GaN heterostructure 1, wherein the first AlGaN/AlN/GaN heterostructure 1 is formed on the surface of the buffer layer 6 far away from the nucleating layer 5; a first two-dimensional electron gas channel exists at the interface of the AlN layer 12 and the GaN layer 11 in the first AlGaN/AlN/GaN heterostructure 1;

s505: forming a second AlGaN/AlN/GaN heterostructure 2 on the surface of the first AlGaN/AlN/GaN heterostructure 1, wherein a second two-dimensional electron gas channel exists at the interface of the AlN layer 22 and the GaN layer 21 in the second AlGaN/AlN/GaN heterostructure 2;

s506: forming a third AlGaN/AlN/GaN heterostructure 3 on the surface of the second AlGaN/AlN/GaN heterostructure 2, wherein a third two-dimensional electron gas channel exists at the interface of the AlN layer 32 and the GaN layer 31 in the third AlGaN/AlN/GaN heterostructure 3;

the difference between the electron concentration in the first two-dimensional electron gas channel, the electron concentration in the second two-dimensional electron gas channel and the electron concentration in the third two-dimensional electron gas channel is smaller than a preset value.

In one embodiment, the concentration of electrons in the first two-dimensional electron gas channel, the concentration of electrons in the second two-dimensional electron gas channel, and the concentration of electrons in the third two-dimensional electron gas channel are the same.

Specifically, in order to make the electron concentration in the first two-dimensional electron gas channel, the electron concentration in the second two-dimensional electron gas channel, and the electron concentration in the third two-dimensional electron gas channel the same, and based on the consideration of process errors, it is necessary to make the difference between the electron concentration in the first two-dimensional electron gas channel, the electron concentration in the second two-dimensional electron gas channel, and the electron concentration in the third two-dimensional electron gas channel as small as possible, that is, the preset value as small as possible.

Specifically, the substrate 4 may include a silicon substrate, a silicon carbide substrate, or a sapphire substrate; in this embodiment, a silicon carbide substrate is used as the substrate 4.

Specifically, the nucleation layer 5 may include a GaN layer or an AlN layer; in this embodiment, the nucleation layer 5 is an AlN layer.

Specifically, the buffer layer 6 may include a GaN layer or an AlN layer; in this embodiment, the buffer layer 6 is a GaN layer.

Specifically, the thickness of the buffer layer 6 may be 2000-3000 nm, such as 2000nm, 2500nm or 3000 nm.

The semiconductor structure comprises a first AlGaN/AlN/GaN heterostructure 1, a second AlGaN/AlN/GaN heterostructure 2 and a third AlGaN/AlN/GaN heterostructure 3, wherein a first two-dimensional electron gas channel is arranged at the interface of an AlN layer 12 and a GaN layer 11 in the first AlGaN/AlN/GaN heterostructure 1; a second two-dimensional electron gas channel exists at the interface of the AlN layer 22 and the GaN layer 21 in the second AlGaN/AlN/GaN heterostructure 2; a third two-dimensional electron gas channel exists at the interface of the AlN layer 32 and the GaN layer 31 in the third AlGaN/AlN/GaN heterostructure 3; the purposes of reducing the resistance value of the device, reducing reverse leakage current and reducing the heat productivity of the device in the working state are achieved by the fact that the difference value between the electron concentration in the first two-dimensional electron gas channel, the electron concentration in the second two-dimensional electron gas channel and the electron concentration in the third two-dimensional electron gas channel is smaller than the preset value. The invention also designs a preparation method of the semiconductor structure, the preparation method discloses the position relationship among the first AlGaN/AlN/GaN heterostructure 1, the second AlGaN/AlN/GaN heterostructure 2 and the third AlGaN/AlN/GaN heterostructure 3, the position relationship among layers of different structures and the position of each two-dimensional electron gas channel, and the semiconductor structure can be prepared according to the method.

The technical features of the embodiments described above may be arbitrarily combined, and for the sake of brevity, all possible combinations of the technical features in the embodiments described above are not described, but should be considered as being within the scope of the present specification as long as there is no contradiction between the combinations of the technical features.

The above-mentioned embodiments only express several embodiments of the present invention, and the description thereof is more specific and detailed, but not construed as limiting the scope of the invention. It should be noted that, for a person skilled in the art, several variations and modifications can be made without departing from the inventive concept, which falls within the scope of the present invention. Therefore, the protection scope of the present patent shall be subject to the appended claims.

Claims (10)

1. A semiconductor structure, comprising:

a first AlGaN/AlN/GaN heterostructure having a first two-dimensional electron gas channel at an interface of the AlN layer and the GaN layer;

a second AlGaN/AlN/GaN heterostructure having a second two-dimensional electron gas channel at an interface of the AlN layer and the GaN layer;

a third AlGaN/AlN/GaN heterostructure having a third two-dimensional electron gas channel at an interface of the AlN layer and the GaN layer;

and the difference value between the electron concentration in the first two-dimensional electron gas channel, the electron concentration in the second two-dimensional electron gas channel and the electron concentration in the third two-dimensional electron gas channel is smaller than a preset value.

2. The semiconductor structure of claim 1, wherein the thickness of the AlGaN layer in the first AlGaN/AlN/GaN heterostructure is the same as the thickness of the AlGaN layer in the third AlGaN/AlN/GaN heterostructure and is less than the thickness of the AlGaN layer in the second AlGaN/AlN/GaN heterostructure.

3. The semiconductor structure of claim 2, wherein the thickness of the GaN layer in the first AlGaN/AlN/GaN heterostructure, the thickness of the GaN layer in the second AlGaN/AlN/GaN heterostructure and the thickness of the GaN layer in the third AlGaN/AlN/GaN heterostructure are the same; the thickness of the AlN layer in the first AlGaN/AlN/GaN heterostructure, the thickness of the AlN layer in the second AlGaN/AlN/GaN heterostructure and the thickness of the AlN layer in the third AlGaN/AlN/GaN heterostructure are the same.

4. The semiconductor structure of claim 1, wherein the first, second, and third AlGaN/AlN/GaN heterostructures are all unintentionally doped heterostructures, and wherein the background carrier concentration of the first, second, and third AlGaN/AlN/GaN heterostructures are all 0.5 x 10¹⁶cm^-3～1.5×10¹⁶cm^-3。

5. The semiconductor structure of any one of claims 1 to 4, further comprising:

a substrate;

a nucleation layer located on a surface of the substrate;

a buffer layer located on a surface of the nucleation layer away from the substrate; the first AlGaN/AlN/GaN heterostructure is located at a surface of the buffer layer remote from the nucleation layer.

6. A method for fabricating a semiconductor structure, the method comprising:

forming a first AlGaN/AlN/GaN heterostructure in which a first two-dimensional electron gas channel is present at an interface of the AlN layer and the GaN layer;

forming a second AlGaN/AlN/GaN heterostructure on the surface of the first AlGaN/AlN/GaN heterostructure, wherein a second two-dimensional electron gas channel exists at the interface of the AlN layer and the GaN layer in the second AlGaN/AlN/GaN heterostructure;

forming a third AlGaN/AlN/GaN heterostructure on the surface of the second AlGaN/AlN/GaN heterostructure, wherein a third two-dimensional electron gas channel exists at the interface of the AlN layer and the GaN layer in the third AlGaN/AlN/GaN heterostructure;

and the difference value between the electron concentration in the first two-dimensional electron gas channel, the electron concentration in the second two-dimensional electron gas channel and the electron concentration in the third two-dimensional electron gas channel is smaller than a preset value.

7. The method of fabricating a semiconductor structure according to claim 6, wherein the AlGaN layer in the first AlGaN/AlN/GaN heterostructure is formed to have the same thickness as the AlGaN layer in the third AlGaN/AlN/GaN heterostructure, and each is smaller than the AlGaN layer in the second AlGaN/AlN/GaN heterostructure.

8. The method of fabricating a semiconductor structure according to claim 7, wherein a thickness of the GaN layer in the first AlGaN/AlN/GaN heterostructure formed, a thickness of the GaN layer in the second AlGaN/AlN/GaN heterostructure formed, and a thickness of the GaN layer in the third AlGaN/AlN/GaN heterostructure formed are the same; the thickness of the AlN layer in the first AlGaN/AlN/GaN heterostructure formed, the thickness of the AlN layer in the second AlGaN/AlN/GaN heterostructure formed and the thickness of the AlN layer in the third AlGaN/AlN/GaN heterostructure formed are the same.

9. The method of claim 6, wherein the first, second, and third AlGaN/AlN/GaN heterostructures are epitaxially grown using a metal organic chemical vapor deposition process, wherein the first, second, and third AlGaN/AlN/GaN heterostructures are unintentionally doped heterostructures, and wherein the background carrier concentration of the first, second, and third AlGaN/AlN/GaN heterostructures are 0.5 x 10¹⁶cm^-3～1.5×10¹⁶cm^-3。

10. The method of fabricating a semiconductor structure according to any of claims 6 to 9, wherein said forming a first AlGaN/AlN/GaN heterostructure further comprises:

providing a substrate;

forming a nucleation layer on the surface of the substrate;

forming a buffer layer on the surface of the nucleation layer far away from the substrate; the first AlGaN/AlN/GaN heterostructure is formed on a surface of the buffer layer away from the nucleation layer.

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