CN114325370B - Dual-power time-sharing multiplexing load condition test method and circuit - Google Patents
Dual-power time-sharing multiplexing load condition test method and circuit Download PDFInfo
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- CN114325370B CN114325370B CN202111556556.5A CN202111556556A CN114325370B CN 114325370 B CN114325370 B CN 114325370B CN 202111556556 A CN202111556556 A CN 202111556556A CN 114325370 B CN114325370 B CN 114325370B
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Abstract
The application relates to the technical field of load condition tests, in particular to a method and a circuit for realizing load condition tests by double-power time-sharing multiplexing, wherein the circuit comprises a singlechip circuit, a current trap circuit, a switch circuit, a low-voltage power supply, a high-voltage power supply and a relay to be tested, the current trap circuit is in a single path or multiple paths, the singlechip circuit is connected with the switch circuit and the relay to be tested, and the singlechip circuit provides a time sequence control signal for the switch circuit and is used for selecting the low-voltage power supply or the high-voltage power supply; the singlechip circuit simultaneously provides time sequence control signals for the relay to be tested; the relay to be tested is connected with one end of the current trap circuit, the current trap circuit is used for limiting current, the other end of the current trap circuit, the negative electrode of the low-voltage power supply and the negative electrode of the high-voltage power supply are grounded, and the dual-power-supply time-sharing multiplexing implementation load condition test method and circuit provided by the application have the effects of reducing energy consumption, enabling the whole load system to be small in size and solving the heat dissipation problem.
Description
Technical Field
The application relates to the technical field of load condition tests, in particular to a method and a circuit for realizing load condition tests by dual-power time-sharing multiplexing.
Background
Solid state relays (Solid State Relay, abbreviated SSR) are contactless switches consisting of microelectronic circuits, discrete electronic devices, and power electronic power devices. Isolation of the control terminal from the load terminal is achieved by an isolation device. The input end of the solid state relay uses tiny control signals to directly drive a large current load.
With the development of solid state relays represented by high-power series, the output power of devices is increasingly larger, various ageing tests carried out by using traditional resistors as loads are increasingly difficult to manufacture, and in addition, the tools carried by the resistors as loads cannot be changed once being manufactured, and have huge size, poor mobility and low recycling rate.
With respect to the related art described above, the inventors consider that the power consumption of the relay is relatively increased due to the large power of the relay, and the conventional load has a large volume and large heat dissipation, and the problems of load heat dissipation and high power consumption are problems that have to be faced according to the conventional method.
Disclosure of Invention
The invention provides a dual-power time-sharing multiplexing load condition test method and a circuit for solving the technical problems of large size, high energy consumption and large heat dissipation of the traditional load.
In order to achieve the above purpose, the application provides a dual-power time-sharing multiplexing load condition test circuit, which adopts the following technical scheme:
a dual-power time-sharing multiplexing implementation load condition test circuit is characterized by comprising: the single chip microcomputer circuit, the current trap circuit, the switch circuit, the low-voltage power supply, the high-voltage power supply, the relay to be tested, the protection circuit and the load circuit, wherein the current trap circuit is in a single path or multiple paths,
the singlechip circuit is connected with the switch circuit and provides a time sequence control signal for the switch circuit and is used for selecting the low-voltage power supply or the high-voltage power supply;
the singlechip circuit is connected with the relay to be tested, and provides a time sequence control signal for the relay to be tested and is used for controlling the on-off of the relay to be tested;
the negative electrode of the relay to be tested is connected with one end of the current trap circuit, and the current trap circuit is used for limiting current;
the other end of the current trap circuit, the negative electrode of the low-voltage power supply and the negative electrode of the high-voltage power supply are grounded;
the protection circuit consists of a diode D1 and a diode D2; the anode of the diode D1 is connected with the positive electrode of the low-voltage power supply, the cathode of the diode D1 is connected with the positive electrode of the relay to be tested, the anode of the diode D2 is connected with one side of the switch, and the cathode of the diode D2 is connected with the positive electrode of the relay to be tested;
the load circuit comprises a resistor and a diode D3, one end of the resistor is connected with the other end of the switch, the other end of the resistor is connected with the positive electrode of the high-voltage power supply, the anode of the diode D3 is connected with the other end of the switch, and the cathode of the diode D3 is connected with the positive electrode of the high-voltage power supply.
Through adopting the technical scheme, the singlechip circuit, the test circuit and the current trap circuit are connected with each other, so that the singlechip can control an equivalent load scheme according to own time sequence, the energy consumption of the whole circuit can be reduced, the current of the whole circuit can be constant through the current trap circuit, and the overcurrent condition is prevented; the test circuit can realize the test of the load condition through the interconnection of the protection circuit, the switching circuit, the high-voltage power supply, the low-voltage power supply, the relay to be tested and the load circuit, and the test circuit can reversely protect the circuit by adding the protection circuit and using the protection circuit consisting of two diodes, so that the reliability of the test is ensured.
Optionally, the single-path circuit includes: a relay to be tested, a switch, a diode D1, a diode D2, a diode D3, a resistor, a current trap circuit, a high-voltage power supply and a low-voltage power supply,
the low-voltage power supply is characterized in that the anode of the low-voltage power supply is connected with the anode of the diode D1, the cathode of the diode D1 is connected with the anode of the relay to be tested, one side of the switch is connected with the anode of the diode D2, the cathode of the diode D2 is connected with the anode of the relay to be tested, the other side of the switch is respectively connected with the resistor and the anode of the diode D3, the resistor and the cathode of the diode D3 are respectively connected with the anode of the high-voltage power supply, the high-voltage power supply is connected with the cathode of the current trap circuit, and the other side of the current trap circuit is connected with the cathode of the relay to be tested.
By adopting the technical scheme, during the high level of forward bias and pulse state of the relay to be tested, the output loop supplies current by the low-voltage power supply, namely, the low-voltage high-current scheme during the maximum power consumption period is realized, and the system energy consumption is reduced; during the low level of the relay to be tested in reverse bias and pulse state, the output loops are all supplied with reverse bias voltage by the high-voltage power supply; in the process of switching on and switching off the relay to be tested, the voltage is changed from a rated value to a 0 value and the corresponding current is changed from the 0 value to the rated value. The set of circuit can completely realize the traditional aim of checking the relay by taking the resistor as a load, so that the relay load test can be performed by replacing the resistor.
Optionally, the multiplexing circuit includes: one current sink corresponds to one relay output circuit and a plurality of current sinks corresponds to the same relay output circuit,
the current well corresponds to one path of relay output circuit, the positive poles of the relays to be tested are respectively connected with the cathodes of n diodes D1 and n diodes D2, the anodes of n diodes D1 are jointly connected with the positive pole of the low-voltage power supply, the anodes of n diodes D2 are connected with one end of n switches, the other ends of n switches are connected with n resistors, the n resistors are jointly connected with the positive pole of the high-voltage power supply, the negative pole of the high-voltage power supply is jointly connected with one end of n current well circuits, and the other ends of n current wells are respectively connected with the negative poles of n relays.
By adopting the technical scheme, due to the fact that the engineering quantity of the current experiment of a factory is large, multiple paths of simultaneous experiments are often needed to meet the requirements. The current trap is adopted to correspond to one relay output, so that the requirement of multi-path simultaneous measurement can be met, the accuracy and the reliability of measurement are ensured, the speed and the number of tests are improved, and the requirement of production practice is met.
Optionally, the plurality of current traps correspond to the same relay output circuit and include:
the positive pole of the relay to be tested is respectively connected with the cathodes of the diode D1 and the diode D2, the anode of the diode D1 is connected with the positive pole of the low-voltage power supply, the anode of the diode D2 is connected with one side of the switch, the other side of the switch is connected with n (n is more than or equal to 2) resistors, the n resistors are connected in parallel, the n parallel resistors are connected with the positive pole of the high-voltage power supply, the negative pole of the high-voltage power supply is connected with n current trap circuits, the n current trap circuits are connected in parallel, and the parallel current trap circuits are connected with the negative pole of the relay to be tested.
By adopting the technical scheme, because of the requirement of the ultra-large current test, if the trap current is limited by a single power MOSFET, the upper power consumption of the single power MOSFET is very large, and the single power MOSFET cannot meet the requirement, so that the current limitation of the ultra-large current is realized by parallel operation of multiple current traps. By adopting a plurality of current traps corresponding to the same relay output circuit, the current can be reduced, so that the power is reduced.
In order to achieve the above purpose, another aspect of the present application provides a dual-power time division multiplexing load condition test method, which adopts the following technical scheme:
a method for realizing load condition test by dual-power time-sharing multiplexing is characterized by comprising the following steps:
carrying out a forward bias test by using the low-voltage power supply, and monitoring the output current of the relay to be tested;
performing a reverse bias test by using the high-voltage power supply, and monitoring the output voltage of the relay to be tested;
and simultaneously switching on the high-voltage power supply and the low-voltage power supply, performing pulse test, and monitoring the output current and the output voltage of the relay to be tested and the currents of the low-voltage power supply and the high-voltage power supply according to the time sequence relation of the control signal and the switching signal.
By adopting the technical scheme, during the high level of forward bias and pulse state of the relay to be tested, the output loops are all supplied with current by the low-voltage power supply, namely, the low-voltage high-current scheme during the maximum power consumption period is realized, and the system energy consumption is reduced; during the low level of the relay to be tested in reverse bias and pulse state, the output loops are all supplied with reverse bias voltage by the high-voltage power supply; in the process of switching on and switching off the relay to be tested, the voltage is changed from a rated value to a 0 value and the corresponding current is changed from the 0 value to the rated value. Therefore, the circuit can completely realize the traditional evaluation purpose of the relay by taking the resistor as a load, so that the relay load test can be performed by replacing the resistor.
Optionally, the step of using the low-voltage power supply to perform a forward bias test, the step of monitoring the output current of the relay to be tested includes:
closing the switch or the high-voltage power supply;
and switching on the input of the relay to be tested.
By adopting the technical scheme, the switch K is disconnected or the high-voltage power supply is closed, the input of the relay to be tested is connected, the whole set of circuit is powered by the low-voltage power supply, and the current well limits the loop current to be fixed current, which is equivalent to the traditional forward bias test. The low-voltage high-current scheme can reduce the total power consumption of the loop.
Optionally, the step of using the high-voltage power supply to perform a reverse bias test, the step of monitoring the output voltage of the relay to be tested includes:
the switch is closed;
the low-voltage power supply is turned off;
and switching off the input of the relay to be tested.
By adopting the technical scheme, the switch is closed, the low-voltage power supply is closed at the same time, the input of the relay to be tested is also turned off, and then the voltage of the whole circuit is supplied with the high-voltage power supply to perform the reverse bias test of the whole circuit. Because the reverse bias experiment adopts high-voltage power supply, the product is not connected, almost no current exists, and the pressure-resistant condition of the product is better tested.
Optionally, the high-voltage power supply and the low-voltage power supply are simultaneously connected, pulse test is performed, and output current and output voltage of the relay to be tested and current of the low-voltage power supply and the high-voltage power supply are monitored according to a time sequence relation of the control signal and the switching signal. The method comprises the following steps:
connecting the low-voltage power supply with the high-voltage power supply;
the input of the relay to be tested is connected, and a pulse control signal is input;
the switch is input with a control signal.
By adopting the technical scheme, the pulse test is carried out on the product, and the pulse test is adopted to carry out on-off of a certain frequency and on-off of two input signals on the switch. The pulse state is in a certain frequency, and the product is switched on and off, so that the service life of the product can be better tested.
Optionally, the performing the pulse signal test specifically includes:
before the input of the relay to be tested is turned off, the switch is closed, the relay to be tested is turned on, the high-voltage power supply is turned on with the low-voltage power supply, the current sink circuit limits the current of the test circuit, and the output current and the output voltage of the relay to be tested are monitored according to the time sequence relation of the control signal and the switch signal;
the input of the relay to be tested is turned off, the switch is turned on, and the output current and the output voltage of the relay to be tested are monitored according to the time sequence relation of the control signal and the switch signal;
the relay to be tested is switched on instantly to be switched on completely, the switch is switched on, and the output current and the output voltage of the relay to be tested are monitored according to the time sequence relation of the control signal and the switch signal;
the relay to be tested is switched on, the switch is switched off, and the output current and the output voltage of the relay to be tested are monitored according to the time sequence relation of the control signal and the switch signal.
By adopting the technical scheme, before the relay input to be tested is turned off, the output current and the output voltage of the relay to be tested are monitored, in the turn-off process of the relay to be tested, the output current and the output voltage of the relay to be tested are monitored, the relay to be tested is in the turn-off state completely, the output current and the output voltage of the relay to be tested are monitored, and after the input of the relay to be tested is turned on to the moment that the input of the relay to be tested is turned on completely, the output current and the output voltage of the relay to be tested are monitored. The relay to be tested is in a conducting state completely, and the output current and the output voltage of the relay to be tested are monitored. The above process is circularly reciprocated, thus realizing the equivalent process with the traditional SSR pulse test. The process is a time sequence control process, namely, a switching signal and a control signal are required to be generated by a singlechip and the on-off of a switch and an SSR are controlled in real time.
In summary, the present application has the following beneficial technical effects:
the output current of the relay is monitored when the relay is forward biased, and the output voltage of the relay is monitored when the relay is reverse biased. The circuit and the method provided by the embodiment can provide a rated current with low voltage in a forward bias test of the relay, a rated voltage with tiny current in a reverse bias test, and a non-breaking automatic switching device (ensuring that the rated voltage and the rated current are output by the relay in a pulse edge state) with low voltage and high current to high voltage and small current in a pulse state test, so that the energy consumption of the whole load system can be reduced, and the problems such as volume, heat dissipation and the like caused by excessive energy consumption can be solved.
Drawings
Fig. 1 is a circuit diagram of the present embodiment.
Fig. 2 is a circuit diagram of a current sink corresponding to one relay output in the present embodiment.
Fig. 3 is a circuit diagram of a plurality of current traps for the same relay output in this embodiment.
Fig. 4 is a flowchart of the detection method of the present embodiment.
Fig. 5 is a specific flowchart of the pulse test in this embodiment.
Detailed Description
The present application is described in further detail below in conjunction with figures 1-5.
Referring to fig. 1, this embodiment discloses a dual power time division multiplexing load condition test circuit, which includes: the device comprises a singlechip circuit, a current trap circuit, a switch circuit, a low-voltage power supply, a high-voltage power supply and a relay to be tested.
The singlechip circuit is connected with the switch circuit and provides a time sequence control signal for the switch circuit and is used for selecting a low-voltage power supply or a high-voltage power supply;
the single chip microcomputer circuit is connected with the switch of the test circuit, the time sequence of the single chip microcomputer controls the input to control the switch to be turned off, when the switch is turned off, the whole circuit is indicated to be provided with voltage by the high-voltage power supply, and when the switch is turned off, the circuit voltage is provided by the high-voltage power supply.
The singlechip circuit provides time sequence control signals for the relay to be tested and is used for controlling the on-off of the relay to be tested.
The singlechip provides a time sequence control signal for the relay to be tested through own time sequence, and controls the on-off of the relay to be tested through the turn-off of the time sequence control signal.
The relay to be tested is connected with one end of a current trap circuit, and the current trap circuit is used for limiting current;
the current trap circuit is connected with the relay to be tested and the high-voltage power supply and is used for limiting the current of the test circuit to a fixed value.
In this embodiment, the current sink circuit limits the fixed value of the current of the test circuit to 7A, or may be a fixed value such as 8A, and specifically may be selected according to actual needs.
The current trap circuit and the test circuit are grounded, so that the whole circuit is grounded and protected, and the safety of the circuit is protected.
By adopting the technical scheme, the singlechip circuit, the test circuit and the current trap circuit are connected with each other, so that the singlechip can control the equivalent load scheme according to own time sequence, the energy consumption of the whole circuit can be reduced, the current of the circuits can be constant through the current trap circuit, the overcurrent is prevented, and the safety of each circuit is ensured.
Referring to fig. 1, the present embodiment further includes: a protection circuit and a load circuit;
the protection circuit consists of a diode D1 and a diode D2; the anode of the diode D1 is connected with the positive electrode of the low-voltage power supply, the cathode of the diode D1 is connected with the positive electrode of the relay to be tested, the anode of the diode D2 is connected with one side of the switch, and the cathode of the diode D2 is connected with the positive electrode of the relay to be tested;
the protection circuit diodes D1 and D2 are connected in parallel on the relay to be tested, and the protection circuit diodes D1 and D2 can reversely protect the circuit.
The load circuit comprises a resistor and a diode D3, one end of the resistor is connected with the other end of the switch, the other end of the resistor is connected with the positive electrode of the high-voltage power supply, the anode of the diode D3 is connected with the other end of the switch, and the cathode of the diode is connected with the positive electrode of the high-voltage power supply.
The resistor and the diode D3 are connected in parallel to form a load circuit, and the diode D3 can prevent reverse voltage from occurring on the resistor.
By adopting the technical scheme, the test circuit can realize the test of the load condition through the interconnection of the protection circuit, the switch circuit, the high-voltage power supply, the low-voltage power supply, the relay to be tested and the load circuit, and the test circuit can reversely protect the circuit by adding the protection circuit and using the protection circuit consisting of two diodes, so that the accuracy and the reliability of the test are ensured.
As shown in fig. 1, the test circuit is connected with a diode D1 by a low-voltage power supply, the diode D1 is connected with a relay to be tested, the relay to be tested is connected with a diode D2, the diode D2 is connected with a switch, the switch is connected with a resistor and a diode D3, the resistor is connected with the diode D3 in parallel, the resistor and the diode D3 are commonly connected with a high-voltage power supply, the high-voltage power supply is connected with a current sink circuit, and the current sink circuit is finally connected with the relay to be tested.
In this embodiment, a 5V/7A voltage source is used as the low voltage source, a 50V/7A voltage source is used as the high voltage source, a diode D3 is a reverse freewheeling diode, diodes D1 and D2 are schottky diodes, the current sink is a 7A current sink module, and the effect is an electronic load in this embodiment. The switch is a solid state relay.
It should be noted that, the single chip circuit and the current sink circuit in the present invention are known technical means for those skilled in the art, and are not further described herein.
By adopting the technical scheme, during the high level of forward bias and pulse state of the relay to be tested, the output loop is supplied with current by the low-voltage power supply, namely, the low-voltage large-current scheme during the maximum power consumption period is realized, and the system energy consumption is reduced; during the low level of the relay to be tested in reverse bias and pulse state, the output loops are all supplied with reverse bias voltage by the high-voltage power supply; in the process of switching on and switching off the relay to be tested, the voltage is changed from a rated value to a 0 value and the corresponding current is changed from the 0 value to the rated value. Therefore, the circuit can completely realize the traditional evaluation purpose of the relay by taking the resistor as a load, so that the relay load test can be performed by replacing the resistor.
Referring to FIG. 2, one current sink corresponds to one relay output circuit, the positive poles of n (n is larger than or equal to 2) relays to be tested are respectively connected with the negative poles of n diodes D1 and n diodes D2, the positive poles of n diodes D1 are commonly connected with the positive poles of n power supplies, the positive poles of n diodes D2 are connected with one ends of n switches, the other ends of n switches are connected with n resistors, the n resistors are commonly connected with the positive poles of a high-voltage power supply, the negative poles of the high-voltage power supply are commonly connected with one ends of n current sink circuits, and the other ends of n current sinks are respectively connected with the negative poles of n relays.
In this embodiment, taking the example of simultaneous operation of JGX-36MA in 4 paths, other paths may be selected in practical application, specifically according to practical implementation.
In the figure, all the routing diodes at the output end are mutually isolated, so that all the paths of the relay to be tested are not mutually influenced. If the input 4 paths of the relay to be tested are connected in parallel, the input ends of the switches K1-K4 are connected in parallel to form one path. The relay to be tested outputs 4 paths of simultaneous actions, has no influence on each other, and is not greatly different from each path of single-path operation.
By adopting the technical scheme, due to the large engineering quantity comparison of the existing test of the factory, multiple simultaneous tests are often needed to meet the requirements. The current trap is adopted to correspond to one relay output, so that the requirement of multiple paths of simultaneous tests can be met, the accuracy and the reliability of the tests are ensured, the speed and the number of the tests are improved, and the requirement of production practice is met.
Referring to fig. 3, the plurality of current traps correspond to the same relay output circuit including:
the positive pole of the relay to be tested is respectively connected with the positive pole of the diode D1 and the negative pole of the diode D2, the positive pole of the diode D1 is connected with the positive pole of the low-voltage power supply, the positive pole of the diode D2 is connected with one side of the switch, the other side of the switch is connected with n (n is more than or equal to 2) resistors, the n resistors are connected in parallel, the n parallel resistors are connected with the positive pole of the high-voltage power supply, the negative pole of the high-voltage power supply is connected with n current trap circuits, the n current trap circuits are connected in parallel, and the parallel current trap circuits are connected with the negative pole of the relay to be tested.
Because of the requirement of 150A extra-large current test, if a single power MOSFET is used for limiting the well current, the upper power consumption of the single power MOSFET reaches p=u×i=5v×150a=750w, and the single power MOSFET cannot meet the requirement, so that the current limitation of the extra-large current is realized by parallel operation of multiple current wells. The circuit design is carried out by taking JGX-28M as an example, the principle is shown in figure 3, in the figure, 4 7A current traps equally divide the power consumption, and the whole circuit performance is not affected.
By adopting the technical scheme, because of the requirement of an ultra-large current test, if a single power MOSFET is used for limiting the trap current, the upper power consumption of the single power MOSFET is very large, and the single power MOSFET cannot meet the requirement, so that the current limiting of the ultra-large current is realized by parallel operation of multiple current traps. By adopting a plurality of current traps to correspond to the same relay output circuit, the power consumption is equally divided, and the performance of the whole circuit is not affected.
Referring to fig. 4, an application embodiment discloses a method for implementing load condition detection by dual power time division multiplexing, including:
s100, performing a forward bias test by using a low-voltage power supply, and monitoring the output current of a relay to be tested;
and (3) performing a forward bias test on the relay access circuit, verifying the conducting state of the product, verifying the index of the current of the product, and measuring the output current.
S200, performing a reverse bias experiment by using a high-voltage power supply, and monitoring the output current of a relay to be tested;
in the state of the reverse bias test, the product is not connected, so that the circuit has almost no current, the withstand voltage condition of the product can be tested, and the output voltage of the product can be measured.
And S300, switching on the high-voltage power supply and the low-voltage power supply simultaneously, performing pulse test, and monitoring the output current and the output voltage of the relay to be tested according to the time sequence relation of the control signal and the switch signal.
The pulse test is carried out at a certain frequency, and the product is subjected to a test of being switched on and off, so that the service life of the product can be tested.
By adopting the technical scheme, during the high level of forward bias and pulse state of the relay to be tested, the output loops are all supplied with current by the low-voltage power supply, namely, the low-voltage large-current scheme during the maximum power consumption period is realized, and the system energy consumption is reduced; during the low level of the relay to be tested in reverse bias and pulse state, the output loops are all supplied with reverse bias voltage by the high-voltage power supply; in the process of switching on and switching off the relay to be tested, the voltage is changed from a rated value to a 0 value and the corresponding current is changed from the 0 value to the rated value. Therefore, the circuit can completely realize the traditional evaluation purpose of the relay by taking the resistor as a load, so that the relay load test can be performed by replacing the resistor.
Referring to fig. 4, a forward bias test is performed using a low voltage power supply, and an output current is monitored, S100 includes:
s110, closing a switch or a high-voltage power supply;
and S120, switching on the input of the relay to be tested.
And when the switch K is turned off or a 50V voltage source is turned off and the input of the relay to be tested is turned on, the whole set of circuit is powered by a 5V power supply, and the current sink limits the loop current to 7A, which is equivalent to the traditional forward bias test. The low-voltage high-current scheme can reduce the total power consumption of the loop.
By adopting the technical scheme, the switch K is disconnected or the high-voltage power supply is closed, the input of the relay to be tested is connected, the whole set of circuit is powered by the low-voltage power supply, and the current well limits the loop current to be fixed current, which is equivalent to the traditional forward bias test. The low-voltage high-current scheme can reduce the total power consumption of the loop.
Referring to fig. 4, a reverse bias test is performed using a high voltage power source, and an output voltage is monitored, S200 includes:
s210, closing a switch;
s220, closing the low-voltage power supply;
s230, switching off the input of the relay to be tested.
And in the reverse bias test, a switch K is closed, a 5V power supply is closed, and the input of the relay to be tested is closed, so that the relay to be tested is completely provided with reverse bias voltage by a 50V voltage source, and the reverse bias test is equivalent to the traditional reverse bias test.
By adopting the technical scheme, the switch is closed, the low-voltage power supply is closed at the same time, the input of the relay to be tested is also turned off, and the voltage of the whole circuit is supplied by the high-voltage power supply to perform the reverse bias test of the whole circuit. Because the reverse bias test adopts high-voltage power supply, the product is not connected, almost no current exists, and the pressure-resistant condition of the product is better tested.
Referring to fig. 4, a high voltage power supply and a low voltage power supply are simultaneously turned on, a pulse test is performed, an output current and an output voltage of a relay to be tested are monitored according to a time sequence relation of a control signal and a switching signal, and S300 includes:
s310, connecting a low-voltage power supply and a high-voltage power supply;
the two voltage sources are simultaneously turned on, which means that in the whole circuit, the voltage has a high voltage power supply and a low voltage power supply to supply the voltage to the circuit at the same time.
S320, switching on the input of the relay to be tested and inputting a pulse signal;
s330, inputting a control signal into the switch.
The high-voltage power supply and the low-voltage power supply are simultaneously switched on, the circuit voltage is simultaneously supplied by the two power supplies, the relay to be tested is switched on and is input with pulse signals, and meanwhile, the switch is also input with control signals to measure the time sequence relation of the two signals.
In this embodiment, the signal input by the relay to be tested is a pulse signal of 5HZ, and may be a signal of other frequencies, for example: 7HZ and 8HZ, and specifically, the selection is made according to the actual practice.
The control signal input by the switch is controlled by the time sequence of the singlechip and is input.
By adopting the technical scheme, the pulse test is carried out on the product, and the pulse test is adopted to turn off the switch at a certain frequency and turn off the two input signals. The pulse state is in a certain frequency, and the product is switched on and off, so that the service life of the product can be better tested.
Referring to fig. 5, performing the pulse test specifically includes:
s410, before the input of the relay to be tested is turned off, the switch is closed, the relay to be tested is turned on, the high-voltage power supply is turned on with the low-voltage power supply, the current of the test circuit is limited by the current sink circuit, and the output current and the output voltage of the relay to be tested are monitored;
5ms before the input of the relay to be tested is turned off, the switch is in a closed state, at the moment, the relay to be tested is still in an on state, and the 50V power supply and the 5V power supply simultaneously supply power to the loop, but the current well limits the loop current to 7A. Thus, during the SSR turn-off process, the voltage across it varies from OV-50V and the current flowing therethrough corresponds to from 7A-0A.
S420, the input of the relay to be tested is turned off, the switch is closed, and the output current and the output voltage of the relay to be tested are monitored;
the relay to be tested is completely in an off state, the switch K is in a closed state, at the moment, the voltage drop at two ends of the relay to be tested is 50V, and the 5V power supply is reversely biased to be cut off. Therefore, in the off state of the relay to be tested, the reverse bias voltage thereof is rated at 50V.
S430, when the relay to be tested is switched on instantly to be switched on completely, the switch is closed, and the output current and the output voltage of the relay to be tested are monitored;
when the input of the relay to be tested is switched on for 5ms after the input of the relay is completely switched on, the switch is in a closed state, and at the moment, the loop is simultaneously powered by a 50V power supply and a 5V power supply, and the current well limits the current of the loop to 7A. Thus, during the switching on of the relay to be tested, the voltage across it ranges from 50V to 0V and the current corresponds to from 0A to 7A.
S440, the test relay is switched on, the switch is switched off, and the output current and the output voltage of the relay to be tested are monitored.
The relay to be tested is in a fully on state, the switch is in an off state, at this time, the loop is fully powered by a 5V power supply, and the current sink limits the loop current to 7A. Therefore, in the on state of the relay to be tested, the current flowing through it is rated at 7A.
The above process is circularly reciprocated, thus realizing the equivalent process with the pulse test of the traditional relay to be tested. The process is a time sequence control process, namely, a switch signal and a control signal are required to be generated by a singlechip and the on-off of a switch and a relay to be tested are controlled in real time.
By adopting the technical scheme, the output current and the output voltage of the relay to be tested are monitored before the input of the relay to be tested is turned off, the output current and the output voltage of the relay to be tested are monitored in the turn-off process of the relay to be tested, the relay to be tested is completely in the turn-off state, the output current and the output voltage of the relay to be tested are monitored, and the output current and the output voltage of the relay to be tested are monitored after the input of the relay to be tested is turned on instantly to the complete turn-on of the relay to be tested. The relay to be tested is in a conducting state completely, and the output current and the output voltage of the relay to be tested are monitored. The above process is circularly reciprocated, thus realizing the equivalent process with the traditional SSR pulse test. The process is a time sequence control process, namely, a switch signal and a signal to be tested are required to be generated by a singlechip and the on-off of the switch and the relay to be tested are controlled in real time.
The foregoing are all preferred embodiments of the present application, and are not intended to limit the scope of the present application in any way, therefore: all equivalent changes in structure, shape and principle of this application should be covered in the protection scope of this application.
Claims (9)
1. A dual-power time-sharing multiplexing implementation load condition test circuit is characterized by comprising: the single chip microcomputer circuit, the current trap circuit, the switch circuit, the low-voltage power supply, the high-voltage power supply, the relay to be tested, the protection circuit and the load circuit, wherein the current trap circuit is in a single path or multiple paths,
the singlechip circuit is connected with the switch circuit and provides a time sequence control signal for the switch circuit and is used for selecting the low-voltage power supply or the high-voltage power supply;
the singlechip circuit is connected with the relay to be tested, and provides a time sequence control signal for the relay to be tested and is used for controlling the on-off of the relay to be tested;
the negative electrode of the relay to be tested is connected with one end of the current trap circuit, and the current trap circuit is used for limiting current;
the other end of the current trap circuit, the negative electrode of the low-voltage power supply and the negative electrode of the high-voltage power supply are grounded;
the protection circuit consists of a diode D1 and a diode D2; the anode of the diode D1 is connected with the positive electrode of the low-voltage power supply, the cathode of the diode D1 is connected with the positive electrode of the relay to be tested, the anode of the diode D2 is connected with one side of the switch, and the cathode of the diode D2 is connected with the positive electrode of the relay to be tested;
the load circuit comprises a resistor and a diode D3, one end of the resistor is connected with the other end of the switch, the other end of the resistor is connected with the positive electrode of the high-voltage power supply, the anode of the diode D3 is connected with the other end of the switch, and the cathode of the diode D3 is connected with the positive electrode of the high-voltage power supply.
2. The dual power time division multiplexing implementation load condition test circuit of claim 1, wherein the single-path circuit comprises: the device comprises a relay to be tested, a switch, a diode D1, a diode D2, a diode D3, a resistor, a current sink circuit, a high-voltage power supply and a low-voltage power supply;
the low-voltage power supply is characterized in that the anode of the low-voltage power supply is connected with the anode of the diode D1, the cathode of the diode D1 is connected with the anode of the relay to be tested, one side of the switch is connected with the anode of the diode D2, the cathode of the diode D2 is connected with the anode of the relay to be tested, the other side of the switch is respectively connected with the resistor and the anode of the diode D3, the resistor and the cathode of the diode D3 are respectively connected with the anode of the high-voltage power supply, the high-voltage power supply is connected with the cathode of the current trap circuit, and the other side of the current trap circuit is connected with the cathode of the relay to be tested.
3. The dual power time division multiplexing implementation load condition test circuit of claim 1, wherein the multiplexing circuit comprises: one current trap corresponds to one relay output circuit and a plurality of current traps corresponds to the same relay output circuit;
the current well corresponds to one relay output circuit, the anodes of the relays to be tested are respectively connected with cathodes of n diodes D1 and n diodes D2, anodes of the n diodes D1 are commonly connected with anodes of low-voltage power supplies, anodes of the n diodes D2 are connected with one ends of n switches, the other ends of the n switches are connected with n resistors, the n resistors are commonly connected with anodes of high-voltage power supplies, cathodes of the high-voltage power supplies are commonly connected with one ends of n current well circuits, and the other ends of the n current wells are respectively connected with cathodes of the n relays, wherein n is more than or equal to 2.
4. The dual power time division multiplexing implementation load condition test circuit according to claim 3, wherein the plurality of current traps correspond to the same relay output circuit, comprising:
the positive pole of the relay to be tested is respectively connected with the cathodes of the diode D1 and the diode D2, the anode of the diode D1 is connected with the positive pole of the low-voltage power supply, the anode of the diode D2 is connected with one side of the switch, the other side of the switch is connected with n resistors, the n resistors are connected in parallel, the n parallel resistors are connected with the positive pole of the high-voltage power supply, the negative pole of the high-voltage power supply is connected with n current trap circuits, the n current trap circuits are connected in parallel, and the parallel current trap circuits are connected with the negative pole of the relay to be tested, wherein n is more than or equal to 2.
5. The dual-power time-sharing multiplexing implementation load condition test method is characterized by being applied to the dual-power time-sharing multiplexing implementation load condition test circuit as claimed in any one of claims 1 to 4, and comprises the following steps:
carrying out a forward bias test by using the low-voltage power supply, and measuring the output current of the relay to be tested;
performing a reverse bias test by using the high-voltage power supply, and measuring the output voltage of the relay to be tested;
and simultaneously switching on the high-voltage power supply and the low-voltage power supply, performing pulse test, and monitoring the output current and the output voltage of the relay to be tested and the currents of the low-voltage power supply and the high-voltage power supply according to the time sequence relation of the control signal and the switching signal.
6. The method for implementing load condition test by dual-power time division multiplexing according to claim 5, wherein said performing a forward bias test using said low-voltage power supply, monitoring the output current of said relay to be tested comprises:
closing the switch or the high-voltage power supply;
and switching on the input of the relay to be tested.
7. The method for implementing load condition test by dual-power time division multiplexing according to claim 5, wherein said performing a reverse bias test by using said high-voltage power supply, monitoring the output voltage of said relay to be tested comprises:
the switch is closed;
the low-voltage power supply is turned off;
and switching off the input of the relay to be tested.
8. The method for implementing load condition test by time division multiplexing of dual power supplies according to claim 5, wherein said switching on said high voltage power supply and said low voltage power supply simultaneously, performing pulse test, monitoring said relay output current to be tested, said output voltage and said current of said low voltage power supply and said high voltage power supply according to a time sequence relationship between said control signal and said switching signal, comprises:
connecting the low-voltage power supply with the high-voltage power supply;
the input of the relay to be tested is connected, and a pulse control signal is input;
the switch is input with a control signal.
9. The method for implementing load condition test by dual power time division multiplexing according to claim 5, wherein said performing pulse test specifically comprises:
before the input of the relay to be tested is turned off, the switch is closed, the relay to be tested is turned on, the high-voltage power supply is turned on with the low-voltage power supply, the current sink circuit limits the current of the test circuit, and the output current and the output voltage of the relay to be tested are monitored according to the time sequence relation of the control signal and the switch signal;
the input of the relay to be tested is turned off, the switch is turned on, and the output current and the output voltage of the relay to be tested are monitored according to the time sequence relation between the control signal and the switch signal;
the relay to be tested is switched on instantly to be switched on completely, the switch is switched on, and the output current and the output voltage of the relay to be tested are monitored according to the time sequence relation between the control signal and the switch signal;
the relay to be tested is switched on, the switch is switched off, and the output current and the output voltage of the relay to be tested are monitored according to the time sequence relation between the control signal and the switch signal.
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Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2017134768A1 (en) * | 2016-02-03 | 2017-08-10 | 株式会社辰巳菱機 | Load testing device |
| RU183388U1 (en) * | 2018-05-22 | 2018-09-20 | Акционерное общество "Промышленная группа "Метран" | HIGH VOLTAGE AND CURRENT PROTECTION SYSTEM PERFORMED BY THE SOLID-SWITCH OF THE SWITCHING DEVICE |
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4360740A (en) * | 1981-09-01 | 1982-11-23 | Conard Albert F | Low voltage switching circuit for controlling a high voltage electrical load |
| US7330342B2 (en) * | 2005-04-12 | 2008-02-12 | Associated Research, Inc. | Safety tester having a high-voltage switching relay protected by an in-line electronic circuit breaker |
| CN213069091U (en) * | 2020-02-27 | 2021-04-27 | 江苏伊施德创新科技有限公司 | Relay switch device full-load test device powered by low-power supply |
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2017134768A1 (en) * | 2016-02-03 | 2017-08-10 | 株式会社辰巳菱機 | Load testing device |
| RU183388U1 (en) * | 2018-05-22 | 2018-09-20 | Акционерное общество "Промышленная группа "Метран" | HIGH VOLTAGE AND CURRENT PROTECTION SYSTEM PERFORMED BY THE SOLID-SWITCH OF THE SWITCHING DEVICE |
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