CN114302572A - Chip mounting method - Google Patents

Chip mounting method Download PDF

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Publication number
CN114302572A
CN114302572A CN202111675324.1A CN202111675324A CN114302572A CN 114302572 A CN114302572 A CN 114302572A CN 202111675324 A CN202111675324 A CN 202111675324A CN 114302572 A CN114302572 A CN 114302572A
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China
Prior art keywords
lga
lga device
welding
layer
pcb
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CN202111675324.1A
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Chinese (zh)
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朱政
郑伟
丁晟
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Zhejiang Geely Holding Group Co Ltd
Zhejiang Shikong Daoyu Technology Co Ltd
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Zhejiang Geely Holding Group Co Ltd
Zhejiang Shikong Daoyu Technology Co Ltd
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Priority to CN202111675324.1A priority Critical patent/CN114302572A/en
Publication of CN114302572A publication Critical patent/CN114302572A/en
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Abstract

The application provides a chip mounting method. The method comprises the following steps: providing a Printed Circuit Board (PCB) and at least one grid array packaged (LGA) device; carrying out tin-coating gold-removing treatment on the LGA device; forming a first welding layer at a welding point of the LGA device; forming a solder paste layer at a welding spot of the PCB; carrying out welding treatment on a first welding layer on the LGA device and a solder paste layer on the PCB; the gap between the LGA device and the PCB board is filled with a filler. The welding reliability between the LGA device and the PCB is improved.

Description

Chip mounting method
Technical Field
The embodiment of the application relates to the technical field of integrated circuits, in particular to a chip mounting method.
Background
According to the functional requirements, a plurality of functional modules may be integrated on the integrated circuit, for example, the functional modules may be a Wireless Fidelity (WIFI) module, a Bluetooth (BT) module, a Global Navigation Satellite System (GNSS) module, and the like, and these modules are generally configured as a Land Grid Array (LGA).
Currently, LGA devices are soldered to Printed Circuit Boards (PCBs) of integrated circuits by Surface Mount Technology (SMT). In industries such as automobile, aerospace, military industry and the like, the size of an integrated LGA device in a PCB is usually large, and after the LGA device is welded on the PCB by an SMT technology, bubbles are easily formed between the LGA device and the PCB, so that the welding reliability is low.
Disclosure of Invention
The embodiment of the application provides a chip mounting method, which improves the welding reliability between an LGA device and a PCB.
The embodiment of the application provides a chip mounting method, which comprises the following steps:
providing a Printed Circuit Board (PCB) and at least one grid array packaged (LGA) device;
carrying out tin-coating gold-removing treatment on the LGA device;
forming a first bonding layer at a bonding pad of the LGA device;
forming a solder paste layer at the welding spot of the PCB;
performing a soldering process on the first soldering layer on the LGA device and the solder paste layer on the PCB;
and filling filler in the gap between the LGA device and the PCB.
In one possible embodiment, there is provided at least one LGA device comprising:
providing a plurality of LGA devices to be selected;
determining the coplanarity of each LGA device to be selected;
and determining the LGA device to be selected with the coplanarity smaller than a preset threshold as the at least one LGA device.
In one possible embodiment, for any one LGA device; determining coplanarity of the candidate LGA device, comprising:
placing the LGA device to be selected on a transmission plane of laser ranging equipment;
acquiring the distance between each vertex of the LGA device to be selected and the transmission plane, which is acquired by the laser ranging equipment;
and determining the coplanarity of the LGA device to be selected according to the distance between each vertex of the LGA device to be selected and the transmission plane.
In one possible embodiment, determining coplanarity of the candidate LGA device according to distances between vertices of the candidate LGA device and the actuation plane includes:
determining the maximum height difference between a plurality of vertexes of the LGA device to be selected according to the distance between each vertex of the LGA device to be selected and the transmission plane;
and determining the coplanarity of the LGA device to be selected according to the maximum height difference.
In one possible embodiment, the LGA device is subjected to tin-coating gold-removing treatment, which comprises the following steps:
coating soldering flux on the welding spot of the LGA device;
coating tin on the welding point of the LGA device, and carrying out tin dragging treatment until the gold of the welding point disappears;
and removing the residual tin at each welding point of the LGA device so as to ensure that the residual tin at each welding point has the same height.
In one possible embodiment, forming a first solder layer at a solder joint of the LGA device includes:
printing columnar solder paste at the welding spot of the LGA device;
heating the columnar solder paste to convert the columnar solder paste into solder balls;
and carrying out cleaning treatment and baking treatment on the LGA device to form a first welding layer at a welding point of the LGA device.
In one possible embodiment, the soldering process of the first solder layer on the LGA device and the solder paste layer on the PCB board includes:
carrying out secondary packaging on the LGA device;
and welding the first welding layer on the secondarily packaged LGA device with the solder paste layer on the PCB.
In one possible embodiment, the secondary packaging of the LGA device includes:
and placing the LGA device on a preset tray in a mode that the welding points face downwards and the polar points face to a preset direction.
In one possible embodiment, soldering the first solder layer on the twice-packaged LGA device to the solder paste layer on the PCB board includes:
placing the preset tray in a chip mounter;
sucking the LGA device in the preset tray through a suction nozzle in the chip mounter, obtaining the coordinates of the solder paste layer according to optical positioning, and placing the LGA device on the PCB so that the first welding layer is opposite to the solder paste layer;
and welding the first welding layer and the tin paste layer.
In one possible embodiment, the space between the LGA device and the PCB board after the soldering process is 0.1 mm to 0.4 mm.
The chip installation method that the embodiment of this application provided, when needs are integrated LGA device to integrated circuit board, provide PCB board and at least one LGA device as required, and carry out coplane degree screening to the LGA device, ward off the tin to the LGA device and remove gold processing, and form first welding layer in the solder joint department of LGA device, form the tin cream layer in the solder joint department of PCB board, then weld the first welding layer on the LGA device and the tin cream layer on the PCB board, and fill material in the space between LGA device and PCB board. In the above-mentioned in-process, before welding the LGA device, earlier to the LGA device ward off the tin and remove gold processing to solder joint department at the LGA device forms first welding layer in order to increase the soldering tin thickness on the LGA device pad, can in time discharge the bubble in the welding process, avoids forming the bubble between LGA device and the PCB board, has improved welding reliability. After the welding of LGA device was accomplished, the filler was filled in the space between LGA device and PCB board, had increased the contact surface of LGA device and PCB board, had reinforceed contact strength between them, had increased heat conduction efficiency. In addition, because the solder joints connecting the LGA device and the PCB are isolated by the filler, the problem that the tin must be short-circuited in the long-term use process of the integrated circuit is avoided.
Drawings
Fig. 1 is a schematic diagram of an application scenario provided in an embodiment of the present application;
fig. 2 is a schematic flowchart of a chip mounting method according to an embodiment of the present disclosure;
fig. 3 is a schematic flow chart of another chip mounting method according to an embodiment of the present disclosure.
Detailed Description
Reference will now be made in detail to the exemplary embodiments, examples of which are illustrated in the accompanying drawings. When the following description refers to the accompanying drawings, like numbers in different drawings represent the same or similar elements unless otherwise indicated. The embodiments described in the following exemplary embodiments do not represent all embodiments consistent with the present application. Rather, they are merely examples of apparatus and methods consistent with certain aspects of the present application, as detailed in the appended claims.
It should be noted that, in this document, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising an … …" does not exclude the presence of other like elements in a process, method, article, or apparatus that comprises the element.
Fig. 1 is a schematic diagram of an application scenario provided in an embodiment of the present application. Referring to fig. 1, a plurality of LGA devices 101 and a PCB board 102 are included. For example, the LGA device 101 may be a WIFI module, a BT module, a GNSS module, or the like, and the PCB board 102 may be a PCB board in a vehicle-mounted integrated circuit. According to different functional requirements, different LGA devices 101 are integrated on the PCB board 102, for example, the LGA device 101 is soldered on the PCB board 102 through a pad at the bottom of the LGA device 101, and a plurality of solder points 103 connect the pad at the bottom of the LGA device 101 and the PCB board 102.
In the related art, for the soldering of LGA devices, a general SMT soldering scheme is adopted: the method comprises the steps of incoming material sampling inspection, PCB printing solder paste, LGA paster, hot air reflow soldering and soldering inspection. The bottom of the LGA device is only provided with a bonding pad, and the welding height is not enough after welding, so that welding spot bubbles are easily caused, and the welding reliability is low.
In the scheme shown in the embodiment of the application, before the LGA device is welded, the LGA device is subjected to tin-coating gold-removing treatment, the thickness of soldering tin on a land of the LGA device is increased, the welding height is guaranteed to meet the high-reliability welding requirement, and the welding reliability is further improved.
The technical means shown in the present application will be described below by way of specific examples. It should be noted that the following embodiments may exist independently or may be combined with each other, and description of the same or similar contents is not repeated in different embodiments.
Fig. 2 is a schematic flow chart of a chip mounting method according to an embodiment of the present disclosure. Referring to fig. 2, the method may include:
s201, providing a PCB and at least one LGA device.
The PCB is a carrier for connecting all electronic components and functional modules.
The LGA is a packaging form of each functional module.
At least one LGA device may be provided by: providing a plurality of LGA devices to be selected; determining the coplanarity of each LGA device to be selected; and determining the LGA device to be selected with the coplanarity smaller than the preset threshold value as at least one LGA device.
Coplanarity is used to indicate the planarity of the land surface of an LGA device. For example, the greater the coplanarity, the poorer the flatness of the pad surface.
The coplanarity of the candidate LGA device may be determined by: placing all LGA devices to be selected on a transmission plane of laser ranging equipment; acquiring the distance between each vertex of the LGA device to be selected and a transmission plane, which is acquired by laser ranging equipment; and determining the coplanarity of the LGA device to be selected according to the distance between each vertex of the LGA device to be selected and the transmission plane.
Furthermore, the maximum height difference between a plurality of vertexes of the LGA device to be selected can be determined according to the distance between each vertex of the LGA device to be selected and the transmission plane; and determining the coplanarity of the LGA device to be selected according to the maximum height difference.
Optionally, assuming that N vertexes exist in the LGA device, N distances between the N vertexes and the driving plane may be obtained, a maximum distance and a minimum distance among the N distances may be obtained, and a difference between the maximum distance and the minimum distance is determined as the coplanarity of the LGA device to be selected. For example, N may be 4.
For example, assuming that the preset threshold is 0.05 mm, and assuming that there are 4 vertexes in the candidate LGA device, and the distances between the 4 vertexes and the driving plane are 0.1 mm, 0.06 mm, 0.07 mm and 0.08 mm, respectively, the coplanarity of the candidate LGA device can be determined to be 0.1-0.06-0.04 mm. Since the coplanarity (0.04 mm) of the LGA device is less than the preset threshold (0.05 mm), the candidate LGA device is determined to be at least one LGA device.
The laser distance measuring equipment is used for detecting the coplanarity of all to-be-selected LGA devices, 100% coplanarity detection of the to-be-selected LGA devices can be realized, manual sampling detection in the prior art is replaced, the situations of misjudgment and missed judgment are avoided, and the welding reliability is improved.
S202, tin coating and gold removing treatment are carried out on the LGA device.
Tin-coating and gold-removing is to remove the gold-plating layer on the surface of the Land Grid Array (LGA) device pad.
In the related art, when an electronic component such as an LGA is shipped, gold is plated to form a thin gold layer on a pad, thereby preventing the pad from being oxidized. During soldering, the gold plating layer on the pad dissolves into the solder to generate Intermetallic Compound (IMC), and the Compound containing gold weakens the IMC strength, so that the soldering effect is poor and even the soldering fails. In order to avoid the gold-containing compounds in the IMC, tin coating and gold removing treatment are required.
Tin coating and gold removal can be carried out in the following way: coating soldering flux on the welding spot of the LGA device; coating tin on the welding spot of the LGA device, and carrying out tin dragging treatment until the welding spot gold disappears; the residual tin at each welding point of the LGA device is cleaned so that the residual tin at each welding point has the same height.
In the practical application process, the device can be fixed by the carrier, and the welding spot of the LGA device is coated with the soldering flux. And coating tin on the welding spot by using a knife edge-shaped soldering iron, and repeatedly carrying out tin-dragging treatment until the gold of the welding spot completely disappears. And heating the tin absorbing rope by using a soldering iron, and removing the residual tin at each soldering point so as to ensure that the residual tin at each soldering point has the same height. And (3) checking the gold removing effect of the welding spots through a magnifier to confirm that no gold remains, the surface of each welding spot is flat, and no obvious concave-convex feeling is generated by finger touch. The LGA device can be subjected to tin coating and gold removing treatment once.
S203, forming a first welding layer at the welding point of the LGA device.
The first solder layer increases the amount of tin at the solder sites of the LGA device, thereby increasing the solder height.
The first solder layer may be formed by: printing columnar solder paste at a welding spot of the LGA device; heating the columnar solder paste to convert the columnar solder paste into solder balls; the LGA device is subjected to a cleaning process and a baking process to form a first bonding layer at a bonding pad of the LGA device.
And S204, forming a solder paste layer at the welding spot of the PCB.
The pre-processed LGA device may be secured to a PCB board by a layer of solder paste.
The solder paste can be uniformly printed on the PCB board by a printing device, a steel mesh, a scraper and the like so as to form a solder paste layer at the welding point of the PCB board.
S205, the first welding layer on the LGA device and the solder paste layer on the PCB are welded.
The soldering process can be performed on the first soldering layer on the LGA device and the solder paste layer on the PCB board by: packaging the LGA device for the second time; and welding the first welding layer on the secondarily packaged LGA device with the solder paste layer on the PCB.
Secondary packaging refers to repackaging the unpackaged LGA devices.
The first soldering layer on the twice-packaged LGA device can be soldered with the solder paste layer on the PCB board by: placing the secondarily packaged LGA device in a chip mounter; sucking the LGA device through a suction nozzle in the chip mounter, obtaining the coordinate of the solder paste layer according to optical positioning, and placing the LGA device on the PCB so that the first welding layer is opposite to the solder paste layer; welding the first welding layer and the tin paste layer; cleaning the residual soldering flux of the welding spot by absolute ethyl alcohol; and (3) putting the cleaned product into an oven for drying, setting the temperature to be 45-50 ℃, the time to be 2-3 h, and the heating rate to be 2-3 ℃ per minute.
Alternatively, the first solder layer and the solder paste layer may be soldered using a hot air reflow oven. The number of temperature zones of the hot air reflow furnace is not less than 12, nitrogen is filled in a cavity of the reflow furnace to guarantee the welding effect, and the residual oxygen in the furnace is 1000-3000 ppm in the welding process.
In the practical application process, for the welding effect of ensureing first welding layer and tin cream layer, can set up a plurality of detection processes to the welding effect etc. of examining placement position, first welding layer and tin cream layer of LGA device on the PCB board.
For example, after the LGA device is placed on the PCB, the first solder layer and the solder paste layer may be inspected for misalignment and other problems by an Automated Optical Inspection (AOI) apparatus, so as to ensure that the first solder layer is aligned with the solder paste layer.
For example, the welding effect of the first welding layer and the tin paste layer can be checked by adopting X-ray (X-ray), so that the welding spots are free from tin connection, tin slag and the like, and the bubble area of a single welding spot is not more than 15% of the area of the welding spot.
The spacing between the LGA device and the PCB after the soldering process is 0.1 mm to 0.4 mm.
S206, filling filler in the gap between the LGA device and the PCB.
After the LGA device and the PCB are welded, filling materials can be filled in gaps between the bonding pads. For example, the filler may be a caulking compound.
The filler material can be filled in the gap between the LGA device and the PCB board by: installing the joint filling glue on glue spraying equipment; conveying the PCB welded with the LGA device into glue spraying equipment; arranging a glue spraying route of glue spraying equipment to walk 2 diagonal L shapes along the edge of the LGA device; taking out the PCB subjected to glue spraying and standing for 3-5 minutes to ensure that the joint filling glue fully permeates to the bottom of the bonding pad to achieve a completely filled state; conveying the PCB subjected to standing to a hot air reflow furnace (which can be replaced by an oven), and heating to cure the joint filling glue (the heating temperature is 120-135 ℃, and the time is 8-15 minutes); and (3) inspecting the filling effect of the joint filling glue, wherein the joint filling glue cannot be damaged and cannot pollute other devices which are not allowed to point joint filling glue based on the condition that the periphery of the LGA device is completely wrapped with the joint filling glue.
The chip installation method that the embodiment of this application provided, when needs are integrated LGA device to integrated circuit board, provide PCB board and at least one LGA device as required, and carry out coplane degree screening to the LGA device, ward off the tin to the LGA device and remove gold processing, and form first welding layer in the solder joint department of LGA device, form the tin cream layer in the solder joint department of PCB board, then weld the first welding layer on the LGA device and the tin cream layer on the PCB board, and fill material in the space between LGA device and PCB board. In the above-mentioned in-process, before welding the LGA device, earlier to the LGA device ward off the tin and remove gold processing to solder joint department at the LGA device forms first welding layer in order to increase the soldering tin thickness on the LGA device pad, can in time discharge the bubble in the welding process, avoids forming the bubble between LGA device and the PCB board, has improved welding reliability. After the welding of LGA device was accomplished, the filler was filled in the space between LGA device and PCB board, had increased the contact surface of LGA device and PCB board, had reinforceed contact strength between them, had increased heat conduction efficiency. In addition, because the solder joints connecting the LGA device and the PCB are isolated by the filler, the problem that the tin must be short-circuited in the long-term use process of the integrated circuit is avoided.
Based on any of the above embodiments, the chip mounting method shown in the present application will be described in further detail below with reference to fig. 3.
Fig. 3 is a schematic flow chart of another chip mounting method according to an embodiment of the present disclosure. Referring to fig. 3, the method may include:
s301, providing a PCB and at least one LGA device.
S302, tin coating and gold removing treatment are carried out on the LGA device.
It should be noted that the execution processes of S301 to S302 may refer to the execution processes of S201 to S202, and are not described herein again.
S303, printing columnar solder paste on the welding spot of the LGA device.
Preparing a tool for printing solder paste, a small steel mesh, solder paste and a scraping blade. Wherein, the ratio of the length and the width of the small steel mesh to the size of the device pad is 1:1, the thickness of the small steel mesh is designed according to the specification requirement of the LGA device, and the tin adding amount of the LGA device does not exceed the specification requirement.
The columnar solder paste may be printed at the solder joints of an LGA device by: placing the LGA device in a tool, enabling the welding point to face upwards, and tightly attaching the small steel mesh to the welding point of the LGA device, wherein the welding point of the LGA device corresponds to the small steel mesh leakage hole one by one; scraping solder paste across all welding spots by using a scraping blade at a constant speed, and vertically moving an upper cover of the tool and a small steel mesh away; and (4) visually checking the printing effect of all solder joint solder pastes, and determining that the solder columns are uniform in solder amount and do not collapse to be qualified.
S304, heating the columnar solder paste to convert the columnar solder paste into a solder ball.
The volume ratio of the components of the soldering flux in the printed solder paste is 30-40%, the soldering flux is easy to melt, and the columnar solder paste is converted into the solder ball by heating the columnar solder paste. For example, a wind gun may be used for heating.
The columnar solder paste may be heat-treated to be converted into a solder ball by: a hand-held small air gun is used, the temperature is set to be 255-265 ℃, the welding spot is continuously and uniformly heated for about 10s, the tin column is observed to be changed into a tin ball shape in the heating process, and the heating can be stopped when the surface of the welding spot is bright after the welding spot is melted; cooling for 30s by adopting an ion fan, and taking out the LGA device from the tool; and inspecting the solder ball shape of the solder joint through a magnifying lens.
When columnar solder paste is heated, a reflow oven heating mode is not selected, but an air gun is used for heating, the purpose of heating in the least time is guaranteed, ICM thickening between an LGA device pad and increased tin caused by long-time heating of the LGA device in a reflow oven is avoided, and strength is reduced.
S305, cleaning and baking the LGA device to form a first welding layer at the welding point of the LGA device.
The LGA device may be subjected to a cleaning process and a baking process as follows: dipping 99.7 percent absolute ethyl alcohol by using an anti-static brush to clean the surface of the welding spot, and removing residual soldering flux and foreign matters; placing the LGA device in a constant-temperature oven to bake to remove moisture, wherein the baking temperature and time are subject to specification and are not specified clearly, the baking temperature is set to be 115-125 ℃, and the baking time is 8 h.
S306, packaging the LGA device for the second time.
For example, secondary packaging of LGA devices may be accomplished in the form of tray packaging.
Secondary packaging of LGA devices can be achieved by: the LGA device is placed on a predetermined tray in such a way that the solder joint is directed downward and the polarity point is directed toward a predetermined direction.
In the practical application process, the baked LGA device can be placed with the welding spot facing downwards, the LGA device is placed on a tray by a suction pen, and the polarity points are unified to be the upper left; after the first layer of trays are placed, stacking the second layer of trays, wherein the direction of the trays is the same as that of the lower layer of trays, and the number of stacked layers is not more than 6; placing the tray with the LGA device in a set direction in AOI equipment to check the polarity of the LGA device; and operating the AOI equipment to check the polarity of all LGA devices on the tray, if the check result is normal, lighting a green light to prompt that the detected tray is removed, and if the check result is abnormal, lighting a red light to prompt the position of the abnormal LGA devices.
When secondary packaging is carried out on the LGA device, a tray packaging mode is selected so that polarity detection is carried out on the LGA device through AOI equipment, and effectiveness of subsequent procedures is guaranteed.
And S307, forming a solder paste layer at the welding spot of the PCB.
S308, carrying out welding treatment on the first welding layer on the LGA device after secondary packaging and the solder paste layer on the PCB.
S309, filling filler in the gap between the LGA device and the PCB.
It should be noted that the execution process of S307-S309 may refer to the execution process of S204-S206, and will not be described herein again.
In the embodiment shown in fig. 3, when the LGA device is integrated to the integrated circuit board, provide PCB and at least one LGA device as required, print the column solder paste at the solder joint department of LGA device, carry out heat treatment to the column solder paste, so that the column solder paste converts the solder ball into, wash the processing and toast the processing to the LGA device, form first welding layer with the solder joint department at the LGA device, form the solder paste layer on the PCB simultaneously, and carry out the secondary packing to the LGA device, weld first welding layer on the LGA device after the secondary packing and the solder paste layer on the PCB board, filling material in the space between LGA device and PCB board, in order to form chip package structure. In the process, the tin adding amount of the LGA device is guaranteed by controlling the opening thickness of the small steel mesh, the tin adding amount of the LGA device is controlled not to exceed the specification suggestion, the welding height is increased, bubbles are prevented from being formed between the LGA device and a PCB, and the welding reliability is improved. Through carrying out the secondary packing to the LGA device, realized the batch operation in LGA device and PCB board welding process, improved the operating efficiency.
It will be apparent to those skilled in the art that various changes and modifications may be made in the embodiments of the present application without departing from the spirit and scope of the application. Thus, if such modifications and variations of the embodiments of the present application fall within the scope of the claims of the present application and their equivalents, the present application is also intended to encompass such modifications and variations.
In the present application, the terms "include" and variations thereof may refer to non-limiting inclusions; the term "or" and variations thereof may mean "and/or". The terms "first," "second," and the like in this application are used for distinguishing between similar elements and not necessarily for describing a particular sequential or chronological order. In the present application, "a plurality" means two or more. "and/or" describes the association relationship of the associated objects, meaning that there may be three relationships, e.g., a and/or B, which may mean: a exists alone, A and B exist simultaneously, and B exists alone. The character "/" generally indicates that the former and latter associated objects are in an "or" relationship.

Claims (10)

1. A chip mounting method, comprising:
providing a Printed Circuit Board (PCB) and at least one grid array packaged (LGA) device;
carrying out tin-coating gold-removing treatment on the LGA device;
forming a first bonding layer at a bonding pad of the LGA device;
forming a solder paste layer at the welding spot of the PCB;
performing a soldering process on the first soldering layer on the LGA device and the solder paste layer on the PCB;
and filling filler in the gap between the LGA device and the PCB.
2. The method of claim 1, wherein providing at least one LGA device comprises:
providing a plurality of LGA devices to be selected;
determining the coplanarity of each LGA device to be selected;
and determining the LGA device to be selected with the coplanarity smaller than a preset threshold as the at least one LGA device.
3. The method of claim 2, wherein for any one LGA device; determining coplanarity of the candidate LGA device, comprising:
placing the LGA device to be selected on a transmission plane of laser ranging equipment;
acquiring the distance between each vertex of the LGA device to be selected and the transmission plane, which is acquired by the laser ranging equipment;
and determining the coplanarity of the LGA device to be selected according to the distance between each vertex of the LGA device to be selected and the transmission plane.
4. The method of claim 3, wherein determining coplanarity of the candidate LGA devices based on distances between vertices of the candidate LGA devices and the actuation plane comprises:
determining the maximum height difference between a plurality of vertexes of the LGA device to be selected according to the distance between each vertex of the LGA device to be selected and the transmission plane;
and determining the coplanarity of the LGA device to be selected according to the maximum height difference.
5. The method of any of claims 1-4, wherein the LGA device is tin-plated for gold removal, comprising:
coating soldering flux on the welding spot of the LGA device;
coating tin on the welding point of the LGA device, and carrying out tin dragging treatment until the gold of the welding point disappears;
and removing the residual tin at each welding point of the LGA device so as to ensure that the residual tin at each welding point has the same height.
6. The method of any of claims 1-4, wherein forming a first solder layer at a solder joint of the LGA device comprises:
printing columnar solder paste at the welding spot of the LGA device;
heating the columnar solder paste to convert the columnar solder paste into solder balls;
and carrying out cleaning treatment and baking treatment on the LGA device to form a first welding layer at a welding point of the LGA device.
7. The method of any of claims 1-4, wherein soldering the first solder layer on the LGA device to the solder paste layer on the PCB board comprises:
carrying out secondary packaging on the LGA device;
and welding the first welding layer on the secondarily packaged LGA device with the solder paste layer on the PCB.
8. The method of claim 7, wherein secondary packaging of the LGA device comprises:
and placing the LGA device on a preset tray in a mode that the welding points face downwards and the polar points face to a preset direction.
9. The method of claim 8, wherein soldering the first solder layer on the twice-packaged LGA device to the solder paste layer on the PCB board comprises:
placing the preset tray in a chip mounter;
sucking the LGA device in the preset tray through a suction nozzle in the chip mounter, obtaining the coordinates of the solder paste layer according to optical positioning, and placing the LGA device on the PCB so that the first welding layer is opposite to the solder paste layer;
and welding the first welding layer and the tin paste layer.
10. The method of any of claims 1-9, wherein a spacing between the LGA device and the PCB board after the soldering process is between 0.1 mm and 0.4 mm.
CN202111675324.1A 2021-12-31 2021-12-31 Chip mounting method Pending CN114302572A (en)

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CN202111675324.1A CN114302572A (en) 2021-12-31 2021-12-31 Chip mounting method

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Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN105007695A (en) * 2015-07-29 2015-10-28 无锡市同步电子制造有限公司 LGA welding process method in printed circuit board processing
CN110677991A (en) * 2019-09-19 2020-01-10 华为技术有限公司 Packaging structure, finished circuit board, electronic device, electronic equipment and welding method
CN112247300A (en) * 2020-09-11 2021-01-22 中国电子科技集团公司第十三研究所 Electronic component welding method and surface-mounted electronic component welding method

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN105007695A (en) * 2015-07-29 2015-10-28 无锡市同步电子制造有限公司 LGA welding process method in printed circuit board processing
CN110677991A (en) * 2019-09-19 2020-01-10 华为技术有限公司 Packaging structure, finished circuit board, electronic device, electronic equipment and welding method
CN112247300A (en) * 2020-09-11 2021-01-22 中国电子科技集团公司第十三研究所 Electronic component welding method and surface-mounted electronic component welding method

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Application publication date: 20220408