CN114257699A - Multimedia signal transmission control system, transmission control circuit and reception control circuit - Google Patents
Multimedia signal transmission control system, transmission control circuit and reception control circuit Download PDFInfo
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N5/00—Details of television systems
- H04N5/04—Synchronising
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N5/00—Details of television systems
- H04N5/222—Studio circuitry; Studio devices; Studio equipment
- H04N5/262—Studio circuits, e.g. for mixing, switching-over, change of character of image, other special effects ; Cameras specially adapted for the electronic generation of special effects
- H04N5/268—Signal distribution or switching
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N5/00—Details of television systems
- H04N5/38—Transmitter circuitry for the transmission of television signals according to analogue transmission standards
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N5/00—Details of television systems
- H04N5/44—Receiver circuitry for the reception of television signals according to analogue transmission standards
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Abstract
A multimedia signal transmission control system includes a transmission control circuit and a reception control circuit. The transmission control circuit is used for packaging one or more of the control signal and the plurality of multimedia signals into a plurality of first mixed data packets during active video of the image frame, and packaging the other one or more of the control signal and the plurality of multimedia signals into a plurality of second mixed data packets at the vertical front edge and the vertical back edge of the image frame. The receiving control circuit is coupled to the transmitting control circuit, and is used for receiving a plurality of first mixed data packets during the active video period and receiving a plurality of second mixed data packets at a vertical leading edge and a vertical trailing edge. The receiving control circuit is used for unpacking the plurality of first mixed data packets and the plurality of second mixed data packets so as to provide a control signal and a plurality of multimedia signals for the display module.
Description
Technical Field
The present invention relates to a multimedia signal transmission control system, a transmission control circuit and a reception control circuit thereof, and more particularly, to a multimedia signal transmission control system, a transmission control circuit and a reception control circuit thereof for simplifying a signal transmission interface.
Background
The display comprises a control module and a display module, wherein the control module is used for decoding image data and adjusting the resolution ratio of the image data, and is also used for transmitting various control signals to the display module so as to control the display module to provide corresponding images. Generally, the components of the control module are disposed on the printed circuit board, and the components of the display module are mostly implemented on the glass substrate. If the control module and the display module are packaged as the same device, a thicker housing is required to accommodate the two different substrates. Therefore, the control module and the display module are separated from each other, so that the display module occupying most of the volume of the display can become as light and thin as wallpaper, which is the current design trend. Conventionally, the control module performs data transmission with the display module through various transmission interfaces, such as a Serial Peripheral Interface (SPI) and an inter-integrated circuit (I2C) bus, and the like, and these complicated transmission interfaces are only suitable for short-distance transmission and require different transmission lines, and thus are not suitable for the design in which the control module and the display module are separated from each other.
Disclosure of Invention
The invention provides a multimedia signal transmission control system, which comprises a transmitting control circuit and a receiving control circuit. The transmit control circuitry is configured to encapsulate the control signal and one or more of the plurality of multimedia signals as a plurality of first hybrid data packets during active video periods (active video period) of the video frame, and to encapsulate the control signal and another one or more of the plurality of multimedia signals as a plurality of second hybrid data packets at vertical front edges (vertical front) and vertical back edges (vertical back) of the video frame. The receiving control circuit is coupled to the transmitting control circuit, and is used for receiving a plurality of first mixed data packets during the active video period and receiving a plurality of second mixed data packets at a vertical leading edge and a vertical trailing edge. The receiving control circuit is used for unpacking the plurality of first mixed data packets and the plurality of second mixed data packets so as to provide a control signal and a plurality of multimedia signals to the display module.
The invention provides a transmission control circuit which is suitable for a multimedia signal transmission control system. The transmission control circuit is used for packaging one or more of the control signal and the plurality of multimedia signals into a plurality of first mixed data packets during active video of the image frame, and packaging the other one or more of the control signal and the plurality of multimedia signals into a plurality of second mixed data packets at a vertical front edge and a vertical back edge of the image frame. When the transmitting control circuit is coupled to the receiving control circuit, the receiving control circuit receives a plurality of first mixed data packets during the active video period and receives a plurality of second mixed data packets at the vertical front edge and the vertical back edge, and the receiving control circuit unpacks the plurality of first mixed data packets and the plurality of second mixed data packets, so that the transmitting control circuit provides a control signal and a plurality of multimedia signals to the display module through the receiving control circuit.
The invention provides a receiving control circuit which is suitable for a multimedia signal transmission control system. The receiving control circuit is configured to be coupled to the transmitting control circuit, and the transmitting control circuit is configured to encapsulate a control signal and one or more of the plurality of multimedia signals into a plurality of first mixed data packets during an active video period of the video frame, and to encapsulate the control signal and another one or more of the plurality of multimedia signals into a plurality of second mixed data packets at a vertical leading edge and a vertical trailing edge of the video frame. The receiving control circuit is used for receiving a plurality of first mixed data packets during the active video period and receiving a plurality of second mixed data packets at the vertical front edge and the vertical back edge, wherein the receiving control circuit is used for unpacking the plurality of first mixed data packets and the plurality of second mixed data packets to provide control signals and a plurality of multimedia signals to a display module.
Drawings
Fig. 1 is a simplified functional block diagram of a multimedia playing system according to an embodiment of the present invention.
FIG. 2 is a simplified functional block diagram of a multimedia signal transmission control system according to an embodiment of the present invention.
Fig. 3 is a simplified waveform diagram of a plurality of signals processed by the multimedia signal transmission control system.
FIG. 4 is a timing diagram of the transmission of signals in the multimedia signal transmission control system.
FIG. 5 is a simplified functional block diagram of a signal distribution circuit according to an embodiment of the present invention.
FIG. 6 is a simplified functional block diagram of a signal combination circuit according to an embodiment of the present invention.
FIG. 7 is a simplified functional block diagram of a display module according to an embodiment of the present invention.
Description of the symbols
100: multimedia playing system
110: control module
120: multimedia signal transmission control system
130: display module
20: transmission control circuit
30: receiving control circuit
210: signal distribution circuit
220: transmission interface circuit
222: first data packer
224: second data packer
226: transmitting circuit
310: receiving interface circuit
312: receiving circuit
314: first data unpacker
316: second data unpacker
320: signal combining circuit
Vsync: vertical synchronization signal
Hsync: horizontal synchronization signal
DEN: data enable signal
CLK: pixel frequency signal
VS: video signal
AS: audio signal
AUX: auxiliary data signal
CT: control signal
MPa: the first mixed data packet
MPb: second mixed data packet
INa: first input signal
INb: second input signal
VBP: vertical back edge
VFP: vertical front edge
AVP: active video period
PP: predetermined length of time
410: control period
420: data island period
430: period of video data
510: demultiplexer
520: emission counting circuit
610: multi-task device
620: receiving counting circuit
710: pixel matrix
720: backlight controller
730: backlight module
740: time sequence controller
750: scan driver
760: data driver
GL: gate line
SL: source line
Detailed Description
Embodiments of the present application will be described below with reference to the accompanying drawings. In the drawings, the same reference numbers indicate the same or similar components or process flows.
Fig. 1 is a simplified functional block diagram of a multimedia playing system 100 according to an embodiment of the present invention. The multimedia playing system 100 comprises a control module 110, a multimedia signal transmission control system 120 and a display module 130, wherein the multimedia signal transmission control system 120 is coupled between the control module 110 and the display module 130. The control module 110 is used for receiving multimedia signals through a video stream or from a Graphics Processing Unit (GPU), converting the multimedia signals into a data format suitable for being played by the display module 130, and then providing the converted multimedia signals to the display module 130 through the multimedia signal transmission control system 120. The control module 110 is also used for transmitting additional control signals to the display module 130 through the multimedia signal transmission control system 120. For example, in some embodiments, the display module 130 includes the pixel matrix 710 and the backlight module 730 shown in fig. 7, and the control module 110 transmits the backlight control signal and the pwm signal to the display module 130 through the multimedia signal transmission control system 120 to control the backlight brightness thereof.
In the embodiment, the multimedia signal transmission control system 120 transmits the multimedia signal and the control signal from the control module 110 to the display module 130 through a single transmission interface (for example, HDMI), which is helpful for reducing the number of transmission lines, but the invention is not limited thereto. In the embodiment, one part of the multimedia signal transmission control system 120 and the control module 110 are integrated into a single device, and another part of the multimedia signal transmission control system 120 and the display module are integrated into a single device, but the disclosure is not limited thereto. In some embodiments, the multimedia signal transmission control system 120 is integrated with the transmission line into a single device, and is coupled to the control module 110 and the display module 130 through a plug-in connector.
In some embodiments, the control module 110 may be implemented with a combination of one or more of a scaling control chip (scaler IC), an image decoder, an analog-to-digital converter, a microprocessor, and a memory circuit. In some embodiments, the control module 110 may be a video stream source or a graphics processor itself, or a module integrated with the video stream source or the graphics processor, but not limited thereto.
Fig. 2 is a simplified functional block diagram of a multimedia signal transmission control system 120 according to an embodiment of the present invention. The multimedia signal transmission control system 120 may include a transmission control circuit 20 and a reception control circuit 30 coupled to each other. The emission control circuit 20 is configured to be coupled to the control module 110, or in some embodiments, integrated with the control module 110 as a single device. The receiving control circuit 30 is configured to be coupled to the display module 130, or integrated with the display module 130 into a single device in some embodiments. In some embodiments, the transmission control circuit 20 and the reception control circuit 30 are coupled to each other through a transmission line.
The emission control circuit 20 receives a vertical synchronization signal Vsync, a horizontal synchronization signal Hsync, a data enable signal DEN, and a pixel clock signal CLK. In addition, the transmission control circuit 20 includes a signal distribution circuit 210 and a transmission interface circuit 220. The signal distribution circuit 210 is configured to receive the control signal CT from the control module 110. In some embodiments, the control signal CT includes, but is not limited to, a backlight control signal, a pwm signal, a panel correction signal, and the like, wherein the panel correction signal can be used to correct the brightness non-uniformity of the panel. In other embodiments, the control signal CT is different from the video signal VS, the audio signal AS and the auxiliary data signal AUX. The transmit interface circuit 220 is used to receive multimedia signals such AS, but not limited to, a video signal VS, an audio signal AS, and an auxiliary data signal AUX from the control module 110. In some embodiments, the auxiliary data signal AUX is used to convey the specification of the multimedia signal or information needed to reconstruct the audio frequency. In other embodiments, the video signal VS is used to specify gray levels for pixels in the pixel matrix 710 of fig. 7.
Fig. 3 is a simplified waveform diagram of a plurality of signals processed by the multimedia signal transmission control system 120. The vertical synchronization signal Vsync is used to control the time length of each image frame of the display module 130. For example, the interval between two adjacent pulses of the vertical synchronization signal Vsync is the duration of one image frame. The horizontal synchronization signal Hsync and the data enable signal DEN are used to control the display module 130 to update a corresponding row of pixels. The pixel clock signal CLK is used to further control the display module 130 to update a corresponding pixel in a column.
In a frame, the period between the pulse of the vertical synchronization signal Vsync and the first pulse of the data enable signal DEN is called "vertical back porch". In addition, the period between the last pulse of the data enable signal DEN in one frame and the pulse of the vertical synchronization signal Vsync in the next frame is referred to as "vertical front edge VFP" (vertical front point). The multimedia signal transmission control system 120 transmits the information carried by the audio signal AS or the auxiliary data signal AUX in the vertical back porch VBP and the vertical front porch VFP. The period between the vertical back porch VBP and the vertical front porch VFP is referred to as an "active video period AVP" (active video period). The multimedia signaling control system 120 transmits information carried by the video signal VS during active video by the AVP. It is worth mentioning that, in order to obtain sufficient continuous bandwidth under a single communication protocol, the multimedia signal transmission control system 120 distributes the information carried by the control signal CT to the vertical back-porch VBP, the vertical front-porch VFP and the active video period AVP for transmission.
Referring to fig. 2 and 3, in the vertical back porch VBP and the vertical front porch VFP, the signal distribution circuit 210 provides the control signal CT to the first data packer 222 of the transmit interface circuit 220 through a first output terminal thereof. The first data packer 222 is coupled to the first output terminal of the signal distribution circuit 210, and is configured to receive the video signal VS and pack the video signal VS and the control signal CT into a plurality of first mixed data packets MPa.
On the other hand, during active video AVP, the signal distribution circuit 210 provides the control signal CT to the second data packer 224 of the transmission interface circuit 220 through the second output terminal thereof. The second data packer 224 is coupled to the second output terminal of the signal distribution circuit 210, and is configured to receive the audio signal AS and the auxiliary data signal AUX, and to pack the audio signal AS or the auxiliary data signal AUX and the control signal CT into a plurality of second mixed data packets MPb.
The first data packer 222 and the second data packer 224 respectively provide the first hybrid data packet MPa and the second hybrid data packet MPb to the transmitting circuit 226 of the transmitting interface circuit 220. The transmitting circuit 226 has an encoding function for encoding the first mixed data packet MPa, the second mixed data packet MPb, the vertical synchronization signal Vsync, the horizontal synchronization signal Hsync, the data enable signal DEN, and the pixel clock signal CLK. The transmitter circuit 226 transmits the encoded information to the receiver control circuit 30 by an appropriate data transmission technique. In some embodiments, to increase the transmission distance of the multimedia signal transmission control system 120, the transmitting circuit 226 utilizes a transition-minimized differential signaling (TMDS) technique to communicate data with the receiving control circuit 30.
Fig. 4 is a timing diagram of the multimedia signal transmission control system 120. As shown in fig. 4, the vertical back porch VBP and the vertical front porch VFP include a plurality of control periods (denoted as blank blocks) 410 and a plurality of data island periods (denoted as cross-hatched blocks) 420. The transmitting circuit 226 transmits the vertical synchronization signal Vsync, the horizontal synchronization signal Hsync, and the preamble to the receiving control circuit 30 during the control period 410. The transmitting circuit 226 also transmits the second hybrid data packet MPb to the receiving control circuit 30 during the data island period 420, i.e. transmits the hybrid information of the control signal CT, the audio signal AS and/or the auxiliary data signal AUX. The active video period AVP includes a plurality of video data periods (denoted as halftone dot blocks) 430. The transmitting circuit 226 transmits the first mixed data packet MPa to the receiving control circuit 30 in the video data period 430, i.e. transmits the mixing information of the control signal CT and the video signal VS.
In summary, the transmission control circuit 20 is configured to encapsulate the control signal CT and one or more of the plurality of multimedia signals (e.g., the video signal VS) from the control module 110 into a first mixed data packet MPa and transmit the first mixed data packet MPa during the active video period AVP of the video frame. Further, as shown in fig. 3, the emission control circuit 20 transmits the first mixed data packet MPa when the data enable signal DEN provides a pulse. The transmission control circuit 20 is further configured to encapsulate the control signal CT and another one or more multimedia signals (such AS the audio signal AS or the auxiliary data signal AUX) from the control module 110 into a second mixed data packet MPb and transmit the second mixed data packet MPb at the vertical trailing edge VBP and the vertical leading edge VFP of the video frame.
In some embodiments, the transmission control circuit 20 may package the first mixed data packet MPa and the second mixed data packet MPb according to a customized packet format. The customized packet format is a header (header) that is customized for the first hybrid data packet MPa and the second hybrid data packet MPb. The custom header is different from the headers of the packets in the default format (e.g., video packets, audio packets, and auxiliary data packets) defined by the specification of the multimedia signaling control system 120.
Referring to fig. 2 again, the receiving control circuit 30 includes a receiving interface circuit 310 and a signal combining circuit 320. The receive interface circuit 310 includes a receive circuit 312, a first data de-packetizer 314, and a second data de-packetizer 316. The receiving circuit 312 is used for data communication with the transmitting circuit 226, and the receiving circuit 312 has a decoding function (e.g., a decoding function corresponding to the encoding format of the transmitting circuit 226) for decoding and providing the received first hybrid data packet MPa and the second hybrid data packet MPb to the first data de-packetizer 314 and the second data de-packetizer 316, respectively. The first data de-packetizer 314 is used for de-packetizing the first hybrid data packet MPa to regenerate the video signal VS at the receiving end and to generate the first input signal INa including part of the information of the control signal CT. The second data unpacker 316 is used for unpacking the second hybrid data packet MPb to regenerate the audio signal AS and/or the auxiliary data signal AUX at the receiving end, and to generate the second input signal INb including another part of the information of the control signal CT. In addition, the receiving circuit 312 is also used for decoding and restoring the vertical synchronization signal Vsync, the horizontal synchronization signal Hsync, the data enable signal DEN, and the pixel clock signal CLK at the receiving end, and providing these signals to the display module 130.
Referring to fig. 2, fig. 3 and fig. 4, the signal combination circuit 320 is configured to receive the first input signal INa and the second input signal INb through a first input terminal and a second input terminal thereof, respectively. During the active video period AVP, the signal combination circuit 320 provides the first input signal INa as the regenerated control signal CT to the display module 130. Further, the receiving control circuit 30 generates the control signal CT according to the information in the first mixed data packet MPa when the data enable signal DEN provides the pulse. The signal combination circuit 320 provides the second input signal INb as the regenerated control signal CT to the display module 130 at the vertical back porch VBP and the vertical front porch VFP.
Fig. 5 is a simplified functional block diagram of a signal distribution circuit 210 according to an embodiment of the present invention. The signal distribution circuit 210 includes a demultiplexer 510 and a transmission counter circuit 520. The demultiplexer 510 is configured to receive the control signal CT and is coupled to the first output terminal and the second output terminal of the signal distribution circuit 210. The emission counter circuit 520 is used for receiving one or more of the vertical synchronization signal Vsync, the horizontal synchronization signal Hsync, the data enable signal DEN, and the pixel clock signal CLK, for example, the vertical synchronization signal Vsync and the data enable signal DEN, to determine whether the emission control circuit 20 is operating on the vertical back porch VBP, the vertical front porch VFP, or the active video period AVP. The emission counter circuit 520 is used to control the demultiplexer 510 to distribute the control signal CT to one of the first output terminal and the second output terminal of the signal distribution circuit 210. That is, during the active video period AVP, the emission counter circuit 520 controls the demultiplexer 510 to distribute the control signal CT to the first output terminal, and during the vertical trailing edge VBP and the vertical leading edge VFP, the emission counter circuit 520 controls the demultiplexer 510 to distribute the control signal CT to the second output terminal.
Fig. 6 is a simplified functional block diagram of a signal combination circuit 320 according to an embodiment of the present invention. The signal combining circuit 320 includes a multiplexer 610 and a receive counter circuit 620. The multiplexer 610 is coupled to the first input terminal and the second input terminal of the signal combining circuit 320, and is configured to receive the first input signal INa and the second input signal INb. The receive counter circuit 620 is used for receiving one or more of the vertical synchronization signal Vsync, the horizontal synchronization signal Hsync, the data enable signal DEN, and the pixel clock signal CLK, for example, the vertical synchronization signal Vsync and the data enable signal DEN, to determine whether the receive control circuit 30 is operating on the vertical back porch VBP, the vertical front porch VFP, or the active video period AVP. The receiving counter circuit 620 is used for controlling the multiplexer 610 to use one of the first input signal INa and the second input signal INb as the control signal CT provided to the display module 130. That is, during the active video period AVP, the receiving counter circuit 620 controls the multiplexer 610 to use the first input signal INa as the control signal CT, and during the vertical trailing edge VBP and the vertical leading edge VFP, the receiving counter circuit 620 controls the multiplexer 610 to use the second input signal INb as the control signal CT.
Fig. 7 is a simplified functional block diagram of the display module 130 according to an embodiment of the present invention. The display module 130 includes a pixel matrix 710, a backlight controller 720, a backlight module 730, a timing controller 740, a scan driver 750, a data driver 760, a plurality of gate lines GL and a plurality of source lines SL. The backlight controller 720 is configured to receive the control signal CT and operate the backlight module 730 according to the control signal CT. The gate lines GL and the source lines SL are coupled to the scan driver 750 and the data driver 760, respectively, and the pixels in the pixel matrix 710 correspond to intersections of the gate lines GL and the source lines SL, respectively. The timing controller 740 is used for receiving a vertical synchronization signal Vsync, a horizontal synchronization signal Hsync, a data enable signal DEN, a pixel clock signal CLK, and a video signal VS. The timing controller 740 is configured to generate a plurality of operating frequencies according to the received signals to drive the scan driver 750 and the data driver 760, and generate display data to the data driver 760 to determine gray scales of the pixels. The operation of the scan driver 750 and the data driver 760 is known to those skilled in the art and will not be described herein.
In some embodiments, the display module 130 includes a speaker circuit (not shown). The speaker circuit is arranged to receive the audio signal AS and the auxiliary data signal AUX AS shown in fig. 2. The speaker circuit can reconstruct the sound frequency according to the auxiliary data signal AUX to play the sound information in the audio signal AS. In other embodiments, the display module 130 does not include speaker circuitry, and the display module 130 may not receive the audio signal AS and the auxiliary data signal AUX.
Referring to fig. 3, 4 and 7, in some embodiments, the pixel matrix 710 illustrated in fig. 7 has a resolution of MxN, i.e., each gate line GL is coupled to M pixels, and each source line SL is coupled to N pixels, where M and N are positive integers. For convenience of description, the number of pixels coupled to the gate line GL is referred to as the lateral resolution of the display module 130. In some embodiments, a width of one pulse of the data enable signal DEN corresponds to a lateral resolution of the display module 130, i.e., is substantially equal to a width of M pulses of the pixel clock signal CLK.
In the embodiments of fig. 3 and 4, the width of one pulse of the data enable signal DEN is greater than the lateral resolution of the display module 130 shown in fig. 7. The width of one pulse of the data enable signal DEN is substantially equal to the width of K pulses of the pixel clock signal CLK, where K is positive and K is greater than M. The user can customize the value of K to extend the time for transmitting the column data by the predetermined time length PP as shown in fig. 4, thereby increasing the continuous bandwidth of AVP during active video.
In summary, the multimedia signal transmission control system 120 can transmit a plurality of different signals through a single transmission interface, which is helpful to simplify the connector types of the multimedia playing system 100 and reduce the number of transmission lines, so that the multimedia playing system 100 can easily realize a light and thin design.
In addition, the multimedia signal transmission control system 120 mixes the information of the control signal CT with the information of other signals, and thus can transmit the information of the control signal CT throughout the entire image frame. Thus, the multimedia signal transmission control system 120 can provide sufficient continuous bandwidth even though data communication is performed through only a single transmission interface.
Certain terms are used throughout the description and following claims to refer to particular components. However, it will be understood by those skilled in the art that the same elements may be referred to by different names. The description and claims do not intend to distinguish between components that differ in name but not function. In the description and claims, the terms "include" and "comprise" are used in an open-ended fashion, and thus should be interpreted to mean "include, but not limited to. Further, "coupled" herein includes any direct and indirect connection. Therefore, if the first element is coupled to the second element, it means that the first element can be directly connected to the second element through electrical connection or signal connection such as wireless transmission, optical transmission, etc., or indirectly connected to the second element through other elements or connection means.
As used herein, the description of "and/or" includes any combination of one or more of the items listed. In addition, any singular term includes the plural reference unless the specification specifically states otherwise.
The above are only preferred embodiments of the present invention, and all equivalent changes and modifications made in the claims of the present invention should be covered by the present invention.
Claims (10)
1. A multimedia signal transmission control system, comprising:
a transmission control circuit for encapsulating a control signal and one or more of a plurality of multimedia signals into a plurality of first hybrid data packets during an active video period (active video period) of a video frame, and for encapsulating the control signal and another one or more of the plurality of multimedia signals into a plurality of second hybrid data packets at a vertical front edge (vertical front point) and a vertical back edge (vertical back point) of the video frame; and
a receive control circuit, coupled to the transmit control circuit, for receiving the first mixed data packets during the active video period and for receiving the second mixed data packets at the vertical leading edge and the vertical trailing edge, wherein the receive control circuit is configured to unpack the first mixed data packets and the second mixed data packets to provide the control signal and the multimedia signals to a display module.
2. The multimedia signal transmission control system of claim 1, wherein the transmission control circuit comprises:
a signal distribution circuit, comprising a first output terminal and a second output terminal, for receiving the control signal, wherein during the active video period, the signal distribution circuit outputs the control signal through the first output terminal, and during the vertical leading edge and the vertical trailing edge, the signal distribution circuit outputs the control signal through the second output terminal; and
a transmit interface circuit coupled to the first output port, the second output port, and the receive control circuit, wherein the transmit interface circuit is configured to generate the first mixed data packets according to the signal received from the first output port and the one or more of the multimedia signals, and is configured to generate the second mixed data packets according to the signal received from the second output port and the another one or more of the multimedia signals.
3. The system according to claim 1, wherein the transmission control circuit is configured to provide a pixel clock signal to the display module via the reception control circuit, each pulse of the pixel clock signal being configured to control the display module to update a corresponding one of the pixels of the display module;
the emission control circuit is used for receiving a data enabling signal, transmitting the plurality of first mixed data packets by the emission control circuit when the data enabling signal provides a pulse wave, and controlling the display module to update a row of pixels corresponding to the display module by the pulse wave of the data enabling signal;
the width of the pulse wave of the data enabling signal corresponds to the width of K pulse waves of the pixel frequency signal, K is positive number and is greater than the transverse resolution of a pixel matrix of the display module.
4. The multimedia signal transmission control system according to claim 1, wherein the reception control circuit comprises:
a signal combining circuit including a first input terminal and a second input terminal; and
a receive interface circuit, coupled to the transmit control circuit, the first input terminal and the second input terminal, for unpacking the first and second mixed data packets to generate a first input signal and a second input signal, respectively, and for providing the first and second input signals to the first and second input terminals, respectively;
wherein during the active video, the signal combining circuit takes the first input signal as the control signal provided to the display module, and the signal combining circuit takes the second input signal as the control signal provided to the display module at the vertical leading edge and the vertical trailing edge.
5. A transmission control circuit adapted for use in a multimedia signal transmission control system, the transmission control circuit being configured to encapsulate a control signal and one or more of a plurality of multimedia signals into a plurality of first hybrid data packets during an active video of a video frame, and to encapsulate the control signal and another one or more of the plurality of multimedia signals into a plurality of second hybrid data packets at a vertical leading edge and a vertical trailing edge of the video frame;
when the transmission control circuit is coupled to a reception control circuit, the reception control circuit receives the first mixed data packets during the active video period and receives the second mixed data packets at the vertical leading edge and the vertical trailing edge, and the reception control circuit unpacks the first mixed data packets and the second mixed data packets so that the transmission control circuit provides the control signal and the multimedia signals to a display module through the reception control circuit.
6. The transmit control circuit of claim 5, wherein the transmit control circuit comprises:
a signal distribution circuit, comprising a first output terminal and a second output terminal, for receiving the control signal, wherein during the active video period, the signal distribution circuit outputs the control signal through the first output terminal, and during the vertical leading edge and the vertical trailing edge, the signal distribution circuit outputs the control signal through the second output terminal; and
a transmit interface circuit coupled to the first output port, the second output port, and the receive control circuit, wherein the transmit interface circuit is configured to generate the first mixed data packets according to the signal received from the first output port and the one or more of the multimedia signals, and is configured to generate the second mixed data packets according to the signal received from the second output port and the another one or more of the multimedia signals.
7. The emission control circuit of claim 5, wherein the emission control circuit is configured to provide a pixel clock signal to the display module via the reception control circuit, each pulse of the pixel clock signal being configured to control the display module to update a corresponding one of the pixels of the display module;
the emission control circuit is used for receiving a data enabling signal, transmitting the plurality of first mixed data packets by the emission control circuit when the data enabling signal provides a pulse wave, and controlling the display module to update a row of pixels corresponding to the display module by the pulse wave of the data enabling signal;
the width of the pulse wave of the data enabling signal corresponds to the width of K pulse waves of the pixel frequency signal, K is positive number and is greater than the transverse resolution of a pixel matrix of the display module.
8. A receive control circuit adapted for use in a multimedia signal transmission control system, the receive control circuit being adapted to be coupled to a transmit control circuit, the transmit control circuit being adapted to encapsulate a control signal and one or more of a plurality of multimedia signals into a plurality of first hybrid data packets during an active video of a video frame, and to encapsulate the control signal and another one or more of the plurality of multimedia signals into a plurality of second hybrid data packets at a vertical leading edge and a vertical trailing edge of the video frame;
the receiving control circuit is configured to receive the first mixed data packets during the active video period and receive the second mixed data packets at the vertical leading edge and the vertical trailing edge, wherein the receiving control circuit is configured to unpack the first mixed data packets and the second mixed data packets to provide the control signal and the multimedia signals to a display module.
9. The receive control circuit of claim 8, wherein the receive control circuit comprises:
a signal combining circuit including a first input terminal and a second input terminal; and
a receive interface circuit, coupled to the transmit control circuit, the first input terminal and the second input terminal, for unpacking the first and second mixed data packets to generate a first input signal and a second input signal, respectively, and for providing the first and second input signals to the first and second input terminals, respectively;
wherein during the active video, the signal combining circuit takes the first input signal as the control signal provided to the display module, and the signal combining circuit takes the second input signal as the control signal provided to the display module at the vertical leading edge and the vertical trailing edge.
10. The receive control circuit of claim 8, wherein the receive control circuit receives a pixel clock signal from the transmit control circuit and provides the pixel clock signal to the display module, each pulse of the pixel clock signal being used to control the display module to update a corresponding one of the pixels of the display module;
the receiving control circuit is used for receiving a data enabling signal, when the data enabling signal provides a pulse wave, the receiving control circuit generates the control signal according to information in the plurality of first mixed data packets, and each pulse wave of the data enabling signal is used for controlling the display module to update a row of pixels corresponding to the display module;
the width of the pulse wave of the data enabling signal corresponds to the width of K pulse waves of the pixel frequency signal, K is positive number and is greater than the transverse resolution of a pixel matrix of the display module.
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| TWI774434B (en) | 2022-08-11 |
| TW202213998A (en) | 2022-04-01 |
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