CN114257077B - Totem pole PFC hysteresis current control circuit and equipment - Google Patents

Totem pole PFC hysteresis current control circuit and equipment Download PDF

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Publication number
CN114257077B
CN114257077B CN202111513915.9A CN202111513915A CN114257077B CN 114257077 B CN114257077 B CN 114257077B CN 202111513915 A CN202111513915 A CN 202111513915A CN 114257077 B CN114257077 B CN 114257077B
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input
power switch
output end
resistor
totem pole
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CN114257077A (en
Inventor
焦伟
吴双
陈忠华
严伟
高煜寒
江友华
杨喜军
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Shanghai Jiaotong University
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Shanghai Jiaotong University
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    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00—Details of apparatus for conversion
    • H02M1/42—Circuits or arrangements for compensating for or adjusting power factor in converters or inverters
    • H02M1/4208—Arrangements for improving power factor of AC input
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00—Details of apparatus for conversion
    • H02M1/32—Means for protecting converters other than automatic disconnection
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00—Details of apparatus for conversion
    • H02M1/42—Circuits or arrangements for compensating for or adjusting power factor in converters or inverters
    • H02M1/4208—Arrangements for improving power factor of AC input
    • H02M1/4233—Arrangements for improving power factor of AC input using a bridge converter comprising active switches
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02B—CLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS
    • Y02B70/00—Technologies for an efficient end-user side electric power management and consumption
    • Y02B70/10—Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Dc-Dc Converters (AREA)
  • Rectifiers (AREA)

Abstract

The invention discloses a totem pole PFC hysteresis current control circuit and equipment, comprising: a power circuit module and a control circuit module; the power circuit module includes: an alternating current power supply, an input voltage signal unit and a totem pole PFC circuit unit; the input voltage signal unit includes: the first output end and the second output end form an input voltage output end; the totem pole PFC circuit unit comprises: the device comprises an alternating current transformer, an inductor, a first power switch, a second power switch, a third power switch, a fourth power switch, a first resistor unit and a second resistor unit; the control circuit module includes: the device comprises an input filter, a voltage outer loop control unit, a reference multiplier, a comparator, an RS trigger, a chip selector, a phase-locked loop circuit unit and an inverter. According to the invention, by designing the hysteresis current inner loop control with the hysteresis width adjustable along with the current amplitude, the power factor is high, and the control is simple and easy.

Description

Totem pole PFC hysteresis current control circuit and equipment
Technical Field
The invention relates to the technical field of power electronics, in particular to a totem pole PFC hysteresis current control circuit and equipment.
Background
For a power electronic converter powered by single-phase alternating voltage, an active Power Factor Correction (PFC) technology or a single-phase Active Power Filtering (APF) technology is required to be adopted, so that network side harmonic current is restrained, network side power factor is improved, and IEC61000-3-2 and IEC6100-3-12 harmonic current restraining labels are satisfied. The power circuit comprises two bridge arms, one is a GaN FET or IGBT bridge arm switched at high frequency, the other is a SiC FET or diode bridge arm switched at power frequency, and the control circuit comprises an analog control circuit or a digital control circuit. The totem pole PFC is an active power factor correction circuit, and as with other PFC circuits, output capacitor voltage control can adopt a PI controller, a transconductance type single-zero monopole controller and the like, and inductor current control can adopt follow control, single-period control, hysteresis control and the like. Due to the limitation of the power switching technology, totem pole PFC has the advantages of late development, less application of hysteresis current control, no specific design circuit or program structure which is explicitly disclosed, and no hysteresis current control strategy which has variable hysteresis width and can inhibit the excessive switching frequency.
Disclosure of Invention
Aiming at the problems in the prior art, the invention provides a totem pole PFC hysteresis current control circuit and equipment, which are used for solving the problems that in the prior art, hysteresis width is variable and hysteresis current control for inhibiting the too high switching frequency is not performed.
In order to solve the technical problems, the invention is realized by the following technical scheme:
according to a first aspect of the present invention, there is provided a totem pole PFC hysteretic current control circuit comprising: a power circuit module and a control circuit module; wherein,,
the power circuit module includes: an alternating current power supply, an input voltage signal unit and a totem pole PFC circuit unit;
the input voltage signal unit includes: the first output end and the second output end form an input voltage output end;
the totem pole PFC circuit unit comprises: the current transformer, the inductor, the first power switch, the second power switch, the third power switch, the fourth power switch, the first resistance unit and the second resistance unit;
the source electrode of the first power switch is connected with the drain electrode of the second power switch;
the source electrode of the third power switch is connected with the drain electrode of the fourth power switch;
the input end of the current transformer is connected with the live wire of the alternating current power supply, the output end of the current transformer is connected with the first end of the inductor, and the second end of the inductor is connected with a node between the source electrode of the first power switch and the drain electrode of the second power switch;
a node between the source electrode of the third power switch and the drain electrode of the fourth power switch is connected with a zero line of the alternating current power supply;
the drain electrode of the first power switch is connected with the drain electrode of the third power switch, the source electrode of the second power switch is grounded, and the source electrode of the fourth power switch is grounded;
the first end of the first resistor unit is connected with a node between the drain electrode of the first power switch and the drain electrode of the third power switch, the second end of the first resistor unit is connected with the first end of the second resistor unit, and the second end of the second resistor unit is grounded;
the first end and the second end of the second resistor unit form an output voltage output end;
the control circuit module includes: the device comprises an input filter, a voltage outer loop control unit, a reference multiplier, a comparator, an RS trigger, a chip selector, a phase-locked loop circuit unit and an inverter;
the input end of the input filter is connected with the input voltage output end of the totem pole PFC circuit unit, and the output end of the input filter is connected with the first input end of the reference multiplier;
the input end of the voltage outer loop control unit is connected with the output voltage output end of the totem pole PFC circuit unit, and the output end of the voltage outer loop control unit is connected with the second input end of the reference multiplier;
the output end of the reference multiplier is connected with the input end of the multiplier, and the output end of the multiplier is connected with the first input end of the comparator;
the second input end of the comparator is connected with the output end of the current sensor;
the output end of the comparator is connected with the RS trigger, the output end of the RS trigger is connected with the input end of the chip selector, the chip selector end of the chip selector is connected with the output end of the phase-locked loop circuit unit, and the output end of the chip selector outputs the driving signal of the first power switch and the driving signal of the second power switch;
the input end of the phase-locked loop circuit unit is connected with the output end of the input filter, and the output end of the phase-locked loop circuit unit outputs the driving signal of the fourth power switch;
the input end of the inverter is connected with the output end of the phase-locked loop circuit unit, and the output end of the inverter outputs the driving signal of the third power switch.
Preferably, the voltage outer loop control unit includes: an output filter, a subtracter and a PI regulator; wherein,,
the input end of the output filter is connected with the output voltage end of the totem pole PFC circuit unit, the output end of the output filter is connected with the input end of the subtracter, the output end of the subtracter is connected with the input end of the PI regulator, and the output end of the PI regulator is connected with the second input end of the reference multiplier.
Preferably, the multiplier includes: an upper limit multiplier and a lower limit multiplier, the comparator includes: an upper limit comparator and a lower limit comparator; wherein,,
the input end of the upper limit multiplier and the input end of the lower limit multiplier are respectively connected with the output end of the reference multiplier;
the output end of the upper limit multiplier is connected with the first input end of the upper limit comparator, the second input end of the upper limit comparator is connected with the output end of the current sensor, and the output end of the upper limit comparator is connected with the first input end of the RS trigger;
the output end of the lower limit multiplier is connected with the first input end of the lower limit comparator, the second input end of the lower limit comparator is connected with the output end of the current sensor, and the output end of the lower limit comparator is connected with the second input end of the RS trigger.
Preferably, the upper limit comparator includes: a first upper limit comparator and a second upper limit comparator;
the lower limit comparator includes: a first lower limit comparator and a second lower limit comparator;
the RS flip-flop includes: the first RS trigger and the second RS trigger;
the chip selector includes: the first chip selector and the second chip selector; wherein,,
the first input end of the first upper limit comparator and the first input end of the second lower limit comparator are respectively connected with the output end of the upper limit multiplier, and the second input end of the first upper limit comparator and the second input end of the second lower limit comparator are respectively connected with the output end of the current sensor;
the first input end of the first lower limit comparator and the first input end of the second upper limit comparator are respectively connected with the output end of the lower limit multiplier, and the second input end of the first lower limit comparator and the second input end of the second upper limit comparator are respectively connected with the output end of the current sensor;
the output end of the first upper limit comparator is connected with the first input end of the first RS trigger, the output end of the first lower limit comparator is connected with the second input end of the first RS trigger, the output end of the first RS trigger is connected with the input end of the first chip selector, and the output end of the first chip selector outputs a driving signal of the first power switch and a driving signal of the second power switch;
the output end of the second upper limit comparator is connected with the first input end of the second RS trigger, the output end of the second lower limit comparator is connected with the second input end of the second RS trigger, the output end of the second RS trigger is connected with the input end of the second chip selector, and the output end of the second chip selector outputs a driving signal of the first power switch and a driving signal of the second power switch.
Preferably, the input voltage signal unit includes: a first input resistor, a second input resistor, a third input resistor, a fourth input resistor, a first diode, and a second diode;
the first end of the first input resistor is connected with the zero line of the alternating current power supply, the second end of the first input resistor is connected with the first end of the second input resistor, and the second end of the second input resistor is grounded;
the first end of the third input resistor is connected with the live wire of the alternating current power supply, the second end of the third input resistor is connected with the first end of the fourth input resistor, and the second end of the fourth input resistor is grounded;
the first end of the first diode is connected with the second end of the first input resistor and the first end of the second input resistor;
the second end of the first diode is connected with the second end of the third input resistor and the first end of the fourth input resistor to form a first input voltage output end;
the first end of the second diode is connected with the first end of the first diode and the first end of the second input resistor to form a second input voltage output end;
the second end of the second diode is connected with the second end of the first diode and the first end of the fourth input resistor.
Preferably, the totem pole PFC circuit unit further includes: and the second end of the first capacitor is connected with a node between the source electrode of the third power switch and the drain electrode of the fourth power switch.
Preferably, the totem pole PFC circuit unit further includes: and the first end of the second capacitor is connected with a node between the drain electrode of the first power switch and the drain electrode of the third power switch, and the second end of the second capacitor is grounded.
Preferably, the first resistance unit includes: a plurality of resistors connected in series; and/or the number of the groups of groups,
the second resistance unit includes: a plurality of resistors connected in series. The voltage withstand capability of the circuit can be improved by adopting a plurality of resistors connected in series, the circuit is prevented from being burnt, and the service life of the circuit is prolonged.
Preferably, the first power switch and the second power switch are GaN FETs, and the third power switch and the fourth power switch are SiC FETs.
According to a second aspect of the present invention, there is provided a totem pole PFC hysteretic current control device comprising: the totem pole PFC hysteresis current control circuit is as described above.
Compared with the prior art, the invention has the following advantages:
according to the totem pole PFC hysteresis current control circuit and the totem pole PFC hysteresis current control device, sinusoidal input current is obtained by designing the hysteresis current inner loop control with the hysteresis width being adjustable along with the change of current amplitude, and the totem pole PFC hysteresis current control circuit and the totem pole PFC hysteresis current control device have the advantages of being high in power factor and simple and feasible to control.
Drawings
Embodiments of the present invention are further described below with reference to the accompanying drawings:
FIG. 1 is a schematic diagram of a totem pole PC hysteresis current control circuit according to an embodiment of the present invention;
FIG. 2 is a schematic diagram of an inductance hysteresis current waveform according to an embodiment of the present invention;
fig. 3 is a schematic diagram of waveforms of driving signals of four power switches according to an embodiment of the present invention.
Reference numerals illustrate:
a 1-power circuit, which is provided with a power supply,
2-a control circuit;
a U1-input filter, which is provided with a filter,
a U2-output filter, which is provided with a filter,
a U3-phase locked loop circuit unit,
a U4-phase inverter, which is provided with a first output voltage,
a U5-subtracter for the digital signal processing,
a U6-PI regulator, which is provided with a control circuit,
a U7-reference multiplier which,
a U8-upper limit multiplier, which,
a U9-lower limit multiplier, which,
u10-a first upper limit comparator,
u11-a first lower limit comparator,
u12-a second upper limit comparator,
u13-a second lower limit comparator,
u14-a first RS flip-flop,
a U15-a second RS trigger, which is provided with a first signal generator,
u16-the first selector,
u17-second chip selector.
Detailed Description
The following describes in detail the examples of the present invention, which are implemented on the premise of the technical solution of the present invention, and detailed embodiments and specific operation procedures are given, but the scope of protection of the present invention is not limited to the following examples.
The terms "first," "second," "third," "fourth" and the like in the description and in the claims and in the above drawings, if any, are used for distinguishing between similar objects and not necessarily for describing a particular sequential or chronological order. It is to be understood that the data so used may be interchanged where appropriate such that the embodiments of the invention described herein may be implemented in sequences other than those illustrated or otherwise described herein. Furthermore, the terms "comprises," "comprising," and "having," and any variations thereof, are intended to cover a non-exclusive inclusion, such that a process, method, system, article, or apparatus that comprises a list of steps or elements is not necessarily limited to those steps or elements expressly listed but may include other steps or elements not expressly listed or inherent to such process, method, article, or apparatus.
In one embodiment, a totem pole PFC hysteresis current control circuit is provided, comprising: please refer to fig. 1 for the power circuit module 1 and the control circuit module 2. Wherein the power circuit module 1 comprises: AC power supply u i The input voltage signal unit and the totem pole PFC circuit unit. The input voltage signal unit includes: a first output end, a secondAn output end, a first output end and a second output end form an input voltage output end for outputting u i1 . The totem pole PFC circuit unit comprises: the current transformer o, the inductor L1, the first power switch S1, the second power switch S2, the third power switch S3, the fourth power switch S4, the first resistor unit and the second resistor unit. The source electrode of the first power switch S1 is connected with the drain electrode of the second power switch S2; the source of the third power switch S3 is connected to the drain of the fourth power switch S4. Input end connection u of current transformer o i The output end of the current transformer o is connected with the first end of the inductor L1, and the second end of the inductor L1 is connected with a node between the source electrode of the first power switch S1 and the drain electrode of the second power switch S2. The node between the source of the third power switch S3 and the drain of the fourth power switch S4 is connected with an alternating current power supply u i Is not shown in the drawing). The drain electrode of the first power switch S1 is connected with the drain electrode of the third power switch S3, the source electrode of the second power switch S2 is grounded, and the source electrode of the fourth power switch S4 is grounded. The first end of the first resistor unit is connected with a node between the drain electrode of the first power switch S1 and the drain electrode of the third power switch S3, the second end of the first resistor unit is connected with the first end of the second resistor unit, and the second end of the second resistor unit is grounded. The first end and the second end of the second resistor unit form an output voltage output end for outputting u 01 . The control circuit module 2 includes: the device comprises an input filter U1, a voltage outer loop control unit, a reference multiplier U7, a multiplier, a comparator, an RS trigger, a chip selector, a phase-locked loop circuit unit U3 and an inverter U4. The input end of the input filter U1 is connected with the input voltage output end of the totem pole PFC circuit unit, and the output end of the input filter U1 is connected with the first input end of the reference multiplier U7. The input end of the voltage outer loop control unit is connected with the output voltage output end of the totem pole PFC circuit unit, and the output end of the voltage outer loop control unit is connected with the second input end of the reference multiplier U7. The output end of the reference multiplier U7 is connected with the input end of the multiplier, and the output end of the multiplier is connected with the first input end of the comparator; the second input of the comparator is connected to the first end of the inductance L1. The output end of the comparator is connected with the RS trigger, the output end of the RS trigger is connected with the input end of the chip selector, and the chip of the chip selectorThe selection end is connected with the output end of the phase-locked loop circuit unit U3, and the output end of the chip selector outputs a driving signal PS1 of the first power switch S1 and a driving signal PS2 of the second power switch. The input end of the phase-locked loop circuit unit U3 is connected to the output end of the input filter U1, and the output end of the phase-locked loop circuit unit U3 outputs the driving signal PS4 of the fourth power switch S4. The input end of the inverter U4 is connected to the output end of the phase-locked loop circuit unit U3, and the output end of the inverter U4 outputs the driving signal PS3 of the third power switch S3.
In one embodiment, the voltage outer loop control unit includes: output filter U2, subtractor U5, and PI regulator U6, please refer to fig. 1. The input end of the output filter U2 is connected with the output voltage end of the totem pole PFC circuit unit, the output end of the output filter U2 is connected with the input end of the subtracter U3, the output end of the subtracter U3 is connected with the input end of the PI regulator U4, and the output end of the PI regulator U4 is connected with the second input end of the reference multiplier U7.
In one embodiment, the multiplier comprises: an upper limit multiplier U8 and a lower limit multiplier U10, and the comparator includes: the upper limit comparator and the lower limit comparator refer to fig. 1. The input end of the upper limit multiplier U8 and the input end of the lower limit multiplier U10 are respectively connected with the output end of the reference multiplier U7; the output end of the upper limit multiplier U8 is connected with the first input end of an upper limit comparator, the second input end of the upper limit comparator is connected with the current sensor output of the first end of the inductor L1, and the output end of the upper limit comparator is connected with the first input end of the RS trigger; the output end of the lower limit multiplier is connected with the first input end of the lower limit comparator, the second input end of the lower limit comparator is connected with the output end of the current sensor o, and the output end of the lower limit comparator is connected with the second input end of the RS trigger. The formula of the upper limit multiplier U8 is x (1+k%), and the formula of the lower limit multiplier U10 is x (1-k%). The upper hysteresis limit and the lower hysteresis limit of the control inductance current can be conveniently adjusted by adjusting the parameter k, and under the condition of certain input current, the k is larger when the instantaneous value of the network voltage is lower, and the k is larger when the instantaneous value of the network voltage is lower, so that the switching frequency is limited to be too high. Under the condition that the input current is increased, namely the load is increased, k is smaller, and the current ripple is prevented from being excessively large.
In one embodiment of the present invention,the upper limit comparator includes: a first upper limit comparator U9, a second upper limit comparator U14; the lower limit comparator includes: a first lower limit comparator U11, a second lower limit comparator U13; the RS flip-flop includes: a first RS flip-flop U12, a second RS flip-flop U15; the chip selector includes: please refer to fig. 1, which shows a first selector U16 and a second selector U17. The first input end (+input end) of the first upper limit comparator U9 and the first input end (+input end) of the second lower limit comparator U13 are respectively connected to the output end of the upper limit multiplier U8, and the second input end (-input end) of the first upper limit comparator U9 and the second input end (-input end) of the second lower limit comparator U13 are respectively connected to the output end of the current sensor o. The first input end (-input end) of the first lower limit comparator U11 and the first input end (-input end) of the second upper limit comparator U14 are respectively connected with the output end of the lower limit multiplier U10, and the second input end (+input end) of the first lower limit comparator U11 and the second input end (+input end) of the second upper limit comparator U14 are respectively connected with the output end of the current sensor o. The output end of the first upper limit comparator U9 is connected with the first input end (S end) of the first RS trigger U12, the output end of the first lower limit comparator U11 is connected with the second input end (R end) of the first RS trigger U12, the output end of the first RS trigger U12 is connected with the input end of the first selector U16, and the output end of the first selector U16 outputs a driving signal PS1 of the first power switch S1 and a driving signal PS2 of the second power switch S2. The output end of the second upper limit comparator U14 is connected with the first input end (R end) of the second RS trigger U15, the output end of the second lower limit comparator U13 is connected with the second input end (S end) of the second RS trigger U15, the output end of the second RS trigger U15 is connected with the input end of the second chip selector U17, and the output end of the second chip selector U17 outputs a driving signal PS1 of the first power switch S1 and a driving signal PS2 of the second power switch S2. The first and second selectors output PS1, PS2, the selector is selected when the CS terminal is high level, and the selector combines the input Q with the input QAnd the output of the other chip selector is not affected if the chip selector is in the high-resistance state. Because the alternating input current comprises positive half-cycle positive polarity and negative half-axis negative polarityIn this embodiment, in order to prevent the problem of the magnitude of the zero crossing of the input current, the absolute value of the input current is not obtained, but a direct comparison mode is adopted, so that two sets of upper limit comparators and lower limit comparators, and corresponding RS flip-flops and chip selectors are adopted, and finally, which RS flip-flop outputs the power switches S1 and S2 driving pulse is selected, and the polarity of the positive half cycle and the negative half cycle of the transmission voltage is determined as the chip selection signal CS. By adopting the scheme of the embodiment, the problem of unstable zero crossing of the input current is prevented, the method is simple and feasible, the concept is clear, and finally, the pulse which is finally needed is selected.
In one embodiment, the first resistor unit includes: a plurality of resistors connected in series in turn. Such as: two resistors R1, R2 in series may be included, see fig. 1. In different embodiments, more than two resistors connected in series in turn may be included, and of course, only one resistor may be included.
In an embodiment, the second resistor unit may include only one resistor R3, please refer to fig. 1. In different embodiments, two or more resistors connected in series in sequence may also be included.
In one embodiment, the power switches S1 and S2 are gallium nitride power switches (GaN FETs). The first GaN FET and the second GaN FET form a high-speed GaN bridge arm, so that the inductance current waveform can be improved.
In one embodiment, the power switches S3, S4 are silicon carbide power switches (SiC FETs). The first SiC FET and the second SiC FET form a power frequency SiC bridge arm, so that switching loss can be reduced.
In one embodiment, an input voltage signal unit includes: resistor R4, resistor R5, resistor R6, resistor R7, diode D1 and diode D2, please refer to fig. 1. One end of the resistor R4 is connected with the zero line N of the alternating current power supply, the other end of the resistor R4 is connected with one end of the resistor R5, and the other end of the resistor R5 is grounded. The node between the resistor R4 and the resistor R5 is also connected with one end of the diode D1; one end of the resistor R6 is connected with the live wire L of the alternating current power supply, the other end of the resistor R6 is connected with one end of the resistor R7, and the other end of the resistor R7 is grounded. The node between the resistor R6 and the resistor R7 is also connected with the other end of the diode D1; resistor R5 and second stageThe node between the tubes D1 is also connected with one end of a diode D2 to form a common point N1; the node between resistor R7 and diode D1 is also connected to the other end of diode D2, forming a common point P1. The common points N1 and P1 generate an input voltage signal u i1 The node of the resistor R5 connected with the diode D2 is also connected with one input end of the input voltage detection unit; the node of the resistor R6 connected to the diode D1 is also connected to the other input of the input voltage detection unit.
In an embodiment, the totem pole PFC circuit unit further includes: for the first capacitor C1, please refer to fig. 1. The first end of the first capacitor C1 is connected to the first end of the first inductor L1, and the second end of the first capacitor C2 is connected to a node between the source of the third power switch S3 and the drain of the fourth power switch S4.
In an embodiment, the totem pole PFC circuit unit further includes: please refer to fig. 2 for the second capacitor C2. The first end of the second capacitor C2 is connected to a node between the drain of the first power switch S1 and the drain of the third power switch S3, and the second end of the second capacitor C2 is grounded.
In one embodiment, the values of the symbols in the above embodiments are:
input voltage: 220Vac@50Hz;
output voltage: 385V;
output power: hundreds of watts to 3.3kW;
switching frequency: depending on the hysteresis width, the minimum is 85kHz and the maximum is 350kHz;
resistors R1, R2:1mΩ;
resistor R3:25.8kΩ;
resistors R4, R6:2x360kΩ;
resistors R5, R7:220 Ω;
diodes D1 to D2:1N4148;
capacitance C1:1.0 μF;
capacitance C2:3x470 μF;
inductance L1:250 muH;
GaN FET S1、S2：25A@85℃，650V；
SiC FET S3、S4：25A@85℃，650V。
in an embodiment, a totem pole PFC hysteresis current control device is further provided, which includes the totem pole PFC hysteresis current control circuit described in any one of the embodiments above.
Fig. 2 is a schematic diagram of an inductance hysteresis current waveform according to an embodiment of the present invention, which shows a positional relationship between an input voltage and an input current, an input current hysteresis control effect, an outer broken line represents a positive half-cycle upper limit and a negative half-cycle lower limit, and an inner broken line represents a positive half-cycle lower limit and a negative half-cycle upper limit. The input current ripple reflects the hysteresis current control effect, the ripple near the peak value of the network voltage is larger, the switching frequency is lower, the ripple near the zero value of the network voltage is smaller, and the switching frequency is higher.
Fig. 3 is a schematic diagram of waveforms of driving signals of four power switches according to an embodiment of the present invention, where the power switch S3 is in an off state and the power switch S4 is in an on state in a positive half cycle of the input voltage, and the power switch S3 is in an on state and the power switch S4 is in an off state in a negative half cycle of the input voltage. In the positive and negative half cycles, S1 and S2 are in an on-off chopping state, but the switching states of the two are opposite or complementary. In general, S3 is opposite or complementary to the S4 switch state.
The existing totem pole PFC does not have a hysteresis current control strategy with variable hysteresis width and high suppression switching frequency. According to the totem pole PFC hysteresis current control circuit and the totem pole PFC hysteresis current control device, hysteresis control of the totem pole PFC circuit can be easily achieved through the hysteresis control unit, and the totem pole PFC hysteresis current control circuit and the totem pole PFC hysteresis current control device have the advantages that the hysteresis upper limit and the hysteresis can be adjusted along with input voltage waveforms and load light-weight changes, the power factor is high, and the control is simple and easy to implement.
In the description of the present specification, the descriptions of the terms "one embodiment," "an embodiment," "a particular implementation," "an example," and the like, mean that a particular feature, structure, material, or characteristic described in connection with the embodiment or example is included in at least one embodiment or example of the present invention. In this specification, schematic representations of the above terms do not necessarily refer to the same embodiments or examples. Furthermore, the particular features, structures, materials, or characteristics described may be combined in any suitable manner in any one or more embodiments or examples.
The embodiments disclosed herein were chosen and described in detail in order to best explain the principles of the invention and the practical application, and to thereby not limit the invention. Any modifications or variations within the scope of the description that would be apparent to a person skilled in the art are intended to be included within the scope of the invention.

Claims (10)

1. The totem pole PFC hysteresis current control circuit is characterized by comprising: a power circuit module and a control circuit module; wherein,,
the power circuit module includes: an alternating current power supply, an input voltage signal unit and a totem pole PFC circuit unit;
the input voltage signal unit includes: the first output end and the second output end form an input voltage output end;
the totem pole PFC circuit unit comprises: the current transformer, the inductor, the first power switch, the second power switch, the third power switch, the fourth power switch, the first resistance unit and the second resistance unit;
the source electrode of the first power switch is connected with the drain electrode of the second power switch;
the source electrode of the third power switch is connected with the drain electrode of the fourth power switch;
the input end of the current transformer is connected with the live wire of the alternating current power supply, the output end of the current transformer is connected with the first end of the inductor, and the second end of the inductor is connected with a node between the source electrode of the first power switch and the drain electrode of the second power switch;
a node between the source electrode of the third power switch and the drain electrode of the fourth power switch is connected with a zero line of the alternating current power supply;
the drain electrode of the first power switch is connected with the drain electrode of the third power switch, the source electrode of the second power switch is grounded, and the source electrode of the fourth power switch is grounded;
the first end of the first resistor unit is connected with a node between the drain electrode of the first power switch and the drain electrode of the third power switch, the second end of the first resistor unit is connected with the first end of the second resistor unit, and the second end of the second resistor unit is grounded;
the first end and the second end of the second resistor unit form an output voltage output end;
the control circuit module includes: the device comprises an input filter, a voltage outer loop control unit, a reference multiplier, a comparator, an RS trigger, a chip selector, a phase-locked loop circuit unit and an inverter;
the input end of the input filter is connected with the input voltage output end of the totem pole PFC circuit unit, and the output end of the input filter is connected with the first input end of the reference multiplier;
the input end of the voltage outer loop control unit is connected with the output voltage output end of the totem pole PFC circuit unit, and the output end of the voltage outer loop control unit is connected with the second input end of the reference multiplier;
the output end of the reference multiplier is connected with the input end of the multiplier, and the output end of the multiplier is connected with the first input end of the comparator;
the second input end of the comparator is connected with the first end of the inductor;
the output end of the comparator is connected with the RS trigger, the output end of the RS trigger is connected with the input end of the chip selector, the chip selector end of the chip selector is connected with the output end of the phase-locked loop circuit unit, and the output end of the chip selector outputs the driving signal of the first power switch and the driving signal of the second power switch;
the input end of the phase-locked loop circuit unit is connected with the output end of the input filter, and the output end of the phase-locked loop circuit unit outputs the driving signal of the fourth power switch;
the input end of the inverter is connected with the output end of the phase-locked loop circuit unit, and the output end of the inverter outputs the driving signal of the third power switch.
2. The totem pole PFC hysteretic current control circuit of claim 1, wherein the voltage outer loop control unit comprises: an output filter, a subtracter and a PI regulator; wherein,,
the input end of the output filter is connected with the output voltage end of the totem pole PFC circuit unit, the output end of the output filter is connected with the input end of the subtracter, the output end of the subtracter is connected with the input end of the PI regulator, and the output end of the PI regulator is connected with the second input end of the reference multiplier.
3. The totem pole PFC hysteretic current control circuit of claim 2, wherein the multiplier comprises: an upper limit multiplier and a lower limit multiplier, the comparator includes: an upper limit comparator and a lower limit comparator; wherein,,
the input end of the upper limit multiplier and the input end of the lower limit multiplier are respectively connected with the output end of the reference multiplier;
the output end of the upper limit multiplier is connected with the first input end of the upper limit comparator, the second input end of the upper limit comparator is connected with the first end of the inductor, and the output end of the upper limit comparator is connected with the first input end of the RS trigger;
the output end of the lower limit multiplier is connected with the first input end of the lower limit comparator, the second input end of the lower limit comparator is connected with the first end of the inductor, and the output end of the lower limit comparator is connected with the second input end of the RS trigger.
4. A totem pole PFC hysteretic current control circuit according to claim 3, wherein said upper limit comparator comprises: a first upper limit comparator and a second upper limit comparator;
the lower limit comparator includes: a first lower limit comparator and a second lower limit comparator;
the RS flip-flop includes: the first RS trigger and the second RS trigger;
the chip selector includes: the first chip selector and the second chip selector; wherein,,
the first input end of the first upper limit comparator and the first input end of the second lower limit comparator are respectively connected with the output end of the upper limit multiplier, and the second input end of the first upper limit comparator and the second input end of the second lower limit comparator are respectively connected with the output end of the current transformer;
the first input end of the first lower limit comparator and the first input end of the second upper limit comparator are respectively connected with the output end of the lower limit multiplier, and the second input end of the first lower limit comparator and the second input end of the second upper limit comparator are respectively connected with the output end of the current transformer;
the output end of the first upper limit comparator is connected with the first input end of the first RS trigger, the output end of the first lower limit comparator is connected with the second input end of the first RS trigger, the output end of the first RS trigger is connected with the input end of the first chip selector, and the output end of the first chip selector outputs a driving signal of the first power switch and a driving signal of the second power switch;
the output end of the second upper limit comparator is connected with the first input end of the second RS trigger, the output end of the second lower limit comparator is connected with the second input end of the second RS trigger, the output end of the second RS trigger is connected with the input end of the second chip selector, and the output end of the second chip selector outputs a driving signal of the first power switch and a driving signal of the second power switch.
5. A totem pole PFC hysteretic current control circuit according to any of claims 1-4, wherein the input voltage signal unit comprises: a first input resistor, a second input resistor, a third input resistor, a fourth input resistor, a first diode, and a second diode;
the first end of the first input resistor is connected with the zero line of the alternating current power supply, the second end of the first input resistor is connected with the first end of the second input resistor, and the second end of the second input resistor is grounded;
the first end of the third input resistor is connected with the live wire of the alternating current power supply, the second end of the third input resistor is connected with the first end of the fourth input resistor, and the second end of the fourth input resistor is grounded;
the first end of the first diode is connected with the second end of the first input resistor and the first end of the second input resistor;
the second end of the first diode is connected with the second end of the third input resistor and the first end of the fourth input resistor to form a first input voltage output end;
the first end of the second diode is connected with the first end of the first diode and the first end of the second input resistor to form a second input voltage output end;
the second end of the second diode is connected with the second end of the first diode and the first end of the fourth input resistor.
6. The totem pole PFC hysteretic current control circuit of any of claims 1-4, wherein the totem pole PFC circuit unit further comprises: and a first end of the first capacitor is connected with the output end of the current transformer, and a second end of the first capacitor is connected with a node between the source electrode of the third power switch and the drain electrode of the fourth power switch.
7. The totem pole PFC hysteretic current control circuit of claim 6, wherein the totem pole PFC circuit unit further comprises: and the first end of the second capacitor is connected with a node between the drain electrode of the first power switch and the drain electrode of the third power switch, and the second end of the second capacitor is grounded.
8. The totem pole PFC hysteretic current control circuit of claim 7, wherein the first resistive element comprises: a plurality of resistors connected in series; and/or the number of the groups of groups,
the second resistance unit includes: a plurality of resistors connected in series.
9. The totem pole PFC hysteretic current control circuit of claim 8, wherein the first power switch, the second power switch are ganfets;
the third power switch and the fourth power switch are SiC FETs.
10. A totem pole PFC hysteretic current control device comprising: a totem pole PFC hysteretic current control circuit as claimed in any one of claims 1 to 9.
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