CN114242000A - Display panel, driving method thereof and display device - Google Patents
Display panel, driving method thereof and display device Download PDFInfo
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- CN114242000A CN114242000A CN202111552479.6A CN202111552479A CN114242000A CN 114242000 A CN114242000 A CN 114242000A CN 202111552479 A CN202111552479 A CN 202111552479A CN 114242000 A CN114242000 A CN 114242000A
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
- G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
- G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
- G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
- G09G3/3225—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix
- G09G3/3233—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix with pixel circuitry controlling the current through the light-emitting element
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
- G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
- G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
- G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
- G09G3/3266—Details of drivers for scan electrodes
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2320/00—Control of display operating conditions
- G09G2320/02—Improving the quality of display appearance
- G09G2320/0233—Improving the luminance or brightness uniformity across the screen
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2320/00—Control of display operating conditions
- G09G2320/02—Improving the quality of display appearance
- G09G2320/0247—Flicker reduction other than flicker reduction circuits used for single beam cathode-ray tubes
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2320/00—Control of display operating conditions
- G09G2320/06—Adjustment of display parameters
- G09G2320/0626—Adjustment of display parameters for control of overall brightness
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- Engineering & Computer Science (AREA)
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- Control Of Indicators Other Than Cathode Ray Tubes (AREA)
- Control Of El Displays (AREA)
Abstract
The embodiment of the invention provides a display panel, a driving method thereof and a display device, relates to the technical field of display, and solves the problem of poor display caused by the difference of the occupation ratios of light emitting areas. The display panel includes: a first display region including a first light emitting element and an optical member region including a second light emitting element; a first pixel circuit connected to the first light emitting element and a second pixel circuit connected to the second light emitting element; a first light emission control signal line connected to the first pixel circuit and a second light emission control signal line connected to the second pixel circuit; the adjusting control circuit comprises a first control unit, a first input end is connected with a first signal end, at least two first control ends are connected with at least two first light-emitting control signal lines, and a first output end is connected with a second light-emitting control signal line; and transmitting the first signal to the second light emission control signal line in response to the first light emission enable signal of the at least two first light emission control signal lines, respectively, the first signal being a second light emission enable signal.
Description
[ technical field ] A method for producing a semiconductor device
The invention relates to the technical field of display, in particular to a display panel, a driving method thereof and a display device.
[ background of the invention ]
In a display panel with a high screen ratio, the light transmittance of a local display region is generally increased by reducing the ratio of a light emitting region in the local display region, for example, by reducing the pixel density of the local region or reducing the area of a light emitting point without changing the pixel density, and further, an optical component such as a camera is disposed below the screen of the local display region, so as to avoid the optical component occupying space in a frame region.
However, the difference in the ratio of light emitting areas between different display areas causes problems such as flickering of the screen, which adversely affects the display effect.
[ summary of the invention ]
In view of the above, embodiments of the present invention provide a display panel, a driving method thereof, and a display device, so as to solve the problem of poor display caused by the difference of the light emitting area ratios of different display areas.
In one aspect, an embodiment of the present invention provides a display panel, including:
a display area including a first light emitting element and an optical component area including a second light emitting element;
a pixel circuit including a first pixel circuit electrically connected to the first light emitting element and a second pixel circuit electrically connected to the second light emitting element;
a light emission control signal line including a plurality of first light emission control signal lines electrically connected to the first pixel circuit and a plurality of second light emission control signal lines electrically connected to the second pixel circuit;
the adjusting control circuit comprises a first control unit, the first control unit comprises a first input end, a first output end and at least two first control ends, the first input end of the first control unit is electrically connected with a first signal end, the at least two first control ends of the first control unit are electrically connected with at least two first light-emitting control signal lines in a one-to-one correspondence manner, and the first output end of the first control unit is electrically connected with the second light-emitting control signal line;
the first control unit is configured to transmit a first signal on the first signal terminal to the second light emission control signal line in response to a first light emission enable signal on at least two first light emission control signal lines, respectively, at least two different time periods, where the first signal is a second light emission enable signal of the second pixel circuit.
On the other hand, based on the same inventive concept, an embodiment of the present invention provides a driving method of a display panel, for driving the display panel, the driving method including:
the first control unit transmits a first signal on the first signal terminal to the second light emission control signal line in response to a first light emission enable signal on at least two first light emission control signal lines, respectively, at least two different periods, wherein the first signal is a second light emission enable signal of the second pixel circuit.
In another aspect, based on the same inventive concept, an embodiment of the present invention provides a display device, including the display panel.
In the embodiment of the present invention, by providing the adjustment control circuit, the duty ratio of the light emission control signal transmitted on the second light emission control signal line can be individually controlled by using the adjustment control circuit. Specifically, for at least two first light-emitting control signal lines electrically connected with the second light-emitting control signal line, when a first light-emitting enable signal is transmitted on any one of the light-emitting control signal lines, the adjusting control circuit can control the second light-emitting control signal line to transmit the second light-emitting enable signal, and compared with the first light-emitting control signal, the duty ratio of low level in the second light-emitting control signal is effectively increased, so that the light-emitting duration of the second light-emitting element is longer than that of the first light-emitting element in one driving period. Therefore, the display brightness of the optical component area is increased only by increasing the light emitting time of the second light emitting element, the driving current received by the second light emitting element in the optical component area does not need to be increased, the driving current received by the second light emitting element in the optical component area can be kept consistent with the driving current received by the first light emitting element in the first display area, the difference of peak brightness caused by the difference of the driving currents in the two areas is further avoided, and the risk of flicker or ripple defects between the two areas is effectively reduced.
In addition, in the embodiment of the invention, the duty ratio of the second light-emitting control signal is increased only by using the signals transmitted on the at least two first light-emitting control signal lines, and the display panel does not need to be additionally provided with a shift register for independently providing the second light-emitting control signal to the second light-emitting control signal line, so that the influence on the frame width is avoided, further, an additional shift register is not needed to be separately led to the second light-emitting control signal line in the optical component area through the first display area, and the influence on the aperture ratio of the pixels in the first display area is avoided.
[ description of the drawings ]
In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings needed to be used in the embodiments will be briefly described below, and it is obvious that the drawings in the following description are only some embodiments of the present invention, and it is obvious for those skilled in the art to obtain other drawings based on these drawings without creative efforts.
FIG. 1 is a schematic diagram of a display panel according to the related art;
FIG. 2 is a schematic diagram of a pixel circuit in the related art;
FIG. 3 is a timing diagram corresponding to FIG. 2;
FIG. 4 is a schematic diagram showing a comparison of drive currents received by light emitting elements in a conventional display region and an optical member region in the related art;
fig. 5 is a schematic structural diagram of a display panel according to an embodiment of the present invention;
FIG. 6 is a schematic diagram of a connection between a regulation control circuit and a light-emitting control signal line according to an embodiment of the present invention;
FIG. 7 is a schematic diagram of a regulation control circuit according to an embodiment of the present invention;
FIG. 8 is a schematic diagram illustrating a comparison of driving currents received by light emitting elements in an optical component region and a first display region according to an embodiment of the present invention;
FIG. 9 is a schematic diagram of another exemplary embodiment of a regulation control circuit;
FIG. 10 is a timing diagram corresponding to FIG. 9;
FIG. 11 is a schematic diagram of another exemplary embodiment of a regulation control circuit;
FIG. 12 is a schematic diagram illustrating a position of a first fixed-potential signal line according to an embodiment of the present invention;
fig. 13 is a schematic structural diagram of a pixel circuit according to an embodiment of the invention;
FIG. 14 is a timing diagram corresponding to FIG. 13;
fig. 15 is another connection diagram of the first signal terminal according to the embodiment of the invention;
FIG. 16 is a timing diagram of a signal provided by an embodiment of the present invention;
FIG. 17 is a schematic diagram illustrating a setting position of a regulation control circuit according to an embodiment of the present invention;
FIG. 18 is a flowchart of a driving method according to an embodiment of the present invention;
fig. 19 is a schematic structural diagram of a display device according to an embodiment of the invention.
[ detailed description ] embodiments
For better understanding of the technical solutions of the present invention, the following detailed descriptions of the embodiments of the present invention are provided with reference to the accompanying drawings.
It should be understood that the described embodiments are only some embodiments of the invention, and not all embodiments. It will be apparent to those skilled in the art that various modifications and variations can be made in the present invention without departing from the spirit or scope of the invention. Thus, it is intended that the present invention cover the modifications and variations of this invention provided they come within the scope of the appended claims and their equivalents. It should be noted that the embodiments provided in the embodiments of the present invention can be combined with each other without contradiction.
The terminology used in the embodiments of the invention is for the purpose of describing particular embodiments only and is not intended to be limiting of the invention. As used in the examples of the present invention and the appended claims, the singular forms "a," "an," and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise.
It should be understood that the term "and/or" as used herein is merely one type of association that describes an associated object, meaning that three relationships may exist, e.g., a and/or B may mean: a exists alone, A and B exist simultaneously, and B exists alone. In addition, the character "/" herein generally indicates that the former and latter related objects are in an "or" relationship.
Before describing the technical solutions provided by the embodiments of the present invention, the present invention first describes the problems in the related art.
As shown in fig. 1, fig. 1 is a schematic structural diagram of a display panel in the related art, a display area 1 'of the display panel includes a regular display area 2' and an optical component area 3', the optical component area 3' can be used for arranging optical components such as a camera, and a light emitting area occupation ratio of the optical component area 3 'is smaller than that of the regular display area 2', for example, a pixel density of the optical component area 3 'is smaller than that of the regular display area 2', or the pixel densities of the optical component area 3 'and the regular display area 2' are the same, but an area of a single light emitting point in the optical component area 3 'is smaller than that of a single light emitting point in the regular display area 2'.
Wherein the pixels 4 'in the display area 1' may comprise light emitting elements electrically connected to pixel circuits, wherein the pixel circuits may be configured to transmit a driving current to the light emitting elements to drive the light emitting elements to emit light. As shown in fig. 2, fig. 2 is a schematic structural diagram of a pixel circuit in the related art, and the pixel circuit may include a driving transistor M0', a first reset transistor M1', a second reset transistor M2', a data writing transistor M3', a threshold compensation transistor M4', a first light emitting control transistor M5', a second light emitting control transistor M6', and a storage capacitor Cst'.
In conjunction with the timing chart shown in fig. 3, the drive period T 'of the pixel circuit includes the reset period T1', the charging period T2', and the light emission period T3'.
In the reset period t1', the first gate signal line S1' supplies a low level, and the first reset transistor M1' resets the gate of the driving transistor M0' with a reset voltage supplied from the reset signal line Vref '.
In the charging period t2', the second gate signal line S2' supplies a low level, the second reset transistor M2 'resets the anode of the light emitting element D' with the reset voltage supplied from the reset signal line Vref ', and at the same time, the Data write transistor M3' and the threshold compensation transistor M4 'write the Data voltage supplied from the Data line Data' into the gate of the drive transistor M0 'and compensate for the threshold voltage of the drive transistor M0'.
In the light emission period t3', the light emission control signal line Emit ' is supplied with the low level, and the first light emission control transistor M5' and the second light emission control transistor M6' control the communication of the path between the power supply signal line PVDD ' and the light emitting element D ', transmit the driving current converted by the driving transistor M0' to the light emitting element D ', and drive the light emitting element D ' to Emit light. The duty ratio of the emission control signal provided by the emission control signal line Emit 'determines the emission time of the light emitting element D'.
In the related art, referring again to fig. 1, the pixel circuits at corresponding positions in the regular display area 2 'and the optical component area 3' are electrically connected to the same emission control signal line Emit ', that is, the emission control signals for driving the pixel circuits in the optical component area 3' and the regular display area 2 'have the same duty ratio, and the emission time periods of the light emitting elements D' in both areas are the same in one driving period.
However, since the light emitting area ratio of the optical component area 3' is low, when a picture is actually displayed, as shown in fig. 4, fig. 4 is a schematic diagram showing a comparison of the driving currents received by the light emitting elements in the conventional display area and the optical component area in the related art, in which it is necessary to increase the driving current I flowing to the light emitting element D ' in the optical component area 3', in the related artd', so that the optical member region 3' attains the same display luminance as the conventional display region 2 '. However, such a difference in drive current causes the light emitting element D 'in the two regions'The peak luminance of the luminous intensity changing with time is different, so that the peak luminance corresponding to the two regions is different, and the risk of flicker or ripple defects between the two regions is caused.
In order to solve the above problem, embodiments of the present invention provide a display panel capable of improving a problem of poor display caused by a difference in the occupation ratio of light emitting areas of two areas.
As shown in fig. 5 and fig. 6, fig. 5 is a schematic structural diagram of a display panel according to an embodiment of the present invention, and fig. 6 is a schematic connection diagram of a regulation control circuit and a light-emitting control signal line according to an embodiment of the present invention, where the display panel includes: a display area 1, the display area comprising a first display area 2 and an optical component area 3, the first display area 2 comprising a first light emitting element 4, the optical component area 3 comprising a second light emitting element 5. The optical component area 3 may be an area in the display area where optical components such as a camera are disposed, and the shape of the optical component area 3 may be set according to specific requirements, for example, the shape of the optical component area 3 may be a direction, a circle, or an ellipse. It should be noted that, in order to increase the light transmittance of the optical component arrangement region, in the technical solution provided by the embodiment of the present invention, the pixel density of the optical component region 3 may be smaller than that of the conventional display region 2, or the pixel densities of the optical component region 3 and the conventional display region 2 are the same, but the area of a single light-emitting point (the light-emitting area of the light-emitting element) in the optical component region 3 is smaller than that in the conventional display region 2. In the following, the present invention will be described by taking an example that the pixel density of the optical component area 3 may be smaller than that of the conventional display area 2, but the protection scope of the present invention is not limited thereto, wherein the technical solution provided by the present invention is also applicable to a case that the area of a single light-emitting point (the light-emitting area of the light-emitting element) in the optical component area 3 is smaller than that of a single light-emitting point in the conventional display area 2.
The display panel further comprises a pixel circuit 6, the pixel circuit 6 comprises a first pixel circuit 7 and a second pixel circuit 8, the first pixel circuit 7 is electrically connected with the first light emitting element 4 and used for transmitting a driving current to the first light emitting element 4 to drive the first light emitting element 4 to emit light, and the second pixel circuit 8 is electrically connected with the second light emitting element 5 and used for transmitting a driving current to the second light emitting element 5 to drive the second light emitting element 5 to emit light. It should be noted that, in the embodiment of the present invention, the first pixel circuit 7 is located in the first display area 2, and the second pixel circuit 8 is located in the optical component area 3, or, to further improve the light transmittance of the optical component area 3, the second pixel circuit 8 is also located in the first display area 2, or is also located in a non-display area surrounding the display area, or is also located in a transition area at least partially surrounding the optical component arrangement area.
The display panel may further include a light emission control signal line Emit, which is electrically connected to the pixel circuit 6 and is configured to transmit a light emission enable signal to the pixel circuit 6 to control the pixel circuit 6 to drive the light emitting element to Emit light. The emission control signal line Emit includes a plurality of first emission control signal lines Emit1 and a plurality of second emission control signal lines Emit2, the first emission control signal line Emit1 is electrically connected to the first pixel circuit 7, and the second emission control signal line Emit2 is electrically connected to the second pixel circuit 8.
Referring to fig. 6, as shown In fig. 7, fig. 7 is a schematic structural diagram of an adjustment control circuit according to an embodiment of the present invention, the display panel further includes an adjustment control circuit 9, the adjustment control circuit 9 includes a first control unit 10, the first control unit 10 includes a first input end In1, a first output end Out1, and at least two first control ends Ct1, wherein the first input end In1 of the first control unit 10 is electrically connected to a first signal end V1, the at least two first control ends Ct1 of the first control unit 10 are electrically connected to at least two first light-emitting control signal lines Emit1 In a one-to-one correspondence manner, and the first output end Out1 of the first control unit 10 is electrically connected to a second light-emitting control signal line Emit 2. Note that the unit 1_ i and the unit 1_ i + k illustrated in the drawings may be understood as a first light emission control signal line electrically connected to the first pixel circuits 7 in the ith and ith + k rows of pixel circuits 6, respectively, and the unit 2_ i may be understood as a second light emission control signal line electrically connected to the second pixel circuits 8 in the ith row of pixel circuits 6.
The first control unit 10 is configured to transmit the first signal at the first signal terminal V1 to the second emission control signal line Emit2 in response to a first emission enable signal on at least two first emission control signal lines Emit1, respectively, at least two different periods, where the first emission enable signal is an emission enable signal of the first pixel circuit 7, and the first signal is a second emission enable signal of the second pixel circuit 8.
It should be noted that, in conjunction with fig. 2, the level states of the first and second light emission enable signals are related to the types of the first and second light emission control transistors in the first and second pixel circuits 7 and 8, and in the embodiment of the present invention, the level states of the first and second light emission enable signals may be the same or different. For example, when the first and second light emission control transistors in the first and second pixel circuits 7 and 8 are both P-type transistors, the first and second light emission enable signals are both low level. Alternatively, when the first and second light emission control transistors in the first pixel circuit 7 are P-type transistors and the first and second light emission control transistors in the second pixel circuit 8 are N-type transistors, the first light emission enable signal is at a low level and the second light emission enable signal is at a high level. Still alternatively, when the first and second light emission control transistors in the first and second pixel circuits 7 and 8 are both N-type transistors, both the first and second light emission enable signals are high level. The embodiment of the present invention will be described with reference to the example that the first light emission enable signal and the second light emission enable signal are both at a low level.
In the embodiment of the present invention, by providing the adjustment control circuit 9, the duty ratio of the emission control signal transmitted on the second emission control signal line Emit2 can be individually controlled by using the adjustment control circuit 9. Specifically, for at least two first emission control signal lines Emit1 electrically connected to the second emission control signal line Emit2, when a first emission enable signal (low level) is transmitted on any one of the emission control signal lines Emit, the adjustment control circuit 9 can control the second emission control signal line Emit2 to transmit a second emission enable signal (low level), which effectively increases the duration of low level in the second emission control signal, that is, the duty ratio of the second emission control signal, compared to the first emission control signal, and further makes the emission duration of the second emission element 5 longer than the emission duration of the first emission element 4 in one driving period. In this way, the embodiment of the present invention can increase the display luminance of the optical component area 3 by increasing the light emitting time of the second light emitting element 5 without increasing the driving current received by the second light emitting element 5 in the optical component area 3, as shown in fig. 8, fig. 8 is a schematic diagram of the comparison of the driving currents received by the light emitting elements in the optical component area and the first display area provided by the embodiment of the present invention, and the driving current received by the second light emitting element 5 in the optical component area 3 can be kept consistent (same in amplitude) with the driving current received by the first light emitting element 4 in the first display area 2, so as to avoid the difference of peak luminance caused by the difference of the driving currents in the two areas, and effectively reduce the risk of flicker or ripple between the two areas.
In addition, the implementation of the present invention can utilize the signal transmitted on the first emission control signal line Emit1 to control and increase the duty ratio of the second emission control signal, and the display panel does not need to add a shift register for separately providing the second emission control signal to the second emission control signal line Emit2, thereby avoiding the influence of the added shift register on the frame width, and also avoiding the influence on the aperture ratio of the pixels in the first display area 2 by separately leading the newly added shift register to the second emission control signal line Emit2 in the optical component area 3 through the first display area 2.
In an alternative implementation, as shown in fig. 9, fig. 9 is another schematic structural diagram of the regulation control circuit provided in the embodiment of the present invention, where the first control unit 10 includes at least two first control transistors M _1, gates of the at least two first control transistors M _1 are electrically connected to the at least two first light emission control signal lines Emit1 in a one-to-one correspondence manner, first poles of the at least two first control transistors M _1 are electrically connected to the first signal terminal V1, and second poles of the at least two first control transistors M _1 are electrically connected to the second light emission control signal line Emit 2; the on signal of the first control transistor M _1 is a first light emitting enable signal.
When the first light emitting enable signal is at a Low level, the first control transistor M _1 may be a P-type transistor, such as a P-type Low Temperature Polysilicon (LTPS) transistor. When the first light emitting enable signal is at a high level, the first control transistor M _1 may be an N-type transistor, such as an N-type LTPS transistor or a metal oxide semiconductor transistor (e.g., an IGZO transistor).
Taking the first control unit 10 electrically connected to the two first light emission control signal lines Emit1 as an example, in conjunction with the timing chart shown in fig. 10, in the first period T1, the first light emission control signal line Emit1_ i transmits the first light emission enable signal (low level), the first light emission control signal line Emit1_ i + k transmits the first light emission disable signal (high level), the first control transistor M _1 connected to the first light emission control signal line Emit1_ i is turned on, the first signal is transmitted to the second light emission control signal line Emit2 via the first control transistor M _1 which is turned on, and the second light emission enable signal (low level) is transmitted to the second light emission control signal line Emit 2. In the second period T2, the first emission control signal line Emit1_ i and the first emission control signal line Emit1_ i +2 both transmit the first emission enable signal (low level), and the two first control transistors M _1 connected to the first emission control signal line Emit1_ i and the first emission control signal line Emit1_ i + k are both turned on, and at this time, the first signal of the first signal terminal V1 is transmitted to the second emission control signal line Emit2 via the two turned-on first control transistors M _1, so that the second emission enable signal (low level) is transmitted on the second emission control signal line Emit 2. In the third period T3, the first emission control signal line Emit1_ i transmits the first emission disable signal (high level), the first emission control signal line Emit1_ i + k transmits the first emission enable signal (low level), the first control transistors M _1 connected to the first emission control signal line Emit1_ i + k are both turned on, and at this time, the first signal of the first signal terminal V1 is transmitted to the second emission control signal line Emit2 via the turned-on first control transistors M _1, so that the second emission enable signal (low level) is transmitted to the second emission control signal line Emit 2.
In the above structure, the plurality of first control transistors M _1 are arranged in parallel between the first signal terminal V1 and the second emission control signal line Emit2, and when any one of the first control transistors M _1 is turned on, the second emission control signal line Emit2 is controlled to transmit the second emission enable level, so that the duty ratio of the second emission control signal is effectively increased.
It should be noted that, in the embodiment of the present invention, referring to fig. 9, the first control unit 10 may be electrically connected to only two different first light emission control signal lines Emit1, and in this case, the first control unit 10 includes only two first control transistors M _1 electrically connected to two first light emission control signal lines Emit1 in a one-to-one correspondence manner. Alternatively, as shown in fig. 11, fig. 11 is a schematic structural diagram of a further adjustment control circuit according to an embodiment of the present invention, the first control unit 10 may also be electrically connected to three or more different first light-emitting control signal lines Emit1, and at this time, the first control unit 10 includes a plurality of first control transistors M _1 electrically connected to the plurality of first light-emitting control signal lines Emit1 in a one-to-one correspondence manner. When the first control unit 10 is electrically connected to three or more first light-emitting control signal lines Emit1, the working principle of the first control unit 10 is similar to the above working principle, and is not described herein again.
In an alternative embodiment, referring to fig. 9 and 11, the first signal terminal V1 is electrically connected to the first fixed potential signal line VG 1. Since the first constant-potential signal line VG1 continuously transmits the constant first signal, when any first control transistor M _1 is turned on, the second emission enable signal transmitted on the second emission control signal line Emit2 can be effectively ensured, and the accuracy of the second emission control signal is improved.
Further, as shown in fig. 12, fig. 12 is a schematic diagram of a setting position of the first fixed potential signal line according to the embodiment of the present invention, the display panel further includes a non-display area 11 surrounding the display area, and the first fixed potential signal line VG1 is located in the non-display area 11, at this time, the first fixed potential signal line VG1 does not need to penetrate through the first display area 2 and the optical component area 3, which does not affect the aperture ratio of the pixels in the first display area 2 nor the light transmittance of the optical component area 3.
As shown in fig. 13, fig. 13 is a schematic structural diagram of a pixel circuit according to an embodiment of the present invention, and the pixel circuit 6 may include a driving transistor M0, a first reset transistor M1, a second reset transistor M2, a data writing transistor M3, a threshold compensation transistor M4, a first light emitting control transistor M5, a second light emitting control transistor M6, and a storage capacitor Cst.
Here, the gate of the first reset transistor M1 may be electrically connected to the first gate signal line S1, the first pole of the first reset transistor M1 may be electrically connected to the first reset signal line Vref1, and the second pole of the first reset transistor M1 may be electrically connected to the gate of the driving transistor M0.
The gate of the second reset transistor M2 may be electrically connected to the second gate signal line S2, the first pole of the second reset transistor M2 may be electrically connected to the second reset signal line Vref2, and the second pole of the second reset transistor M2 may be electrically connected to the anode of the light emitting element D (the first light emitting element 4 or the second light emitting element 5). Here, the first reset signal line Vref1 may be connected to the second reset signal line Vref2 or may be provided independently of the same. Alternatively, the light emitting element D may be an organic light emitting device or an organic light emitting diode.
The gate of the Data write transistor M3 may be electrically connected to the second gate signal line S2, the first pole of the Data write transistor M3 may be electrically connected to the Data line Data, and the second pole of the Data write transistor M3 may be electrically connected to the first pole of the drive transistor M0.
The gate of the threshold compensation transistor M4 may be electrically connected to the third gate signal line S3, the first pole of the threshold compensation transistor M4 may be electrically connected to the second pole of the driving transistor M0, and the second pole of the threshold compensation transistor M4 may be electrically connected to the gate of the driving transistor M0.
The gate of the first light emission controlling transistor M5 may be electrically connected to the light emission control signal line Emit, the first pole of the first light emission controlling transistor M5 may be electrically connected to the power supply signal line PVDD, and the second pole of the first light emission controlling transistor M5 may be electrically connected to the first pole of the driving transistor M0.
The gate of the second light emission controlling transistor M6 may be electrically connected to the light emission control signal line Emit, the first pole of the second light emission controlling transistor M6 may be electrically connected to the second pole of the driving transistor M0, and the second pole of the second light emission controlling transistor M6 may be electrically connected to the anode of the light emitting element D.
A first plate of the storage capacitor Cst may be electrically connected to the power signal line PVDD, and a second plate of the storage capacitor Cst may be electrically connected to the gate electrode of the driving transistor M0.
In the embodiment of the present invention, the first reset transistor M1 and the threshold compensation transistor M4 may be N-type Indium Gallium Zinc Oxide (IGZO) transistors, and at this time, the off-state leakage current of the first reset transistor M1 and the threshold compensation transistor M4 is small, so that the influence of the off-state leakage current on the potential of the gate of the driving transistor M0 can be reduced, the stability of the potential of the gate of the driving transistor M0 is improved, and the light emitting reliability is further improved.
In conjunction with the timing chart shown in fig. 14, the drive cycle of the pixel circuit 6 includes the reset period t1, the charging period t2, and the light emission period t 3.
In the reset period t1, the first gate signal line S1 supplies a high level, the second gate signal line S2 supplies a high level, the third gate signal line S3 supplies a low level, the emission control signal line Emit supplies a high level, and the first reset transistor M1 transmits the reset voltage supplied from the first reset signal line Vref1 to the gate of the driving transistor M0 in response to the high level supplied from the first gate signal line S1, resetting the gate of the driving transistor M0.
In the charging period t2, the second gate signal line S2 supplies a low level, the third gate signal line S3 supplies a high level, the first gate signal line S1 supplies a low level, the emission control signal line Emit supplies a high level, and the second reset transistor M2 transmits a reset voltage supplied from the second reset signal line Vref2 to the anode of the light emitting element D in response to the low level supplied from the second gate signal line S2, resetting the anode of the light emitting element D; meanwhile, the Data writing transistor M3 writes the Data voltage supplied from the Data line Data into the gate of the driving transistor M0 and compensates the threshold voltage of the driving transistor M0 in response to the low level supplied from the second gate signal line S2 and the threshold compensation transistor M4, respectively, in response to the high level supplied from the third gate signal line S3.
In the light emission period t3, the first gate signal line S1 supplies a low level, the second gate signal line S2 supplies a high level, the third gate signal line S3 supplies a low level, the light emission control signal line Emit supplies a low level, and the first light emission controlling transistor M5 and the second light emission controlling transistor M6 control the communication of the path between the power supply signal line PVDD and the light emitting element D in response to the low level supplied from the light emission control signal line Emit, transmit the driving current converted by the driving transistor M0 to the light emitting element D, and drive the light emitting element D to Emit light.
In an alternative implementation manner, with reference to fig. 15 and 16, fig. 15 is another connection schematic diagram of the first signal terminal provided by the embodiment of the present invention, fig. 16 is a signal timing diagram provided by the embodiment of the present invention, the display panel further includes a first Scan signal line Scan1, the first Scan signal line Scan1 is electrically connected to at least the first pixel circuit 7; the first signal terminal V1 is electrically connected to the first Scan signal line Scan1, and when the first light emission control signal line Emit1 and the first Scan signal line Scan1 which are electrically connected to the same first control unit 10 transmit the first light emission enable signal to either of the first light emission control signal lines Emit1, the first signal is transmitted to the first Scan signal line Scan 1.
In addition, referring to fig. 11, when the second light emission enable signal is at a low level, the first Scan signal line Scan1 may be the first gate signal line S1 or the third gate signal line S3. Alternatively, when the second light emission enable signal is at a high level, the first Scan signal line Scan1 may be the second gate signal line S2, as shown in fig. 11.
Taking the first Scan signal line Scan1 as the first gate signal line S1 or the third gate signal line S3 as an example, in the embodiment of the present invention, the first Scan signal line Scan1 (the first gate signal line S1 or the third gate signal line S3) electrically connected to the first control unit 10 is not limited to be electrically connected to any row of pixel circuits 6 specifically as long as: in the first emission control signal line Emit1 and the first Scan signal line Scan1 electrically connected to the same first control unit 10, when the first emission enable signal is transmitted to any one of the first emission control signal lines Emit1, the second emission enable signal may be transmitted to both the first Scan signal line Scan 1.
Illustratively, with reference to fig. 15 and 16, with respect to the second emission control signal line Emit2 electrically connected to the second pixel circuit 8 in the pixel circuit 6 in the i-th row, which is electrically connected to the first emission control signal line Emit1 electrically connected to the first pixel circuit 7 in the pixel circuit 6 in the i-th and i + k-th rows, and the third gate signal line S3_ i +1 electrically connected to the first pixel circuit 7 in the pixel circuit 6 in the i + 1-th row, respectively, through the first control unit 10, at this time, in the first period T1 to the third period T3, when the first emission enable signal (low level) is transmitted to at least one of the first emission control signal line Emit1 in the first emission control signal line Emit1_ i and the first emission control signal line Emit1_ i + k, the second emission enable signal (low level) is transmitted to the third gate signal line S3_ i + 1.
This kind of setting mode only needs to utilize original scanning signal line in the display panel to provide first signal for second light-emitting control signal line Emit2, need not to set up other signal lines that are used for transmitting first signal again in the display panel to avoid the signal line to occupy too much space in the display panel.
In an alternative embodiment, referring again to fig. 7, the regulation control circuit 9 further includes a second control unit 12, the second control unit 12 includes a second input terminal In2, a second output terminal Out2 and at least two second control terminals Ct2, wherein the second input terminal In2 of the second control unit 12 is electrically connected to the second signal terminal V2, the at least two second control terminals Ct2 of the second control unit 12 are electrically connected to at least two first emission control signal lines Emit1, respectively, and the second output terminal Out2 of the second control unit 12 is electrically connected to the second emission control signal line Emit 2. Also, the second control unit 12 and the first control unit 10 in the adjustment control circuit 9 are electrically connected to the same first emission control signal line Emit1 and second emission control signal line Emit 2.
The second control unit 12 is configured to transmit a second signal at the second signal terminal V2 to the second emission control signal line Emit2 in response to a first emission disable signal on at least two first emission control signal lines Emit1 at the same time, where the second signal is a second emission disable signal of the second pixel circuit 8.
With the above arrangement, when the first emission disable signal (high level) is simultaneously transmitted to the first emission control signal line Emit1 electrically connected to the second emission control signal line Emit2, the second control unit 12 can control the second emission disable signal (high level) to be transmitted to the second emission control signal line Emit2 to control the second pixel circuit 8 to drive the second light emitting element 5 to stop emitting light.
In an alternative embodiment, referring to fig. 9 and 11, the second control unit 12 includes at least two second control transistors M _2, the at least two second control transistors M _2 are connected in series between the second signal terminal V2 and the second emission control signal line Emit2, and gates of the at least two second control transistors M _2 are electrically connected to the at least two first emission control signal lines Emit1 in a one-to-one correspondence. The on signal of the second control transistor M _2 is the first light-emitting disable signal.
When the first light emitting disable signal is at a low level, the second control transistor M _2 may be an N-type transistor. When the first light emitting disable signal is at a high level, the second control transistor M _2 may be a P-type transistor.
Taking the second control unit 12 electrically connected to the two first light emission control signal lines Emit1 as an example, in conjunction with the timing chart shown in fig. 10, in the fourth period T4, the first light emission control signal line Emit1_ i and the first light emission control signal line Emit1_ i + k both transmit the first light emission disable signal (high level), and the two second control transistors M _2 connected to the first light emission control signal line Emit1_ i and the first light emission control signal line Emit1_ i + k are both turned on, at this time, the second signal of the second signal terminal V2 is transmitted to the second light emission control signal line Emit2 through the two conductive second control transistors M _2, so that the second light emission disable signal (high level) is transmitted on the second light emission control signal line Emit 2.
In the above structure, the plurality of second control transistors M _2 are arranged in series between the second signal terminal V2 and the second emission control signal line Emit2, so that only when the plurality of second control transistors M _2 are simultaneously turned on, the conduction of the path between the second signal terminal V2 and the second emission control signal line Emit2 can be controlled, the second emission control signal line Emit2 transmits the second emission disable signal, and the accuracy of the second emission control signal is improved.
It should be noted that, in the embodiment of the present invention, referring to fig. 9, the second control unit 12 may be electrically connected to only two different first light emission control signal lines Emit1, and in this case, the second control unit 12 includes only two second control transistors M _2 electrically connected to two first light emission control signal lines Emit1 in a one-to-one correspondence manner. Alternatively, referring to fig. 11, the second control unit 12 may also be electrically connected to three or more different first light emission control signal lines Emit1, and in this case, the second control unit 12 includes a plurality of second control transistors M _2 electrically connected to the plurality of first light emission control signal lines Emit1 in a one-to-one correspondence. When the second control unit 12 is electrically connected to three or more first emission control signal lines Emit1, the working principle of the second control unit 12 is similar to the above working principle, and is not described herein again.
In an alternative embodiment, referring to fig. 9 and 11, the second signal terminal V2 is electrically connected to the second fixed potential signal line VG 2. Since the second fixed potential signal line VG2 continuously transmits the constant second signal, when the plurality of second control transistors M _2 are turned on simultaneously, the second light-emitting disable signal transmitted on the second light-emitting control signal line Emit2 can be effectively ensured, and the accuracy of the second light-emitting control signal is improved.
Further, referring to fig. 12 again, the display panel further includes a non-display region 11 surrounding the display region, and the second fixed potential signal line VG2 is located in the non-display region 11, at this time, the first fixed potential signal line does not need to penetrate through the first display region 2 and the optical component region 3, and does not affect the aperture ratio of the pixels in the first display region 2 or the light transmittance of the optical component region 3.
Alternatively, in another alternative embodiment, with reference to fig. 14 and 15, the display panel further includes a second Scan signal line Scan2, and the second Scan signal line Scan2 is electrically connected to at least the first pixel circuit 7. The second signal terminal V2 is electrically connected to the second Scan signal line Scan2, and when the first light emission control signal line Emit1 and the second Scan signal line Scan2 electrically connected to the same second control unit 12 transmit the first light emission disable signal to at least two of the first light emission control signal lines Emit1, the second signal is transmitted to the second Scan signal line Scan 2.
In addition, referring to fig. 11, when the second light-emission-disable signal is at a high level, the second Scan signal line Scan2 may be the second gate signal line S2. Alternatively, when the second light emission disable signal is at a low level, the second Scan signal line Scan2 may be the first gate signal line S1 or the third gate signal line S3.
Taking the second Scan signal line Scan2 as the second gate signal line S2 as an example, in the embodiment of the present invention, the second Scan signal line Scan2 (the second gate signal line S2) electrically connected to the second control unit 12 is not limited to be electrically connected to any particular row of pixel circuits 6 as long as: in the case where the first emission control signal line Emit1 and the second Scan signal line Scan2 electrically connected to the same second control unit 12 transmit the first emission disable signal to at least two first emission control signal lines Emit1, the second signal may be transmitted to the second Scan signal line Scan 2.
Exemplarily, with reference to fig. 15 and 16, with respect to the second emission control signal line Emit2 electrically connected to the second pixel circuit 8 in the pixel circuit 6 of the i-th row, which is electrically connected to the first emission control signal line Emit1 electrically connected to the first pixel circuit 7 in the pixel circuits 6 of the i-th and i + k-th rows, and the second gate signal line S2_ i-p electrically connected to the first pixel circuit 7 in the pixel circuits 6 of the i-p-th row, respectively, through the first control unit 10, at this time, in the fourth period T4, when the first emission control signal line Emit1_ i and the first emission control signal line Emit1_ i + k simultaneously transmit the first emission disable signal (high level), the second emission disable signal (high level) is transmitted on the second gate signal line S2_ i-p.
In an alternative embodiment, to simplify the panel structure, the first control unit 10 may be electrically connected to the two first light emission control signal lines Emit1, and in order to equalize the light emission time periods of the second light emission elements 5 at different positions in the optical component area 3 in one driving period, the interval time periods of the transmission of the first light emission enable signal on the two first light emission control signal lines Emit1 corresponding to different first control units 10 may be equalized.
Further, when the two first light emission control signal lines Emit1 electrically connected to the same first control unit 10 are electrically connected to the first pixel circuits 7 in the ith and i + kth rows of pixel circuits 6, respectively, the value of k may be greater than or equal to 2 and less than or equal to 4, and at this time, the interval duration of the first light emission enable signal transmitted on the two first light emission control signal lines Emit1 is not too long, and accordingly, the duty ratio of the second light emission control signal is not too large.
In an alternative implementation, as shown in fig. 17, fig. 17 is a schematic diagram of a setting position of the adjustment control circuit according to an embodiment of the present invention, the display area further includes a transition area 13 at least partially surrounding the optical component area 3, and the adjustment control circuit 9 is located in the transition area 13, on one hand, the adjustment control circuit 9 does not occupy a space of the optical component area 3 and does not affect the light transmittance of the optical component area 3, and on the other hand, the adjustment control circuit 9 is located between the first display area 2 and the optical component area 3, so as to be conveniently connected to the first emission control signal line Emit1 and the second emission control signal line Emit2, and no longer lead wire needs to be provided, so that the complexity of wiring in the display area can be effectively reduced.
Based on the same inventive concept, an embodiment of the present invention further provides a driving method of a display panel, the driving method is used for driving the display panel, as shown in fig. 18 with reference to fig. 5 to 7, fig. 18 is a flowchart of the driving method provided by the embodiment of the present invention, and the driving method includes:
step S1: the first control unit 10 transmits the first signal at the first signal terminal V1 to the second light emission control signal line Emit2 in response to the first light emission enable signal at the at least two first light emission control signal lines Emit1, respectively, at least two different periods, wherein the first signal is the second light emission enable signal of the second pixel circuit 8.
In the embodiment of the present invention, the duty ratio of the light emission control signal transmitted on the second light emission control signal line Emit2 can be individually adjusted and controlled by using the adjustment control circuit 9, so as to effectively increase the duty ratio of the low level in the second light emission control signal, and further, in one driving period, the light emission duration of the second light emitting element 5 is longer than the light emission duration of the first light emitting element 4. In this way, the display brightness of the optical component area 3 is increased only by increasing the light emitting duration of the second light emitting element 5, and the driving current received by the second light emitting element 5 in the optical component area 3 is not required to be increased any more, and the driving current received by the second light emitting element 5 in the optical component area 3 can be kept consistent with the driving current received by the first light emitting element 4 in the first display area 2, so that the difference of peak brightness caused by the difference of driving currents in the two areas is avoided, and the risk of flicker or ripple defects between the two areas is effectively reduced.
In a possible implementation manner, with reference to fig. 5 to 7, the adjustment control circuit 9 further includes a second control unit 12, where the second control unit 12 includes a second input terminal In2, a second output terminal Out2, and at least two second control terminals Ct2, where the second input terminal In2 of the second control unit 12 is electrically connected to the second signal terminal V2, the at least two second control terminals Ct2 of the second control unit 12 are electrically connected to at least two first light emission control signal lines Emit1, respectively, and the second output terminal Out2 of the second control unit 12 is electrically connected to the second light emission control signal line Emit 2; also, the second control unit 12 and the first control unit 10 in the adjustment control circuit 9 are electrically connected to the same first emission control signal line Emit1 and second emission control signal line Emit 2.
Based on this, referring to fig. 16, the driving method further includes:
step S2: the second control unit 12 simultaneously transmits a second signal at the second signal terminal V2 to the second light emission control signal line Emit2 in response to a first light emission disable signal on at least two first light emission control signal lines Emit1, wherein the second signal is a second light emission disable signal of the second pixel circuit 8.
When the first emission control signal line Emit1 electrically connected to the second emission control signal line Emit2 transmits the first emission disable signal (high level) at the same time, the second control unit 12 may control the second emission control signal line Emit2 to transmit the second emission disable signal (high level) to control the second pixel circuit 8 to drive the second light emitting element 5 to stop emitting light.
Based on the same inventive concept, an embodiment of the present invention further provides a display device, as shown in fig. 19, fig. 19 is a schematic structural diagram of the display device provided in the embodiment of the present invention, and the display device includes the display panel 100. The specific structure of the display panel 100 has been described in detail in the above embodiments, and is not described herein again. Of course, the display device shown in fig. 19 is only a schematic illustration, and the display device may be any electronic device with a display function, such as a mobile phone, a tablet computer, a notebook computer, an electronic book, or a television.
The above description is only for the purpose of illustrating the preferred embodiments of the present invention and is not to be construed as limiting the invention, and any modifications, equivalents, improvements and the like made within the spirit and principle of the present invention should be included in the scope of the present invention.
Finally, it should be noted that: the above embodiments are only used to illustrate the technical solution of the present invention, and not to limit the same; while the invention has been described in detail and with reference to the foregoing embodiments, it will be understood by those skilled in the art that: the technical solutions described in the foregoing embodiments may still be modified, or some or all of the technical features may be equivalently replaced; and the modifications or the substitutions do not make the essence of the corresponding technical solutions depart from the scope of the technical solutions of the embodiments of the present invention.
Claims (13)
1. A display panel, comprising:
a display area including a first light emitting element and an optical component area including a second light emitting element;
a pixel circuit including a first pixel circuit electrically connected to the first light emitting element and a second pixel circuit electrically connected to the second light emitting element;
a light emission control signal line including a plurality of first light emission control signal lines electrically connected to the first pixel circuit and a plurality of second light emission control signal lines electrically connected to the second pixel circuit;
the adjusting control circuit comprises a first control unit, the first control unit comprises a first input end, a first output end and at least two first control ends, the first input end of the first control unit is electrically connected with a first signal end, the at least two first control ends of the first control unit are electrically connected with at least two first light-emitting control signal lines in a one-to-one correspondence manner, and the first output end of the first control unit is electrically connected with the second light-emitting control signal line;
the first control unit is configured to transmit a first signal on the first signal terminal to the second light emission control signal line in response to a first light emission enable signal on at least two first light emission control signal lines, respectively, at least two different time periods, where the first signal is a second light emission enable signal of the second pixel circuit.
2. The display panel according to claim 1,
the first control unit comprises at least two first control transistors, the grid electrodes of the at least two first control transistors are electrically connected with the at least two first light-emitting control signal lines in a one-to-one correspondence mode, the first electrodes of the at least two first control transistors are electrically connected with the first signal end, and the second electrodes of the at least two first control transistors are electrically connected with the second light-emitting control signal line;
wherein, the conducting signal of the first control transistor is the first light-emitting enabling signal.
3. The display panel according to claim 1,
the first signal terminal is electrically connected with the first fixed potential signal line.
4. The display panel according to claim 1,
the display panel further comprises a first scanning signal line which is at least electrically connected with the first pixel circuit;
the first signal terminal is electrically connected to the first scanning signal line, and when the first light emission control signal line and the first scanning signal line electrically connected to the same first control unit transmit the first light emission enable signal on any one of the first light emission control signal lines, the first scanning signal line transmits the first signal.
5. The display panel according to claim 1,
the adjusting control circuit further comprises a second control unit, wherein the second control unit comprises a second input end, a second output end and at least two second control ends, the second input end of the second control unit is electrically connected with a second signal end, the at least two second control ends of the second control unit are respectively electrically connected with the at least two first light-emitting control signal lines, and the second output end of the second control unit is electrically connected with the second light-emitting control signal lines;
and the second control unit and the first control unit in the adjustment control circuit are electrically connected to the same first light emission control signal line and the second light emission control signal line;
the second control unit is configured to transmit a second signal on the second signal terminal to the second light emission control signal line in response to a first light emission disable signal on at least two of the first light emission control signal lines at the same time, where the second signal is a second light emission disable signal of the second pixel circuit.
6. The display panel according to claim 5,
the second control unit comprises at least two second control transistors, the at least two second control transistors are connected in series between the second signal end and the second light-emitting control signal line, and the grid electrodes of the at least two second control transistors are electrically connected with the at least two first light-emitting control signal lines in a one-to-one correspondence manner;
wherein, the conducting signal of the second control transistor is the first light-emitting non-enabling signal.
7. The display panel according to claim 5,
the second signal terminal is electrically connected with the second fixed potential signal line.
8. The display panel according to claim 5,
the display panel further comprises a second scanning signal line which is at least electrically connected with the first pixel circuit;
the second signal end is electrically connected with the second scanning signal line, and the second signal is transmitted on the second scanning signal line when the first light-emitting control signal line and the second scanning signal line which are electrically connected with the same second control unit transmit the first light-emitting non-enabling signal on at least two first light-emitting control signal lines.
9. The display panel according to claim 1,
the first control unit is electrically connected with the two first light-emitting control signal lines, and the time intervals for transmitting the first light-emitting enable signal on the two first light-emitting control signal lines corresponding to different first control units are equal.
10. The display panel according to claim 1,
the display region further includes a transition region at least partially surrounding the optic region, the adjustment control circuit being located in the transition region.
11. A driving method for a display panel, for driving the display panel according to claim 1, the driving method comprising:
the first control unit transmits a first signal on the first signal terminal to the second light emission control signal line in response to a first light emission enable signal on at least two first light emission control signal lines, respectively, at least two different periods, wherein the first signal is a second light emission enable signal of the second pixel circuit.
12. The driving method according to claim 11,
the adjusting control circuit further comprises a second control unit, wherein the second control unit comprises a second input end, a second output end and at least two second control ends, the second input end of the second control unit is electrically connected with a second signal end, the at least two second control ends of the second control unit are respectively electrically connected with the at least two first light-emitting control signal lines, and the second output end of the second control unit is electrically connected with the second light-emitting control signal lines;
and the second control unit and the first control unit in the adjustment control circuit are electrically connected to the same first light emission control signal line and the second light emission control signal line;
the driving method further includes:
the second control unit simultaneously responds to first light-emitting non-enabling signals on at least two first light-emitting control signal lines and transmits a second signal on the second signal end to the second light-emitting control signal line, wherein the second signal is a second light-emitting non-enabling signal of the second pixel circuit.
13. A display device comprising the display panel according to any one of claims 1 to 10.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202111552479.6A CN114242000B (en) | 2021-12-17 | 2021-12-17 | Display panel, driving method thereof and display device |
Applications Claiming Priority (1)
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| CN114882844A (en) * | 2022-05-18 | 2022-08-09 | 湖北长江新型显示产业创新中心有限公司 | Display panel and display device |
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