CN114238183B - System, method and medium for implementing Virtio device - Google Patents

System, method and medium for implementing Virtio device Download PDF

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Publication number
CN114238183B
CN114238183B CN202111521682.7A CN202111521682A CN114238183B CN 114238183 B CN114238183 B CN 114238183B CN 202111521682 A CN202111521682 A CN 202111521682A CN 114238183 B CN114238183 B CN 114238183B
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vdpa
data
driver
pcie interface
interface
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CN114238183A (en
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鄢贵海
张宇
袁晓飞
孟繁毅
侯英乐
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Yusur Technology Co ltd
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Yusur Technology Co ltd
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    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/20—Handling requests for interconnection or transfer for access to input/output bus
    • G06F13/28—Handling requests for interconnection or transfer for access to input/output bus using burst mode transfer, e.g. direct memory access DMA, cycle steal
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/40—Bus structure
    • G06F13/4063—Device-to-bus coupling
    • G06F13/4068—Electrical coupling
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/42—Bus transfer protocol, e.g. handshake; Synchronisation
    • G06F13/4204—Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus
    • G06F13/4221—Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus being an input/output bus, e.g. ISA bus, EISA bus, PCI bus, SCSI bus
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/42—Bus transfer protocol, e.g. handshake; Synchronisation
    • G06F13/4282—Bus transfer protocol, e.g. handshake; Synchronisation on a serial bus, e.g. I2C bus, SPI bus
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2213/00—Indexing scheme relating to interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F2213/0026—PCI express

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  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Information Transfer Systems (AREA)

Abstract

The present disclosure relates to a system, method, and medium to implement a Virtio device; wherein, this system includes: the host comprises a vDPA Driver and a first PCIe interface, and the Device comprises a vDPA Device and a second PCIe interface, and the vDPA Driver and the vDPA Device communicate through the first PCIe interface and the second PCIe interface; the vDPA Driver is used for realizing the control plane function of the virtual equipment according to the vDPA framework and the virtual protocol specification; the vDPA Device is used for realizing the data plane function of the virtual Device according to the second PCIe interface and the virtual protocol specification. The embodiment of the disclosure can support a kernel framework for the cooperation of software and hardware and support ecology for the cooperation of the software and the hardware.

Description

System, method and medium for implementing Virtio device
Technical Field
The present disclosure relates to the field of hardware interfaces, and in particular, to a system, method, and medium for implementing a Virtio device.
Background
With the development of cloud computing, virtualization, cloud native technology and other technologies, interaction between a Host and Input/Output (I/O) devices of a computer system is required to meet the requirements of extremely high speed and low latency, and the overhead of system resources of the Host is required to be reduced as much as possible.
In order to meet the requirements, the thought of unloading the software functional module to the hardware device is provided, the Virtio is used as an open-source IO interface protocol specification, the defined Virtio device is a virtual IO device realized by the software, the Virtio device based on the Virtio protocol specification can be unloaded to the hardware, however, the software interacted with the device is not planned and defined in the prior art, a kernel framework for the cooperation of the software and the hardware cannot be supported, and the ecology for the cooperation of the software and the hardware cannot be supported.
Disclosure of Invention
In order to solve the technical problems described above, the present disclosure provides a system, a method and a medium for implementing a Virtio device.
In a first aspect, the present disclosure provides a system for implementing a Virtio device, the system comprising:
the host comprises a virtual data path acceleration driving vDPA Driver and a first high-speed serial computer expansion bus standard PCIe interface, the Device comprises a virtual data path acceleration Device vDPA Device and a second PCIe interface, and the vDPA Driver and the vDPA Device communicate through the first PCIe interface and the second PCIe interface;
the vDPA Driver is used for realizing the control plane function of the virtual equipment according to the vDPA framework and the virtual protocol specification;
the vDPA Device is configured to implement a data plane function of the Virtio Device according to the second PCIe interface and the Virtio protocol specification.
Optionally, the second PCIe interface includes at least one physical function PF interface, and each PF interface includes at least one register set, where each register set is communicatively connected to one vDPA Device.
Optionally, the vDPA Driver is configured to:
accessing all register groups included in the corresponding PF interface according to the second PCIe interface to obtain target information corresponding to each register group;
and determining the vDPA Device corresponding to each register group according to all the target information.
Optionally, the vDPA Driver is configured to:
after obtaining the target information corresponding to each register group, creating a target structure body instance, and storing all the target information into the target structure body instance.
Optionally, the vDPA Driver is configured to:
writing first buffer information of received data into a first register group corresponding to the vDPA Device;
the vDPA Device is configured to obtain the first buffer information according to the first register set, write data to be sent into a first data buffer corresponding to the first buffer information, and send the message of successful transmission of the data to be sent to the vDPA Driver, so that the vDPA Driver sends the first buffer information to the vDPA frame.
Optionally, the vDPA Driver is configured to:
receiving second buffer information of the transmitted data sent by the vDPA frame, writing the second buffer information into a second register set corresponding to a vDPA Device, and sending a message for reading data in a second data buffer corresponding to the second buffer information to the vDPA Device through a target register in the second register set;
the vDPA Device is configured to read data from the second data buffer according to the received message.
Optionally, the second PCIe interface supports single root input/output virtualized SR-IOV functions.
Optionally, the host further includes a shared memory, the Device further includes a direct memory access DMA, and the vDPA Device performs data interaction with the shared memory based on the DMA.
In a second aspect, the present disclosure provides a method for implementing a Virtio device, applied to a system for implementing a Virtio device, the system comprising: the host comprises a virtual data path acceleration driving vDPA Driver and a first high-speed serial computer expansion bus standard PCIe interface, the Device comprises a virtual data path acceleration Device vDPA Device and a second PCIe interface, and the vDPA Driver and the vDPA Device communicate through the first PCIe interface and the second PCIe interface, and the method comprises the following steps:
the vDPA Driver realizes the control plane function of the virtual device according to the vDPA framework and the virtual protocol specification;
and the vDPA Device realizes the data plane function of the virtual Device according to the second PCIe interface and the virtual protocol specification.
Optionally, the second PCIe interface includes at least one physical function PF interface, and each PF interface includes at least one register set, where each register set is communicatively connected to one vDPA Device.
Optionally, the method further comprises:
the vDPA Driver accesses all register sets included in the corresponding PF interface according to the second PCIe interface to obtain target information corresponding to each register set;
and determining the vDPA Device corresponding to each register group according to all the target information.
Optionally, the method further comprises:
and after obtaining the target information corresponding to each register group, the vDPA Driver creates a target structure body instance, and stores all the target information into the target structure body instance.
Optionally, the method further comprises:
the vDPA Driver writes the first buffer information of the received data into a first register group corresponding to the vDPADevice;
the vDPA Device acquires the first buffer area information according to the first register group, writes data to be sent into a first data buffer area corresponding to the first buffer area information, and sends the message of successful transmission of the data to be sent to the vDPA Driver, so that the vDPA Driver sends the first buffer area information to the vDPA frame.
Optionally, the method further comprises:
the vDPA Driver receives second buffer zone information of the sent data sent by the vDPA framework, writes the second buffer zone information into a second register set corresponding to the vDPA Device, and sends a message for reading the data in a second data buffer zone corresponding to the second buffer zone information to the vDPA Device through a target register in the second register set;
the vDPA Device reads data from the second data buffer according to the received message.
Optionally, the second PCIe interface supports single root input/output virtualized SR-IOV functions.
Optionally, the host further includes a shared memory, the Device further includes a direct memory access DMA, and the vDPA Device performs data interaction with the shared memory based on the DMA.
In a third aspect, the present disclosure also provides a computer-readable storage medium having stored thereon a computer program which, when executed by a processor, implements a method of implementing a Virtio device as described in any one of the embodiments of the present disclosure.
Compared with the prior art, the technical scheme provided by the embodiment of the disclosure has the following advantages: the vDPA Driver is used for realizing the control plane function of the virtual equipment according to the vDPA framework and the virtual protocol specification; the vDPA Device is used for realizing the data plane function of the virtual Device according to the second PCIe interface and the virtual protocol specification, the system can be compatible with the ecology of the virtualization technology and the cloud native technology through the vDPA framework, the use of the vDPA Driver enables the system to be more flexible, and the system can support a kernel framework of software and hardware coordination and ecology of software and hardware coordination.
Drawings
The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate embodiments consistent with the disclosure and together with the description, serve to explain the principles of the disclosure.
In order to more clearly illustrate the embodiments of the present disclosure or the solutions in the prior art, the drawings that are required for the description of the embodiments or the prior art will be briefly described below, and it will be obvious to those skilled in the art that other drawings can be obtained from these drawings without inventive effort.
Fig. 1 is a schematic structural diagram of a system for implementing a Virtio device according to an embodiment of the present disclosure;
FIG. 2 is a schematic diagram of another system implementing a Virtio device provided by an embodiment of the present disclosure;
fig. 3 is a flow chart of a method for implementing a Virtio device according to an embodiment of the present disclosure.
Detailed Description
In order that the above objects, features and advantages of the present disclosure may be more clearly understood, a further description of aspects of the present disclosure will be provided below. It should be noted that, without conflict, the embodiments of the present disclosure and features in the embodiments may be combined with each other.
In the following description, numerous specific details are set forth in order to provide a thorough understanding of the present disclosure, but the present disclosure may be practiced otherwise than as described herein; it will be apparent that the embodiments in the specification are only some, but not all, embodiments of the disclosure.
Fig. 1 is a schematic structural diagram of a system for implementing a Virtio device according to an embodiment of the present disclosure, where the system is applied to a method for implementing a Virtio device. As shown in fig. 1, the system includes: host 110 and Device120, wherein Host 110 comprises virtual data path acceleration Driver (virtioData Path AccelerationDriver, abbreviated as vDPA Driver) 1101 and first high-speed serial computer expansion bus standard (Peripheral Component Interconnect Express, abbreviated as PCIe) interface 1102, and Device120 comprises vDPA Device (i.e., vddadevice) 1201 and second PCIe interface 1202,vDPA Driver1101, wherein vDPA Device1201 communicates over first PCIe interface 1102 and second PCIe interface 1202. The vDPA Driver1101 is connected to the first PCIe interface 1102, the vDPA Device1201 is connected to the second PCIe interface 1202, and communication can be performed between the first PCIe interface 1102 and the second PCIe interface 1202.
The virtual may be understood as an I/O paravirtualized solution, which is a program virtualized by a general purpose I/O device, and abstracts a group of general purpose I/O devices in a paravirtualized Hypervisor. A Virtio device may be understood as a software-implemented virtual I/O device. The device120 may be a computer device or an electronic device, and the embodiment is not particularly limited. The vDPA Driver1101 can be understood as a vDPA framework-based device Driver component. A vDPA framework can be understood as a kernel framework designed primarily for the offloading of Virtio devices to hardware devices. The Virtio protocol specification is a Virtio defined protocol or specification. The Control Plane can be understood as an implementation path of Control information in data communication. The Data Plane (Data Plane) may be understood as an implementation path of a Data path in Data communication.
The vDPA Driver1101 implements the control plane function of the Virtio device according to the vDPA framework and the Virtio protocol specification, that is: the vDPA Driver1101 is a vDPA Driver that implements the control plane functions of the Virtio device in a vDPA framework-based vDPA Driver.
The vDPA Device1201 implements the data plane functions of the Virtio Device according to the second PCIe interface 1202 and the Virtio protocol specification, namely: the vDPA Device1201 is to offload the data plane functions of the Virtio Device to a hardware implementation.
Through the vDPA Driver1101 and the vDPA Device1201, the two parts are combined and abstracted into the Virtio Device conforming to the vDPA framework, so that unified planning and design of a hardware part and a software part are realized when hardware of the Virtio Device is unloaded.
In this embodiment, the vDPA Driver is configured to implement a control plane function of the Virtio device according to the vDPA framework and the Virtio protocol specification; the vDPA Device is used for realizing the data plane function of the virtual Device according to the second PCIe interface and the virtual protocol specification, the system can be compatible with the ecology of the virtualization technology and the cloud native technology through the vDPA framework, the use of the vDPA Driver enables the system to be more flexible, and the system can support a kernel framework of software and hardware coordination and ecology of software and hardware coordination.
In this embodiment, optionally, the host further includes a shared memory, the Device further includes a direct memory access DMA, and the vDPA Device performs data interaction with the shared memory based on the DMA.
Among other things, direct memory access (Direct Memory Access, DMA) allows hardware devices of different speeds to communicate without the need for a large interrupt load that relies on a central processing unit (Central Processing Unit, CPU for short). The shared memory may include a number of data or resources, etc.
Specifically, the Host 110 includes a Host operating system (HostOperating System, simply referred to as Host OS), and the vDPA Driver1101 and processes (processes) run based on the Host OS. Since the Device120 includes a DMA, the vDPA Device1201 can interact with the shared memory in the host 110 according to the DMA, so that the vDPA Device1201 can obtain data from the shared memory in the host 110 or store data in the shared memory.
In this embodiment, the vDPA Device performs data interaction with the shared memory according to the DMA, which is simpler and faster, and can save time and improve working efficiency.
Fig. 2 is a schematic structural diagram of another system for implementing a Virtio device according to an embodiment of the present disclosure. This embodiment is optimized based on the above embodiment. Optionally, the present embodiment explains the function of the second PCIe interface in detail.
As shown in fig. 2, the system includes a Host 110 and a device120, where the Host 110 includes a vDPA Driver1101, a first PCIe interface 1102, and a shared memory 1103, and the vDPA Driver1101, a process, and the shared memory 1103 operate based on a Host OS; included in the device120 are vddabevice 0 1201-0, vddabevice 1 1201-1, …, vddabevice N1201-N (N is a positive integer greater than 1), a second PCIe interface 1202, and a DMA 1203. The vDPADEvice 0 1201-0, the vDPADEvice 1 1201-1, …, and the vDPADEvice N1201-N belong to the vDPA Device 1201.
It should be noted that: the shared memory 1103 and the DMA 1203 have been described in the above embodiment, and will not be described here again.
The data interaction process of fig. 2 may specifically include: data interaction between processes and shared memory, data interaction between shared memory and DMA, DMA and vDPADevice 0 1201-0, DMA and vDPADevice 1 1201-1, …, and data interaction between DMA and vDPADevice N1201-N.
The second PCIe interface 1202 includes at least one physical function PF interface, where each PF interface includes at least one register set, and each register set is communicatively connected to a vDPA Device.
Among other things, a physical function (Physical Function, abbreviated PF) interface may be understood as an interface for configuring PCIe device-related information or controlling PCIe devices.
It should be noted that: the number of the register sets may be multiple, so that each register set can be in communication connection with its corresponding vDPA Device, so that one PF interface supports multiple vDPA devices, and the utilization ratio of configuration resources is improved.
The register set in this embodiment may be configured in a base address register (Base Address Register, BAR) space of the second PCIe interface 1202. BAR space can be understood as the memory space pointed to by the base address register.
Illustratively, the second PCIe interface 1202 in FIG. 2 includes a PF interface that includes N (N is a positive integer greater than 1) register sets, register set 0 and vDPA Device 0 1201-0 are communicatively coupled, register set 1 and vDPA Device1 1201-1 are communicatively coupled, …, and register set N and vDPA Device N1201-N are communicatively coupled.
It should be noted that: the second PCIe interface 1202 may further include a plurality of PF interfaces, which is not specifically limited in this embodiment.
In this embodiment, optionally, when the second PCIe interface supports single root input/output virtualization SR-IOV, the PF interface may configure to generate a VF interface; correspondingly, the second PCIe interface comprises at least one PF interface and at least one VF interface, each PF interface and each VF interface comprises at least one register set, and each register set is in communication connection with one vDPA Device.
The single root input/output virtualization (Single Root Input/Output Virtualization, referred to as SR-IOV for short) may be understood as a hardware-based virtualization solution, which can improve performance and scalability, and the SR-IOV standard allows PCIe devices to be shared efficiently between virtual machines, which is implemented in hardware, and may achieve better I/O performance. When the second PCIe interface supports the SR-IOV, the PF interface comprises an SR-IOV function structure, and can manage the functions of the SR-IOV. Virtual Functions (VFs) are understood to be functions associated with the PF in the SR-IOV. A VF may share one or more physical resources with the PF and other VFs associated with the same PF. VFs possess configuration resources for their own behavior.
It should be noted that: the second PCIe interface 1202 may further include a plurality of PF interfaces and a plurality of VF interfaces, which is not particularly limited in this embodiment.
In this embodiment, by planning the BAR space of the second PCIe interface, when the second PCIe interface supports SR-IOV, the PF interface and the VF interface include a plurality of register groups, and according to the plurality of register groups, a plurality of vDPA devices can be expanded, thereby improving the utilization rate of resources and avoiding waste of resources.
In this embodiment, optionally, the vDPA Driver is configured to:
accessing all register groups included in the corresponding PF interface according to the second PCIe interface to obtain target information corresponding to each register group;
and determining the vDPA Device corresponding to each register group according to all the target information.
The target information may be understood as identity information of a target vDPA Device connected to the register set.
Specifically, since the PF interface is disposed in the second PCIe interface 1202, the vDPA Driver1101 is connected to the first PCIe interface 1102, and the first PCIe interface 1102 is communicatively connected to the second PCIe interface 1202, so that the vDPA Driver can access all register sets included in the corresponding PF interface in the second PCIe interface 1202 according to the first PCIe interface 1102 and the second PCIe interface 1202, specifically, can access the corresponding register sets according to an identity identifier of the PF interface, for example, a name of the PF interface, an identifier number of the PF interface, and the like. After accessing all the register groups included in the PF interface, the vDPA Driver can obtain the target information corresponding to each register group in the PF interface, and according to all the target information, can determine the vDPA Device corresponding to each register group, that is: it is determined which register set is connected to which vDPA Device.
In this embodiment, optionally, when the second PCIe interface supports SR-IOV, the PF interface may configure to generate a VF interface; correspondingly, the second PCIe interface comprises at least one PF interface and at least one VF interface, each PF interface and each VF interface comprises at least one register set, and each register set is in communication connection with one vDPA Device; at this time, the vDPA Driver is configured to: accessing all register sets included in the corresponding PF interface and VF interface according to the second PCIe interface to obtain target information corresponding to each register set; and determining the vDPA Device corresponding to each register group according to all the target information.
Specifically, since the PF interface and the VF interface are disposed in the second PCIe interface 1202, the vDPA Driver can access all register sets included in the corresponding PF interface and VF interface in the second PCIe interface 1202 according to the first PCIe interface 1102 and the second PCIe interface 1202, specifically, can access according to the identities of the PF interface and the VF interface, for example, the name of the PF interface, the name of the VF interface, the identification number of the PF interface, the identification number of the VF interface, and the like. After accessing all the register groups included in the PF interface and the VF interface, the vDPA Driver can obtain the target information corresponding to each register group in the PF interface and the VF interface, and according to all the target information, can determine the vDPA Device corresponding to each register group, that is: it is determined which register set is connected to which vDPA Device. In this embodiment, by determining that each register corresponds to a vDPA Device, management and access to multiple vDPA devices are facilitated, and errors are prevented.
In this embodiment, optionally, the vDPA Driver is configured to:
after obtaining the target information corresponding to each register group, creating a target structure body instance, and storing all the target information into the target structure body instance.
The target structure instance is understood as a structure instance written by a structure variable, and is mainly used for storing target information corresponding to a register group.
In this embodiment, after each register group obtains the corresponding target information, by creating a target structure instance and storing all the target information into the target structure instance, the subsequent obtaining and use of the target information are facilitated, and the loss of the target information is avoided.
In this embodiment, optionally, the vDPA Driver is configured to:
writing first buffer information of received data into a first register group corresponding to the vDPA Device;
the vDPA Device is configured to obtain the first buffer information according to the first register set, write data to be sent into a first data buffer corresponding to the first buffer information, and send the message of successful transmission of the data to be sent to the vDPA Driver, so that the vDPA Driver sends the first buffer information to the vDPA frame.
The first buffer information of the received data may be understood as information recording the location of the first data buffer. The first data buffer may be understood as an area for storing data sent by the vDPA Device to the vDPA Driver. The data to be transmitted may be understood as data to be transmitted by the vDPA Device to the vDPA Driver. The first register set may be understood as a register set corresponding to the vDPA Device.
Specifically, the specific procedure of the vDPA Device1201 transmitting data to the vDPA Driver1101 may be as follows:
first, the vDPA Driver1101 defines first buffer information of received data, and writes the first buffer information into a first register set corresponding to the vDPA Device1201, so that the subsequent vDPA Device1201 can acquire the first buffer information. Next, the vDPA Device1201 can acquire the first buffer information by accessing the first register set, and can determine the first data buffer location according to the first buffer information, so as to write the data to be transmitted into the first data buffer, and after the writing of the data to be transmitted is completed, send a message that the transmission of the data to be transmitted is successful to the vDPA Driver1101, where the message may be sent through an interrupt. After receiving the message that the data to be sent is successfully transmitted and sent by the vDPA Device1201, the vDPA Driver1101 sends the first buffer information to the vDPA frame according to the message, so that a subsequent operating system or other applications acquire the data to be sent through the vDPA frame.
In this embodiment, the process of sending data from the vDPA Device to the vDPA Driver is implemented through the first buffer information and the first register set, and because the first register set corresponds to the vDPA Driver, the process of sending data is efficient and fast, so that time can be saved and working efficiency can be improved.
In this embodiment, optionally, the vDPA Driver is configured to:
receiving second buffer information of the transmitted data sent by the vDPA frame, writing the second buffer information into a second register set corresponding to a vDPA Device, and sending a message for reading data in a second data buffer corresponding to the second buffer information to the vDPA Device through a target register in the second register set;
the vDPA Device is configured to read data from the second data buffer according to the received message.
The second buffer information of the transmission data may be understood as information recording the location of the second data buffer. The second data buffer may be understood as an area for storing data transmitted by the vDPA Driver to the vDPA Device. The second register set may be understood as a register set corresponding to the vDPA Device. Since there may be multiple vDPA devices, when the same vDPA Device is used to receive data and transmit data, the first register set and the second register set are the same register set, and in other cases, the first register set and the second register set may be different register sets. The first register set and the second register set may each include a plurality of registers, which is not particularly limited in this embodiment. The destination register may be understood as a register for sending a corresponding message to the vDPA Device.
Specifically, the specific process of the vDPA Driver1101 sending data to the vDPA Device1201 may be as follows:
first, the vDPA Driver1101 receives second buffer information of the transmitted data transmitted by the vDPA frame, writes the second buffer information into a second register set corresponding to the vDPA Device1201, and can transmit a message for reading data in a second data buffer corresponding to the second buffer information to the corresponding vDPA Device1201 through a target register in the second register set. After receiving the message sent by the vDPA Driver1101 to read the data in the second data buffer corresponding to the second buffer information, the vDPA Device1201 can read the corresponding data from the second data buffer according to the message.
In this embodiment, the process of sending data from the vddpadviver to the vDPA Device is implemented through the second buffer information and the second register set, and the process of sending data is more efficient and faster because the second register set corresponds to the vDPA Device, which is beneficial to saving time and improving working efficiency.
Fig. 3 is a flowchart of a method for implementing a Virtio device according to an embodiment of the present disclosure, where the embodiment is applied to a system for implementing a Virtio device. As shown in fig. 3, the system includes: the host comprises a vDPA Driver and a first PCIe interface, the Device comprises a vDPA Device and a second PCIe interface, and the vDPA Driver and the vDPA Device communicate through the first PCIe interface and the second PCIe interface, and the method specifically comprises the following steps:
s310, enabling the vDPA Driver to realize the control plane function of the virtual device according to the vDPA framework and the virtual protocol specification;
s320, the vDPA Device realizes the data plane function of the virtual Device according to the second PCIe interface and the virtual protocol specification.
In this embodiment, optionally, the second PCIe interface includes at least one physical function PF interface, and each PF interface includes at least one register set, where each register set is communicatively connected to one vDPA Device.
In this embodiment, optionally, the method further includes:
the vDPA Driver accesses all register groups included in the corresponding PF interface according to the second PCIe interface to obtain target information corresponding to each register group;
and determining the vDPA Device corresponding to each register group according to all the target information.
In this embodiment, optionally, the method further includes:
and after obtaining the target information corresponding to each register group, the vDPA Driver creates a target structure body instance, and stores all the target information into the target structure body instance.
In this embodiment, optionally, the method further includes:
the vDPA Driver writes the first buffer information of the received data into a first register group corresponding to the vDPADevice;
the vDPA Device acquires the first buffer area information according to the first register group, writes data to be sent into a first data buffer area corresponding to the first buffer area information, and sends the message of successful transmission of the data to be sent to the vDPA Driver, so that the vDPA Driver sends the first buffer area information to the vDPA frame.
In this embodiment, optionally, the method further includes:
the vDPA Driver receives second buffer zone information of the sent data sent by the vDPA framework, writes the second buffer zone information into a second register set corresponding to the vDPA Device, and sends a message for reading data in a second data buffer zone corresponding to the second buffer zone information to the vDPA Device through a target register in the second register set;
the vDPA Device reads data from the second data buffer according to the received message.
In this embodiment, the second PCIe interface optionally supports single root input/output virtualized SR-IOV functions.
In this embodiment, optionally, the host further includes a shared memory, the Device further includes a direct memory access DMA, and the vDPA Device performs data interaction with the shared memory based on the DMA.
According to the method for realizing the virtual Device, firstly, the vDPA Driver realizes the control plane function of the virtual Device according to the vDPA framework and the virtual protocol specification, secondly, the vDPA Device realizes the data plane function of the virtual Device according to the second PCIe interface and the virtual protocol specification, the system can be compatible with the virtualization technology and the cloud native technology ecology through the vDPA framework, the system is more flexible due to the use of the vDPA Driver, and the system can support the kernel framework of software and hardware cooperation and the ecology of the software and hardware cooperation.
The disclosed embodiments also provide a storage medium containing computer-executable instructions, which when executed by a computer processor, are for implementing the methods of implementing a Virtio device provided by the disclosed embodiments.
Of course, the storage medium containing the computer executable instructions provided by the embodiments of the present disclosure is not limited to the method operations described above, and may also perform related operations in the method for implementing the Virtio device provided by any embodiment of the present disclosure.
From the above description of embodiments, it will be apparent to those skilled in the art that the present disclosure may be implemented by means of software and necessary general purpose hardware, but may of course also be implemented by means of hardware, although in many cases the former is a preferred embodiment. Based on such understanding, the technical solution of the present disclosure may be embodied essentially or in a part contributing to the prior art in the form of a software product, which may be stored in a computer readable storage medium, such as a floppy disk, a Read-Only Memory (ROM), a random access Memory (Random Access Memory, RAM), a FLASH Memory (FLASH), a hard disk, or an optical disk of a computer, etc., including several instructions for causing a computer device (which may be a personal computer, a server, or a network device, etc.) to execute the method described in the embodiments of the present disclosure.
It should be noted that, in the embodiment of the system for implementing the Virtio device, each unit and module included are only divided according to the functional logic, but are not limited to the above division, so long as the corresponding functions can be implemented; in addition, the specific names of the functional units are also only for distinguishing from each other, and are not used to limit the protection scope of the present disclosure.
It should be noted that in this document, relational terms such as "first" and "second" and the like are used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Moreover, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising one … …" does not exclude the presence of other like elements in a process, method, article, or apparatus that comprises the element.
The foregoing is merely a specific embodiment of the disclosure to enable one skilled in the art to understand or practice the disclosure. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the generic principles defined herein may be applied to other embodiments without departing from the spirit or scope of the disclosure. Thus, the present disclosure is not intended to be limited to the embodiments shown and described herein but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.

Claims (8)

1. A system for implementing a Virtio device, the system comprising: the host comprises a virtual data path acceleration driving vDPA Driver and a first high-speed serial computer expansion bus standard PCIe interface, the Device comprises a virtual data path acceleration Device vDPA Device and a second PCIe interface, and the vDPA Driver and the vDPA Device communicate through the first PCIe interface and the second PCIe interface;
the vDPA Driver is used for realizing the control plane function of the virtual equipment according to the vDPA framework and the virtual protocol specification;
the vDPA Device is configured to implement a data plane function of the Virtio Device according to the second PCIe interface and the Virtio protocol specification;
the second PCIe interface comprises at least one physical function PF interface, each PF interface comprises at least one register group, and each register group is in communication connection with one vDPADevice;
the vDPA Driver is configured to write first buffer information of received data into a first register set corresponding to vddpadevice;
the vDPA Device is configured to obtain the first buffer information according to the first register set, write data to be sent into a first data buffer corresponding to the first buffer information, and send the message of successful transmission of the data to be sent to the vDPA Driver, so that the vDPA Driver sends the first buffer information to the vDPA frame.
2. The system of claim 1, wherein the vDPA Driver is configured to:
accessing all register groups included in the corresponding PF interface according to the second PCIe interface to obtain target information corresponding to each register group;
and determining the vDPADevice corresponding to each register group according to all the target information.
3. The system of claim 2, wherein the vDPA Driver is configured to:
after obtaining the target information corresponding to each register group, creating a target structure body instance, and storing all the target information into the target structure body instance.
4. The system of claim 1, wherein the vDPA Driver is configured to:
receiving second buffer information of the transmitted data sent by the vDPA frame, writing the second buffer information into a second register set corresponding to a vDPA Device, and sending a message for reading data in a second data buffer corresponding to the second buffer information to the vDPA Device through a target register in the second register set;
the vDPA Device is configured to read data from the second data buffer according to the received message.
5. The system of claim 1, wherein the second PCIe interface supports single root input/output virtualized SR-IOV functions.
6. The system of any of claims 1-5, wherein the host further comprises a shared memory, the Device further comprises a direct memory access DMA, and the vDPA Device is configured to interact with the shared memory based on the DMA.
7. A method for implementing a Virtio device, applied to a system for implementing a Virtio device, the system comprising: the host comprises a virtual data path acceleration driving vDPA Driver and a first high-speed serial computer expansion bus standard PCIe interface, the Device comprises a virtual data path acceleration Device vDPA Device and a second PCIe interface, the vDPA Driver and the vDPA Device communicate through the first PCIe interface and the second PCIe interface, and the method comprises the following steps:
the vDPA Driver realizes the control plane function of the virtual device according to the vDPA framework and the virtual protocol specification;
the vDPA Device realizes the data plane function of the virtual Device according to the second PCIe interface and the virtual protocol specification;
the second PCIe interface comprises at least one physical function PF interface, each PF interface comprises at least one register group, and each register group is in communication connection with one vDPADevice;
the vDPA Driver writes the first buffer information of the received data into a first register group corresponding to the vDPADevice;
the vDPA Device acquires the first buffer area information according to the first register group, writes data to be sent into a first data buffer area corresponding to the first buffer area information, and sends the message of successful transmission of the data to be sent to the vDPA Driver, so that the vDPA Driver sends the first buffer area information to the vDPA frame.
8. A computer readable storage medium, on which a computer program is stored, characterized in that the program, when being executed by a processor, implements the method as claimed in claim 7.
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