CN114237377B - Control method and system of power management integrated chip of display panel - Google Patents
Control method and system of power management integrated chip of display panel Download PDFInfo
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- CN114237377B CN114237377B CN202111540036.5A CN202111540036A CN114237377B CN 114237377 B CN114237377 B CN 114237377B CN 202111540036 A CN202111540036 A CN 202111540036A CN 114237377 B CN114237377 B CN 114237377B
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- G—PHYSICS
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- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
- G06F1/26—Power supply means, e.g. regulation thereof
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/08—Error detection or correction by redundancy in data representation, e.g. by using checking codes
- G06F11/10—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
- G06F11/1004—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's to protect a block of data words, e.g. CRC or checksum
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F15/00—Digital computers in general; Data processing equipment in general
- G06F15/76—Architectures of general purpose stored program computers
- G06F15/78—Architectures of general purpose stored program computers comprising a single central processing unit
- G06F15/7807—System on chip, i.e. computer system on a single chip; System in package, i.e. computer system on one or more chips in a single package
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Abstract
The invention discloses a control method and a system of a power management integrated chip of a display panel, wherein the power management integrated chip comprises a register, the register comprises a first state bit and a data bit, and the first state bit is used for storing writing state parameters of automatic gamma correction data; the control method of the power management integrated chip of the display panel comprises the steps of detecting a state value of a first state bit when the display panel is started; judging whether automatic gamma correction data need to be written into the data bit according to the state value of the first state bit; if yes, writing the automatic gamma correction data into a register; therefore, whether the automatic gamma correction data are written in is determined by detecting the state value of the first state bit in the register, multiple times of writing of the automatic gamma correction data are avoided, the redundant flow of the starting process is further saved, the starting time is effectively saved, and the starting efficiency is improved.
Description
Technical Field
The present disclosure relates to the field of display technologies, and in particular, to a method and a system for controlling a power management integrated chip of a display panel.
Background
For a display panel with an automatic gamma correction function, a corresponding automatic gamma correction flow is required to be set during power-on operation. The automatic gamma correction is an algorithm mechanism capable of adjusting the gamma voltage or the common voltage of the display panel, and because the gamma voltage or the common voltage corresponding to the optimal state of each display panel has a difference, the panel factory can store the difference data in the Source board of the display panel, and the SoC can read the automatic gamma correction data in the memory through the SPI protocol. At present, when the display panel is powered on each time, the automatic gamma correction data needs to be rewritten, and a corresponding writing flow of the automatic gamma correction data is operated, so that the starting speed is influenced, and the data loss is easy to cause.
Disclosure of Invention
The invention aims to provide a control method and a system for a power management integrated chip of a display panel, which can effectively solve the problem of low starting efficiency caused by the fact that the display panel needs to be written with automatic gamma correction when being electrified every time.
In order to achieve the above purpose, the invention adopts the following technical scheme:
the embodiment of the application provides a control method of a power management integrated chip of a display panel, wherein the power management integrated chip comprises a register, the register comprises a first state bit and a data bit, the first state bit is used for storing writing state parameters of automatic gamma correction data, and the control method comprises the following steps:
detecting a state value of a first state bit when the power-on is started;
judging whether automatic gamma correction data need to be written into the data bit according to the state value of the first state bit;
if so, the automatic gamma correction data is written into the register.
In some embodiments, the control method of the power management integrated chip of the display panel, the register further includes a second status bit, the second status bit is used for storing an operating status parameter of the register, and the step before detecting the status value of the first status bit is further included:
detecting a state value of the second state bit;
judging whether the initial set value is required to be written into the data bit according to the state value of the second state bit;
if yes, the initial setting value is written into the register.
In some embodiments, the method for controlling the power management integrated chip of the display panel, according to the state value of the second state bit, the step of determining whether the initial set value needs to be written into the data bit includes:
when the state value of the second state bit is 0, it is determined that the initial setting value needs to be written into the data bit.
In some embodiments, the method for controlling the power management integrated chip of the display panel, according to the state value of the first state bit, the step of determining whether the automatic gamma correction data needs to be written into the data bit includes:
when the state value of the first state bit is 0, it is determined that the automatic gamma correction data needs to be written into the data bit.
In some embodiments, the method for controlling the power management integrated chip of the display panel further includes, after the step of writing the initial setting value into the register:
and checking the initial set value.
In some embodiments, the method for controlling the power management integrated chip of the display panel further includes, after the step of writing the automatic gamma correction data into the register:
and checking the automatic gamma correction data.
The embodiment of the application also provides a control system of the power management integrated chip of the display panel, which comprises the control chip, the display panel and the power management integrated chip; the power management integrated chip comprises a register, the register comprises a first state bit and a first data bit, the first state bit is used for storing writing state parameters of automatic gamma correction data, and the control chip is used for controlling the power management integrated chip to store the writing state parameters of the automatic gamma correction data;
detecting a state value of a first state bit when the power-on is started;
judging whether automatic gamma correction data need to be written into the data bit according to the state value of the first state bit;
if so, the automatic gamma correction data is written into the register.
In some embodiments, in the control system of the power management integrated chip of the display panel, the register further includes a second status bit, where the second status bit is used to store an operating status parameter of the register; the control chip is also used for:
detecting a state value of the second state bit;
judging whether the initial set value is required to be written into the data bit according to the state value of the second state bit;
if yes, the initial setting value is written into the register.
In some embodiments, in the control system of the power management integrated chip of the display panel, the control chip is specifically configured to determine that the initial setting value needs to be written into the data bit when the state value of the second state bit is 0.
In some embodiments, in the control system of the power management integrated chip of the display panel, the control chip is specifically configured to determine that the automatic gamma correction data needs to be written into the data bit when the state value of the first state bit is 0.
In some embodiments, in the control system of the power management integrated chip of the display panel, the control chip is further used for verifying the initial set value.
In some embodiments, in the control system of the power management integrated chip of the display panel, the control chip is further configured to verify the correction set value for the automatic gamma correction data.
Compared with the prior art, the control method and the system for the power management integrated chip of the display panel provided by the invention have the advantages that whether the automatic gamma correction data are written or not is determined by detecting the state value of the first state bit in the register, the automatic gamma correction data are not required to be written when the power is on each time, the repeated writing of the automatic gamma correction data is avoided, the redundant flow of the starting process is further saved, the starting time is effectively saved, and the starting efficiency is improved.
Drawings
Fig. 1 is a flowchart of a control method of a power management integrated chip of a display panel according to an embodiment of the invention.
Fig. 2 is a flowchart of another embodiment of a control method of a power management integrated chip of a display panel according to the present invention.
Fig. 3 is a block diagram of a control system of a power management integrated chip of a display panel according to the present invention.
Fig. 4 is a working flow of a control system of a power management integrated chip of a display panel provided by the invention.
Detailed Description
In view of the shortcomings of the prior art, the invention aims to provide a control method and a system for a power management integrated chip of a display panel, which can effectively solve the problem of low starting efficiency caused by the fact that the display panel needs to be written with automatic gamma correction when being electrified every time.
In order to make the objects, technical solutions and effects of the present invention clearer and more specific, the present invention will be described in further detail below with reference to the accompanying drawings and examples. It should be understood that the specific embodiments described herein are for purposes of illustration only and are not intended to limit the scope of the invention.
Referring to fig. 1, the control method of a power management integrated chip of a display panel provided by the present invention includes a register, wherein the register includes a first status bit and a data bit, the first status bit is used for storing a writing status parameter of automatic gamma correction data, and the control method includes the following steps:
100. detecting a state value of a first state bit in a register when the computer is started;
200. judging whether automatic gamma correction data need to be written into the data bit according to the state value of the first state bit;
300. if so, the automatic gamma correction data is written into the register.
In this embodiment, when the display panel is powered on and turned on, the control chip in the display panel detects the state value of the first state bit of the register, determines whether the automatic gamma correction data has been written according to the state value of the first state bit in the register, and if the automatic gamma correction data has been written, the automatic gamma correction data in the display panel does not need to be read again, and then the automatic gamma correction data does not need to be written again to the data bit, and the control chip does not perform any action. If the automatic gamma correction data is not written according to the state value of the first state bit, the automatic gamma correction data is required to be read, the automatic gamma correction data stored in the display panel is read by the control chip, and then the automatic gamma correction data is written into the register through the data bit by the control chip. Compared with the method that the automatic gamma correction data are required to be written after the display panel is powered on each time, whether the automatic gamma correction data are written or not is determined through detecting the state value of the first state bit in the register, the automatic gamma correction data do not need to be rewritten when the display panel is powered on each time, and therefore redundant processes of a starting process are saved, and starting time is effectively saved.
Further, in another embodiment of the present invention, the register further includes a second status bit, and the second status bit is used for storing the working status parameter of the register, referring to fig. 2, before step 100, further includes:
110. detecting a state value of the second state bit when the power-on is started;
120. judging whether the initial set value is required to be written into the data bit according to the state value of the second state bit;
130. if yes, the initial setting value is written into the register.
In this embodiment, when the display panel is powered on and turned on, the control chip may detect the state value of the second state bit in the register first and then detect the state value of the first state bit. Specifically, the control chip determines whether an initial set value is written into the register according to the detected state value of the second state bit, where the initial set value refers to a voltage that the power management integrated chip needs to output to the display panel, for example, a gamma voltage or a common voltage, and the specific setting can be set according to the requirement of the display panel; the memory in the power management integrated chip may also store a part of fixed voltage information, for example, set the voltage of VDD3V3 to 3.3V. If the register is determined to not be written with the initial set value, writing the initial set value into the register through a data bit; otherwise, if the initial set value is already written into the register, the initial set value does not need to be written again, so that the repeated writing of the initial set value can be avoided, and the starting time is further saved.
When the state value of the second state bit in the register is detected, determining that the initial set value is stored in the register according to the state value of the second state bit; then continuing to judge the state value of the first state bit in the register, and determining whether the automatic gamma correction data is written in the register according to the state value of the first state bit, if the automatic gamma correction data is written in the register, the automatic gamma correction data in the display panel does not need to be read again, and then the automatic gamma correction data does not need to be written in the data bit again; otherwise, if the automatic gamma correction data is not written, the automatic gamma correction data in the display panel needs to be read, and then the data bits are written into the register to complete the writing process of the automatic gamma correction data, so that whether the automatic gamma correction data and the initial set value are successfully written or not can be effectively confirmed by detecting the state values of the two state bits in the register.
Further, step 20 includes: when the state value of the second state bit is 0, it is determined that the initial setting value needs to be written into the data bit.
Specifically, the second status bit defined in this embodiment is EN bit. When the EN is defined as that the power management integrated chip starts to work, and when the state value of the first state bit is 1, namely the working state parameter is 1, a register in the power management integrated chip is indicated to start to work; when the state value of the first state bit is 0, that is, the working state parameter is 0, it indicates that the register in the power management integrated chip is not working. Wherein the state value of the first state bit defaults to 0. Therefore, by defining the second state bit of the register, whether the register starts working or not can be effectively judged only by detecting the state value of the second state bit, and whether the initial set value is written or not correspondingly is effectively judged.
Further, step 200 includes: when the state value of the first state bit is 0, it is determined that the automatic gamma correction data needs to be written into the data bit.
The first status bit defined in this embodiment is an AP bit. Wherein when the state value of the second state bit is 1, i.e. the writing state parameter is 1, it indicates that the automatic gamma correction data is written, and when the state value of the second state bit is 0, i.e. the writing state parameter is 0, it indicates that the automatic gamma correction data is not written. Therefore, by defining the first state bit of the register, whether the register is written with the initial set value can be effectively judged only by detecting the state value of the first state bit, if so, the register is not required to be written again, and if not, the automatic gamma correction data is written into the data bit in the register, so that the automatic gamma correction data is prevented from being rewritten when the power is on each time, and the starting time is saved.
Further, in an embodiment of the present invention, step 30 further includes: and checking the initial set value.
When the SOC determines that the initial set value needs to be written, the initial set value is written into the register, and then the initial set value is checked, for example, check sum or CRC Check is performed on the initial set value, and the integrity and accuracy of the initial set value written into the register are ensured by checking the initial set value.
Further, in an embodiment of the present invention, step 300 further includes: and checking the automatic gamma correction data.
In specific implementation, after the control chip writes the automatic gamma correction data into the register, the automatic gamma correction data is checked, for example, check sum or CRC Check is performed on the automatic gamma correction data, so that the integrity and accuracy of the written automatic gamma correction data are ensured.
Referring to fig. 3, the present invention further provides a data downloading system of the display panel 21, which includes a control chip 11, the display panel 21 and a power management integrated chip 31; the power management integrated chip 31 includes a register 311 and a first memory 312, and the display panel 21 includes a second memory 211; the register 311 is connected to the control chip 11 and the first memory 312, and the control chip 11 is also connected to the second memory 211; the register 311 includes a first status bit and a first data bit, the first status bit is used for storing a writing status parameter of the automatic gamma correction data, and the control chip 11 is used for detecting a status value of the first status bit when the computer is started; judging whether automatic gamma correction data need to be written into the data bit according to the state value of the first state bit; if so, the automatic gamma correction data is written into the register 311.
In specific implementation, the control chip 11 is configured to detect a state value of a first state bit in the register 311, and read the automatic gamma correction data when it is determined that the automatic gamma correction data in the second memory 211 needs to be read according to the state value of the first state bit, and write the automatic gamma correction data into the register 311; the register 311 is used for acquiring automatic gamma correction data; the first memory 312 is used for storing the gamma corrected setting value in the register 311.
In this embodiment, the control chip 11 may be an SOC or a T-CON IC, the first memory 312 may be a rewritable memory, and the second memory 211 may be a nonvolatile memory. After the display panel 21 is powered on, the control chip 11 detects the state value of the first state bit to further determine whether to write the automatic gamma correction data, so that multiple writing of the automatic gamma correction data can be avoided, and the startup time can be effectively saved. After the automatic gamma correction data is written into the register 311, the initial setting value stored in the register 311 is corrected by the automatic gamma correction data, so as to obtain a corrected setting value, and the corrected setting value is stored in the first memory 312, so that the gamma correction process of the initial setting value is completed, the data provided by the power management integrated chip 31 for the display panel 21 is more accurate, and the display panel 21 is ensured to display the best effect.
Further, the register 311 further includes a second status bit for storing the operating status parameter of the register 311. In specific implementation, the control chip 11 is further configured to detect a state value of the second state bit, and determine, according to the state value of the second state bit, whether the initial set value register 311 needs to be written into the data bit, if yes, write the initial set value into the register 311; if it is determined that the register 311 is not written with the initial set value, writing the initial set value into the register 311 through the data bit; on the contrary, if it is determined that the initial setting value has been written into the register 311, the writing is not needed again, so that multiple writing of the initial setting value can be avoided, and the starting time is further saved.
In this embodiment, when the control chip 11 detects the state value of the second state bit in the register 311, it determines that the initial set value has been stored in the register 311 according to the state value of the second state bit; then continuing to determine the state value of the first state bit in the register 311, and determining whether the automatic gamma correction data has been written in the register 311 according to the state value of the first state bit, if the automatic gamma correction data has been written, then the automatic gamma correction data in the display panel 21 does not need to be read again, and then the automatic gamma correction data does not need to be written again into the data bit; on the contrary, if the automatic gamma correction data is not written, the automatic gamma correction data in the display panel 21 needs to be read, and then the data bits are written into the register 311 to complete the writing process of the automatic gamma correction data, so that whether the automatic gamma correction data and the initial set value are successfully written can be effectively confirmed by detecting the state values of the two state bits in the register 311.
Specifically, when the control chip 11 determines that the state value of the second state bit is 0, it determines that the initial setting value needs to be written into the data bit, writes the initial setting value into the register 311, and then verifies the initial setting value, so that the control chip 11 can effectively avoid multiple writing of the initial setting value. And the integrity and accuracy of the initial set value can be effectively ensured by checking the written initial set value.
Further, the control chip 11 is specifically configured to determine that the automatic gamma correction data needs to be written into the data bit when the state value of the first state bit is 0, which is equivalent to writing the automatic gamma correction data into the register 311. After the control chip 11 stores the automatic gamma correction data into the register 311, it is further required to verify the automatic gamma correction data, so as to ensure the integrity and accuracy of the written automatic gamma correction data.
In order to better understand the present invention, the following describes in detail the workflow of the data downloading system of the display panel provided by the present invention with reference to fig. 4 by taking a specific application embodiment as follows:
s10, after power-up, confirming whether automatic gamma correction is needed, if yes, executing a step S20, and if not, executing a step S90;
s20, reading a state value of a first state bit and a state value of a second state bit of the register;
s30, judging whether the state value of the first state bit is a second state value, if so, executing a step S40; if not, executing step S70;
s40, judging whether the state value of the second state bit is the second state value, if so, ending; if not, executing step S50;
s50, reading the automatic gamma correction data, writing the automatic gamma correction data into a register, and checking the automatic gamma correction data;
s60, writing the corrected setting value subjected to gamma correction into a first memory, and returning to the step S40;
s70, writing the initial set value into a register, and checking the initial set value;
s80, writing the verified initial set value into a first memory;
s90, reading a state value of a first state bit of the register;
s91, judging whether the state value of the first state position is a second state value, if so, ending; if not, executing step S92;
s92, writing the initial set value into a register, and checking the initial set value;
s93, writing the verified initial set value into the first memory, and returning to the step S91.
That is, after the data download system is powered on for the first time, the power management integrated chip 31 writes default data in the first memory 312 into the register 311, and at this time, the state values of the first state bit and the second state bit of the register 311 are both the first state value. Then, it is determined whether the display panel 21 needs to perform the automatic gamma correction, specifically, if the display panel 21 has the automatic gamma correction function, the corresponding automatic gamma correction process will be performed, and if the display panel 21 does not have the automatic gamma correction function, the corresponding automatic gamma correction process will not be performed.
For the display panel 21 requiring the automatic gamma correction function, when the power is first turned on, the control chip 11 reads the state value of the first state bit and the state value of the second state bit of the register 311, and then determines the state value of the first state bit and the state value of the second state bit. The state value of the first state bit is 0 after the first power-on, the initial set value is written into the register 311, the initial set value is checked, the checked initial set value is written into the memory, the state value of the first state bit is continuously judged, a cycle is completed, when the cycle reaches the preset times, the automatic gamma correction data cannot be read, the dislocation information is returned, and the display black screen can be correspondingly set. When the state value of the first state bit is 1 and the state value of the second state bit is 0, the automatic gamma correction data is read, written into the register 311, checked, and then the corrected setting value after gamma correction is written into the first memory 312, so as to complete the downloading of the initial setting value and the automatic gamma correction data after the first power-on.
When the display panel 21 is powered on again, the power management integrated chip 31 writes the data stored in the first memory 312 into the register 311, if the state values of the first state bit and the second state bit in the register 311 are detected to be 1 at this time, it indicates that when the power is first powered on, the initial set value and the automatic gamma correction data are written, and then the data do not need to be written again, and at this time, the control chip 11 does not perform any action any more; if one of the state values of the first state bit and the second state bit is 0 or both are 0, it indicates that there is data not written, and then the first power-on data downloading process needs to be performed again, so that multiple writing of the initial set value and the automatic gamma correction data can be avoided, and further the starting time can be saved.
Then, for the display panel 21 that does not need to perform the automatic gamma correction, only the state value of the first state bit needs to be determined, that is, when the state value of the first state bit is 0, the control chip 11 writes the initial set value into the register 311, verifies the initial set value, then writes the data in the register 311 into the first memory 312, returns to the step of determining the state value of the first state bit, completes a cycle, and it should be noted that when the number of cycles reaches the preset number, the automatic gamma correction data cannot be read, and returns the dislocation information, and accordingly, the display black screen can be set. When the state value of the first state bit is 1, the control chip 11 does not need to perform any action.
The invention judges whether the initial setting value and the automatic gamma correction data are written or not by detecting the two status bits of the register 311, thereby directly confirming whether the initial setting value and the automatic gamma correction data are written or not by reading the information of the register 311. And through a simple data downloading flow, the initial set value and the automatic gamma correction data do not need to be written for many times, so that the starting redundancy operation is avoided, and the starting time is effectively saved. If the first memory 312 in the power management integrated chip 31 is damaged, according to the data downloading process of the present invention, the status value of the status bit of the register 311 is read to be 0, so that the related data can be written into the register 311 of the power management integrated chip 31 again, and the normal operation of the power management integrated chip 31 is not affected, thereby ensuring the stability of the operation of the power management integrated chip 31.
In summary, the present invention provides a method and a system for controlling a power management integrated chip of a display panel, where the power management integrated chip includes a register, the register includes a first status bit and a data bit, and the first status bit is used to store a writing status parameter of automatic gamma correction data; the control method of the power management integrated chip of the display panel comprises the steps of detecting a state value of a first state bit when the display panel is started; judging whether automatic gamma correction data need to be written into the data bit according to the state value of the first state bit; if yes, writing the automatic gamma correction data into a register; therefore, whether the automatic gamma correction data are written in is determined by detecting the state value of the first state bit in the register, multiple times of writing of the automatic gamma correction data are avoided, the redundant flow of the starting process is further saved, the starting time is effectively saved, and the starting efficiency is improved.
It will be understood that equivalents and modifications will occur to those skilled in the art in light of the present invention and their spirit, and all such modifications and substitutions are intended to be included within the scope of the present invention as defined in the following claims.
Claims (10)
1. A control method of a power management integrated chip of a display panel, wherein the power management integrated chip includes a register, the register includes a first status bit and a data bit, the first status bit is used for storing a writing status parameter of automatic gamma correction data, the control method includes the following steps:
detecting a state value of the first state bit when the power-on is started;
judging whether the automatic gamma correction data need to be written into the data bit according to the state value of the first state bit;
if yes, reading the automatic gamma correction data stored in the display panel, and writing the automatic gamma correction data into the register;
the register also comprises a second state bit, wherein the second state bit is used for storing working state parameters of the register;
the method further comprises the following steps before detecting the state value of the first state bit:
detecting a state value of the second state bit;
judging whether an initial set value needs to be written into the data bit according to the state value of the second state bit;
if yes, writing the initial set value into the register; the initial set value refers to a voltage required to be output to the display panel by the power management integrated chip.
2. The method of claim 1, wherein the step of determining whether the initial set value needs to be written to the data bit according to the state value of the second state bit comprises:
and when the state value of the second state bit is 0, judging that the initial set value needs to be written into the data bit.
3. The method of claim 1, wherein the step of determining whether the automatic gamma correction data needs to be written to the data bit according to the state value of the first state bit comprises:
when the state value of the first state bit is 0, the automatic gamma correction data is judged to be required to be written into the data bit.
4. The method of controlling a power management integrated chip of a display panel according to claim 2, wherein the step of writing the initial set value into the register further comprises:
and checking the initial set value.
5. The method of controlling a power management integrated chip of a display panel according to claim 3, wherein the step of writing the automatic gamma correction data into the register further comprises:
and verifying the automatic gamma correction data.
6. The control system of the power management integrated chip of the display panel is characterized by comprising a control chip, the display panel and the power management integrated chip; the power management integrated chip comprises a register, the register is connected with the control chip, the register comprises a first state bit and a first data bit, the first state bit is used for storing writing state parameters of automatic gamma correction data, and the control chip is used for storing the writing state parameters of the automatic gamma correction data;
detecting a state value of the first state bit when the power-on is started;
judging whether automatic gamma correction data need to be written into the data bit according to the state value of the first state bit;
if yes, reading the automatic gamma correction data stored in the display panel, and writing the automatic gamma correction data into the register correction set value;
the register also comprises a second state bit, wherein the second state bit is used for storing working state parameters of the register; the control chip is also used for:
detecting a state value of the second state bit;
judging whether an initial set value needs to be written into the data bit according to the state value of the second state bit;
if yes, writing the initial set value into the register; the initial set value refers to a voltage required to be output to the display panel by the power management integrated chip.
7. The system of claim 6, wherein the control chip is specifically configured to determine that the initial set value needs to be written into the data bit when the state value of the second state bit is 0.
8. The system of claim 6, wherein the control chip is configured to determine that the automatic gamma correction data is required to be written to the data bit when the status value of the first status bit is 0.
9. The control system of a power management integrated chip of a display panel of claim 7, wherein the control chip is further configured to verify the initial set point.
10. The control system of a power management integrated chip of a display panel of claim 8, wherein the control chip is further configured to verify the automatic gamma correction data.
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| Application Number | Priority Date | Filing Date | Title |
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| CN202111540036.5A CN114237377B (en) | 2021-12-15 | 2021-12-15 | Control method and system of power management integrated chip of display panel |
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| CN1619501A (en) * | 2004-11-30 | 2005-05-25 | 威盛电子股份有限公司 | Method of proceeding error inspection and related device |
| CN102034411A (en) * | 2009-09-29 | 2011-04-27 | 群康科技(深圳)有限公司 | Gamma correction control device and method thereof |
| CN102054420A (en) * | 2009-10-30 | 2011-05-11 | 群康科技(深圳)有限公司 | Gamma correcting circuit, gamma correcting method and relevant display |
| CN103345896A (en) * | 2013-06-14 | 2013-10-09 | 青岛海信电器股份有限公司 | Gamma correction buffer circuit, display device and anti-interference method |
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| KR20090037210A (en) * | 2007-10-11 | 2009-04-15 | 삼성전자주식회사 | Display device and gamma data of the same control method |
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1619501A (en) * | 2004-11-30 | 2005-05-25 | 威盛电子股份有限公司 | Method of proceeding error inspection and related device |
| CN102034411A (en) * | 2009-09-29 | 2011-04-27 | 群康科技(深圳)有限公司 | Gamma correction control device and method thereof |
| CN102054420A (en) * | 2009-10-30 | 2011-05-11 | 群康科技(深圳)有限公司 | Gamma correcting circuit, gamma correcting method and relevant display |
| CN103345896A (en) * | 2013-06-14 | 2013-10-09 | 青岛海信电器股份有限公司 | Gamma correction buffer circuit, display device and anti-interference method |
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