CN114221544A - BUCK circuit, current sharing control method and switching power supply thereof - Google Patents
BUCK circuit, current sharing control method and switching power supply thereof Download PDFInfo
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- CN114221544A CN114221544A CN202111516659.9A CN202111516659A CN114221544A CN 114221544 A CN114221544 A CN 114221544A CN 202111516659 A CN202111516659 A CN 202111516659A CN 114221544 A CN114221544 A CN 114221544A
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M3/00—Conversion of dc power input into dc power output
- H02M3/02—Conversion of dc power input into dc power output without intermediate conversion into ac
- H02M3/04—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters
- H02M3/10—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
- H02M3/145—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
- H02M3/155—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only
- H02M3/156—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators
- H02M3/158—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators including plural semiconductor devices as final control devices for a single load
- H02M3/1584—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators including plural semiconductor devices as final control devices for a single load with a plurality of power processing stages connected in parallel
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M1/00—Details of apparatus for conversion
- H02M1/08—Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters
- H02M1/088—Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters for the simultaneous control of series or parallel connected semiconductor devices
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- Power Engineering (AREA)
- Dc-Dc Converters (AREA)
Abstract
The invention relates to a BUCK circuit, a current sharing control method and a switch power supply thereof, which comprise a first BUCK module and a second BUCK module, wherein the power supply end of the first BUCK module is connected with a load interface, and the power supply end of the second BUCK module is connected with the load interface; the first sampling input end of the sampling module is connected to the detection end of the first buck module, the second sampling input end of the sampling module is connected to the detection end of the second buck module, and the sampling module is used for sampling output currents of the first buck module and the second buck module; the current-sharing control module comprises a sampling receiving end, a first switch control end and a second switch control end, the sampling receiving end is connected to the sampling output end of the sampling module, the first switch control end is connected to the control end of the first buck module, the second switch control end is connected to the control end of the second buck module, and the current-sharing control module is used for adjusting the duty ratios of the first buck module and the second buck module. The invention has the effect of simple control circuit.
Description
Technical Field
The invention relates to the technical field of power electronics, in particular to a BUCK circuit, a current sharing control method and a switching power supply thereof.
Background
The BUCK circuit, also called a BUCK circuit, is basically characterized by a DC-DC conversion circuit, with an output voltage lower than an input voltage. The input current is pulsating and the output current is continuous. In a switching power supply, a power supply system of a multi-path parallel BUCK circuit is often used in order to increase power density and reduce ripple of an output voltage. When multiple BUCK circuits are connected in parallel, because parameters of devices in each path are possibly inconsistent and have deviation, the borne power and current of each path are inconsistent and even overload is caused, current sharing control must be designed when each path of power supply is connected in parallel to ensure reasonable power distribution among each path of power supply, prevent one or more branch power supplies from working in a current limit state, and ensure uniform distribution of electrical stress and thermal stress among each path of power supply. Therefore, current sharing control is the focus of current power electronics technology.
In the conventional switching power supply, a resistor is usually added at the output end of each BUCK circuit connected in parallel, the current of each path is sampled, and then the current is sent to the inside of each circuit through the feedback circuit of each path for feedback control, so that each BUCK circuit needs to be additionally provided with a feedback circuit. When the number of BUCK circuits connected in parallel is large, the number of feedback circuits is increased, so that the feedback control circuit is more complicated and the cost is higher.
In the above related art, there is a drawback that the control circuit is complicated.
Disclosure of Invention
In order to solve the problem of complex control circuit, the application provides a BUCK circuit, a current sharing control method and a switching power supply thereof.
In a first aspect, the BUCK circuit provided by the present application adopts the following technical scheme:
a BUCK circuit comprises a first BUCK module and a second BUCK module, wherein the first BUCK module and the second BUCK module respectively comprise a power input end, a control end, a detection end and a power supply end, the power supply end of the first BUCK module is connected with a load interface, and the power supply end of the second BUCK module is connected with the load interface; the sampling module comprises a first sampling input end, a second sampling input end and a sampling output end, the first sampling input end is connected to the detection end of the first buck module, the second sampling input end is connected to the detection end of the second buck module, and the sampling module is used for sampling output currents of the first buck module and the second buck module; the current sharing control module comprises a sampling receiving end, a first switch control end and a second switch control end, the sampling receiving end is connected to the sampling output end of the sampling module, the first switch control end is connected to the control end of the first buck module, the second switch control end is connected to the control end of the second buck module, and the current sharing control module is used for adjusting the duty ratios of the first buck module and the second buck module; the power supply output end of the power supply module is respectively connected with the first buck module and the power supply input end of the first buck module, and the power supply module is used for supplying power to the first buck module and the first buck module.
Through adopting above-mentioned technical scheme, the output current in first buck module of sampling module sampling and the second buck module, and for the control module that flow equalizes provides current signal, the control module that flow equalizes can be according to the current signal that obtains, adjust the duty cycle of first buck module and second buck module, make the output current of first buck module and second buck module the same, for correlation technique, the current of first buck module and second buck module is controlled by the control module that flow equalizes in this application, need not increase feedback circuit at every way buck circuit, control circuit is simple, the cost is reduced and the signal processing degree of difficulty is little.
Optionally, the first buck module includes a fet Q1 and a first inductor L1, the second buck module includes a fet Q2 and a second inductor L2, a source of the fet Q1 is connected to a power output end of the power module as a power input end of the first buck module, a drain of the fet Q1 is connected to one end of the first inductor L1, a gate of the fet Q1 is connected to the current equalizing control module as a control end of the first buck module, and another end of the first inductor L1 is connected to an input end of the load interface; the source of the fet Q2 is connected to the power output terminal of the power module as the power input terminal of the second buck module, the drain of the fet Q2 is connected to one end of the second inductor L2, the gate of the fet Q2 is connected to the current-sharing control module as the control terminal of the second buck module, and the other end of the second inductor is connected to the input terminal of the load interface.
By adopting the technical scheme, the field effect transistor Q1 and the field effect transistor Q2 are used for controlling the on and off of the first buck module and the second buck module, and the current equalizing control module respectively controls the on and off of the field effect transistor Q1 and the field effect transistor Q2 to adjust the duty ratios of the first buck module and the second buck module, so that the output currents of the first buck module and the second buck module are the same.
Optionally, the current-sharing control module includes a first control module and a second control module, the first control module includes a first control chip U1, the second control module includes a second control chip U2, the first control chip U1 and the second control chip U2 each include an output terminal, a reference voltage terminal and a compensation terminal, and the output terminal of the first control chip U1 is connected to the gate of the fet Q1; the output end of the second control chip U2 is connected to the gate of the field effect transistor Q2, the reference voltage end of the first control chip U1 is connected to the output end of the second control chip U2, the reference voltage end of the second control chip U2 is grounded, and the compensation end of the second control chip U2 is connected to the sampling output end of the sampling module.
By adopting the technical scheme, the second control chip U2 in the second control module receives the current signal of the sampling module to control the first control module and the field-effect transistor Q2 of the second buck module to be opened and closed, the first control chip U1 in the first control module receives the voltage signal of the second control chip U2 to control the field-effect transistor Q1 of the first buck module to be opened and closed, the voltage signal output by the second control chip U2 is input into the first control chip U1, the first control chip U1 generates a proper PWM signal to drive the field-effect transistor Q1, the output voltage is stabilized, and the output currents flowing through the first buck module and the second buck module are the same.
Optionally, the sampling module includes a first current detection module for sampling the output current of the first buck module, a second current detection module for sampling the output current of the second buck module, and a differential amplification module, the first current detection module includes a first current sampling end and a first current output end, the second current detection module includes a second current sampling end and a second current output end, the differential amplification module includes a first current receiving end, a second current receiving end, and a signal output end, the first current sampling end is connected to the detection end of the first buck module as the first sampling input end of the sampling module, the second current sampling end is connected to the detection end of the second buck module as the second sampling input end of the sampling module, and the first current output end is connected to the first current receiving end, and the second current output end is connected to the second current receiving end, and the signal output end is used as the sampling output end of the sampling module and connected to the sampling receiving end.
By adopting the technical scheme, the first current detection module samples the output current of the first buck module, the second current module samples the output current of the second buck module, the output currents of the first buck module and the second buck module form a differential current signal through the differential amplification module, and the current equalizing control module receives the differential current signal to control the current equalizing in the circuit.
Optionally, the differential amplification module includes a differential amplifier, the differential amplifier includes a positive power supply terminal, a negative power supply terminal and an amplification output terminal, the positive power supply terminal is connected to the second current output terminal of the second current detection module, the negative power supply terminal is connected to the first current output terminal of the first current detection module, and the amplification output terminal is used as a sampling output terminal of the sampling module and connected to a compensation terminal of the second control chip U2.
By adopting the technical scheme, the differential amplifier forms a differential current signal from the output currents of the first buck module and the second buck module, the differential current signal is output to the compensation end of the second control chip U2, and the second control chip U2 controls the current equalization in the first buck module and the second buck module according to the differential current signal.
Optionally, a field effect transistor Q3 is connected between the drain of the field effect transistor Q1 and the first inductor L1, the source of the field effect transistor Q3 is connected to the drain of the field effect transistor Q1, the drain of the field effect transistor Q3 is grounded, and the gate of the field effect transistor Q3 is connected to the current sharing control module; a field effect transistor Q4 is connected between the drain of the field effect transistor Q2 and the first inductor L2, the source of the field effect transistor Q4 is connected to the drain of the field effect transistor Q2, the drain of the field effect transistor Q4 is grounded, and the gate of the field effect transistor Q4 is connected to the current-sharing control module.
By adopting the technical scheme, when the output voltage is lower and the output current is smaller, the power conversion efficiency is lower, the rectification loss of the first buck module and the second buck module is reduced by the arrangement of the field effect transistor Q3 and the field effect transistor Q4, the conduction voltage drop is in direct proportion to the conduction circuit, and the power consumption is low when the output current of the circuit is smaller.
Optionally, the current-sharing control module further comprises a first driving module connected between the first control module and the first buck module and a second driving module connected between the second control module and the second buck module, a voltage input end of the first driving module is connected to an output end of the first control module, a voltage input end of the second driving module is connected to an output end of the second control module, a voltage output end of the first driving module is connected to a control end of the first buck module, and a voltage output end of the second driving module is connected to a control end of the second buck module.
Through adopting above-mentioned technical scheme, the setting of first drive module and second drive module has made things convenient for the first buck module of control module control and second buck of flow equalizing, has improved efficiency.
In a second aspect, the present application provides a switching power supply, which adopts the following technical solutions:
a switching power supply includes the BUCK circuit as described above.
By adopting the technical scheme, the BUCK circuit is adopted to sample the current of each path without adding a resistor at the output end of each path in parallel connection, and then feedback control is carried out on the current of each path. The structure is simple, the cost is low, the signal processing difficulty is small, the power density is improved, and the ripple of the output voltage of the switching power supply is reduced.
In a third aspect, the present application provides a method for current sharing control of a BUCK circuit, which adopts the following technical scheme:
a current sharing control method for a BUCK circuit comprises the following steps:
the sampling module samples the output currents of the first buck module and the second buck module respectively and converts the output currents into differential current signals;
obtaining a first relational expression of the duty ratio of the first buck module and a differential current signal, obtaining a second relational expression of the duty ratio of the second buck module and the differential current signal, and obtaining a calculation formula of a duty ratio difference value according to the first relational expression and the second relational expression;
obtaining the duty ratio difference value of the first buck module and the second buck module based on the calculation formula of the duty ratio difference value;
and according to the duty ratio difference value, the current-sharing control module adjusts the output current of the first buck module to be equal to the output current of the second buck module.
Through adopting above-mentioned technical scheme, the output current of first buck module and second buck module will be sampled respectively to the sampling module to in converting into difference current signal back output to the current-sharing control module, the control module that flow-shares calculates the duty cycle difference according to difference current signal and first inductance L1 and second inductance L2's impedance, the control module that flow-shares according to the duty cycle difference come the duty cycle of adjusting first buck module and second buck module respectively, make the output current of first buck module and second buck module the same.
Optionally, the relationship between the duty cycle of the first buck module (100) and the differential current signal is one:
d1*Vin=1/2*Iout*r1+Vout；
the duty cycle of the second buck module (100) is related to the differential current signal by the following relation:
d2*Vin=1/2*Iout*r2+Vout；
wherein Vin is an input voltage, Vout is an output voltage, Iout is a differential current signal, r1 is an impedance of a first inductor L1, r2 is an impedance of a second inductor L2, d1 is a duty cycle of the first buck module (100), and d2 is a duty cycle of the second buck module (200);
obtaining a calculation formula of the duty ratio difference value according to the relation I and the relation II:
（d2-d1）*Vin=1/2*Iout*（r2-r1）。
by adopting the technical scheme, the calculation formula of the duty ratio difference value is obtained after the relational expression I and the relational expression II are combined, the duty ratio difference value can be obtained only by knowing the differential current signal, the input voltage and the impedance of the first inductor L1 and the second inductor L2, the signal processing difficulty is low, and the difficulty in current sharing control of the buck circuit is reduced.
In summary, the invention includes at least one of the following beneficial technical effects:
1. the sampling module is used for sampling output currents in the first buck module and the second buck module and providing current signals for the current equalizing control module, the current equalizing control module can adjust duty ratios of the first buck module and the second buck module according to the obtained current signals, so that the output currents of the first buck module and the second buck module are the same, compared with the related art, the currents of the first buck module and the second buck module are controlled by the current equalizing control module in the application, a feedback circuit does not need to be added to each buck circuit, the control structure is simple, the cost is reduced, and the signal processing difficulty is small;
2. the second control chip U2 in the second control module receives the current signal of the sampling module to control the opening and closing of the first control module and the field effect transistor Q2 of the second buck module, the first control chip U1 in the first control module receives the voltage signal of the second control chip U2 to control the opening and closing of the field effect transistor Q1 of the first buck module, the voltage signal output by the second control chip U2 is input into the first control chip U1, the first control chip U1 generates a proper PWM signal to drive the field effect transistor Q1, so that the output voltage is stabilized, and the output currents flowing through the first buck module and the second buck module are the same.
Drawings
Fig. 1 is a block diagram of a BUCK circuit according to an embodiment of the present application.
FIG. 2 is a block diagram of a relationship between a current sharing control module and a sampling module of the BUCK circuit according to the embodiment of the present application
Fig. 3 is a schematic circuit diagram of a first buck module, a second buck module and a sampling module according to a first embodiment of the present application.
Fig. 4 is a schematic circuit diagram of a current sharing control module according to a first embodiment of the present application.
Fig. 5 is a schematic circuit diagram of a first buck module, a second buck module and a sampling module according to a second embodiment of the present application.
Fig. 6 is a schematic flow chart of a current sharing control method of a BUCK circuit according to an embodiment of the present application.
Fig. 7 is a schematic diagram of a calculation formula for obtaining a duty ratio difference value in the BUCK circuit current sharing control method according to the embodiment of the application.
Description of reference numerals: 100. a first buck module; 200. a second buck module; 300. a current-sharing control module; 310. a first control module; 320. a second control module; 330. a first driving module; 340. a second driving module; 400. a sampling module; 410. a first current detection module; 420. a second current detection module; 430. a differential amplification module; 500. a power supply module; 600. a load interface.
Detailed Description
In order to make the objects, technical solutions and advantages of the present application more apparent, the present application is further described in detail below with reference to fig. 1-7. It should be understood that the specific embodiments described herein are merely illustrative of the present application and are not intended to limit the present application.
The embodiment of the invention provides a BUCK circuit.
Example 1;
referring to fig. 1 and 2, the BUCK circuit includes a first BUCK module 100, a second BUCK module 200, a current share control module 300, a sampling module 400, and a power supply module 500. The power module 500 is configured to provide power for the first buck module 100 and the second buck module 200, the sampling module 400 is configured to sample output currents of the first buck module 100 and the second buck module 200, and the current equalizing control module 300 controls the output currents of the first buck module 100 and the second buck module 200 by receiving a current signal output by the sampling module 400, so that the output currents of the first buck module 100 and the second buck module 200 are the same.
Referring to fig. 3, in this embodiment, each of the first buck module 100 and the second buck module 200 includes a power input end, a control end, a detection end and a power supply end, the power supply end of the first buck module 100 is connected to a load interface, and the power supply end of the second buck module 200 is connected to the load interface; the first buck module 100 comprises a field effect transistor Q1 and a first inductor L1, a source of the field effect transistor Q1 is connected to the power output end of the power module 500, a drain of the field effect transistor Q1 is connected to one end of the first inductor L1, and the other end of the first inductor L1 is connected to the input end of the load interface; the second buck module 200 includes a fet Q2 and a second inductor L2, the source of the fet Q2 is connected to the power output terminal of the power module 500, the drain of the fet Q2 is connected to one end of the second inductor L2, and the other end of the second inductor L2 is connected to the input terminal of the load interface.
A freewheeling diode D1 is connected between the drain of the field effect transistor Q1 and the first inductor L1, the anode of the freewheeling diode D1 is grounded, and the cathode of the freewheeling diode D1 is connected with the drain of the field effect transistor Q1; a freewheeling diode D2 is connected between the drain of the field-effect transistor Q2 and the first inductor L2, the anode of the freewheeling diode D2 is grounded, and the cathode of the freewheeling diode D2 is connected to the drain of the field-effect transistor Q2. The freewheeling diode D1 and the freewheeling diode D2 provide continuous current for the load, so that the effect of smoothing the current is achieved, and sudden change of the load current is prevented.
The sampling module 400 includes a first current detection module 410, a second current detection module 420 and a differential amplification module 430, the first current detection module 410 includes a first resistor R1 and a first capacitor C1 connected in series, the first resistor R1 is connected between the cathode of the freewheeling diode D1 and the first inductor L1, one end of the first capacitor C1 is connected between the load interface and the first inductor L1, and the first current detection module 410 is capable of sampling the current in the first inductor L1; the second current detection module 420 includes a second resistor R2 and a second capacitor C2 connected in series, the second resistor R2 is connected between the cathode of the freewheeling diode D2 and the second inductor L2, one end of the second capacitor C2 is connected between the load interface and the second inductor L2, and the second current detection module 420 is capable of sampling the current in the second inductor L2. In a popular way, the first current detection module 410 and the second current detection module 420 are low-pass filters, which have a filtering function and can attenuate high-frequency signals; in the embodiment of the present application, the low-pass filter is used to extract the frequency spectrum of the resistors in the first inductor L1 and the second inductor L2, so as to obtain the impedance of the first inductor L1 and the second inductor L2.
The differential amplification module 430 comprises a differential amplifier, wherein the differential amplifier comprises a positive power supply end, a negative power supply end, a non-inverting input end, an inverting input end and a signal output end, the non-inverting input end is connected with a power supply, and the inverting input end is grounded; the negative power supply end is connected between the first resistor R1 and the first capacitor C1 through a third resistor R3, and the positive power supply end is connected between the second resistor R2 and the second capacitor C2 through a fourth resistor R4; the negative power supply end and the signal output end are connected in parallel with a fifth resistor R5, and two ends of a fifth resistor R5 are connected in parallel with a third capacitor C3; a sixth resistor R6 is connected between the positive power supply end and the fourth resistor R4, one end of the sixth resistor R6 is connected with the positive power supply end, and the other end of the sixth resistor R6 is grounded; the two ends of the sixth resistor R6 are connected in parallel with a fourth capacitor C4. The differential amplifier forms a differential current signal from the currents sampled by the first current detection module 410 and the second current detection module 420.
Referring to fig. 4, the current sharing control module 300 includes a first control module 310 and a second control module 320, the first control module 310 includes a first control chip U1, the second control module 320 includes a second control chip U2, and both the first control chip U1 and the second control chip U2 are chips with an optional model number of UC 3842. The first control chip U1 and the second control chip U2 each include a power supply terminal pin 1, a reference voltage terminal pin 2, an oscillation terminal pin 3, a negative feedback terminal pin 4, a compensation terminal pin 5, a current feedback terminal pin 6, a ground terminal pin 7, and an output terminal pin 8.
A power supply terminal pin 1 of the first control chip U1 and the second control chip U2 inputs a power supply voltage VCC, a seventh resistor R7, a fifth capacitor C5 and a sixth capacitor C6 are connected in series between a reference voltage terminal pin 2 of the first control chip U1 and an output terminal pin 8 of the second control chip U2, an oscillation terminal pin 3 of the first control chip U1 is connected between a seventh resistor R7 and a fifth capacitor C5, a triode T1 and an eighth resistor R8 are connected in series between an oscillation terminal pin 3 of the first control chip U1 and a current feedback terminal pin 6 of the first control chip U1, a collector of the triode T1 is connected to the reference voltage terminal pin 2, a base of the triode T1 is connected to the oscillation terminal pin 3 of the first control chip U1, an emitter of the triode T1 is connected to one end of the eighth resistor R8, a ninth resistor R9 is connected between the eighth resistor R8 and the current feedback terminal pin 6 of the first control chip U1, one end of the ninth resistor R9 is connected to the current feedback terminal pin 6 of the first control chip U1, and the other end of the ninth resistor R9 is grounded. By inputting the voltage signal output by the second control chip U2 into the first control chip U1, the first control chip U1 generates a suitable PWM signal to drive the field effect transistor Q1, thereby stabilizing the output voltage,
the first control module 310 further includes a tenth resistor R10, an eleventh resistor R11, a twelfth resistor R12, a thirteenth resistor R13, a fourteenth resistor R14 and a seventh capacitor C7; one end of a twelfth resistor R12 is used as a voltage output end and is used for outputting voltage samples to be input to an external control unit, a tenth resistor R10, an eleventh resistor R11 and a twelfth resistor R12 are sequentially connected in series between a compensation end pin 5 of the first control chip U1 and the voltage output end, two ends of a tenth resistor R10 are connected in parallel with a seventh capacitor C7, a thirteenth resistor R13 is connected between the fifth capacitor C5 and the sixth capacitor C6, and one end of the thirteenth resistor R13 is connected with an analog ground; a fourteenth resistor R14 is connected between the eleventh resistor R11 and the twelfth resistor R12, and one end of the fourteenth resistor R14 is connected to the analog ground. An auxiliary direct current power supply is connected to one end of the power supply voltage VCC of the first control chip U1 and the grounded thirteenth resistor R13. By being arranged as above, for voltage sampling, a voltage feedback loop is formed, thereby better controlling the output voltage.
In order to better drive and control the first buck module 100 and the second buck module 200, the current sharing control module 300 further includes a first drive module 330 and a second drive module 340, the first drive module 330 includes a first amplifier and an eighteenth resistor R18, one end of the eighteenth resistor R18 is connected to the gate of the fet Q1, the other end of the eighteenth resistor R18 is connected to the non-inverting input terminal of the first amplifier, the output terminal of the first control chip U1 is connected to the positive power supply terminal of the first amplifier, the negative power supply terminal of the first amplifier is grounded, and the inverting input terminal of the first amplifier is connected between the drain of the fet Q1 and the freewheel diode D1; the second driving module 340 comprises a second amplifier and a nineteenth resistor R19, one end of the nineteenth resistor R19 is connected to the gate of the field effect transistor Q2, the other end of the nineteenth resistor R19 is connected to the non-inverting input end of the second amplifier, the output end of the second control chip U2 is connected to the positive power supply end of the second amplifier, the negative power supply end of the second amplifier is grounded, and the inverting input end of the second amplifier is connected between the drain of the field effect transistor Q2 and the freewheeling diode D2.
A triode T2, a sixteenth resistor R16 and a seventeenth resistor R17 are sequentially connected in series to a reference voltage terminal pin 2 of the second control chip U2, a collector of the triode T2 is connected to the reference voltage terminal pin 2 of the second control chip U2, an emitter of the triode T2 is connected to one end of the sixteenth resistor R16, one end of the seventeenth resistor R17 is grounded, a fifteenth resistor R15 and an eighth capacitor C8 are further connected in series to the reference voltage terminal pin 2 of the second control chip U2, the eighth capacitor C8 is connected to a ground terminal of the seventeenth resistor R17, and a base of the triode T2 is connected between the fifteenth resistor R15 and the eighth capacitor C8. The oscillation end pin 3 of the second control chip U2 is connected between the base of the transistor T2 and the fifteenth resistor R15; the negative feedback end pin 4 of the second control chip U2 is grounded; the compensation terminal pin 5 of the second control chip U2 is connected to the signal output terminal of the differential amplifier; the current feedback terminal pin 6 of the second control chip U2 is connected between the sixteenth resistor R16 and the seventeenth resistor R17.
Referring to fig. 3, the load interface is connected in parallel with a ninth capacitor C9 for protecting the load, so that the load is not easily overloaded, and the safety of the circuit is improved. One end of the ninth capacitor C9 is connected to the power supply end of the first buck module 100, and the other end of the ninth capacitor C9 is grounded.
The implementation principle of the embodiment 1 of the application is as follows: the first current detection module 410 samples the current of the first inductor L1, the second current detection module 420 samples the current of the second inductor L2, the differential amplification module 430 controls the PWM signal output by the second control chip U2 in the second control module 320 by converting the currents sampled by the first current detection module 410 and the second current detection module 420 into a differential current signal, the second control chip U2 controls the fet Q2 of the second buck module 200 and outputs a voltage signal to the first control chip U1, so that the first control chip U1 generates a suitable PWM signal to drive the fet Q1, thereby adjusting the duty ratios of the first buck module 100 and the second buck module 200, and equalizing the currents flowing through the first inductor and the second inductor.
Example 2;
referring to fig. 5, the difference between the present embodiment and the first embodiment is that the freewheeling diode D1 in the first buck module 100 is changed to the fet Q3, the freewheeling diode D2 in the second buck module 200 is changed to the fet Q4, the source of the fet Q3 is connected between the drain of the fet Q1 and the first inductor L1, the drain of the fet Q3 is grounded, and the gate of the fet Q3 is connected to the current-sharing control module 300; the source of the fet Q4 is connected between the drain of the fet Q2 and the second inductor L2, the drain of the fet Q4 is grounded, and the gate of the fet Q4 is connected to the current share control module 300. Due to the arrangement of the field-effect tube Q3 and the field-effect tube Q4, when the output voltage is low and the output current is low, the power conversion efficiency is low, the rectification loss of the first buck module 100 and the second buck module 200 is reduced, and the conduction voltage drop is in direct proportion to the conduction circuit, so that the power consumption is low when the output current of the circuit is low, synchronous rectification is realized, and the efficiency is further improved.
The implementation principle of embodiment 2 of the present application is as follows: the fly-wheel diode D1 and the fly-wheel diode D2 in the circuit are respectively changed into a field effect transistor Q3 and a field effect transistor Q4, so that the rectification loss of the first buck module 100 and the second buck module 200 is reduced, the conduction voltage drop is in direct proportion to the conduction circuit, the power consumption is low when the output current of the circuit is small, synchronous rectification is realized, and the efficiency is further improved.
The application also discloses a switching power supply. The switching power supply comprises the BUCK circuit, and by adopting the BUCK circuit, the current of each path is sampled and then the current of each path is subjected to feedback control without adding a resistor at the output end of each path connected in parallel. The structure is simple, the cost is low, the signal processing difficulty is small, the power density is improved, and the ripple of the output voltage of the switching power supply is reduced.
The embodiment of the application also discloses a current sharing control method of the BUCK circuit applying the BUCK circuit.
Referring to fig. 6 and 7, the current sharing control method of the BUCK circuit mainly includes the following steps:
step S710, the sampling module 400 samples the output currents of the first buck module 100 and the second buck module 200, respectively, and converts the output currents into differential current signals.
Specifically, in the embodiment of the present application, the first current detection module 410 in the sampling module 400 samples the output current of the first buck module 100 through the resistance in the first inductor L1, the second current detection module 420 samples the output current of the second buck module 200 through the resistance in the second inductor L2, and the output current of the first buck module 100 and the output current of the second buck module 200 are converted into differential current signals through the differential amplification module 430; the first current detection module 410 and the second current detection module 420 are low pass filters, and can extract the frequency spectrum of the resistance in the inductor to obtain the impedance of the first inductor L1 and the second inductor L2.
Step S720, obtaining a first relational expression between the duty ratio of the first buck module 100 and the differential current signal, obtaining a second relational expression between the duty ratio of the second buck module 200 and the differential current signal, and obtaining a calculation formula of the duty ratio difference according to the first relational expression and the second relational expression.
Specifically, a calculation formula of the duty ratio difference value is obtained from the relation one and the relation two.
The duty cycle of the first buck module 100 is related to the differential current signal by the following equation:
d1*Vin=1/2*Iout*r1+Vout；
the second buck module 100 has a second relationship between the duty cycle and the differential current signal:
d2*Vin=1/2*Iout*r2+Vout；
vin is an input voltage, Vout is an output voltage, Iout is a differential current signal, r1 is an impedance of a first inductor L1, r2 is an impedance of a second inductor L2, d1 is a duty cycle of the first buck module 100, and d2 is a duty cycle of the second buck module 200.
Obtaining a calculation formula of the duty ratio difference value according to the relation I and the relation II:
（d2-d1）*Vin=1/2*Iout*（r2-r1）。
after the relational expression I and the relational expression II are combined, a calculation formula of the duty ratio difference value is obtained, the duty ratio difference value can be obtained only by knowing the differential current signal, the input voltage and the impedances of the first inductor L1 and the second inductor L2, the signal processing difficulty is low, and the difficulty in current sharing control of the buck circuit is reduced.
Step S730, obtaining the duty ratio difference between the first buck module 100 and the second buck module 200 based on the calculation formula of the duty ratio difference.
Step S740, according to the duty ratio difference, the current-sharing control module 300 adjusts the output current of the first buck module 100 to be equal to the output current of the second buck module 200.
Specifically, the duty ratio difference is obtained by substituting the input voltage, the differential current signal, the impedance of the first inductor L1 and the impedance of the second inductor L2 into a calculation formula; the current sharing control module 300 adjusts the duty ratio of the first buck module 100 and the duty ratio of the second buck module 200 according to the duty ratio difference value, so that the output currents of the first buck circuit and the second buck circuit are the same.
The foregoing is a preferred embodiment of the present application and is not intended to limit the scope of the application in any way, and any features disclosed in this specification (including the abstract and drawings) may be replaced by alternative features serving equivalent or similar purposes, unless expressly stated otherwise. That is, unless expressly stated otherwise, each feature is only an example of a generic series of equivalent or similar features.
Claims (10)
1. A BUCK circuit, comprising:
the device comprises a first buck module (100) and a second buck module (200), wherein the first buck module (100) and the second buck module (200) respectively comprise a power input end, a control end, a detection end and a power supply end, the power supply end of the first buck module (100) is connected with a load interface (600), and the power supply end of the second buck module (200) is connected with the load interface (600);
a sampling module (400), wherein the sampling module (400) comprises a first sampling input end, a second sampling input end and a sampling output end, the first sampling input end is connected to the detection end of the first buck module (100), the second sampling input end is connected to the detection end of the second buck module (200), and the sampling module (400) is used for sampling the output currents of the first buck module (100) and the second buck module (200);
the current-sharing control module (300), the current-sharing control module (300) includes a sampling receiving end, a first switch control end and a second switch control end, the sampling receiving end is connected to the sampling output end of the sampling module (400), the first switch control end is connected to the control end of the first buck module (100), the second switch control end is connected to the control end of the second buck module (200), and the current-sharing control module (300) is used for adjusting duty ratios of the first buck module (100) and the second buck module (200);
the power supply module (500), the power output end of power supply module (500) connect respectively in first buck module (100) with the power input end of first buck module (100), power supply module (500) are used for first buck module (100) with first buck module (100) provides the power.
2. The BUCK circuit according to claim 1, wherein the first BUCK module (100) comprises a fet Q1 and a first inductor L1, the second BUCK module (200) comprises a fet Q2 and a second inductor L2, a source of the fet Q1 is connected to a power output of the power module (500) as a power input of the first BUCK module (100), a drain of the fet Q1 is connected to one end of the first inductor L1, a gate of the fet Q1 is connected to the current equalizing control module (300) as a control end of the first BUCK module (100), and the other end of the first inductor L1 is connected to an input of the load interface (600);
the source of the fet Q2 is connected to the power output of the power module (500) as the power input of the second buck module (200), the drain of the fet Q2 is connected to one end of the second inductor L2, the gate of the fet Q2 is connected to the current equalizing control module (300) as the control end of the second buck module (200), and the other end of the second inductor is connected to the input of the load interface (600).
3. The BUCK circuit according to claim 2, wherein the current sharing control module (300) comprises a first control module (310) and a second control module (320), the first control module (310) comprises a first control chip U1, the second control module (320) comprises a second control chip U2, the first control chip U1 and the second control chip U2 each comprise an output terminal, a reference voltage terminal and a compensation terminal, the output terminal of the first control chip U1 is connected to the gate of the FET Q1; the output end of the second control chip U2 is connected to the grid of the field effect transistor Q2, the reference voltage end of the first control chip U1 is connected to the output end of the second control chip U2, the reference voltage end of the second control chip U2 is grounded, and the compensation end of the second control chip U2 is connected to the sampling output end of the sampling module (400).
4. A BUCK circuit according to claim 3, wherein the sampling module (400) comprises a first current detection module (410) for sampling the output current of the first BUCK module (100), a second current detection module (420) for sampling the output current of the second BUCK module (200) and a differential amplification module (430), the first current detection module (410) comprises a first current sampling terminal and a first current output terminal, the second current detection module (420) comprises a second current sampling terminal and a second current output terminal, the differential amplification module (430) comprises a first current receiving terminal, a second current receiving terminal and a signal output terminal, the first current sampling terminal is connected to the detection terminal of the first BUCK module (100) as a first sampling input terminal of the sampling module (400), and the second current sampling terminal is connected to the second BUCK module as a second sampling input terminal of the sampling module (400) The detection end of block (200), first current output end connect in first current receiving end, second current output end connect in second current receiving end, signal output part is as the sampling output of sampling module (400) connect in the sampling receiving end.
5. The BUCK circuit according to claim 4, wherein the differential amplification module (430) comprises a differential amplifier, the differential amplifier comprises a positive power supply terminal, a negative power supply terminal and an amplification output terminal, the positive power supply terminal is connected with the second current output terminal of the second current detection module (420), the negative power supply terminal is connected with the first current output terminal of the first current detection module (410), and the amplification output terminal is connected as a sampling output terminal of the sampling module (400) to a compensation terminal of the second control chip U2.
6. The BUCK circuit according to claim 2, wherein a field effect transistor Q3 is connected between the drain of the field effect transistor Q1 and the first inductor L1, the source of the field effect transistor Q3 is connected to the drain of the field effect transistor Q1, the drain of the field effect transistor Q3 is grounded, and the gate of the field effect transistor Q3 is connected to the current sharing control module (300); a field effect transistor Q4 is connected between the drain of the field effect transistor Q2 and the first inductor L2, the source of the field effect transistor Q4 is connected to the drain of the field effect transistor Q2, the drain of the field effect transistor Q4 is grounded, and the gate of the field effect transistor Q4 is connected to the current-sharing control module (300).
7. The BUCK circuit according to claim 3, wherein the current sharing control module (300) further comprises a first driving module (330) connected between the first control module (310) and the first BUCK module (100) and a second driving module (340) connected between the second control module (320) and the second BUCK module (200), a voltage input terminal of the first driving module (330) is connected to an output terminal of the first control module (310), a voltage input terminal of the second driving module (340) is connected to an output terminal of the second control module (320), a voltage output terminal of the first driving module (330) is connected to a control terminal of the first BUCK module (100), and a voltage output terminal of the second driving module (340) is connected to a control terminal of the second BUCK module (200).
8. A switching power supply comprising a BUCK circuit as claimed in any one of claims 1 to 7.
9. A BUCK circuit current sharing control method applying the BUCK circuit as claimed in any one of claims 1 to 7, comprising:
the sampling module (400) respectively samples the output currents of the first buck module (100) and the second buck module (200) and converts the output currents into differential current signals;
obtaining a first relational expression of the duty ratio of the first buck module (100) and a differential current signal, obtaining a second relational expression of the duty ratio of the second buck module (200) and the differential current signal, and obtaining a calculation formula of a duty ratio difference value according to the first relational expression and the second relational expression;
obtaining the duty ratio difference value of the first buck module (100) and the second buck module (200) based on the calculation formula of the duty ratio difference value;
according to the duty ratio difference value, the current-sharing control module (300) adjusts the output current of the first buck module (100) to be equal to the output current of the second buck module (200).
10. The method of claim 9, wherein the current sharing control of BUCK circuit is performed by a current sharing control circuit,
the duty cycle of the first buck module (100) is related to the differential current signal by the following equation:
d1*Vin=1/2*Iout*r1+Vout；
the duty cycle of the second buck module (100) is related to the differential current signal by the following relation:
d2*Vin=1/2*Iout*r2+Vout；
wherein Vin is an input voltage, Vout is an output voltage, Iout is a differential current signal, r1 is an impedance of a first inductor L1, r2 is an impedance of a second inductor L2, d1 is a duty cycle of the first buck module (100), and d2 is a duty cycle of the second buck module (200);
obtaining a calculation formula of the duty ratio difference value according to the relation I and the relation II:
（d2-d1）*Vin=1/2*Iout*（r2-r1）。
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| CN202111516659.9A CN114221544A (en) | 2021-12-11 | 2021-12-11 | BUCK circuit, current sharing control method and switching power supply thereof |
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| CN202111516659.9A CN114221544A (en) | 2021-12-11 | 2021-12-11 | BUCK circuit, current sharing control method and switching power supply thereof |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN117318488A (en) * | 2023-11-29 | 2023-12-29 | 荣耀终端有限公司 | Multiphase power supply and electronic equipment |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN117318488A (en) * | 2023-11-29 | 2023-12-29 | 荣耀终端有限公司 | Multiphase power supply and electronic equipment |
| CN117318488B (en) * | 2023-11-29 | 2024-05-14 | 荣耀终端有限公司 | Multiphase power supply and electronic equipment |
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