CN114170153A - Wafer defect detection method and device, electronic equipment and storage medium - Google Patents
Wafer defect detection method and device, electronic equipment and storage medium Download PDFInfo
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Abstract
The embodiment of the invention provides a wafer defect detection method, which comprises the steps of obtaining an image to be detected of a wafer to be detected; extracting a candidate area image from the image to be detected; respectively carrying out first feature extraction processing and second feature extraction processing on the candidate region image to obtain a first feature and a second feature; fusing the first characteristic and the second characteristic to obtain a fused characteristic; and predicting whether the wafer to be detected has defects or not based on the fusion characteristics, so that a target region can be rapidly extracted, the calculated amount of refined defect detection is reduced, and the detection speed is increased.
Description
Technical Field
The present invention relates to the field of semiconductor manufacturing, and in particular, to a method and an apparatus for detecting a wafer defect, an electronic device, and a storage medium.
Background
With the rapid development of the semiconductor industry, the number of transistors integrated per unit area of an integrated circuit chip doubles every eighteenth month, meaning that the storage of transistors is reduced by a factor of two. The higher the chip integration level, the smaller the feature size of a kick center on the chip, the higher the requirements on the manufacturing precision and new materials are put forward, and the higher the requirements on the wafer defect detection in the manufacturing process are put forward. In order to ensure that the manufactured chips can work normally, the wafer needs to be detected for defects in the manufacturing process, and corresponding processing is performed on the wafer with fatalities.
Wafer defect inspection is often performed after critical processes in the chip manufacturing process to monitor the critical processes and ensure their correctness. Surface inspection techniques can be divided into imaging and non-imaging, and Automated Optical Inspection (AOI) and Scanning Electron Microscopy (SEM) are currently common in the semiconductor industry.
The automatic optical detection obtains the image of the surface of the wafer through the motion of a precision instrument platform, an image acquisition device and a digital image processing technology, and then the image is matched and compared with the image of the standard template, and finally the purpose of defect detection is achieved. The method has the advantages of high speed, high throughput, low resolution and low detection precision, and can be used for full-range detection. In contrast to automated optical inspection, scanning electron microscopy has high resolution. The traditional SEM image defect detection algorithm is based on the defect region extraction features for classification, such as texture features, gray scale features, morphological features, and the like, to form feature vectors, which are then input to a classifier for processing to obtain a classification result. However, such methods are mainly limited in that the extracted features can effectively express the difference between different defect types, and the manufacturing process of the integrated circuit becomes more complicated. The defect types on the wafer SEM images are increased sharply, which brings great challenges to the defect detection algorithm of the traditional SEM images, and in addition, the SEM detection speed is low and the throughput is low.
(1) The traditional AOI technology has low resolution and low detection precision.
(2) With the increase of defect types, the extracted features of the conventional SEM technology cannot effectively express the differences of different defect types, and the detection accuracy needs to be improved. The detection speed is slow, and the throughput is small.
In addition, with the continuous development of deep learning, feature learning based on the convolutional neural network is widely applied to the classification of computer vision and images in the field and achieves a better effect, but more defect data are required for model training, but in the process of generating a wafer, more normal data are needed, and the sample size of the defect data is relatively less, which is one of the problems faced by the deep learning convolutional neural network.
Disclosure of Invention
The embodiment of the invention provides a wafer defect detection method, which comprises the steps of obtaining an image to be detected of a wafer to be detected; extracting a candidate area image from the image to be detected; respectively carrying out first feature extraction processing and second feature extraction processing on the candidate region image to obtain a first feature and a second feature; fusing the first characteristic and the second characteristic to obtain a fused characteristic; and predicting whether the wafer to be detected has defects or not based on the fusion characteristics, so that a target region can be rapidly extracted, the calculated amount of refined defect detection is reduced, and the detection speed is increased.
In a first aspect, an embodiment of the present invention provides a method for detecting a wafer defect, where the method includes:
acquiring a to-be-detected image of a to-be-detected wafer;
extracting a candidate area image from the image to be detected;
respectively carrying out first feature extraction processing and second feature extraction processing on the candidate region image to obtain a first feature and a second feature;
fusing the first characteristic and the second characteristic to obtain a fused characteristic;
and predicting whether the wafer to be detected has defects or not based on the fusion characteristics.
Further, the extracting a candidate region image from the image to be detected includes:
preprocessing the image to be detected to obtain a preprocessed image;
and extracting a candidate region of the image to be detected through a template comparison algorithm, and extracting the candidate region image.
Further, the preprocessing the image to be detected to obtain a preprocessed image includes:
carrying out background separation on the image to be detected to obtain a foreground image;
performing illumination correction on the foreground image to obtain an illumination correction image;
and carrying out spatial correction on the first corrected image to obtain a preprocessed image.
Further, the performing spatial correction on the first corrected image to obtain a preprocessed image includes:
predicting the reference points and the characteristic points of the wafer in the illumination correction image;
and aligning the feature points of the wafer in the illumination correction image to the feature points on a predefined template through affine transformation based on the reference points to obtain a preprocessed image.
Further, the performing a first feature extraction process on the candidate region image to obtain a first feature includes:
and inputting the candidate region image into a pre-trained first feature extraction model for first feature extraction processing to obtain a first feature.
Further, the performing a second feature extraction process on the candidate region image to obtain a second feature includes:
and cutting and expanding the candidate region image, and inputting the candidate region image into a pre-trained second feature extraction model for second feature extraction processing to obtain a second feature.
Further, predicting whether the wafer to be detected has defects based on the fusion features includes:
performing non-maximum rejection on the fusion features, and reserving a detection frame result with the highest credibility;
and judging whether the wafer to be detected has defects or not according to the detection frame result with the highest reliability.
In a second aspect, an embodiment of the present invention provides a wafer defect detecting apparatus, including:
the acquisition module is used for acquiring an image to be detected of the wafer to be detected;
the extraction module is used for extracting a candidate region image from the image to be detected;
the processing module is used for respectively carrying out first feature extraction processing and second feature extraction processing on the candidate region image to obtain a first feature and a second feature;
the fusion module is used for fusing the first characteristic and the second characteristic to obtain a fused characteristic;
and the prediction module is used for predicting whether the wafer to be detected has the defects or not based on the fusion characteristics.
In a third aspect, an embodiment of the present invention provides an electronic device, including: the wafer defect detection method comprises a memory, a processor and a computer program which is stored on the memory and can run on the processor, wherein the processor executes the computer program to realize the steps of the wafer defect detection method provided by the embodiment of the invention.
In a fourth aspect, an embodiment of the present invention provides a computer-readable storage medium, where a computer program is stored on the computer-readable storage medium, and when the computer program is executed by a processor, the computer program implements the steps in the wafer defect detection method provided in the embodiment of the present invention.
In the embodiment of the invention, an image to be detected of a wafer to be detected is obtained; extracting a candidate area image from the image to be detected; respectively carrying out first feature extraction processing and second feature extraction processing on the candidate region image to obtain a first feature and a second feature; fusing the first characteristic and the second characteristic to obtain a fused characteristic; and predicting whether the wafer to be detected has defects or not based on the fusion characteristics, so that a target region can be rapidly extracted, the calculated amount of refined defect detection is reduced, and the detection speed is increased.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, it is obvious that the drawings in the following description are only some embodiments of the present invention, and for those skilled in the art, other drawings can be obtained according to the drawings without creative efforts.
Fig. 1 is a flowchart of a wafer defect detection method according to an embodiment of the present invention;
fig. 2 is a flowchart of a method for extracting an image of a candidate region according to an embodiment of the present invention;
fig. 3 is a schematic structural diagram of a wafer defect detection apparatus according to an embodiment of the present invention;
FIG. 4 is a schematic structural diagram of an extraction module according to an embodiment of the present invention;
fig. 5 is a schematic structural diagram of a processing submodule according to an embodiment of the present invention;
fig. 6 is a schematic structural diagram of a second calibration unit according to an embodiment of the present invention;
FIG. 7 is a block diagram of a prediction module according to an embodiment of the present invention;
fig. 8 is a schematic structural diagram of an electronic device according to an embodiment of the present invention.
Detailed Description
The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
Referring to fig. 1, fig. 1 is a flowchart of a wafer defect detection method according to an embodiment of the present invention, and as shown in fig. 1, the wafer defect detection method includes:
101. and acquiring an image to be detected of the wafer to be detected.
In the embodiment of the invention, the image to be detected can be a wafer image acquired by a camera, can be acquired by a worker by the camera, and can also be automatically acquired by the camera on the detection station. Specifically, the wafer to be detected can be placed on a detection station with a solid background, and the image of the wafer to be detected is acquired through the camera, so that the image to be detected of the wafer to be detected is obtained.
102. And extracting a candidate area image from the image to be detected.
In the embodiment of the present invention, the candidate region image may be obtained by using the original wafer image as an input, determining the probability of the defect existing in each local region through a sliding window, and finally outputting the high risk region as a candidate (512 × 512). This stage is dominated by traditional computer vision emanations to speed up extraction.
In the embodiment of the invention, the extraction of the candidate region adopts a template comparison algorithm, namely, a non-defective image is selected as a template for each scanning region, a target image region is extracted from the image to be detected in a sliding window mode, and the difference between the target image region and the template is compared to judge whether defects exist. If the difference is larger, the probability that the target image area has defects is larger, and the target image area can be determined to be a candidate area image; if the difference is small, it is determined that the target image area is very similar to the template, and since the template is a defect-free image, the target image area may be considered defect-free.
103. And respectively carrying out first feature extraction processing and second feature extraction processing on the candidate region image to obtain a first feature and a second feature.
In an embodiment of the present invention, the first feature extraction and the second feature extraction may be different in that the second feature extraction includes preprocessing of a candidate region image, and the preprocessing of the candidate region image may be size preprocessing.
Further, the first feature extraction process may be performed by a first feature extraction model, and the second feature extraction process may be performed by a second feature extraction model. The candidate region image may be input to a pre-trained first feature extraction model to perform a first feature extraction process, so as to obtain a first feature. The candidate region image may be cut and enlarged, and then input to a pre-trained second feature extraction model to perform a second feature extraction process, so as to obtain a second feature.
Further, the first feature extraction model and the second feature extraction model may be deep neural network-based feature extraction models, for example, the first feature extraction model may be a first yolo-v3 model, and the second feature extraction model may be a second yolo-v3 model.
The first feature extraction model is exemplified as a first yolo-v3 model, and the second feature extraction model is exemplified as a second yolo-v3 model. It should be noted that the first yolo-v3 model and the second yolo-v3 model may be structurally identical to the yolo-v3 model, and thus the first yolo-v3 model and the second yolo-v3 model may be structurally different from each other, and parametrically, the first yolo-v3 model and the second yolo-v3 model may be different from each other. This is because the first yolo-v3 model and the second yolo-v3 model are in different paths, and the first yolo-v3 model and the second yolo-v3 model have different inputs and different parameters during the training process.
The first feature may be obtained by processing the original image of the candidate area image by directly inputting the original image of the candidate area image into a first yolo-v3 model.
Further, the yolo-v3 model uses a network structure called Darknet-53 (containing 53 convolutional layers), which uses residual network to build shortcut links (shortcut connections) between layers.
In an embodiment of the present invention, the second feature may be obtained by cutting and enlarging the candidate region image, and then sending the candidate region image to a second yolo-v3 model for processing.
In the embodiment of the invention, a yolo-v3 model target detection algorithm is adopted for refining defect detection, the resolution of an input image is 512 x 512, and a yolo-v3 model based on a deep learning algorithm is mainly adopted to improve the detection precision.
In the embodiment of the present invention, most defects in the candidate area are located in the center of the image, and therefore, by cutting the center area of the candidate area image and then expanding the center area of the cut candidate area image, it is equivalent to enlarging the center area of the candidate area image, and the detection performance can be improved by enlarging the center area of the candidate area image.
Further, the candidate region may be cropped to expand the candidate region to crop 384 × 384 image data from the center of the 512 × 512 candidate region image, and the image may be zoomed back to 512 × 512 size.
104. And fusing the first characteristic and the second characteristic to obtain fused characteristics.
In the embodiment of the present invention, the fused feature may be obtained by fusing the first feature and the second feature, and specifically, the fused feature may be obtained by superimposing the first feature and the second feature.
The first feature includes a first detection frame set, the second feature includes a second detection frame set, and after the first feature and the second feature are fused, the fused feature includes a third detection frame set, and the second detection frame set is a union of the first detection frame set and the second detection frame set.
The first detection frame set comprises a plurality of detection frames which are output by a first yolo-v3 model and can have defects, and the second detection frame set comprises a plurality of detection frames which are output by a second yolo-v3 model and can have defects.
105. And predicting whether the wafer to be detected has defects or not based on the fusion characteristics.
In the embodiment of the invention, the fused feature comprises a third detection box set, the third detection box set can comprise a plurality of detection boxes with possible defects output by the first yolo-v3 model and a plurality of detection boxes with possible defects output by the second yolo-v3 model, and the detection box results with higher credibility can be reserved as the defect detection results through NMS (non-maximum suppression) operation. Of course, if the third detection frame set is empty, it indicates that the wafer to be detected has no defect.
In the embodiment of the present invention, the Non-Maximum Suppression (NMS) is an element that suppresses an element that is not a Maximum value, and may be understood as a local Maximum search. The local representation is a neighborhood, and the neighborhood has two variable parameters, namely the dimension of the neighborhood and the size of the neighborhood. For example, in pedestrian detection, a sliding window is subjected to feature extraction, and after classification and identification by a classifier, each window is subjected to a score. But sliding windows can result in many windows containing or mostly crossing other windows. The NMS is then used to select the window with the highest score (highest probability of being a pedestrian) in those neighborhoods and suppress those windows with low scores. In an embodiment of the invention, the fusion characteristic may be to determine whether the wafer to be detected has a defect. If the wafer to be detected has no defects, the wafer to be detected is qualified; and if the wafer to be detected has defects, the wafer to be detected is unqualified.
In the embodiment of the invention, the image to be detected of the wafer to be detected is obtained; extracting a candidate area image from the image to be detected; respectively carrying out first feature extraction processing and second feature extraction processing on the candidate region image to obtain a first feature and a second feature; fusing the first characteristic and the second characteristic to obtain a fused characteristic; and predicting whether the wafer to be detected has defects or not based on the fusion characteristics, so that a target region can be rapidly extracted, the calculated amount of refined defect detection is reduced, and the detection speed is increased.
Referring to fig. 2, fig. 2 is a flowchart of a method for extracting an image of a candidate region according to an embodiment of the present invention, which specifically includes the following steps:
201. and preprocessing the image to be detected to obtain a preprocessed image.
In the embodiment of the invention, the preprocessed image can be an image to be detected, impurities, foreign matters, special materials and the like on the background of the image may influence the identification precision to cause abnormal false detection of vertical lines on the background, and the background of the image to be detected can be separated before processing to eliminate the background of the image to be detected and obtain a foreground image.
In the embodiment of the invention, the background separation of the image to be detected adopts a binarization algorithm, and the threshold value in the image is automatically determined for segmentation; the segmentation threshold is determined by maximizing the variance between foreground and background pixels, independent of illumination and contrast.
Further, illumination correction can be performed on the foreground image to obtain an illumination corrected image. There is a certain degree of difference between different imaging devices, resulting in a certain difference in the color, brightness, etc. of the image formed by the same sample. The invention adopts a histogram equalization method to homogenize the pixel distribution in the image, thereby increasing the contrast of the image and reducing the illumination difference caused by different imaging conditions. Because the sub-security image consists of three channels of RGB, the invention firstly converts the RGB image into YUV space, performs histogram equalization on the Y channel, and then combines the equalized Y channel with the original UV channel to convert the Y channel back into the RGB domain.
In the embodiment of the present invention, the RGB color scheme is a color standard in the industry, and various colors are obtained by changing and superimposing three color channels of red (R), green (G) and blue (B), where RGB represents three color channels of red, green and blue.
In the embodiment of the invention, the YUV is a color coding method (belonging to PAL) adopted by the european television system, and is a color space adopted by PAL and SECAM analog color television systems. In modern color television systems, a three-tube color camera or a color CCD camera is usually used for image capture, then the obtained color image signals are subjected to color separation and respective amplification and correction to obtain RGB, and then a luminance signal Y and two color difference signals B-Y (i.e., U) and R-Y (i.e., V) are obtained through a matrix conversion circuit, and finally a transmitting end respectively encodes the luminance signal and the color difference signals and transmits the encoded signals through the same channel. This color representation is called YUV color space representation. The importance of using the YUV color space is that its luminance signal Y and chrominance signal U, V are separate.
In the embodiment of the present invention, the foregoing performs illumination correction on the foreground image to obtain an illumination corrected image; and carrying out spatial correction on the first corrected image to obtain a preprocessed image. When the template is predefined to be imaged, rotation, displacement and the like exist to a certain degree inevitably, and the distortion has a certain interference effect on refined defect analysis, so that the image needs to be corrected in space.
In an embodiment of the present invention, the performing spatial correction on the first corrected image to obtain a preprocessed image includes: and predicting the reference points and the feature points of the wafer in the illumination correction image, and aligning the feature points of the wafer in the illumination correction image to the feature points on a predefined template through affine transformation based on the reference points to obtain a preprocessed image. The spatial correction needs to be based on some reference points and adjusted to a predefined template. The invention predicts the position of the reference point in the wafer image by adopting a regression algorithm based on deep learning, and the reference point generally selects points with obvious difference from other parts, such as angular points, edge points and the like. After the reference points are determined, the feature points on the target image are aligned to the feature point positions on the predefined template by affine transformation, and image correction is completed.
In the present embodiment, the above-described radial transformation is geometrically defined as an affine transformation or affine mapping (from latin, "and … related") between two vector spaces consisting of a non-singular linear transformation (the transformation performed using a linear function) followed by a translation transformation.
202. And extracting candidate regions of the image to be detected through a template comparison algorithm, and extracting the candidate region image.
In the embodiment of the present invention, the candidate region image may be obtained by comparing predefined templates, that is, selecting a defect-free image as a template for each scanning region, and distinguishing by comparing differences between the target image region and the template.
Optionally, in the embodiment of the present invention, predicting whether the wafer to be detected has defects based on the fusion features includes: performing non-maximum rejection on the fusion features, and reserving a detection frame result with the highest reliability; and judging whether the wafer to be detected has defects or not according to the detection frame result with the highest reliability. If the defect exists, the operation is not available; if no defect exists, the device can be continuously used.
In the embodiment of the invention, the image to be detected of the wafer to be detected is obtained; extracting a candidate area image from the image to be detected; respectively carrying out first feature extraction processing and second feature extraction processing on the candidate region image to obtain a first feature and a second feature; fusing the first characteristic and the second characteristic to obtain a fused characteristic; and predicting whether the wafer to be detected has defects or not based on the fusion characteristics, so that a target region can be rapidly extracted, the calculated amount of refined defect detection is reduced, and the detection speed is increased.
Referring to fig. 3, fig. 3 is a schematic structural diagram of a wafer defect detecting apparatus according to an embodiment of the present invention, the apparatus including:
the acquiring module 301 is configured to acquire an image to be detected of a wafer to be detected;
an extraction module 302, configured to extract a candidate region image from the image to be detected;
a processing module 303, configured to perform first feature extraction processing and second feature extraction processing on the candidate region image respectively to obtain a first feature and a second feature;
a fusion module 304, configured to fuse the first feature and the second feature to obtain a fused feature;
and the predicting module 305 is configured to predict whether the wafer to be detected has a defect based on the fusion characteristics.
Further, as shown in fig. 4, the extracting module 302 includes:
the processing submodule 3021 is configured to preprocess the image to be detected to obtain a preprocessed image;
the extracting submodule 3022 is configured to extract a candidate region from the image to be detected through a template comparison algorithm, and extract the candidate region image.
Further, as shown in fig. 5, the processing sub-module 3021 includes:
a separation unit 30211, configured to perform background separation on the image to be detected to obtain a foreground image;
a first correction unit 30212, configured to perform illumination correction on the foreground image to obtain an illumination corrected image;
a second correction unit 30213, configured to perform spatial correction on the first corrected image to obtain a preprocessed image.
Further, as shown in fig. 6, the second correction unit 30213 includes:
a prediction subunit 302131, configured to predict a reference point and a feature point of the wafer in the illumination correction image;
an aligning subunit 302132, configured to align, based on the reference point, the feature point of the wafer in the illumination correction image to the feature point on the predefined template through affine transformation, so as to obtain a preprocessed image.
Further, the fusion module 304 is further configured to input the candidate region image into a pre-trained first feature extraction model for performing a first feature extraction process, so as to obtain a first feature.
Further, the fusion module 304 is further configured to cut and expand the candidate region image, and then input the candidate region image into a pre-trained second feature extraction model for second feature extraction processing, so as to obtain a second feature.
Further, as shown in fig. 7, the prediction module 305 includes:
the retention submodule 3051 is configured to perform non-maximum rejection on the fusion feature, and retain a detection box result with the highest reliability;
and the judging submodule 3052 is configured to judge whether the wafer to be detected has a defect according to the detection frame result with the highest reliability.
In a fourth aspect, an embodiment of the present invention provides a computer-readable storage medium, where a computer program is stored on the computer-readable storage medium, and when the computer program is executed by a processor, the computer program implements the steps in the wafer defect detection method provided in the embodiment of the present invention.
It should be noted that the electronic device provided in the embodiment of the present invention may be applied to a smart phone, a computer, a server, and other devices that can perform wafer defect detection.
The electronic equipment provided by the embodiment of the invention can realize each process realized by the wafer defect detection method in the method embodiment, and can achieve the same beneficial effect. To avoid repetition, further description is omitted here.
Referring to fig. 8, fig. 8 is a schematic structural diagram of an electronic device according to an embodiment of the present invention, as shown in fig. 8, including: a memory 802, a processor 801 and a computer program of a wafer defect detection method stored on the memory 1402 and operable on the processor 801, wherein:
the processor 801 is used to call the computer program stored in the memory 802, and executes the following steps:
acquiring a to-be-detected image of a to-be-detected wafer;
extracting a candidate area image from the image to be detected;
respectively carrying out first feature extraction processing and second feature extraction processing on the candidate region image to obtain a first feature and a second feature;
fusing the first characteristic and the second characteristic to obtain a fused characteristic;
and predicting whether the wafer to be detected has defects or not based on the fusion characteristics.
Further, the extracting of the candidate region image from the image to be detected, which is performed by the processor 801, includes:
preprocessing the image to be detected to obtain a preprocessed image;
and extracting a candidate region of the image to be detected through a template comparison algorithm, and extracting the candidate region image.
Further, the preprocessing the image to be detected performed by the processor 801 to obtain a preprocessed image includes:
carrying out background separation on the image to be detected to obtain a foreground image;
performing illumination correction on the foreground image to obtain an illumination correction image;
and carrying out spatial correction on the first corrected image to obtain a preprocessed image.
Further, the performing, by the processor 801, the spatial correction on the first corrected image to obtain a preprocessed image includes:
predicting the reference points and the characteristic points of the wafer in the illumination correction image;
and aligning the feature points of the wafer in the illumination correction image to the feature points on a predefined template through affine transformation based on the reference points to obtain a preprocessed image.
Further, the performing, by the processor 801, the first feature extraction processing on the candidate region image to obtain a first feature includes:
and inputting the candidate region image into a pre-trained first feature extraction model for first feature extraction processing to obtain a first feature.
Further, the performing, by the processor 801, a second feature extraction process on the candidate region image to obtain a second feature includes:
and cutting and expanding the candidate region image, and inputting the candidate region image into a pre-trained second feature extraction model for second feature extraction processing to obtain a second feature.
Further, the predicting whether the wafer to be detected has the defect or not based on the fusion feature performed by the processor 801 includes:
performing non-maximum rejection on the fusion features, and reserving a detection frame result with the highest credibility;
and judging whether the wafer to be detected has defects or not according to the detection frame result with the highest reliability.
It should be noted that the electronic device provided in the embodiment of the present invention may be applied to a smart phone, a computer, a server, and other devices that can perform wafer defect detection.
The electronic equipment provided by the embodiment of the invention can realize each process realized by the wafer defect detection method in the method embodiment, and can achieve the same beneficial effect. To avoid repetition, further description is omitted here.
The embodiment of the present invention further provides a computer-readable storage medium, where a computer program is stored on the computer-readable storage medium, and when the computer program is executed by a processor, the computer program implements each process of the wafer defect detection method or the application-side wafer defect detection method provided in the embodiment of the present invention, and can achieve the same technical effect, and in order to avoid repetition, the detailed description is omitted here.
It will be understood by those skilled in the art that all or part of the processes of the methods of the embodiments described above can be implemented by a computer program, which can be stored in a computer-readable storage medium, and when executed, can include the processes of the embodiments of the methods described above. The storage medium may be a magnetic disk, an optical disk, a Read-Only Memory (ROM), a Random Access Memory (RAM), or the like.
The above disclosure is only for the purpose of illustrating the preferred embodiments of the present invention, and it is therefore to be understood that the invention is not limited by the scope of the appended claims.
Claims (10)
1. A method for detecting a wafer defect, the method comprising:
acquiring a to-be-detected image of a to-be-detected wafer;
extracting a candidate area image from the image to be detected;
respectively carrying out first feature extraction processing and second feature extraction processing on the candidate region image to obtain a first feature and a second feature;
fusing the first characteristic and the second characteristic to obtain a fused characteristic;
and predicting whether the wafer to be detected has defects or not based on the fusion characteristics.
2. The wafer defect detection method as claimed in claim 1, wherein the extracting the candidate area image from the image to be detected comprises:
preprocessing the image to be detected to obtain a preprocessed image;
and extracting a candidate region of the image to be detected through a template comparison algorithm, and extracting the candidate region image.
3. The wafer defect detection method of claim 2, wherein the preprocessing the image to be detected to obtain a preprocessed image comprises:
carrying out background separation on the image to be detected to obtain a foreground image;
performing illumination correction on the foreground image to obtain an illumination correction image;
and carrying out spatial correction on the first corrected image to obtain a preprocessed image.
4. The wafer defect detection method of claim 3, wherein the spatially correcting the first corrected image to obtain a pre-processed image comprises:
predicting the reference points and the characteristic points of the wafer in the illumination correction image;
and aligning the feature points of the wafer in the illumination correction image to the feature points on a predefined template through affine transformation based on the reference points to obtain a preprocessed image.
5. The wafer defect detection method of claim 4, wherein the performing a first feature extraction process on the candidate region image to obtain a first feature comprises:
and inputting the candidate region image into a pre-trained first feature extraction model for first feature extraction processing to obtain a first feature.
6. The wafer defect detection method of claim 5, wherein the second feature extraction processing on the candidate area image to obtain a second feature comprises:
and cutting and expanding the candidate region image, and inputting the candidate region image into a pre-trained second feature extraction model for second feature extraction processing to obtain a second feature.
7. The wafer defect detection method of claim 6, wherein predicting whether the wafer to be detected has defects based on the fusion features comprises:
performing non-maximum rejection on the fusion features, and reserving a detection frame result with the highest credibility;
and judging whether the wafer to be detected has defects or not according to the detection frame result with the highest reliability.
8. A wafer defect detection apparatus, the apparatus comprising:
the acquisition module is used for acquiring an image to be detected of the wafer to be detected;
the extraction module is used for extracting a candidate region image from the image to be detected;
the processing module is used for respectively carrying out first feature extraction processing and second feature extraction processing on the candidate region image to obtain a first feature and a second feature;
the fusion module is used for fusing the first characteristic and the second characteristic to obtain a fused characteristic;
and the prediction module is used for predicting whether the wafer to be detected has the defects or not based on the fusion characteristics.
9. An electronic device, comprising: a memory, a processor and a computer program stored on the memory and executable on the processor, the processor implementing the steps of the wafer defect detection method according to any one of claims 1 to 7 when executing the computer program.
10. A computer-readable storage medium, having a computer program stored thereon, which, when being executed by a processor, carries out the steps of the wafer defect detecting method according to any one of claims 1 to 7.
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN116245876A (en) * | 2022-12-29 | 2023-06-09 | 摩尔线程智能科技(北京)有限责任公司 | Defect detection method, device, electronic apparatus, storage medium, and program product |
| CN117635590A (en) * | 2023-12-12 | 2024-03-01 | 深圳市英伟胜科技有限公司 | Defect detection method, defect detection device and storage medium for notebook computer shell |
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Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN116245876A (en) * | 2022-12-29 | 2023-06-09 | 摩尔线程智能科技(北京)有限责任公司 | Defect detection method, device, electronic apparatus, storage medium, and program product |
| CN116245876B (en) * | 2022-12-29 | 2024-06-11 | 摩尔线程智能科技(北京)有限责任公司 | Defect detection method, device, electronic apparatus, storage medium, and program product |
| CN117635590A (en) * | 2023-12-12 | 2024-03-01 | 深圳市英伟胜科技有限公司 | Defect detection method, defect detection device and storage medium for notebook computer shell |
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