CN114153672A - Chip verification method, system, equipment and storage medium - Google Patents
Chip verification method, system, equipment and storage medium Download PDFInfo
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Abstract
The application discloses a chip verification method, which comprises the following steps: calling a target algorithm from an OpenSSL algorithm library; encrypting the first original text data through a target algorithm to obtain and store a first encryption result; importing the first original text data and parameter information of a target algorithm into a UVM platform; running a to-be-tested algorithm in a to-be-tested chip through the UVM platform, and encrypting the first original text data based on the parameter information and the to-be-tested algorithm to obtain a second encryption result; judging whether the second encryption result is consistent with the first encryption result; if so, determining that the verification result of the encryption function of the algorithm to be tested is passed; and if not, determining that the verification result of the encryption function of the algorithm to be tested is failed. By applying the scheme of the application, the efficient chip verification is realized by combining the UVM platform and the OpenSSL algorithm library. The application also discloses a chip verification system, a device and a storage medium, which have corresponding technical effects.
Description
Technical Field
The present invention relates to the field of computer technologies, and in particular, to a method, a system, a device, and a storage medium for chip verification.
Background
In the whole chip development process, with the increasing complexity of hardware design, the workload brought by the verification of the encryption function of the algorithm in the chip is larger and larger, and most of the development cost is consumed.
For example, the verifier needs to build a standardized verification platform to obtain the encryption result of the encryption algorithm of the chip. Then, the same data is encrypted through the externally written encryption algorithm to verify whether the encryption result obtained by the encryption algorithm of the chip is correct, a standardized verification platform is built, time and labor are wasted, the externally written encryption algorithm can be wrongly written, the chip verification efficiency is affected, and the verification complexity is improved.
In summary, how to improve the efficiency of chip verification is a technical problem that needs to be solved urgently by those skilled in the art.
Disclosure of Invention
The invention aims to provide a chip verification method, a chip verification system, a chip verification device and a storage medium, so as to improve the chip verification efficiency.
In order to solve the technical problems, the invention provides the following technical scheme:
a method of chip verification, comprising:
calling a target algorithm from an OpenSSL algorithm library;
encrypting the first original text data through the target algorithm to obtain and store a first encryption result;
importing the first original text data and the parameter information of the target algorithm into a UVM platform;
running a to-be-tested algorithm in a to-be-tested chip through the UVM platform, and encrypting the first text data based on the parameter information and the to-be-tested algorithm to obtain a second encryption result;
judging whether the second encryption result is consistent with the first encryption result or not;
if so, determining that the verification result of the encryption function of the algorithm to be tested is passed;
and if not, determining that the verification result of the encryption function of the algorithm to be tested is failed.
Preferably, the method further comprises the following steps:
encrypting second original text data through the target algorithm to obtain a third encryption result and importing the third encryption result into the UVM platform;
running the algorithm to be tested in the chip to be tested through the UVM platform, and decrypting the third encryption result based on the parameter information and the algorithm to be tested to obtain decrypted data;
judging whether the decrypted data is consistent with the second original text data;
if so, determining that the verification result of the decryption function of the algorithm to be tested is passed;
and if not, determining that the verification result of the decryption function of the algorithm to be tested is failed.
Preferably, the invoking a target algorithm from an OpenSSL algorithm library includes:
and calling a target algorithm from the OpenSSL algorithm library through a preset C language function.
Preferably, the importing the first textual data and the parameter information of the target algorithm into the UVM platform includes:
importing the C language function into the UVM platform;
and calling the C language function in the UVM platform to import the first original text data and the parameter information of the target algorithm into the UVM platform.
Preferably, the determining whether the second encryption result is consistent with the first encryption result includes:
and judging whether the second encryption result is consistent with the first encryption result or not through a Scoreboard module of the UVM platform.
Preferably, the obtained first encryption result is stored in a binary format; correspondingly, the obtained second encryption result is stored in a binary format.
Preferably, the target algorithm is an ECC algorithm or an RSA algorithm.
A chip verification system is applied to a UVM platform and comprises:
the target algorithm calling unit is used for calling a target algorithm from the OpenSSL algorithm library;
the first encryption result storage unit is used for encrypting the first original text data through the target algorithm to obtain and store a first encryption result;
the importing unit is used for importing the first original text data and the parameter information of the target algorithm into a UVM platform;
the second encryption result storage unit is used for running the algorithm to be tested in the chip to be tested through the UVM platform and encrypting the first original text data based on the parameter information and the algorithm to be tested to obtain a second encryption result;
a comparing unit, configured to determine whether the second encryption result is consistent with the first encryption result;
if yes, triggering a first result output unit for determining that the verification result of the encryption function of the algorithm to be tested is passed;
if not, triggering a second result output unit for determining that the verification result of the encryption function of the algorithm to be tested is failed.
A chip verification apparatus, comprising:
a memory for storing a computer program;
a processor for executing the computer program to implement the steps of the chip verification method of any one of the above.
A computer-readable storage medium having stored thereon a computer program which, when executed by a processor, carries out the steps of the chip verification method according to any one of the preceding claims.
By applying the technical scheme provided by the embodiment of the invention, the high-efficiency chip verification is realized by combining the UVM platform and the OpenSSL algorithm library. Specifically, according to the scheme of the application, an external algorithm does not need to be compiled manually, a target algorithm is directly called from an OpenSSL algorithm library, and after the target algorithm is called, first original text data can be encrypted through the target algorithm to obtain and store a first encryption result. When the algorithm to be tested in the chip to be tested is used for encryption, the encryption method is realized based on the UVM platform, specifically, after the first original text data and the parameter information of the target algorithm are imported into the UVM platform, the algorithm to be tested in the chip to be tested can be operated through the UVM platform, the first original text data is encrypted based on the parameter information and the algorithm to be tested, and a second encryption result is obtained. Then, judging whether the second encryption result is consistent with the first encryption result; if so, determining that the verification result of the encryption function of the algorithm to be tested is passed, otherwise, determining that the verification result of the encryption function of the algorithm to be tested is not passed. To sum up, the scheme of the application realizes efficient chip verification through the UVM platform and the OpenSSL algorithm library.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, it is obvious that the drawings in the following description are only some embodiments of the present invention, and for those skilled in the art, other drawings can be obtained according to the drawings without creative efforts.
FIG. 1 is a flow chart of a method for verifying a chip according to the present invention;
fig. 2 is a schematic structural diagram of a chip verification system according to the present invention.
Detailed Description
The core of the invention is to provide a chip verification method, which realizes high-efficiency chip verification by combining an OpenSSL algorithm library through a UVM platform.
In order that those skilled in the art will better understand the disclosure, the invention will be described in further detail with reference to the accompanying drawings and specific embodiments. It is to be understood that the described embodiments are merely exemplary of the invention, and not restrictive of the full scope of the invention. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
Referring to fig. 1, fig. 1 is a flowchart illustrating a chip verification method according to an embodiment of the present invention, where the chip verification method includes the following steps:
step S101: and calling the target algorithm from the OpenSSL algorithm library.
OpenSSL (Open Secure Sockets Layer, Open Secure socket Layer) is an Open source implementation of SSL, adopts C language as a development language, has cross-platform capability, supports multiple platforms such as Unix/Linux, Windows, Mac OS, etc., includes a powerful cryptographic algorithm library, and can implement most of the mainstream cryptographic algorithms and standards at present.
Therefore, according to the method and the device, a worker is not required to manually compile the target algorithm to realize chip verification, but the target algorithm can be directly called from the OpenSSL algorithm library, so that the obtained target algorithm is not easy to generate compiling errors, and the operation of the step S101 is convenient.
Since OpenSSL adopts the C language as a development language, in practical applications, step S101 may specifically be: and calling a target algorithm from the OpenSSL algorithm library through a preset C language function.
The specific type of the called target algorithm can be set and adjusted according to actual needs, but it is understood that the called target algorithm should be consistent with the algorithm to be tested in the chip to be tested. Considering that an ECC (Elliptic curve cryptography) algorithm and an RSA (asymmetric encryption) algorithm are currently used encryption algorithms, in practice, the target algorithm may be an ECC algorithm or an RSA algorithm.
Step S102: and encrypting the first original text data through a target algorithm to obtain and store a first encryption result.
After the target algorithm is called from the OpenSSL algorithm library, the first original text data can be encrypted through the target algorithm to obtain and store a first encryption result. The first textual data may be preset by the staff or randomly generated, without affecting the implementation of the present invention.
In one embodiment, to facilitate reading of the data, the obtained first encryption result is saved in a binary format, and likewise, the obtained second encryption result may also be saved in a binary format for reading.
For example, the target algorithm is an RSA algorithm, and the private key and the public key may be generated and stored by calling an RSA _ generate _ key function, that is, the parameter information of the target algorithm at this time is the generated private key and public key. The private key can be read through the PEM _ read _ bio _ RSAPrivateKey function, encrypted through the RSA _ public _ encrypt function, and decrypted through the RSA _ private _ decrypt function.
Step S103: and importing the first original text data and the parameter information of the target algorithm into the UVM platform.
In consideration of the fact that UVM (Universal Verification Methodology) can improve Verification efficiency, the application provides a set of library files based on the System-Verilog language. The library file contains a plurality of common base classes and methods, and also specifies the structure and the operation process of the verification platform. Therefore, in the scheme of the application, chip verification is carried out based on the UVM platform, so that a verification person can quickly and effectively build a standardized verification platform. Moreover, with the scale of SOC engineering becoming larger and larger, the system becomes more and more complex, and the verification is carried out by utilizing the UVM platform, so that the method is favorable for meeting the verification requirement, the reusability of the verification environment is improved, and the verification efficiency is improved.
The parameter information of the target algorithm refers to parameter information required to be used when the target algorithm is used for encryption and decryption. For example, in an embodiment of the present invention, the step S103 may specifically include:
importing a C language function into a UVM platform;
and calling a C language function in the UVM platform to import the first original text data and the parameter information of the target algorithm into the UVM platform.
In this embodiment, the C language function described above is first imported into the UVM platform, for example, the System-Verilog language of the UVM platform provides a DPI interface, and the previously written C language function can be imported into the UVM platform using an import statement.
After the importing, a C language function may be called in the UVM platform, and specifically, the C language function may be called in a transaction of the UVM platform, so that the UVM platform can obtain subsequent data to be sent to the algorithm to be tested in the chip to be tested, in this case, the data to be sent to the algorithm to be tested in the chip to be tested is the first textual data and the parameter information of the target algorithm, and therefore, the C language function may be called, so that the first textual data and the parameter information of the target algorithm are imported into the UVM platform.
Step S104: and running the algorithm to be tested in the chip to be tested through the UVM platform, and encrypting the first original text data based on the parameter information and the algorithm to be tested to obtain a second encryption result.
And sending the first original text data imported into the UVM platform and the parameter information of the target algorithm to the algorithm to be tested in the chip to be tested, and encrypting the first original text data by the algorithm to be tested in the chip to be tested to obtain a second encryption result. In practical applications, the obtained second encryption result may be saved in a binary format as described above. Then, the encryption device can be driven to an interface through a driver module, so that a Monitor module of the UVM platform can Monitor a second encryption result.
Step S105: judging whether the second encryption result is consistent with the first encryption result;
if yes, step S106 is executed: determining that the verification result of the encryption function of the algorithm to be tested is passed;
if not, step S107: and determining that the verification result of the encryption function of the algorithm to be tested is failed.
When determining whether the second encryption result is consistent with the first encryption result, the second encryption result may also be implemented by the UVM platform to further improve the efficiency of chip verification, that is, in an embodiment of the present invention, step S105 may specifically include:
and judging whether the second encryption result is consistent with the first encryption result or not through a Scoreboard module of the UVM platform.
Specifically, the Scoreboard module of the UVM platform may obtain the second encryption result through the Monitor module, and then compare the second encryption result with the first encryption result obtained in step S102 to determine whether the second encryption result is consistent with the first encryption result. Of course, in other cases, it may be determined whether the second encryption result is consistent with the first encryption result in other manners. In addition, when judging whether the second encryption result is consistent with the first encryption result, the judgment can be carried out in a full quantity comparison mode, the judgment can also be carried out through the check bits, and the judgment can be carried out according to actual needs.
It can be understood that, when the second encryption result is consistent with the first encryption result, it can be determined that the verification result of the encryption function of the algorithm to be tested is passed, otherwise, it is not passed. In practical application, the method can report errors when the verification is failed so as to remind a verifier of processing.
In an embodiment of the present invention, the method may further include:
encrypting the second original text data through a target algorithm to obtain a third encryption result and importing the third encryption result into the UVM platform;
running the algorithm to be tested in the chip to be tested through the UVM platform, and decrypting the third encryption result based on the parameter information and the algorithm to be tested to obtain decrypted data;
judging whether the decrypted data is consistent with the second original text data;
if so, determining that the verification result of the decryption function of the algorithm to be tested is passed;
and if not, determining that the verification result of the decryption function of the algorithm to be tested is failed.
In the foregoing embodiment, the encryption function of the algorithm to be tested is verified, and in this embodiment, the verification of the decryption function of the algorithm to be tested can be realized through the UVM platform in combination with the OpenSSL algorithm library.
Specifically, the second original text data can be encrypted through the target algorithm to obtain a third encryption result and imported into the UVM platform, and the second original text data can be preset by a worker or randomly generated, and the implementation of the invention is not affected. And after the third encryption result is obtained, the third encryption result and the parameter information of the target algorithm are sent to the algorithm to be tested in the chip to be tested, and the algorithm to be tested in the chip to be tested can decrypt the third encryption result to obtain decrypted data. And finally, determining whether the decryption function of the algorithm to be tested passes the verification by judging whether the decrypted data is consistent with the second original text data.
By applying the technical scheme provided by the embodiment of the invention, the high-efficiency chip verification is realized by combining the UVM platform and the OpenSSL algorithm library. Specifically, according to the scheme of the application, an external algorithm does not need to be compiled manually, a target algorithm is directly called from an OpenSSL algorithm library, and after the target algorithm is called, first original text data can be encrypted through the target algorithm to obtain and store a first encryption result. When the algorithm to be tested in the chip to be tested is used for encryption, the encryption method is realized based on the UVM platform, specifically, after the first original text data and the parameter information of the target algorithm are imported into the UVM platform, the algorithm to be tested in the chip to be tested can be operated through the UVM platform, the first original text data is encrypted based on the parameter information and the algorithm to be tested, and a second encryption result is obtained. Then, judging whether the second encryption result is consistent with the first encryption result; if so, determining that the verification result of the encryption function of the algorithm to be tested is passed, otherwise, determining that the verification result of the encryption function of the algorithm to be tested is not passed. To sum up, the scheme of the application realizes efficient chip verification through the UVM platform and the OpenSSL algorithm library.
Corresponding to the above method embodiments, the embodiments of the present invention further provide a chip verification system, which can be referred to in correspondence with the above.
Referring to fig. 2, a schematic structural diagram of a chip verification system according to the present invention is applied to a UVM platform, and includes:
a target algorithm calling unit 201, configured to call a target algorithm from an OpenSSL algorithm library;
a first encryption result storage unit 202, configured to encrypt the first original text data through a target algorithm, obtain a first encryption result, and store the first encryption result;
an importing unit 203, configured to import the first textual data and the parameter information of the target algorithm into the UVM platform;
a second encryption result storage unit 204, configured to run a to-be-detected algorithm in the to-be-detected chip through the UVM platform, and encrypt the first textual data based on the parameter information and the to-be-detected algorithm to obtain a second encryption result;
a comparing unit 205 for determining whether the second encryption result is consistent with the first encryption result;
if yes, triggering a first result output unit 206 for determining that the verification result of the encryption function of the algorithm to be tested is passed;
if not, triggering a second result output unit 207 for determining that the verification result of the encryption function of the algorithm to be tested is failed.
In an embodiment of the present invention, the importing unit 203 is further configured to: encrypting the second original text data through a target algorithm to obtain a third encryption result and importing the third encryption result into the UVM platform;
further comprising: the decryption data determining unit is used for operating the algorithm to be tested in the chip to be tested through the UVM platform and decrypting the third encryption result based on the parameter information and the algorithm to be tested to obtain decryption data;
a comparing unit 205, configured to determine whether the decrypted data is consistent with the second original text data;
if yes, triggering the first result output unit 206, where the first result output unit 206 is further configured to determine that the verification result of the decryption function of the algorithm to be tested is passed;
if not, the second result output unit 207 is triggered, and the second result output unit 207 is further configured to determine that the verification result of the decryption function of the algorithm to be tested is failed.
In an embodiment of the present invention, the target algorithm invoking unit 201 is specifically configured to:
and calling a target algorithm from the OpenSSL algorithm library through a preset C language function.
In an embodiment of the present invention, the importing unit 203 is specifically configured to:
importing a C language function into a UVM platform;
and calling a C language function in the UVM platform to import the first original text data and the parameter information of the target algorithm into the UVM platform.
In an embodiment of the present invention, the comparing unit 205 is specifically configured to:
and judging whether the second encryption result is consistent with the first encryption result or not through a Scoreboard module of the UVM platform.
In one embodiment of the present invention, the obtained first encryption result is saved in a binary format; accordingly, the obtained second encryption result is saved in a binary format.
In one embodiment of the present invention, the target algorithm is an ECC algorithm or an RSA algorithm.
Corresponding to the above method and system embodiments, the embodiments of the present invention further provide a chip verification apparatus and a computer-readable storage medium, which may be referred to in correspondence with the above.
The chip verification apparatus may include:
a memory for storing a computer program;
a processor for executing a computer program to implement the steps of the chip verification method as in any of the above embodiments.
The computer readable storage medium has stored thereon a computer program which, when executed by a processor, implements the steps of the chip verification method as in any of the above embodiments. A computer-readable storage medium as referred to herein may include Random Access Memory (RAM), memory, Read Only Memory (ROM), electrically programmable ROM, electrically erasable programmable ROM, registers, hard disk, a removable disk, a CD-ROM, or any other form of storage medium known in the art.
It is further noted that, herein, relational terms such as first and second, and the like may be used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Also, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising an … …" does not exclude the presence of other identical elements in a process, method, article, or apparatus that comprises the element.
Those of skill would further appreciate that the various illustrative elements and algorithm steps described in connection with the embodiments disclosed herein may be implemented as electronic hardware, computer software, or combinations of both, and that the various illustrative components and steps have been described above generally in terms of their functionality in order to clearly illustrate this interchangeability of hardware and software. Whether such functionality is implemented as hardware or software depends upon the particular application and design constraints imposed on the implementation. Skilled artisans may implement the described functionality in varying ways for each particular application, but such implementation decisions should not be interpreted as causing a departure from the scope of the present invention.
The principle and the implementation of the present invention are explained in the present application by using specific examples, and the above description of the embodiments is only used to help understanding the technical solution and the core idea of the present invention. It should be noted that, for those skilled in the art, it is possible to make various improvements and modifications to the present invention without departing from the principle of the present invention, and those improvements and modifications also fall within the scope of the claims of the present invention.
Claims (10)
1. A method of chip verification, comprising:
calling a target algorithm from an OpenSSL algorithm library;
encrypting the first original text data through the target algorithm to obtain and store a first encryption result;
importing the first original text data and the parameter information of the target algorithm into a UVM platform;
running a to-be-tested algorithm in a to-be-tested chip through the UVM platform, and encrypting the first text data based on the parameter information and the to-be-tested algorithm to obtain a second encryption result;
judging whether the second encryption result is consistent with the first encryption result or not;
if so, determining that the verification result of the encryption function of the algorithm to be tested is passed;
and if not, determining that the verification result of the encryption function of the algorithm to be tested is failed.
2. The chip verification method according to claim 1, further comprising:
encrypting second original text data through the target algorithm to obtain a third encryption result and importing the third encryption result into the UVM platform;
running the algorithm to be tested in the chip to be tested through the UVM platform, and decrypting the third encryption result based on the parameter information and the algorithm to be tested to obtain decrypted data;
judging whether the decrypted data is consistent with the second original text data;
if so, determining that the verification result of the decryption function of the algorithm to be tested is passed;
and if not, determining that the verification result of the decryption function of the algorithm to be tested is failed.
3. The chip verification method according to claim 1, wherein the invoking a target algorithm from an OpenSSL algorithm library comprises:
and calling a target algorithm from the OpenSSL algorithm library through a preset C language function.
4. The chip verification method according to claim 3, wherein the importing the first textual data and the parameter information of the target algorithm into a UVM platform comprises:
importing the C language function into the UVM platform;
and calling the C language function in the UVM platform to import the first original text data and the parameter information of the target algorithm into the UVM platform.
5. The chip verification method according to claim 1, wherein the determining whether the second encryption result is consistent with the first encryption result comprises:
and judging whether the second encryption result is consistent with the first encryption result or not through a Scoreboard module of the UVM platform.
6. The chip verification method according to claim 1, wherein the obtained first encryption result is saved in a binary format; correspondingly, the obtained second encryption result is stored in a binary format.
7. The chip verification method according to claim 1, wherein the target algorithm is an ECC algorithm or an RSA algorithm.
8. A chip verification system, applied to a UVM platform, includes:
the target algorithm calling unit is used for calling a target algorithm from the OpenSSL algorithm library;
the first encryption result storage unit is used for encrypting the first original text data through the target algorithm to obtain and store a first encryption result;
the importing unit is used for importing the first original text data and the parameter information of the target algorithm into a UVM platform;
the second encryption result storage unit is used for running the algorithm to be tested in the chip to be tested through the UVM platform and encrypting the first original text data based on the parameter information and the algorithm to be tested to obtain a second encryption result;
a comparing unit, configured to determine whether the second encryption result is consistent with the first encryption result;
if yes, triggering a first result output unit for determining that the verification result of the encryption function of the algorithm to be tested is passed;
if not, triggering a second result output unit for determining that the verification result of the encryption function of the algorithm to be tested is failed.
9. A chip verification apparatus, comprising:
a memory for storing a computer program;
a processor for executing the computer program to implement the steps of the chip verification method according to any one of claims 1 to 7.
10. A computer-readable storage medium, characterized in that a computer program is stored thereon, which computer program, when being executed by a processor, carries out the steps of the chip verification method according to any one of claims 1 to 7.
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