CN114137882A - Control method of wireless device and wireless device - Google Patents
Control method of wireless device and wireless device Download PDFInfo
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Abstract
The disclosure provides a control method of wireless equipment and the wireless equipment, and relates to the technical field of computers. The control method of the wireless device comprises the following steps: running a boot program of the first central processing unit stored in the first memory upon booting the second central processing unit in the wireless device; the first memory is connected with the first central processing unit; if the second central processing unit in the wireless device is started, sending a first main program of the first central processing unit stored in the second memory to a third memory; the second memory is connected with the second central processing unit, and the capacity of the first memory is smaller than that of the second memory; the third memory is connected with the first central processing unit; and the first central processor finishes starting based on the first main program. The technical scheme of the embodiment of the disclosure can reduce cost.
Description
Technical Field
The present disclosure relates to the field of computer technologies, and in particular, to a control method for a wireless device and a wireless device.
Background
With the development of wireless devices such as CPE (Customer Premise Equipment), two central processing units are generally configured on a CPE device for data processing.
In the related art, each central processor in the client front-end device needs to be configured with a large capacity of memory. In which, the mass storage occupies a large area, increasing the storage cost. Moreover, the large-capacity memory increases the layout difficulty and is complex to implement.
Disclosure of Invention
The present disclosure provides a control method for a wireless device and a wireless device, so as to overcome the technical problem of complex implementation at least to some extent.
According to an aspect of the present disclosure, there is provided a control method of a wireless device, including: running a boot program of the first central processing unit stored in the first memory upon booting the second central processing unit in the wireless device; the first memory is connected with the first central processing unit; if the second central processing unit in the wireless device is started, sending a first main program of the first central processing unit stored in the second memory to a third memory; the second memory is connected with the second central processing unit, and the capacity of the first memory is smaller than that of the second memory; the third memory is connected with the first central processing unit; and the first central processor finishes starting based on the first main program.
According to an aspect of the present disclosure, there is provided a wireless device including: a first central processing unit and a second central processing unit; the first memory is connected with the first central processing unit and used for storing a starting program of the first central processing unit so as to enable the first central processing unit to be started by running a starting program part; the second memory is connected with the second central processing unit and used for storing a first main program of the first central processing unit, a second main program of the second central processing unit and a starting program of the second central processing unit; the capacity of the first memory is smaller than that of the second memory; and the third memory is connected with the first central processing unit and used for storing the first main program of the first central processing unit sent by the second central processing unit after the second central processing unit is started.
In some embodiments of the present disclosure, the first central processing unit and the second central processing unit are jointly started through a start program and a main program by combining a small-capacity first memory of the first central processing unit and a large-capacity second memory of the second central processing unit in the wireless device. Wherein, because the first memory through the small capacity and the second memory of large capacity are mutually supported, use the start-up procedure of storing first central processing unit, and adopt the first main program of second memory storage first central processing unit, and then realize the normal start of a plurality of central processing units, the memory space that the large capacity memory took among the correlation technique has been reduced, the area that the large capacity memory wiring needs to occupy has been reduced, and the overall arrangement degree of difficulty and cost have been reduced, the implementation procedure has been simplified, the feasibility has been improved, and then equipment reliability and stability have been improved.
It is to be understood that both the foregoing general description and the following detailed description are exemplary and explanatory only and are not restrictive of the disclosure.
Drawings
The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate embodiments consistent with the present disclosure and together with the description, serve to explain the principles of the disclosure. It is to be understood that the drawings in the following description are merely exemplary of the disclosure, and that other drawings may be derived from those drawings by one of ordinary skill in the art without the exercise of inventive faculty. In the drawings:
fig. 1 shows a schematic diagram of an application scenario in which the control method of a wireless device of an embodiment of the present disclosure may be applied;
fig. 2 schematically shows a flow chart of a control method of a wireless device according to an exemplary embodiment of the present disclosure;
FIG. 3 is a diagram showing a structure of a memory in the related art in the embodiment of the present disclosure;
FIG. 4 illustrates a first block diagram of a memory in an embodiment of the disclosure;
FIG. 5 illustrates a second block diagram of a memory in an embodiment of the disclosure;
FIG. 6 is a flow chart illustrating the transmission of a first main program in an embodiment of the present disclosure;
FIG. 7 illustrates a flow chart for determining a startup state in an embodiment of the present disclosure;
fig. 8 schematically illustrates a block diagram of a wireless device in an exemplary embodiment of the disclosure.
Detailed Description
Example embodiments will now be described more fully with reference to the accompanying drawings. Example embodiments may, however, be embodied in many different forms and should not be construed as limited to the examples set forth herein; rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the concept of example embodiments to those skilled in the art. The described features, structures, or characteristics may be combined in any suitable manner in one or more embodiments. In the following description, numerous specific details are provided to give a thorough understanding of embodiments of the disclosure. One skilled in the relevant art will recognize, however, that the subject matter of the present disclosure can be practiced without one or more of the specific details, or with other methods, components, devices, steps, and the like. In other instances, well-known technical solutions have not been shown or described in detail to avoid obscuring aspects of the present disclosure.
Furthermore, the drawings are merely schematic illustrations of the present disclosure and are not necessarily drawn to scale. The same reference numerals in the drawings denote the same or similar parts, and thus their repetitive description will be omitted. Some of the block diagrams shown in the figures are functional entities and do not necessarily correspond to physically or logically separate entities. These functional entities may be implemented in the form of software, or in one or more hardware modules or integrated circuits, or in different networks and/or processor devices and/or microcontroller devices.
The flow charts shown in the drawings are merely illustrative and do not necessarily include all of the steps. For example, some steps may be decomposed, and some steps may be combined or partially combined, so that the actual execution sequence may be changed according to the actual situation. In addition, all of the following terms "first" and "second" are used for distinguishing purposes only and should not be construed as limiting the present disclosure.
The embodiment of the disclosure provides a control method of a wireless device. Fig. 1 shows a schematic diagram of an application scenario in which the control method of a wireless device according to an embodiment of the present disclosure may be applied.
As shown in fig. 1, the method can be applied to the control process of the client front-end device 101. The device 101 may be a wireless device, for example, various types of wireless devices, and is not limited herein. In the embodiment of the present disclosure, the device 101 specifically refers to a customer premises equipment, and the device 101 may be in communication connection with the device 102, the device 103, and the like, where the device 102 and the device 103 are accessory devices of a wireless device, and specifically may be any type of device, such as a monitoring device and the like.
In the embodiment of the present disclosure, the second central processing unit in the wireless device detects whether the second central processing unit is started, and if the second central processing unit is started, the second central processing unit is converted into the mobile storage device, so as to send the first main program of the first central processing unit to the third memory of the first central processing unit, so that the first central processing unit is continuously started according to the first main program. And after the first central processing unit is started, the information of successful start is sent to the second central processing unit, so that the double central processing units operate normally.
The flowchart and block diagrams in the figures illustrate the architecture, functionality, and operation of possible implementations of systems, methods and computer program products according to various embodiments of the present disclosure. In this regard, each block in the flowchart or block diagrams may represent a module, segment, or portion of code, which comprises one or more executable instructions for implementing the specified logical function(s). It should also be noted that, in some alternative implementations, the functions noted in the block may occur out of the order noted in the figures. For example, two blocks shown in succession may, in fact, be executed substantially concurrently, or the blocks may sometimes be executed in the reverse order, depending upon the functionality involved. It will also be noted that each block of the block diagrams or flowchart illustration, and combinations of blocks in the block diagrams or flowchart illustration, can be implemented by special purpose hardware-based systems which perform the specified functions or acts, or combinations of special purpose hardware and computer instructions.
The units described in the embodiments of the present disclosure may be implemented by software, or may be implemented by hardware, and the described units may also be disposed in a processor. Wherein the names of the elements do not in some way constitute a limitation on the elements themselves.
Fig. 2 schematically shows a flowchart of a control method of a wireless device according to an exemplary embodiment of the present disclosure, which may be applied to a process of controlling the wireless device by a plurality of central processors in the wireless device. Referring to fig. 2, the method for controlling a wireless device may include steps S210 to S230, which are described in detail as follows:
in step S210, when the second central processing unit in the wireless device is started, the start program of the first central processing unit stored in the first memory is run; the first memory is connected with the first central processing unit.
In the embodiment of the present disclosure, the wireless device may be any device for wireless network access, and the client front-end device is taken as an example for description herein. The client front-end equipment is mobile signal access equipment which receives mobile signals and forwards the mobile signals by wireless WiFi signals, is also equipment which converts high-speed 4G signals or 5G signals into WiFi signals, and can support a large number of mobile terminals which are connected with the Internet at the same time. The client front-end device can be applied to wireless network access in any scene.
In the embodiment of the present disclosure, a wireless device mainly includes the following module units: the processor unit, the AP chip, the WiFi communication unit, the wireless WAN communication unit, the power supply unit, the interface unit and other inherent units are used for accessing the forwarded mobile signals into the equipment, so that interactive control or man-machine interaction is realized. The wireless WAN communication unit may specifically be a radio frequency integrated circuit RFIC module, the wireless WAN communication unit being connected to the processor for transmitting the FFE to the processor unit. The power supply unit is connected with the processor unit and used for supplying power.
In addition, the wireless device may include a plurality of CPUs (central processing units), specifically two CPUs, to achieve the effect of dual-CPU operation. The plurality of CPUs may include, for example, CPU1 and CPU 2. The CPU1 may be configured to receive cellular data sent by the CPU2, and provide data streams to external devices through interfaces such as WiFi and a network interface, that is, the CPU is mainly configured to process WiFi and a network interface. The CPU2 mainly processes cellular data, i.e. 4G/5G signals used for the intelligent terminal to access the internet.
The first central processing unit may be any one of a plurality of central processing units, for example, the first central processing unit may be the CPU1, and the first central processing unit may also be the CPU2, which is not limited herein. The second central processing unit is different from the first central processing unit, and the second central processing unit refers to the remaining central processing units except the first central processing unit. The wireless device will be described as including two cpus as an example. For example, when the first central processing unit is CPU1, the second central processing unit is CPU 2; when the first central processing unit is the CPU2, the second central processing unit is the CPU 1.
Each central processor may be connected to a corresponding memory. In the embodiment of the present disclosure, a first central processing unit of the plurality of central processing units may be connected to the first memory, and a second central processing unit of the plurality of central processing units may be connected to the second memory. The first memory and the second memory are of the same type, but the capacity of the first memory and the capacity of the second memory are different. Specifically, the first memory and the second memory may both be FLASH, and the capacity of the first memory is smaller than that of the second memory, that is, the first memory may be a small-capacity memory, and the second memory may be a large-capacity memory. The capacity of the first memory may be determined according to the size of the boot program of the first central processing unit as long as the boot program of the first central processing unit can be stored. The boot program of the first central processor may be, for example, a UBOOT program.
The specific structure of the first central processor and the second central processor may be as shown in fig. 4 and 5. Referring to fig. 4, the first central processing unit is CPU1, the second central processing unit is CPU2, FLASH1 is the first memory, i.e., small capacity memory, and FLASH2 is the second memory, i.e., large capacity memory. Referring to fig. 5, the first central processing unit is CPU2, the second central processing unit is CPU1, FLASH2 is the first memory, i.e., small capacity memory, and FLASH1 is the second memory, i.e., large capacity memory.
In addition, the CPU1 is connected to a third memory DDR1, and the CPU2 is connected to a fourth memory DDR 2. The CPU1 and the CPU2 are connected through a PCIE interface and a USB interface. Compared with the storage mode in the related art shown in fig. 3, the occupied area of the storage is reduced and the cost is reduced by arranging a large-capacity storage and a small-capacity storage.
After configuring the memories for the first central processing unit and the second central processing unit, the start program of the first central processing unit may be stored in the first memory, and the first main program of the first central processing unit, the second main program of the second central processing unit, and the start program of the second central processing unit may be stored in the second memory. The boot program of the first central processing unit and the second central processing unit may be a UBOOT program. The UBOOT program is responsible for booting the kernel to load memory to boot or boot recovery mode to boot. During system startup, a UBOOT program is started first to partially boot the associated central processor. In the starting process of the UBOOT program, if the kernel image is flushed with a related image of a third party which is not subjected to signature authentication, the system cannot be started so as to ensure the safety of the system. The first main program may be a main program of the first central processing unit, and the second main program may be a main program of the second central processing unit. The first main program and the second main program may be of the same type or different types. The first main program and the second main program may be the same or different in size, and are not limited herein. The first main program and the second main program may be merged, and the merged first main program and second main program may be stored in the second memory. Specifically, the first main program and the second main program can be compressed respectively, and the compressed first main program and the compressed second main program are merged and stored in a large-capacity memory, so that the storage space of the memory is saved. In this manner, for the first cpu, the boot program is stored in the first memory, and the first main program is stored in the second memory. It should be noted that the first main program and the second main program have links because they are stored in the same mass storage, but the first main program and the second main program sharing the same mass storage are independent of each other, i.e. there is a distinction. When the first central processing unit is started, only the first main program corresponding to the first central processing unit is operated, and the second main program of the second central processing unit is not operated.
On the basis, if the system is detected to be powered on, the first central processing unit and the second central processing unit can be started at the same time. For the second central processing unit, because the corresponding start program and the second main program are both stored in the second memory corresponding to the second central processing unit, the second central processing unit can independently complete the start by sequentially running the start program and the second main program of the second central processing unit. Because the first memory of the first central processing unit only stores the starting program of the first central processing unit, and the corresponding first main program is stored in the second memory, the first central processing unit can not be independently started, but needs to be started under the auxiliary action of the second central processing unit. Because each central processing unit is started through two steps of starting degree and main program. Based on this, when the system is detected to be powered on and the second central processing unit in the wireless device is started, the start program of the first central processing unit stored in the first memory can be run first, so as to realize the partial start of the first central processing unit.
Referring to fig. 4 and 5, upon detection of power-up, the first central processing unit and the second central processing unit may be simultaneously activated. The specific mode comprises the following steps: the first CPU1 or CPU2 is partially started using the UBOOT program in the small-capacity memory, and after the execution of the UBOOT program is completed, the first CPU1 or CPU2 waits for the second CPU2 or CPU1 to start to continue to start according to the first main program stored in the second memory after the start of the second CPU2 or CPU1 is completed. The second CPU2 or the CPU1 may run its own corresponding boot program stored in the second memory and the second main program for a complete boot.
In step S220, if the second central processing unit in the wireless device is started, the first main program of the first central processing unit stored in the second memory is sent to the third memory; the second memory is connected with the second central processing unit, and the capacity of the first memory is smaller than that of the second memory; the third memory is connected with the first central processing unit.
In the embodiment of the present disclosure, if the second central processing unit is started, the first main program of the first central processing unit stored in the second memory may be sent to the third memory connected to the first central processing unit, so as to continue to start the first central processing unit according to the starting condition of the second central processing unit.
Because the first central processing unit needs to run the corresponding first main program to start, and the first main program is stored in the second memory of the second central processing unit, the first main program needs to be transmitted to the third memory connected with the first central processing unit. Based on this, since the first main program is stored in the second memory, the first main program can be transmitted through the second central processing unit. Specifically, the second central processing unit may be converted into a removable storage device, and the first main program stored in the second memory may be sent to a third memory connected to the first central processing unit through the removable storage device.
Fig. 6 schematically shows a flow chart of transmitting the first main program, and referring to fig. 6, the method mainly includes the following steps:
in step S610, the second central processing unit is converted into a mobile storage device to provide a virtual interface;
in step S620, the first main program in the second memory is sent to a third memory of the first central processing unit through the virtual interface.
In the embodiment of the present disclosure, after determining that the second central processing unit is completely started, the second central processing unit may virtualize itself as a mobile storage device, which may be, for example, a usb disk or another type of device. The mobile storage device may provide a virtual interface, which is a USB interface or a PCIE channel. Furthermore, the first main program of the first central processing unit can be downloaded to the third memory corresponding to the first central processing unit for storage through the USB interface or the PCIE channel, and the first main program is run in the third memory, so that the first central processing unit is continuously started based on the first main program, and the effect of normal running of the dual CPUs is achieved. The number of the PCIE channels is determined by the mainboard and the CPU together, and the PCIE channels of the CPU are directly connected with the CPU. That is, after the second central processing unit is started, the second central processing unit converts the second central processing unit into a mobile storage device such as a usb disk, and transmits the first main program to the third memory of the first central processing unit through the mobile storage device, so as to send the first main program from the second central processing unit to the first central processing unit. The third Memory may be a DDR (Double Data Rate Dynamic Random Access Memory).
It should be added that before sending the first main program, it can be first determined whether the second central processing unit is started up. Specifically, whether the second central processing unit is started up can be determined according to the feedback information. The feedback information can be signal light prompt or audio prompt. If the second central processing unit is not started, the feedback information is not sent to the first central processing unit or other alarm information is sent to the first central processing unit. That is, if the first central processing unit receives the feedback information, it is considered that the second central processing unit is started up.
In step S230, the first central processor completes the startup based on the first main program.
In this disclosure, after the second central processing unit is started, the second central processing unit may send the first main program corresponding to the first central processing unit to the third memory connected to the first central processing unit. Specifically, the first main program may be actively sent to the third memory connected to the first central processing unit for the second central processing unit, or the first central processing unit downloads the first main program from the second memory to the third memory, as long as the first main program can be sent to the third memory connected to the first central processing unit.
After the third memory receives the first main program sent by the second central processing unit, the first central processing unit can run the first main program stored in the third memory to control the first central processing unit to continue to start, so that the double-CPU starting process of the first central processing unit and the second central processing unit is completed. Based on this, the process of starting the first central processing unit comprises the following steps: 1. starting by a starting program part stored in a first memory; 2. and after the second central processing unit is started, continuing to start according to the first main program in the third memory.
It should be added that, in the starting process of the plurality of central processing units, in order to accurately judge the starting state of each central processing unit in the wireless device, the starting states of the second central processing unit and the first central processing unit may be prompted. Specifically, referring to the schematic flow chart shown in fig. 7, the method mainly includes the following steps:
in step S710, it is determined whether the first cpu receives feedback information from the second cpu. If yes, go to step S720. If not, go to step S740.
And the feedback information is used for indicating that the second central processing unit is started completely. The feedback information can be signal light prompt or audio prompt. If the second central processing unit is not started, the feedback information is not sent to the first central processing unit.
In step S720, if yes, it is determined whether the second cpu receives the prompt message sent by the first cpu. If yes, go to step S730. If not, go to step S750.
In this step, the prompt message is used to indicate that the first central processing unit is started. The prompt information can also be in a signal light prompt mode or an audio prompt mode. And if the first central processing unit is not started, no prompt message is sent to the second central processing unit.
In step S730, if yes, it is determined that the first central processing unit and the second central processing unit are started.
In this step, if the first central processing unit receives the feedback information sent by the second central processing unit, and the second central processing unit receives the prompt information sent by the first central processing unit, it is determined that the start of the first central processing unit and the start of the second central processing unit are completed.
In step S740, if the feedback information is not received within the first duration, the second cpu is restarted. The first duration may be, for example, 10 seconds, etc., and is not limited herein. That is, if the feedback information sent by the second central processing unit is not received, the second central processing unit is considered to be not started completely. In order to improve the accuracy, the second central processing unit may be restarted according to the start program and the second main program of the second central processing unit.
In step S750, if the prompt message is not received within the second duration, the first central processing unit is restarted. The second duration may be the same as or different from the first duration, and is not particularly limited herein. And if the prompt message sent by the first central processing unit is not received, the first central processing unit is not started. In order to improve the accuracy, the first central processing unit may be restarted according to the start program and the first main program of the first central processing unit.
In the embodiment of the present disclosure, after the dual system is started, the two CPUs may determine whether the other CPU is started through GPIO (General-purpose input/output) or other signals, so as to accurately determine the starting states of the first and second CPUs. If the first central processing unit and the second central processing unit are started, the effect of normal operation of the double central processing units is achieved. If one of the first central processing unit and the second central processing unit is not started completely, the first central processing unit and the second central processing unit need to be restarted. After the starting states of the first central processing unit and the second central processing unit are accurately judged, the equipment can be restarted in time, so that the central processing units can acquire related information in time to perform related post-processing, the influence caused by equipment abnormality is reduced, the timeliness and the reliability of control of the wireless equipment are improved, the abnormal condition is avoided, and the wireless equipment is operated conveniently.
According to the technical scheme in the embodiment of the disclosure, the first central processing unit and the second central processing unit are started together through the first memory with small capacity and the second memory with large capacity, so that the first central processing unit can be started under the limitation of the second central processing unit, and the effect of normal operation of the plurality of central processing units is achieved. Compared with a large-capacity storage mode in the related art, the material cost of the storage is reduced, the layout area of a Printed Circuit Board (PCB) is reduced, the PCB layout pressure is reduced, miniaturization of products is facilitated, the material cost is reduced, the reliability and timeliness are improved, the application range of the products can be enlarged, and the feasibility is improved.
It should be noted that although the various steps of the methods of the present disclosure are depicted in the drawings in a particular order, this does not require or imply that these steps must be performed in this particular order, or that all of the depicted steps must be performed, to achieve desirable results. Additionally or alternatively, certain steps may be omitted, multiple steps combined into one step execution, and/or one step broken down into multiple step executions, etc.
Fig. 8 schematically illustrates a block diagram of a wireless device of an exemplary embodiment of the present disclosure.
Referring to fig. 8, a wireless device 800 may include the following modules:
a first cpu 801 and a second cpu 802;
a first memory 803, connected to the first central processing unit, for storing a start-up program of the first central processing unit, so that the first central processing unit is partially started up by running the start-up program;
a second memory 804 connected to the second central processing unit, for storing a first main program of the first central processing unit, a second main program of the second central processing unit, and a start program of the second central processing unit; the capacity of the first memory is smaller than that of the second memory;
and a third memory 805, configured to be connected to the first central processing unit, and configured to store the first main program of the first central processing unit sent by the second central processing unit after the second central processing unit is started.
In the embodiment of the present disclosure, the first central processing unit is connected to the second central processing unit through the PCIE channel or the USB interface. The first central processing unit can be connected with the first memory, and the second central processing unit can be connected with the second memory, namely, the first memory FLASH1 with small capacity is connected with the first central processing unit, and the second memory FLASH2 with large capacity is connected with the second central processing unit. The small-capacity memory may store therein a boot program, such as a UBOOT program, of the first central processing unit. And the first main program of the first central processing unit and the second main program of the second central processing unit can be respectively compressed and then merged, and the merged first main program and the merged second main program are stored in a large-capacity memory. The first central processor is also connected with the third memory for interaction. The second central processor is connected to the fourth memory DDR2 for interaction.
Therefore, the first central processing unit can not be independently started but needs to be started under the auxiliary action of the second central processing unit because the small-capacity first memory of the first central processing unit only stores the starting program of the first central processing unit and the corresponding first main program of the first central processing unit is stored in the large-capacity second memory. The second main program and all programs of the second central processing unit are stored in the mass storage corresponding to the second central processing unit, so that the second central processing unit can run the second main program to independently complete opening.
In the embodiment of the disclosure, the two central processing units share one large-capacity memory to perform startup by providing one small-capacity memory and one large-capacity memory. The storage space can be reasonably utilized, and the material cost is reduced. The PCB layout area is reduced, the PCB cost is reduced, the pressure of the PCB layout is reduced, the miniaturization of products is facilitated, the application range is enlarged, the feasibility is improved, and the stability and the reliability of the operation of equipment are also improved.
In an exemplary embodiment of the present disclosure, the first central processing unit is started according to a start program of the first central processing unit in the first memory and a first main program stored in the second memory.
In an exemplary embodiment of the present disclosure, the second central processing unit is started by a start program of the second central processing unit in the second memory and a second main program.
In an exemplary embodiment of the present disclosure, the first main program stored in the second memory is sent to a third memory connected to the first central processing unit through a mobile storage device, and the mobile storage device is converted by the second central processing unit.
In an exemplary embodiment of the disclosure, the first main program is sent to a third memory connected with the first central processor through a virtual interface provided by a mobile storage device.
In an exemplary embodiment of the present disclosure, the second memory includes a first main program of the first central processing unit, a second main program of the second central processing unit, and a start program of the second central processing unit.
In an exemplary embodiment of the disclosure, the first main program and the second main program in the second memory are obtained by respectively compressing to obtain a compressed first main program and a compressed second main program, and the compressed first main program and the compressed second main program are merged to obtain the second main program.
In an exemplary embodiment of the present disclosure, the first main program and the second main program are independent of each other.
In an exemplary embodiment of the present disclosure, the wireless device further includes: the first central processing unit and the second central processing unit are started to finish the feedback information sent by the second central processing unit and received by the first central processing unit, and the second central processing unit receives the prompt information sent by the first central processing unit to determine; and restarting the first central processing unit or the second central processing unit, wherein the second central processing unit does not receive the prompt information sent by the first central processing unit, or the first central processing unit does not receive the feedback information sent by the second central processing unit.
Since each module of the wireless device in the embodiments of the present disclosure is the same as that in the embodiments of the control method of the wireless device, it is not described herein again.
Through the above description of the embodiments, those skilled in the art will readily understand that the exemplary embodiments described herein may be implemented by software, or by software in combination with necessary hardware. Therefore, the technical solution according to the embodiments of the present disclosure may be embodied in the form of a software product, which may be stored in a non-volatile storage medium (which may be a CD-ROM, a usb disk, a removable hard disk, etc.) or on a network, and includes several instructions to enable a computing device (which may be a personal computer, a server, a terminal device, or a network device, etc.) to execute the method according to the embodiments of the present disclosure.
Furthermore, the above-described figures are merely schematic illustrations of processes included in methods according to exemplary embodiments of the present disclosure, and are not intended to be limiting. It will be readily understood that the processes shown in the above figures are not intended to indicate or limit the chronological order of the processes. In addition, it is also readily understood that these processes may be performed synchronously or asynchronously, e.g., in multiple modules.
It should be noted that although in the above detailed description several modules or units of the device for action execution are mentioned, such a division is not mandatory. Indeed, the features and functionality of two or more modules or units described above may be embodied in one module or unit, according to embodiments of the present disclosure. Conversely, the features and functions of one module or unit described above may be further divided into embodiments by a plurality of modules or units.
Other embodiments of the disclosure will be apparent to those skilled in the art from consideration of the specification and practice of the disclosure disclosed herein. This application is intended to cover any variations, uses, or adaptations of the disclosure following, in general, the principles of the disclosure and including such departures from the present disclosure as come within known or customary practice within the art to which the disclosure pertains. It is intended that the specification and examples be considered as exemplary only, with a true scope and spirit of the disclosure being indicated by the following claims.
It will be understood that the present disclosure is not limited to the precise arrangements described above and shown in the drawings and that various modifications and changes may be made without departing from the scope thereof. The scope of the present disclosure is to be limited only by the terms of the appended claims.
Claims (10)
1. A method for controlling a wireless device, comprising:
running a boot program of the first central processing unit stored in the first memory upon booting the second central processing unit in the wireless device; the first memory is connected with the first central processing unit;
if the second central processing unit in the wireless device is started, sending a first main program of the first central processing unit stored in the second memory to a third memory; the second memory is connected with the second central processing unit, and the capacity of the first memory is smaller than that of the second memory; the third memory is connected with the first central processing unit;
and the first central processor finishes starting based on the first main program.
2. The method of claim 1, wherein the sending the first main program of the first central processor stored in the second memory to the third memory comprises:
converting the second central processing unit into a mobile storage device to provide a virtual interface;
and sending the first main program in the second memory to a third memory connected with the first central processing unit through the virtual interface.
3. The method of controlling a wireless device according to claim 1, wherein the method further comprises:
and storing a first main program of the first central processing unit and a second main program of the second central processing unit into the second memory, and storing a starting program of the second central processing unit into the second memory.
4. The method of claim 3, wherein storing a first main program of the first central processor and a second main program of the second central processor to the second memory comprises:
and respectively compressing the first main program and the second main program, merging the compressed first main program and the compressed second main program, and storing the merged first main program and the compressed second main program in the second memory.
5. The method of claim 3 or 4, wherein the first main program and the second main program are independent of each other.
6. The method of controlling a wireless device according to claim 1, wherein the method further comprises:
if the first central processing unit receives feedback information sent by the second central processing unit and the second central processing unit receives prompt information sent by the first central processing unit, the first central processing unit and the second central processing unit are determined to be started completely;
and if the second central processing unit does not receive the prompt message sent by the first central processing unit or the first central processing unit does not receive the feedback message sent by the second central processing unit, restarting the first central processing unit or the second central processing unit.
7. A wireless device, comprising:
a first central processing unit and a second central processing unit;
the first memory is connected with the first central processing unit and used for storing a starting program of the first central processing unit so as to enable the first central processing unit to be started by running a starting program part;
the second memory is connected with the second central processing unit and used for storing a first main program of the first central processing unit, a second main program of the second central processing unit and a starting program of the second central processing unit; the capacity of the first memory is smaller than that of the second memory;
and the third memory is connected with the first central processing unit and used for storing the first main program of the first central processing unit sent by the second central processing unit after the second central processing unit is started.
8. The wireless device of claim 7, wherein the first central processor is activated according to a first central processor activation program stored in the first memory and a first main program stored in the second memory.
9. The wireless device of claim 7, wherein the second central processor is started by a second central processor startup program and a second main program in the second memory.
10. The wireless device of claim 7, wherein the first main program in the second memory is stored in the third memory through a virtual interface provided by a mobile storage device, and wherein the mobile storage device is converted by the second central processing unit.
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Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4943911A (en) * | 1986-11-20 | 1990-07-24 | Alcatel N.V. | System for loading initial program loader routine into secondary computer without bootstrap ROM |
| JP2005215994A (en) * | 2004-01-29 | 2005-08-11 | Mitsubishi Electric Corp | Multimedia processing apparatus of mobile phone terminal |
| CN101464807A (en) * | 2009-01-08 | 2009-06-24 | 杭州华三通信技术有限公司 | Application program loading method and device |
| CN110647359A (en) * | 2018-06-27 | 2020-01-03 | 爱思开海力士有限公司 | Semiconductor device, method of operating the same, and stacked memory device having the same |
| CN211152009U (en) * | 2019-08-16 | 2020-07-31 | 广州市高科通信技术股份有限公司 | Dual-processor structure of SD-WAN voice access equipment |
| CN112000424A (en) * | 2020-07-17 | 2020-11-27 | 北京达佳互联信息技术有限公司 | Application program control method and device, terminal and storage medium |
-
2021
- 2021-11-30 CN CN202111451916.5A patent/CN114137882A/en active Pending
Patent Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4943911A (en) * | 1986-11-20 | 1990-07-24 | Alcatel N.V. | System for loading initial program loader routine into secondary computer without bootstrap ROM |
| JP2005215994A (en) * | 2004-01-29 | 2005-08-11 | Mitsubishi Electric Corp | Multimedia processing apparatus of mobile phone terminal |
| CN101464807A (en) * | 2009-01-08 | 2009-06-24 | 杭州华三通信技术有限公司 | Application program loading method and device |
| CN110647359A (en) * | 2018-06-27 | 2020-01-03 | 爱思开海力士有限公司 | Semiconductor device, method of operating the same, and stacked memory device having the same |
| CN211152009U (en) * | 2019-08-16 | 2020-07-31 | 广州市高科通信技术股份有限公司 | Dual-processor structure of SD-WAN voice access equipment |
| CN112000424A (en) * | 2020-07-17 | 2020-11-27 | 北京达佳互联信息技术有限公司 | Application program control method and device, terminal and storage medium |
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