CN114124054A - Reliable trigger circuit of series thyristor - Google Patents
Reliable trigger circuit of series thyristor Download PDFInfo
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- CN114124054A CN114124054A CN202111408951.9A CN202111408951A CN114124054A CN 114124054 A CN114124054 A CN 114124054A CN 202111408951 A CN202111408951 A CN 202111408951A CN 114124054 A CN114124054 A CN 114124054A
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
- H03K17/08—Modifications for protecting switching circuit against overcurrent or overvoltage
- H03K17/081—Modifications for protecting switching circuit against overcurrent or overvoltage without feedback from the output circuit to the control circuit
- H03K17/08108—Modifications for protecting switching circuit against overcurrent or overvoltage without feedback from the output circuit to the control circuit in thyristor switches
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
- H03K17/51—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used
- H03K17/56—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices
- H03K17/72—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices having more than two PN junctions; having more than three electrodes; having more than one electrode connected to the same conductivity region
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Abstract
The invention relates to a series thyristor reliable trigger circuit, which comprises at least two groups of thyristor groups which are mutually connected in series, wherein both ends of each group of thyristor groups are connected with a resistance-capacitance absorption branch in parallel, and comprises thyristors G21 and G22 which are connected in anti-parallel, the gate pole of each thyristor is connected with a thyristor trigger circuit, each thyristor group is matched with a forced trigger circuit, the forced trigger circuit is provided with piezoresistors RZ21, RZ22 and RZ23, and diodes D2, D3, piezoresistors RZ21, RZ22 and RZ23 are connected in series in sequence and then connected in parallel at two ends of the thyristor group, thus, a surge absorption protection circuit for limiting surge peak voltage at two ends of the thyristor is formed by combining the resistance-capacitance absorption branch circuit, the junction between the piezoresistors RZ21 and RZ22 is connected to the gate of the thyristor G22 through a diode D2, and the junction between the piezoresistors RZ22 and RZ23 is connected to the gate of the thyristor G21 through a diode D3. The invention can solve the problem of overvoltage breakdown caused by that the series thyristors in the same series loop are not triggered in time with low cost and small volume.
Description
Technical Field
The invention relates to the power electronic technology, in particular to a series thyristor reliable trigger circuit.
Background
The medium-high voltage equipment such as a thyristor converter valve, a medium-high voltage alternating current motor solid state soft starter, a static reactive compensation SVC and the like needs to adopt a method of connecting a large number of thyristors in series to solve the problem of insufficient voltage resistance of a single thyristor due to high voltage level of working environment. In the flexible direct current transmission, the voltage working environment of the thyristor converter valve reaches +/-800 kV, and the voltage working environment of the Static Var Compensation (SVC) reaches 35kV or even higher; the highest withstand voltage of the single thyristor in the prior art can only reach 8500V and is direct current; therefore, the high-voltage equipment needing to use the thyristors needs to adopt a plurality of thyristors to be connected in series for voltage division, the voltage-withstanding requirement of a single thyristor is not exceeded, and the high-voltage use environment of the equipment is also met. Meanwhile, in the process of switching on and off of the thyristor, due to line inductance, surge peak voltage is easily generated between the cathode and the anode of the thyristor, and a resistance-capacitance (RC) absorber and a voltage dependent resistor are often required to be connected in parallel between the cathode and the anode of the thyristor to absorb the surge peak voltage and protect the thyristor.
An electrical topological diagram of a main loop of the static var compensation SVC is shown as a figure I, the main loop is divided into A, B, C three phases, each phase is formed by connecting a plurality of thyristors in series, and each thyristor is connected with a resistance-capacitance absorption RC and a pressure-sensitive RZ overvoltage absorption circuit in parallel. All thyristors in series in the same phase need to be triggered simultaneously and reliably. If the trigger cannot be triggered simultaneously and reliably, the post-triggered thyristor will be subjected to all the supply voltages, resulting in overvoltage breakdown of the post-triggered thyristor. To ensure that the series thyristors do not break down over voltage, protection is usually provided from three aspects: firstly, reliable triggering is realized, and the opening time tends to be consistent as much as possible; secondly, selecting thyristors with basically consistent reverse recovery charges; and the third is that two ends of each thyristor are connected with an RC (resistance-capacitance) transient absorption circuit and an overvoltage absorption (voltage-sensitive) circuit in parallel. However, the parameters of the trigger circuits simultaneously triggered by the thyristors in series cannot be completely consistent, and even if the trigger circuits with basically consistent parameters are screened out before the high-voltage equipment leaves a factory and are assembled, the parameter difference of the trigger circuits is large along with the factors of service life, aging of devices and the like, so that the triggering and switching-on time error of the thyristors is increased. The inconsistent parameters of the trigger circuit and the damage of the trigger circuit in the working process are very dangerous for the series thyristor, and the thyristor which is conducted in a lagging way breaks down the overvoltage. The thyristor is characterized in that the thyristor can be turned off only by zero crossing of the voltages at two ends of the thyristor after being triggered and turned on, so that the thyristor cannot be turned off from a conducting state even if a trigger signal disappears after the thyristor is turned on, and the thyristor can be turned off only by the zero crossing of the voltages at the two ends of the thyristor. In a 50Hz AC power grid, the voltage zero-crossing period is 10ms, and if the thyristor is turned on 4ms after the voltage zero-crossing, the thyristor can be turned off only after waiting for 6 ms. Therefore, even if the series thyristor trigger control system can detect the information of inconsistent conduction, there is no way to turn off the thyristor which is already conducted to protect the thyristor which is switched on late in time, and only the thyristor which is switched on late can be broken down by overvoltage.
The parameters of the trigger circuit are completely consistent and never damaged, and the realization is difficult. Even if substantial consistency can be achieved, or periodic inspections can be costly.
Disclosure of Invention
The invention provides a reliable trigger circuit of a series thyristor, which can form forced triggering, has low cost and small volume and solves the problem that the series thyristor is not triggered in time and is subjected to overvoltage breakdown due to the fact that the conventional trigger circuit parameters of the thyristors in the same series circuit are inconsistent or damaged.
In order to achieve the purpose, the invention discloses a reliable trigger circuit of series thyristors, which comprises at least two groups of thyristor groups connected in series for series voltage division, wherein two ends of each group of thyristor groups are connected in parallel with a resistance-capacitance absorption branch formed by connecting a resistor R21 and a capacitor C21 in series, each group of thyristor groups comprises at least two thyristors G21 and G22 in anti-parallel connection, each thyristor gate pole in each group of thyristor groups is connected with a thyristor trigger circuit for driving the thyristor to be switched on and off,
each group of thyristor group is provided with a forced trigger circuit which is provided with at least three piezoresistors RZ21, RZ22 and RZ23 and at least two diodes D2 and D3,
the piezoresistor RZ21, the piezoresistor RZ22 and the piezoresistor RZ23 are sequentially connected in series and then are connected in parallel with two ends of the thyristor group, so that the piezoresistor RZ21, the piezoresistor RZ22 and the piezoresistor RZ23 are combined with the resistance-capacitance absorption branch circuit to form a surge absorption protection circuit for limiting surge peak voltage at two ends of a thyristor,
the junction between the piezoresistor RZ21 and the piezoresistor RZ22 is connected to the gate of the thyristor G22 through the diode D2, the junction between the piezoresistor RZ22 and the piezoresistor RZ23 is connected to the gate of the thyristor G21 through the diode D3, and the conduction directions of the diode D2 and the diode D3 are both directed to the correspondingly connected gates.
As an improvement scheme, the conducting voltage of the piezoresistor RZ22 is 65-75% of the rated voltage of the thyristor, and/or the conducting voltages of the piezoresistor RZ21 and the piezoresistor RZ23 are 15-25V.
As a refinement, the static partial voltage of each thyristor in the thyristor group is configured to be 45% -55% of its rated voltage.
As a modified scheme, the thyristor trigger circuit comprises a comparator U1, a controlled switch, a voltage regulator Z1, a resistor R1, a resistor R5, a resistor R3, an N-type switch tube V1 and a power supply 24V2 thereof,
the power supply 24V2 is respectively connected to the cathode of a voltage regulator tube Z1 through a resistor R1 and the positive input end of a comparator U1, the anode of the voltage regulator tube Z1 is connected to the cathode of a thyristor connected with the thyristor trigger circuit, one end of a controlled switch is connected to the power supply 24V2, the other end of the controlled switch is respectively connected to the anode of the voltage regulator tube Z1 through a resistor R5 and the reverse input end of the comparator U1, the output end of the comparator U1 is connected to the G pole of an N-type switch tube V1, the power supply 24V2 is connected to the S pole of the N-type switch tube V1 through a resistor R3, and the D pole of the N-type switch tube V1 is connected with the gate pole of the thyristor connected with the thyristor trigger circuit.
As a modification, the controlled switch is a fiber receiver HP1, the cathode of the controlled switch is connected with a power supply 24V2, the anode of the controlled switch is connected with the anode of a voltage regulator tube Z1 through a resistor R5, and the controlled switch is connected to the reverse input end of a comparator U1.
As a modification, the thyristor trigger circuit further comprises a resistor R2, and the power supply 24V2 is connected to the G pole of the N-type switch tube V1 through the resistor R2 to be pulled up.
As a modification, the thyristor trigger circuit further includes a diode D1, the D pole of the N-type switching tube V1 is connected to the gate of the thyristor connected to the thyristor trigger circuit through a diode D1, and the conducting direction of the diode D1 is directed to the gate.
As a modified scheme, the N-type switch tube V1 is an IGBT tube.
Compared with the prior art, the invention can achieve the following beneficial effects:
1. the surge absorption loops at two ends of the thyristor are utilized, only one diode is added to form a forced trigger circuit, and the problems that the conventional trigger circuit of the thyristor in the same series loop is inconsistent in parameter or damaged, so that the series thyristor is not triggered in time and is subjected to overvoltage breakdown are solved with low cost and small size.
2. The design of strong trigger, low cost, easy realization.
3. The volume is very small, and only one diode needs to be added on the original basis.
4. And the positive and negative parallel thyristors all utilize the same surge absorption circuit, and a piezoresistor surge absorption loop is not required to be added.
The above description is only an overview of the technical solutions of the present invention, and the embodiments of the present invention are described below in order to make the technical means of the present invention more clearly understood and to make the description and other objects, features, and advantages of the present invention more comprehensible.
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Various other advantages and benefits will become apparent to those of ordinary skill in the art upon reading the following detailed description of the preferred embodiments. The drawings are only for purposes of illustrating the preferred embodiments and are not to be construed as limiting the invention. Also, like reference numerals are used to refer to like elements throughout the drawings.
In the drawings:
fig. 1 is a main loop electrical topology diagram of a static var compensation SVC in the prior art;
fig. 2 is a circuit topology diagram of the series thyristor reliable trigger circuit of the present invention.
Detailed Description
Exemplary embodiments of the present disclosure will be described in more detail below with reference to the accompanying drawings. While exemplary embodiments of the present disclosure are shown in the drawings, it should be understood that the present disclosure may be embodied in various forms and should not be limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the scope of the disclosure to those skilled in the art.
Referring to fig. 2, the circuit topology of the reliable trigger circuit for series thyristors of the present invention is used to realize reliable triggering of a group (2 anti-parallel) of thyristors in a series thyristor loop, and includes at least two groups of thyristor groups connected in series for voltage division, wherein two ends of each group of thyristor groups are connected in parallel with a resistor R21 and a capacitor C21 in series to form a rc absorption branch, and each group of thyristor groups includes at least two anti-parallel thyristors G21 and G22, and each thyristor gate in each group of thyristor group is connected with a thyristor trigger circuit for driving the on/off of the thyristor.
Specifically, the thyristor trigger circuit comprises a comparator U1, a controlled switch, a voltage regulator tube Z1, a resistor R1, a resistor R5, a resistor R3, an N-type IGBT switch tube V1, a power supply 24V2 and other devices, wherein the power supply 24V2 is respectively connected to a cathode of a voltage regulator tube Z1 through the resistor R1, and a positive input end of the comparator U1, an anode of the voltage regulator tube Z1 is connected to a cathode of a thyristor connected to the thyristor trigger circuit, one end of the controlled switch is connected to the power supply 24V2, the other end of the controlled switch is respectively connected to an anode of the voltage regulator tube Z1 through the resistor R5 and is connected to a reverse input end of the comparator U1, an output end of the comparator U1 is connected to a G pole of the N-type switch tube V1, the power supply 24V2 is connected to an S pole of the N-type switch tube V1 through the resistor R3, and a D pole of the N-type switch tube V1 is connected to a gate connected to the thyristor trigger circuit.
In the thyristor trigger circuit, square wave signals are generated to the thyristor in a pure mode electricity mode without depending on logic chips such as an MCU (microprogrammed control unit), so that the purpose of achieving immediate control and response by using a pure mode electricity structure is achieved, and the introduction of a chip operation period increased by the logic chip is avoided.
On the basis, in order to realize reliable control, a controlled switch in the thyristor trigger circuit is an optical fiber receiver HP1, the cathode of the optical fiber receiver HP1 is connected with a power supply 24V2, and the anode of the optical fiber receiver HP1 is connected with the anode of a voltage regulator tube Z1 through a resistor R5 and is connected to the reverse input end of a comparator U1. The control signal is configured into the optical signal, so that the transmission time of the control signal in a circuit can be greatly shortened, the reaction speed is accelerated, and the opening time of each thyristor group tends to be consistent as much as possible.
As an improvement, the thyristor trigger circuit further comprises a resistor R2, and a power supply 24V2 is connected to the G pole of the N-type switching tube V1 through the resistor R2, so that the G pole level can be pulled up, and the control stability is enhanced.
In this embodiment, after the thyristor trigger circuit receives the trigger command, the fiber optic receiver HP1 is turned on, at this time, the voltage of pin 3 of the comparator U1 is higher than that of pin 2, and pin 7 outputs a low level (0V), at this time, the switching tube V1 is turned on, the power supply 24V2 is applied to the gate G of the thyristor through the resistor R3, the switching tube V1, the resistor R6, and the diode D1, and the thyristor is turned on. After the thyristor is conducted, the voltage at the two ends is rapidly reduced to the junction voltage (0V). After all the thyristors in series are turned on, the supply voltage is applied to the load device, L, C in fig. 1.
Considering that the circuit is complex, the receiving optical fiber head, the comparator, the switch circuit and the like exist, which link has larger time error, in addition, the fluctuation of the high-voltage isolation 24V power supply can also influence the triggering, the probability of overvoltage breakdown caused by delayed triggering of the thyristor is increased, in order to prevent the phenomenon, a forced triggering circuit is matched with each group of thyristor groups, and the forced triggering circuit is provided with at least three piezoresistors RZ21, RZ22 and RZ23 and at least two diodes D2 and D3.
The piezoresistor RZ21, the piezoresistor RZ22 and the piezoresistor RZ23 are sequentially connected in series to form an equivalent piezoresistor and then are connected in parallel to two ends of the thyristor group, so that the piezoresistor RZ21, the piezoresistor RZ22 and the piezoresistor RZ23 are combined with the resistor-capacitor absorption branch circuit to form a surge absorption protection circuit. The surge absorption protection circuit is used as a surge absorption protection circuit of a thyristor element, and has the function of absorbing peak surge voltage when the thyristor is switched on and off, wherein the RC mainly has the function of buffering the surge voltage and the function of clamping the voltage of a voltage dependent resistor, and the RC and the voltage dependent resistor together limit the peak surge voltage at two ends of the thyristor within the voltage range which can be born by the thyristor.
The junction between the piezoresistor RZ21 and the piezoresistor RZ22 is connected to the gate of the thyristor G22 through the diode D2, the junction between the piezoresistor RZ22 and the piezoresistor RZ23 is connected to the gate of the thyristor G21 through the diode D3, and the conduction directions of the diode D2 and the diode D3 are both directed to the correspondingly connected gates.
When the trigger circuit lags to trigger the thyristor and the thyristor is over-voltage, the trigger circuit is forced to turn on the thyristor quickly, so that the voltage at two ends of the thyristor drops to the junction voltage (about OV) instantly. The trigger mode does not lead the thyristor not to be broken down due to overvoltage, but to be rapidly conducted during normal conduction.
Specifically, the forced trigger signal is led out from the piezoresistors RZ21, RZ22 and RZ23 of the surge absorption loop through diodes. The static voltage division of each thyristor in the series loop is configured according to 45% -55% of the rated voltage of each thyristor, and preferably about 50% of the rated voltage of each thyristor, so that extra margin is provided to ensure the stability of the system. At this time, the rated voltage of the thyristor is 8500V, and the voltage born in the quiescent state is 4250V. The conduction voltage of the RZ22 is 65-75%, preferably about 70% of the rated voltage of the thyristor, for example, the thyristor with the rated voltage of 8500V, the voltage-sensitive voltage is 6000V, and the voltage-sensitive RZ21 and RZ23 at two ends are 15V-25V, preferably about 20V, so that the forced trigger circuit cannot work as long as the voltage does not exceed 6020V.
Under the configuration, in the same series circuit, when other thyristors start to conduct, the voltage at two ends of the thyristor which is not conducted in time rises rapidly, and when the voltage exceeds a voltage dependent resistor threshold value (6000V), the voltage dependent resistor RZ22 works (clamps), and the exceeding voltage is partially added to the gate pole G of the thyristor through the resistor, so that the thyristor conducts. The method is to directly trigger the thyristor by using the voltage of a power grid and has no relation with a trigger power supply 24V. When the grid positive half cycle triggers G21, if the voltage across thyristor G21 is not triggered by the conventional trigger circuit before reaching 6020V, the grid voltage is partially applied to the gate G21 of the thyristor through the voltage dependent resistors RZ21, RZ22 and diode D3, and RZ22 is equivalent to a clamping voltage dependent resistor of the gate voltage and limits the gate voltage to 20V. Conversely, when the grid negative half cycle triggers G22, if the conventional trigger circuit has not been triggered before the voltage across thyristor G22 reaches 6020V, the grid voltage is partially applied to gate G22 of the thyristor through varistor RZ23, varistor RZ22 and diode D2, where RZ21 is equivalent to a clamping varistor for the gate voltage.
When the voltage across the thyristor is fully conducted, the surge voltage is clamped at 6040V to prevent the thyristor from being broken down by exceeding 8500V.
Compared with the prior art, the series thyristor reliable trigger circuit provided by the implementation has the following advantages:
1. the surge absorption loops at two ends of the thyristor are utilized, only one diode is added to form a forced trigger circuit, and the problems that the conventional trigger circuit of the thyristor in the same series loop is inconsistent in parameter or damaged, so that the series thyristor is not triggered in time and is subjected to overvoltage breakdown are solved with low cost and small size.
2. The strong trigger design of the series thyristor is realized only by adjusting the parameters of the piezoresistor and adding one diode in the existing circuit, and the strong trigger design is low in cost and easy to realize.
3. The volume is very small, and only one diode needs to be added on the original basis.
4. And the positive and negative parallel thyristors all utilize the same surge absorption circuit, and a piezoresistor surge absorption loop is not required to be added.
As a modification, the thyristor trigger circuit further includes a diode D1, the D pole of the N-type switch V1 is connected to the gate of the thyristor connected to the thyristor trigger circuit via a diode D1, and the conducting direction of the diode D1 is directed to the gate. Because the diodes are added at the output ends of the trigger circuit and the forced trigger circuit, the trigger circuit and the forced trigger circuit have no influence even if the trigger circuit and the forced trigger circuit trigger the same thyristor at the same time.
Finally, it should be noted that: the embodiment of the present invention is disclosed only as a preferred embodiment of the present invention, which is only used for illustrating the technical solutions of the present invention and not for limiting the same; although the present invention has been described in detail with reference to the foregoing embodiments, it will be understood by those skilled in the art; the technical solutions described in the foregoing embodiments may still be modified, or some technical features may be equivalently replaced; and the modifications or the substitutions do not make the essence of the corresponding technical solutions depart from the spirit and scope of the technical solutions of the embodiments of the present invention.
Claims (8)
1. The series thyristor is connected with a reliable trigger circuit,
comprises at least two groups of thyristor groups which are mutually connected in series and used for serial voltage division, wherein both ends of each group of thyristor groups are connected in parallel with a resistance-capacitance absorption branch formed by connecting a resistor R21 and a capacitor C21 in series, each group of thyristor group comprises at least two thyristors G21 and G22 which are connected in anti-parallel, each thyristor gate pole in each group of thyristor group is connected with a thyristor trigger circuit for driving the on-off of the thyristor,
the method is characterized in that:
each group of thyristor group is provided with a forced trigger circuit which is provided with at least three piezoresistors RZ21, RZ22 and RZ23 and at least two diodes D2 and D3,
the piezoresistor RZ21, the piezoresistor RZ22 and the piezoresistor RZ23 are sequentially connected in series and then are connected in parallel with two ends of the thyristor group, so that the piezoresistor RZ21, the piezoresistor RZ22 and the piezoresistor RZ23 are combined with the resistance-capacitance absorption branch circuit to form a surge absorption protection circuit for limiting surge peak voltage at two ends of a thyristor,
the junction between the piezoresistor RZ21 and the piezoresistor RZ22 is connected to the gate of the thyristor G22 through the diode D2, the junction between the piezoresistor RZ22 and the piezoresistor RZ23 is connected to the gate of the thyristor G21 through the diode D3, and the conduction directions of the diode D2 and the diode D3 are both directed to the correspondingly connected gates.
2. The series thyristor reliable trigger circuit of claim 1, wherein:
the on-state voltage of the voltage dependent resistor RZ22 is 65-75% of the rated voltage of the thyristor, and/or
And the on-state voltages of the piezoresistor RZ21 and the piezoresistor RZ23 are selected to be 15V-25V.
3. The series thyristor reliable trigger circuit of claim 2, wherein: the static partial voltage of each thyristor in the thyristor group is configured to be 45% -55% of the rated voltage thereof.
4. The series thyristor reliable trigger circuit of claim 1, wherein:
the thyristor trigger circuit comprises a comparator U1, a controlled switch, a voltage regulator tube Z1, a resistor R1, a resistor R5, a resistor R3, an N-type switch tube V1 and a power supply 24V2 thereof,
the power supply 24V2 is respectively connected to the cathode of a voltage regulator tube Z1 through a resistor R1 and the positive input end of a comparator U1, the anode of the voltage regulator tube Z1 is connected to the cathode of a thyristor connected with the thyristor trigger circuit, one end of a controlled switch is connected to the power supply 24V2, the other end of the controlled switch is respectively connected to the anode of the voltage regulator tube Z1 through a resistor R5 and the reverse input end of the comparator U1, the output end of the comparator U1 is connected to the G pole of an N-type switch tube V1, the power supply 24V2 is connected to the S pole of the N-type switch tube V1 through a resistor R3, and the D pole of the N-type switch tube V1 is connected with the gate pole of the thyristor connected with the thyristor trigger circuit.
5. The series thyristor reliable trigger circuit of claim 4, wherein: the controlled switch is a fiber receiver HP1, the cathode of the controlled switch is connected with a power supply 24V2, the anode of the controlled switch is connected with the anode of a voltage regulator tube Z1 through a resistor R5, and the controlled switch is connected to the reverse input end of a comparator U1.
6. The series thyristor reliable trigger circuit of claim 4 or 5, wherein: the thyristor trigger circuit also comprises a resistor R2, and a power supply 24V2 is connected to the G pole of the N-type switch tube V1 through a resistor R2 to be pulled up.
7. The series thyristor reliable trigger circuit of claim 4 or 5, wherein: the thyristor trigger circuit further comprises a diode D1, the D pole of the N-type switch tube V1 is connected to the gate pole of the thyristor connected to the thyristor trigger circuit through a diode D1, and the conduction direction of the diode D1 points to the gate pole.
8. The series thyristor reliable trigger circuit of claim 4, wherein: the N-type switch tube V1 is an IGBT tube.
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CN202218010U (en) * | 2011-09-28 | 2012-05-09 | 上海拓及轨道交通设备有限公司 | Strong triggering circuit for symmetrical voltage protection of antiparallel thyristors |
CN203352509U (en) * | 2013-07-19 | 2013-12-18 | 浙江正泰电器股份有限公司 | Drive circuit of motor soft starter |
CN214337561U (en) * | 2020-12-29 | 2021-10-01 | 厦门泰瑞达科技有限公司 | Protection circuit of reactive compensation thyristor and thyristor fling-cut switch |
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CN114124054B (en) | 2023-05-23 |
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Denomination of invention: A Reliable Trigger Circuit for Series Thyristors Granted publication date: 20230523 Pledgee: Agricultural Bank of China Co.,Ltd. Yiyang Branch Pledgor: HUNAN FULLDE ELECTRIC Co.,Ltd.|GUANGDONG FULLDE ELECTRONICS Co.,Ltd.|ZHUZHOU FULLDE RAIL TRANSIT RESEARCH INSTITUTE Co.,Ltd. Registration number: Y2024980002909 |
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