CN114113978A - Chip selection method and device - Google Patents
Chip selection method and device Download PDFInfo
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- CN114113978A CN114113978A CN202111336323.4A CN202111336323A CN114113978A CN 114113978 A CN114113978 A CN 114113978A CN 202111336323 A CN202111336323 A CN 202111336323A CN 114113978 A CN114113978 A CN 114113978A
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- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
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- G01R31/2851—Testing of integrated circuits [IC]
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Abstract
The invention provides a chip selection method, which comprises the following steps: sending a test starting instruction to a test machine so that the test machine can install the chip to be tested on a test mainboard and supply power to the test mainboard; reading a first serial number of a chip through a joint test working group interface of a test mainboard; comparing the first serial number of the chip with a pre-stored serial number list, and determining that the current chip is a target chip when a second serial number is matched with the first serial number in the serial number list; and when the second serial number does not match the first serial number in the serial number list, sending a power-off instruction to the test machine so that the test machine powers off the test mainboard and takes down the current chip. The chip selection method provided by the invention can read the first serial number through the joint test working group interface under the condition of not entering the operating system, and compares the first serial number with the serial number list, thereby saving the selection time and improving the efficiency.
Description
Technical Field
The invention relates to the technical field of chip testing, in particular to a chip selection method and device.
Background
In the chip testing process, a specific chip is sometimes selected from a plurality of chips. In the selection process, the serial number of the chip is usually identified by manually identifying the serial number on the surface of the chip or scanning the identification code, the method depends on the serial number or the identification code on the surface of the chip, and the identification code or the serial number is usually not formed on the surface of the chip in the engineering development stage, so that the chip is usually required to be arranged in a machine and then started up to enter an operating system, and the serial number of the chip is read by executing a script in the operating system.
In the process of implementing the invention, the inventor finds that at least the following technical problems exist in the prior art:
because each chip needs to perform the processes of starting up and executing the script, much time is consumed, and the efficiency is extremely low.
Disclosure of Invention
The chip selection method and the chip selection device provided by the invention can read the first serial number through the joint test working group interface under the condition of not entering an operating system, and compare the first serial number with the serial number list, thereby saving the selection time and improving the efficiency.
In a first aspect, the present invention provides a chip selecting method, executed in a test server, including:
sending a test starting instruction to a test machine so that the test machine can install a chip to be tested on a test mainboard and supply power to the test mainboard;
reading a first serial number of the chip through a joint test working group interface of a test mainboard;
comparing the first serial number of the chip with a pre-stored serial number list, and determining that the current chip is a target chip when a second serial number is matched with the first serial number in the serial number list;
and when the second serial number does not match the first serial number in the serial number list, sending a power-off instruction to the tester so that the tester powers off the test mainboard and takes down the current chip.
Optionally, the method further comprises: sending a temperature configuration instruction to a testing machine to maintain the testing machine at a predetermined testing temperature.
Optionally, after sending the power-off instruction to the tester, the method further includes: judging whether the current chip is the last chip or not, and finishing chip selection when the current chip is the last chip; and when the current chip is not the last chip, sending a test starting instruction to the tester again so that the tester can install the next chip to be tested on the test mainboard and supply power to the test mainboard.
Optionally, after determining that the current chip is the target chip, the method further includes: and sending a test ending instruction to the tester so that the tester controls the test mainboard to be powered off and ends chip selection.
In a second aspect, the present invention provides a chip selecting method executed in a tester, including:
receiving a test starting instruction sent by a test server, installing a chip to be tested on a test mainboard according to the test starting instruction, and supplying power to the test mainboard to enable the mainboard to be started in a cold mode; reading a first serial number of the chip by the test server through a joint test working group interface of a test mainboard, and comparing the first serial number of the chip with a pre-stored serial number list;
receiving a power-off instruction sent by a test server, powering off the test mainboard and taking down a current chip according to the power-off instruction, wherein the power-off instruction is an instruction sent by the test server when a second serial number does not match a first serial number in a serial number list.
Optionally, the method further includes receiving a temperature configuration instruction sent by the test server, and maintaining a predetermined test temperature in response to the temperature configuration instruction; the temperature configuration instruction is sent after the test server starts a test program.
Optionally, after receiving the power-off instruction, the method further includes:
and receiving a test starting instruction sent again by the test server, installing the next chip to be tested on the test mainboard according to the test starting instruction, and supplying power to the test mainboard to enable the mainboard to be cold started, wherein the test starting instruction is the test starting instruction sent by the test server when the current chip is not the last chip.
Optionally, after receiving the test start instruction sent by the test server, the method further includes:
receiving a test ending instruction sent by the test server, controlling the test mainboard to be powered off according to the test ending instruction, and ending chip selection; the test ending instruction is a test ending instruction sent after the current chip is determined to be the target chip when the second serial number is matched with the first serial number in the serial number list.
In a third aspect, the present invention provides a chip selecting apparatus, applied to a test server, including:
the test system comprises a starting module, a test mainboard and a test module, wherein the starting module is used for sending a test starting instruction to a test machine so that the test machine can install a chip to be tested on the test mainboard and supply power to the test mainboard;
the reading module is used for reading a first serial number of the chip through a joint test working group interface of the test mainboard;
the determining module is used for comparing the first serial number of the chip with a pre-stored serial number list, and determining that the current chip is a target chip when a second serial number is matched with the first serial number in the serial number list;
and the power-off module is used for sending a power-off instruction to the tester when the second serial number does not match the first serial number in the serial number list so as to enable the tester to power off the test mainboard and take down the current chip.
Optionally, the method further comprises: the configuration module is used for sending a temperature configuration instruction to the testing machine so as to enable the testing machine to keep a preset testing temperature.
Optionally, the method further comprises: the judging module is in communication connection with the power-off module and is used for judging whether the current chip is the last chip or not, and finishing chip selection when the current chip is the last chip; and when the current chip is not the last chip, sending a test starting instruction to the tester again so that the tester can install the next chip to be tested on the test mainboard and supply power to the test mainboard.
Optionally, the method further comprises: and the ending module is in communication connection with the determining module and is used for sending a test ending instruction to the test machine so that the test machine controls the test mainboard to be powered off and ends chip selection.
In a fourth aspect, the present invention provides a chip selecting apparatus applied to a testing machine, including:
the mainboard starting module is used for receiving a test starting instruction sent by the test server, installing a chip to be tested on the test mainboard according to the test starting instruction and supplying power to the test mainboard to enable the mainboard to be started in a cold mode; reading a first serial number of the chip by the test server through a joint test working group interface of a test mainboard, and comparing the first serial number of the chip with a pre-stored serial number list;
and the mainboard power-off module is used for receiving a power-off instruction sent by the test server, powering off the test mainboard and taking down the current chip according to the power-off instruction, wherein the power-off instruction is an instruction sent by the test server when a second serial number does not exist in the serial number list and is matched with the first serial number.
Optionally, the system further comprises a temperature module, configured to receive a temperature configuration instruction sent by the test server, and maintain a predetermined test temperature in response to the temperature configuration instruction; wherein the temperature configuration instruction is sent after the test server starts the test program.
Optionally, the method further comprises: and the chip replacement module is used for receiving a test starting instruction sent again by the test server, installing the next chip to be tested on the test mainboard according to the test starting instruction, and supplying power to the test mainboard to enable the mainboard to be cold started, wherein the test starting instruction is the test starting instruction sent by the test server when the current chip is not the last chip.
Optionally, the method further comprises: the test ending module is used for receiving a test ending instruction sent by the test server, controlling the test mainboard to be powered off according to the test ending instruction and ending chip selection; the test ending instruction is a test ending instruction sent after the current chip is determined to be the target chip when the second serial number is matched with the first serial number in the serial number list.
In the technical scheme provided by the invention, under the condition of not entering an operating system, a joint test working group interface is adopted to read the serial number of a chip, and the comparison between the first serial number and the second serial number in a serial number list is realized through a test server. In the reading process, an operating system is not required to be accessed, and only the mainboard needs to be powered to realize cold start, so that the time can be saved, and the efficiency can be improved. Meanwhile, the comparison and the identification of the first serial number are realized through the server, and manual identification is not needed, so that the accuracy of the identification result can be ensured.
Drawings
FIG. 1 is a flowchart illustrating a chip selection method according to an embodiment of the present invention;
FIG. 2 is a flow chart of a chip selection method with temperature configuration according to another embodiment of the present invention;
FIG. 3 is a flowchart of a chip selection method with a chip determination process according to another embodiment of the present invention;
FIG. 4 is a flowchart of a method for selecting a chip having an end-of-test instruction according to another embodiment of the present invention;
FIG. 5 is a flowchart illustrating a chip selection method according to an embodiment of the invention;
FIG. 6 is a flow chart of a chip selection method with temperature configuration according to another embodiment of the present invention;
FIG. 7 is a flowchart of a chip determination process of a chip selection method according to another embodiment of the present invention;
FIG. 8 is a flowchart of a method for selecting a chip having an end-of-test instruction according to another embodiment of the present invention;
FIG. 9 is a diagram illustrating a chip picking apparatus according to an embodiment of the present invention;
FIG. 10 is a diagram of a chip sorting apparatus having configuration modules according to another embodiment of the present invention;
FIG. 11 is a diagram of a chip sorting apparatus having a judgment module according to another embodiment of the present invention;
FIG. 12 is a diagram of a chip sorting apparatus having a termination module according to another embodiment of the present invention;
FIG. 13 is a diagram illustrating a chip picking apparatus according to an embodiment of the present invention;
FIG. 14 is a schematic diagram of a chip sorting apparatus having a temperature module according to another embodiment of the present invention;
FIG. 15 is a schematic diagram of a chip pick-up device with a chip replacement module according to another embodiment of the present invention;
FIG. 16 is a diagram of a chip sorting apparatus having an end-of-test module according to another embodiment of the present invention.
Detailed Description
In order to make the objects, technical solutions and advantages of the embodiments of the present invention clearer, the technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
The chip selecting method and the chip selecting device are applied to a chip testing system, and the chip testing system generally comprises a testing server, a testing machine and a testing mainboard, wherein the testing server is in control connection with the testing machine, the testing machine is used for supplying power to the testing mainboard and providing a working environment, and the testing mainboard is in communication connection with the testing server through a joint testing working group interface. Wherein, the test server is provided with a test program.
An embodiment of the present invention provides a chip selection method, which is executed in a test server, as shown in fig. 1, and includes:
in some embodiments, when the test is started, the test server executes a test program, sends a test start instruction to the test machine, and when the test machine receives the test start instruction, picks up a chip to be tested and installs the chip on a test motherboard, which is usually connected to the chip to be tested in a slot manner. After the chip is installed on the test mainboard, the tester supplies power to the test mainboard, the test mainboard is in cold start, and after the test mainboard is in cold start, the serial number of the chip can be read.
in some embodiments, since the joint test task group interface can read the serial number of the chip without entering the operating system, in this step, in order to save time, the joint test task group interface is used to read the first serial number of the chip.
in some embodiments, a second serial number of a target chip to be searched is stored in a test server, the test server compares the first serial number with the second serial number, and when the first serial number is matched with the second serial number, it indicates that a chip corresponding to the first serial number is the target chip.
In some embodiments, when the first serial number does not match all the second serial numbers in the serial number list, it indicates that the chip corresponding to the first serial number is not the target chip, and therefore, the motherboard needs to be powered off, so as to remove the current chip and replace a new chip to be tested for retesting.
In the technical solution provided in this embodiment, the serial number of the chip is read by using the joint test working group interface without entering the operating system, and the first serial number is compared with the second serial number in the serial number list by the test server. In the reading process, an operating system is not required to be accessed, and only the mainboard needs to be powered to realize cold start, so that the time can be saved, and the efficiency can be improved. Meanwhile, the comparison and the identification of the first serial number are realized through the server, and manual identification is not needed, so that the accuracy of the identification result can be ensured.
As an alternative embodiment, as shown in fig. 2, the method further includes: step 100, sending a temperature configuration instruction to a tester to enable the tester to keep a preset test temperature. In some embodiments, in order to ensure that the chip and the motherboard are not damaged during the testing process, the testing environment needs to be configured, and particularly, the environment temperature needs to be ensured to be a safe temperature. Therefore, in the present embodiment, before starting the test, a temperature arrangement command is sent to the tester to keep the tester at a predetermined test temperature. The predetermined test temperature is an empirically determined temperature that is at least required to ensure that the chip or motherboard is not damaged.
As an optional implementation, as shown in fig. 3, after sending the power-off instruction to the tester, the method further includes: step 141, judging whether the current chip is the last chip, and finishing chip selection when the current chip is the last chip; and when the current chip is not the last chip, sending a test starting instruction to the tester again so that the tester can install the next chip to be tested on the test mainboard and supply power to the test mainboard. In some embodiments, in the process of selecting chips from a plurality of chips, when the current chip is not the target chip, the main board is powered off, and then it is necessary to determine whether there are other chips to be tested after the current chip. And when the chips still need to be tested, sending a test starting instruction to the tester again so as to execute the test process of the steps 110 to 132, and when no chip needs to be tested, finishing the chip selection process.
As an alternative implementation, as shown in fig. 4, after determining that the current chip is the target chip, the method further includes: and 142, sending a test ending instruction to the test machine so that the test machine controls the test mainboard to be powered off and ends chip selection. In some embodiments, after the target chip is selected, since the test purpose is achieved, no test is needed, in this embodiment, a test end instruction is sent to the tester, so that the tester controls the test motherboard to be powered off, so as to take the chip down.
An embodiment of the present invention provides a chip selecting method, executed in a tester, as shown in fig. 5, including:
in some embodiments, when the test is started, the test server executes a test program, sends a test start instruction to the test machine, and when the test machine receives the test start instruction, picks up a chip to be tested and installs the chip on a test motherboard, which is usually connected to the chip to be tested in a slot manner. After the chip is installed on the test mainboard, the tester supplies power to the test mainboard, the test mainboard is in cold start, and after the test mainboard is in cold start, the serial number of the chip can be read. Since the joint test task group interface can read the serial number of the chip without entering the operating system, in this step, in order to save time, the joint test task group interface is used to read the first serial number of the chip.
In some embodiments, a second serial number of a target chip to be searched is stored in a test server, the test server compares the first serial number with the second serial number, and when the first serial number is matched with the second serial number, it indicates that a chip corresponding to the first serial number is the target chip. When the first serial number is not matched with all the second serial numbers in the serial number list, it is indicated that the chip corresponding to the first serial number is not the target chip, and therefore, the mainboard needs to be powered off so as to take down the current chip and replace a new chip to be tested for testing again.
In the technical solution provided in this embodiment, the serial number of the chip is read by using the joint test working group interface without entering the operating system, and the first serial number is compared with the second serial number in the serial number list by the test server. In the reading process, an operating system is not required to be accessed, and only the mainboard needs to be powered to realize cold start, so that the time can be saved, and the efficiency can be improved. Meanwhile, the comparison and the identification of the first serial number are realized through the server, and manual identification is not needed, so that the accuracy of the identification result can be ensured.
As an alternative implementation, as shown in fig. 6, the method further includes a step 200 of receiving a temperature configuration instruction sent by the test server, and maintaining a predetermined test temperature in response to the temperature configuration instruction; the temperature configuration instruction is sent after the test server starts a test program. In some embodiments, in order to ensure that the chip and the motherboard are not damaged during the testing process, the testing environment needs to be configured, and particularly, the environment temperature needs to be ensured to be a safe temperature. Therefore, in the present embodiment, before starting the test, a temperature arrangement command is sent to the tester to keep the tester at a predetermined test temperature. The predetermined test temperature is an empirically determined temperature that is at least required to ensure that the chip or motherboard is not damaged.
As an alternative embodiment, as shown in fig. 7, after receiving the power-off command, the method further includes: step 230, receiving a test start instruction sent again by the test server, installing the next chip to be tested on the test motherboard according to the test start instruction, and supplying power to the test motherboard to enable the motherboard to be cold started, where the test start instruction is the test start instruction sent by the test server when the current chip is not the last chip. In some embodiments, in the process of selecting chips from a plurality of chips, when the current chip is not the target chip, the main board is powered off, and then it is necessary to determine whether there are other chips to be tested after the current chip. And when the chips still need to be tested, sending a test starting instruction to the tester again, and when the chips do not need to be tested, finishing the chip selection process.
As an alternative embodiment, as shown in fig. 8, after receiving the test start instruction sent by the test server, the method further includes: step 240, receiving a test ending instruction sent by the test server, controlling the test mainboard to power off according to the test ending instruction, and ending chip selection; the test ending instruction is a test ending instruction sent after the current chip is determined to be the target chip when the second serial number is matched with the first serial number in the serial number list.
In some embodiments, after the target chip is selected, since the test purpose is achieved, no test is needed, in this embodiment, a test end instruction is sent to the tester, so that the tester controls the test motherboard to be powered off, so as to take the chip down.
An embodiment of the present invention provides a chip selecting apparatus, which is applied to a test server, and as shown in fig. 9, includes:
the test system comprises a starting module, a test mainboard and a test module, wherein the starting module is used for sending a test starting instruction to a test machine so that the test machine can install a chip to be tested on the test mainboard and supply power to the test mainboard;
in some embodiments, when the test is started, the test server executes a test program, sends a test start instruction to the test machine, and when the test machine receives the test start instruction, picks up a chip to be tested and installs the chip on a test motherboard, which is usually connected to the chip to be tested in a slot manner. After the chip is installed on the test mainboard, the tester supplies power to the test mainboard, the test mainboard is in cold start, and after the test mainboard is in cold start, the serial number of the chip can be read.
The reading module is used for reading a first serial number of the chip through a joint test working group interface of the test mainboard;
in some embodiments, since the joint test task group interface can read the serial number of the chip without entering the operating system, in this step, in order to save time, the joint test task group interface is used to read the first serial number of the chip.
The determining module is used for comparing the first serial number of the chip with a pre-stored serial number list, and determining that the current chip is a target chip when a second serial number is matched with the first serial number in the serial number list;
in some embodiments, a second serial number of a target chip to be searched is stored in a test server, the test server compares the first serial number with the second serial number, and when the first serial number is matched with the second serial number, it indicates that a chip corresponding to the first serial number is the target chip.
And the power-off module is used for sending a power-off instruction to the tester when the second serial number does not match the first serial number in the serial number list so as to enable the tester to power off the test mainboard and take down the current chip.
In some embodiments, when the first serial number does not match all the second serial numbers in the serial number list, it indicates that the chip corresponding to the first serial number is not the target chip, and therefore, the motherboard needs to be powered off, so as to remove the current chip and replace a new chip to be tested for retesting.
In the technical solution provided in this embodiment, the serial number of the chip is read by using the joint test working group interface without entering the operating system, and the first serial number is compared with the second serial number in the serial number list by the test server. In the reading process, an operating system is not required to be accessed, and only the mainboard needs to be powered to realize cold start, so that the time can be saved, and the efficiency can be improved. Meanwhile, the comparison and the identification of the first serial number are realized through the server, and manual identification is not needed, so that the accuracy of the identification result can be ensured.
As an alternative embodiment, as shown in fig. 10, the method further includes: the configuration module is used for sending a temperature configuration instruction to the testing machine so as to enable the testing machine to keep a preset testing temperature. In some embodiments, in order to ensure that the chip and the motherboard are not damaged during the testing process, the testing environment needs to be configured, and particularly, the environment temperature needs to be ensured to be a safe temperature. Therefore, in the present embodiment, before starting the test, a temperature arrangement command is sent to the tester to keep the tester at a predetermined test temperature. The predetermined test temperature is an empirically determined temperature that is at least required to ensure that the chip or motherboard is not damaged.
As an alternative embodiment, as shown in fig. 11, the method further includes: the judging module is in communication connection with the power-off module and is used for judging whether the current chip is the last chip or not, and finishing chip selection when the current chip is the last chip; and when the current chip is not the last chip, sending a test starting instruction to the tester again so that the tester can install the next chip to be tested on the test mainboard and supply power to the test mainboard. In some embodiments, in the process of selecting chips from a plurality of chips, when the current chip is not the target chip, the main board is powered off, and then it is necessary to determine whether there are other chips to be tested after the current chip. And when the chips still need to be tested, sending a test starting instruction to the tester again, and when the chips do not need to be tested, finishing the chip selection process.
As an alternative embodiment, as shown in fig. 12, the method further includes: and the ending module is in communication connection with the determining module and is used for sending a test ending instruction to the test machine so that the test machine controls the test mainboard to be powered off and ends chip selection. In some embodiments, after the target chip is selected, since the test purpose is achieved, no test is needed, in this embodiment, a test end instruction is sent to the tester, so that the tester controls the test motherboard to be powered off, so as to take the chip down.
An embodiment of the present invention provides a chip sorting apparatus, which is applied to a tester, and as shown in fig. 13, the apparatus includes:
the mainboard starting module is used for receiving a test starting instruction sent by the test server, installing a chip to be tested on the test mainboard according to the test starting instruction and supplying power to the test mainboard to enable the mainboard to be started in a cold mode; reading a first serial number of the chip by the test server through a joint test working group interface of a test mainboard, and comparing the first serial number of the chip with a pre-stored serial number list;
in some embodiments, when the test is started, the test server executes a test program, sends a test start instruction to the test machine, and when the test machine receives the test start instruction, picks up a chip to be tested and installs the chip on a test motherboard, which is usually connected to the chip to be tested in a slot manner. After the chip is installed on the test mainboard, the tester supplies power to the test mainboard, the test mainboard is in cold start, and after the test mainboard is in cold start, the serial number of the chip can be read. Since the joint test task group interface can read the serial number of the chip without entering the operating system, in this step, in order to save time, the joint test task group interface is used to read the first serial number of the chip.
And the mainboard power-off module is used for receiving a power-off instruction sent by the test server, powering off the test mainboard and taking down the current chip according to the power-off instruction, wherein the power-off instruction is an instruction sent by the test server when a second serial number does not exist in the serial number list and is matched with the first serial number.
In some embodiments, a second serial number of a target chip to be searched is stored in a test server, the test server compares the first serial number with the second serial number, and when the first serial number is matched with the second serial number, it indicates that a chip corresponding to the first serial number is the target chip. When the first serial number is not matched with all the second serial numbers in the serial number list, it is indicated that the chip corresponding to the first serial number is not the target chip, and therefore, the mainboard needs to be powered off so as to take down the current chip and replace a new chip to be tested for testing again.
In the technical solution provided in this embodiment, the serial number of the chip is read by using the joint test working group interface without entering the operating system, and the first serial number is compared with the second serial number in the serial number list by the test server. In the reading process, an operating system is not required to be accessed, and only the mainboard needs to be powered to realize cold start, so that the time can be saved, and the efficiency can be improved. Meanwhile, the comparison and the identification of the first serial number are realized through the server, and manual identification is not needed, so that the accuracy of the identification result can be ensured.
As an alternative implementation, as shown in fig. 14, the testing system further includes a temperature module, configured to receive a temperature configuration instruction sent by the testing server, and maintain a predetermined testing temperature in response to the temperature configuration instruction; wherein the temperature configuration instruction is sent after the test server starts the test program. In some embodiments, in order to ensure that the chip and the motherboard are not damaged during the testing process, the testing environment needs to be configured, and particularly, the environment temperature needs to be ensured to be a safe temperature. Therefore, in the present embodiment, before starting the test, a temperature arrangement command is sent to the tester to keep the tester at a predetermined test temperature. The predetermined test temperature is an empirically determined temperature that is at least required to ensure that the chip or motherboard is not damaged.
As an alternative embodiment, as shown in fig. 15, the method further includes: and the chip replacement module is used for receiving a test starting instruction sent again by the test server, installing the next chip to be tested on the test mainboard according to the test starting instruction, and supplying power to the test mainboard to enable the mainboard to be cold started, wherein the test starting instruction is the test starting instruction sent by the test server when the current chip is not the last chip. In some embodiments, in the process of selecting chips from a plurality of chips, when the current chip is not the target chip, the main board is powered off, and then it is necessary to determine whether there are other chips to be tested after the current chip. And when the chips still need to be tested, sending a test starting instruction to the tester again, and when the chips do not need to be tested, finishing the chip selection process.
As an alternative embodiment, as shown in fig. 16, the method further includes: the test ending module is used for receiving a test ending instruction sent by the test server, controlling the test mainboard to be powered off according to the test ending instruction and ending chip selection; the test ending instruction is a test ending instruction sent after the current chip is determined to be the target chip when the second serial number is matched with the first serial number in the serial number list. In some embodiments, after the target chip is selected, since the test purpose is achieved, no test is needed, in this embodiment, a test end instruction is sent to the tester, so that the tester controls the test motherboard to be powered off, so as to take the chip down.
It will be understood by those skilled in the art that all or part of the processes of the embodiments of the methods described above may be implemented by a computer program, which may be stored in a computer-readable storage medium, and when executed, may include the processes of the embodiments of the methods described above. The storage medium may be a magnetic disk, an optical disk, a Read-Only Memory (ROM), a Random Access Memory (RAM), or the like.
The above description is only for the specific embodiment of the present invention, but the scope of the present invention is not limited thereto, and any changes or substitutions that can be easily conceived by those skilled in the art within the technical scope of the present invention are included in the scope of the present invention. Therefore, the protection scope of the present invention shall be subject to the protection scope of the claims.
Claims (16)
1. A chip selection method, implemented in a test server, includes:
sending a test starting instruction to a test machine so that the test machine can install a chip to be tested on a test mainboard and supply power to the test mainboard;
reading a first serial number of the chip through a joint test working group interface of a test mainboard;
comparing the first serial number of the chip with a pre-stored serial number list, and determining that the current chip is a target chip when a second serial number is matched with the first serial number in the serial number list;
and when the second serial number does not match the first serial number in the serial number list, sending a power-off instruction to the tester so that the tester powers off the test mainboard and takes down the current chip.
2. The chip selection method according to claim 1, further comprising: sending a temperature configuration instruction to a testing machine to maintain the testing machine at a predetermined testing temperature.
3. The method of claim 1, further comprising, after sending a power-down command to the tester: judging whether the current chip is the last chip or not, and finishing chip selection when the current chip is the last chip; and when the current chip is not the last chip, sending a test starting instruction to the tester again so that the tester can install the next chip to be tested on the test mainboard and supply power to the test mainboard.
4. The chip selection method according to claim 1, further comprising, after determining that the current chip is the target chip: and sending a test ending instruction to the tester so that the tester controls the test mainboard to be powered off and ends chip selection.
5. A chip selection method, implemented in a tester, includes:
receiving a test starting instruction sent by a test server, installing a chip to be tested on a test mainboard according to the test starting instruction, and supplying power to the test mainboard to enable the mainboard to be started in a cold mode; reading a first serial number of the chip by the test server through a joint test working group interface of a test mainboard, and comparing the first serial number of the chip with a pre-stored serial number list;
receiving a power-off instruction sent by a test server, powering off the test mainboard and taking down a current chip according to the power-off instruction, wherein the power-off instruction is an instruction sent by the test server when a second serial number does not match a first serial number in a serial number list.
6. The chip selection method according to claim 5, further comprising receiving a temperature configuration command sent by the test server, and maintaining a predetermined test temperature in response to the temperature configuration command; the temperature configuration instruction is sent after the test server starts a test program.
7. The chip selection method according to claim 5, further comprising, after receiving the power-off command:
and receiving a test starting instruction sent again by the test server, installing the next chip to be tested on the test mainboard according to the test starting instruction, and supplying power to the test mainboard to enable the mainboard to be cold started, wherein the test starting instruction is the test starting instruction sent by the test server when the current chip is not the last chip.
8. The chip selecting method according to claim 5, further comprising, after receiving the test start command sent by the test server:
receiving a test ending instruction sent by the test server, controlling the test mainboard to be powered off according to the test ending instruction, and ending chip selection; the test ending instruction is a test ending instruction sent after the current chip is determined to be the target chip when the second serial number is matched with the first serial number in the serial number list.
9. A chip selecting device is applied to a test server and comprises:
the test system comprises a starting module, a test mainboard and a test module, wherein the starting module is used for sending a test starting instruction to a test machine so that the test machine can install a chip to be tested on the test mainboard and supply power to the test mainboard;
the reading module is used for reading a first serial number of the chip through a joint test working group interface of the test mainboard;
the determining module is used for comparing the first serial number of the chip with a pre-stored serial number list, and determining that the current chip is a target chip when a second serial number is matched with the first serial number in the serial number list;
and the power-off module is used for sending a power-off instruction to the tester when the second serial number does not match the first serial number in the serial number list so as to enable the tester to power off the test mainboard and take down the current chip.
10. The chip selecting apparatus according to claim 9, further comprising: the configuration module is used for sending a temperature configuration instruction to the testing machine so as to enable the testing machine to keep a preset testing temperature.
11. The chip selecting apparatus according to claim 9, further comprising: the judging module is in communication connection with the power-off module and is used for judging whether the current chip is the last chip or not, and finishing chip selection when the current chip is the last chip; and when the current chip is not the last chip, sending a test starting instruction to the tester again so that the tester can install the next chip to be tested on the test mainboard and supply power to the test mainboard.
12. The chip selecting apparatus according to claim 9, further comprising: and the ending module is in communication connection with the determining module and is used for sending a test ending instruction to the test machine so that the test machine controls the test mainboard to be powered off and ends chip selection.
13. The utility model provides a device is selected to chip which characterized in that is applied to the test machine, includes:
the mainboard starting module is used for receiving a test starting instruction sent by the test server, installing a chip to be tested on the test mainboard according to the test starting instruction and supplying power to the test mainboard to enable the mainboard to be started in a cold mode; reading a first serial number of the chip by the test server through a joint test working group interface of a test mainboard, and comparing the first serial number of the chip with a pre-stored serial number list;
and the mainboard power-off module is used for receiving a power-off instruction sent by the test server, powering off the test mainboard and taking down the current chip according to the power-off instruction, wherein the power-off instruction is an instruction sent by the test server when a second serial number does not exist in the serial number list and is matched with the first serial number.
14. The chip selecting apparatus according to claim 13, further comprising a temperature module, configured to receive a temperature configuration command sent by the test server, and maintain a predetermined test temperature in response to the temperature configuration command; wherein the temperature configuration instruction is sent after the test server starts the test program.
15. The chip selecting apparatus according to claim 13, further comprising:
and the chip replacement module is used for receiving a test starting instruction sent again by the test server, installing the next chip to be tested on the test mainboard according to the test starting instruction, and supplying power to the test mainboard to enable the mainboard to be cold started, wherein the test starting instruction is the test starting instruction sent by the test server when the current chip is not the last chip.
16. The chip selecting apparatus according to claim 13, further comprising:
the test ending module is used for receiving a test ending instruction sent by the test server, controlling the test mainboard to be powered off according to the test ending instruction and ending chip selection; the test ending instruction is a test ending instruction sent after the current chip is determined to be the target chip when the second serial number is matched with the first serial number in the serial number list.
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