CN114093297B - Driving circuit and driving method of display panel and display device - Google Patents
Driving circuit and driving method of display panel and display device Download PDFInfo
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- CN114093297B CN114093297B CN202111389134.3A CN202111389134A CN114093297B CN 114093297 B CN114093297 B CN 114093297B CN 202111389134 A CN202111389134 A CN 202111389134A CN 114093297 B CN114093297 B CN 114093297B
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
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Abstract
The application discloses a drive circuit, a drive method and a display device of a display panel, wherein the drive circuit comprises: a control circuit for generating a pulse signal and an enable signal; the pulse signal is a continuous pulse signal comprising a preset pulse number, and the enabling signal comprises a first enabling sub-signal, a second enabling sub-signal and a third enabling sub-signal which occur in the period of the continuous pulse signal; and the power supply circuit is coupled with the control circuit and the external light-emitting unit to determine a first power supply signal, a second power supply signal and a power adjustment signal which are output by the power supply circuit based on the pulse signal and the enabling signal so as to drive the light-emitting unit to emit light. Through the mode, the power supply circuit can jointly determine the output of each power supply signal of the power supply circuit by utilizing the pulse signals and the enabling signals, and the setting of the voltage of each power supply signal can be completed only once by outputting the pulse signals, so that the waste of the pulse signals can be effectively avoided, and the control efficiency of the power supply output is improved.
Description
Technical Field
The present disclosure relates to the field of display panels, and in particular, to a driving circuit and a driving method for a display panel, and a display device.
Background
Nowadays, with the continuous development of display technology, the functions of the display panel are more and more abundant and diversified, wherein a complete set of driving circuits of the display panel not only needs input and output of digital signals, but also needs output of various analog signals; the DDIC (Display Driver IC, driver chip) is mainly used for converting the input of digital signals into the output of analog signals, and the PMIC (Power Management IC, power control chip) is used for converting analog voltages to ensure the voltage supply of the DDIC and the panel.
Most of the prior DDIC chips adopt a general Swire (single wire control) communication protocol to control the PMIC, so as to realize the control of the voltage and the switching time sequence of a plurality of power supply signals output by the PMIC.
However, in the conventional Swire communication protocol, a plurality of power signals are controlled by outputting pulse signals one by one, and a certain time is provided between every two adjacent pulse signals, so that the Swire signal is inevitably wasted and the communication efficiency is low.
Disclosure of Invention
The technical problem that this application mainly solves is to provide a display panel's drive circuit, drive method and display device, can solve among the prior art display panel's drive circuit and can inevitably have Swire signal extravagant, problem that communication efficiency is low.
In order to solve the technical problems, one technical scheme adopted by the application is as follows: provided is a driving circuit of a display panel, wherein the driving circuit includes: a control circuit for generating a pulse signal and an enable signal; the pulse signal is a continuous pulse signal comprising a preset pulse number, and the enabling signal comprises a first enabling sub-signal, a second enabling sub-signal and a third enabling sub-signal which occur in the period of the continuous pulse signal; and the power supply circuit is coupled with the control circuit and the external light-emitting unit to determine a first power supply signal, a second power supply signal and a power adjustment signal which are output by the power supply circuit based on the pulse signal and the enabling signal so as to drive the light-emitting unit to emit light.
The power supply circuit is used for detecting trigger edges of the first enabling sub-signal, the second enabling sub-signal and the third enabling sub-signal in the enabling signals so as to determine trigger moments of the first power supply signal, the second power supply signal and the power regulating signal based on the trigger edges of the first enabling sub-signal, the second enabling sub-signal and the third enabling sub-signal.
The power supply circuit is further used for determining count values of corresponding pulses of the pulse signals corresponding to the occurrence moments of the trigger edges of the first enabling sub-signal, the second enabling sub-signal and the third enabling sub-signal in the enabling signals so as to determine voltage levels of the first power supply signal, the second power supply signal and the power regulating signal based on the count values of the corresponding pulses; wherein the count value is not greater than the preset pulse number.
The power supply circuit is used for detecting the level state of the enabling signal when the first pulse in the continuous pulse signals, so as to determine the counting mode of the pulses in the pulse signals and the sequence of outputting the first power supply signal, the second power supply signal and the power regulating signal based on the level state of the enabling signal.
When the power supply circuit detects that the level state of an enabling signal is a first state when a first pulse in the continuous pulse signals is detected, the counting mode of the pulses in the pulse signals is gradually increased, and the power supply circuit sequentially outputs a second power supply signal, a power regulating signal and a first power supply signal to the light emitting unit; or when the power supply circuit detects that the level state of the enabling signal is the second state when the first pulse in the continuous pulse signals is detected, the counting mode of the pulses in the pulse signals is gradually reduced, and the power supply circuit sequentially outputs the first power supply signal, the power regulating signal and the second power supply signal to the light emitting unit.
When the count value of the corresponding pulse of the pulse signal corresponding to the occurrence time of the trigger edge of the first enabling sub-signal is in a first range, the trigger edge of the first enabling sub-signal is used for triggering the second power supply signal, and the count value of the corresponding pulse of the pulse signal corresponding to the trigger edge of the first enabling sub-signal is used for determining the voltage level of the second power supply signal; or when the count value of the corresponding pulse of the pulse signal corresponding to the occurrence time of the trigger edge of the first enabling sub-signal is in a third range, the trigger edge of the first enabling sub-signal is used for triggering the first power supply signal, and the count value of the corresponding pulse of the pulse signal corresponding to the trigger edge of the first enabling sub-signal is used for determining the voltage level of the first power supply signal; when the count value of the corresponding pulse of the pulse signal corresponding to the occurrence time of the trigger edge of the second enabling sub-signal is in a second range, the trigger edge of the second enabling sub-signal is used for triggering the power adjusting signal, and the count value of the corresponding pulse of the pulse signal corresponding to the trigger edge of the second enabling sub-signal is used for determining the voltage level of the power adjusting signal; when the count value of the corresponding pulse of the pulse signal corresponding to the occurrence time of the trigger edge of the third enabling sub-signal is in a third range, the trigger edge of the third enabling sub-signal is used for triggering the first power supply signal, and the count value of the corresponding pulse of the pulse signal corresponding to the occurrence time of the trigger edge of the third enabling sub-signal is used for determining the voltage level of the first power supply signal; or when the count value of the corresponding pulse of the pulse signal corresponding to the occurrence time of the trigger edge of the third enabling sub-signal is in the first range, the trigger edge of the third enabling sub-signal is used for triggering the second power supply signal, and the count value of the corresponding pulse of the pulse signal corresponding to the occurrence time of the trigger edge of the third enabling sub-signal is used for determining the voltage level of the second power supply signal.
Wherein the number of preset pulses is 87, the first range is 1-53, the second range is 54-78, and the third range is 83-87.
Wherein the power supply circuit further comprises a counter for counting up or counting down pulses in the pulse signal.
In order to solve the technical problem, another technical scheme adopted by the application is as follows: provided is a driving method of a display panel, wherein the driving method includes: acquiring a pulse signal and an enabling signal; the pulse signal is a continuous pulse signal comprising a preset pulse number, and the enabling signal comprises a first enabling sub-signal, a second enabling sub-signal and a third enabling sub-signal which occur in the period of the continuous pulse signal; the output first power signal, second power signal and power adjustment signal are determined based on the pulse signal and the enable signal to drive the light emitting unit of the display panel to emit light.
In order to solve the technical problem, another technical scheme adopted by the application is as follows: there is provided a display device, wherein the display device comprises a display panel and a driving circuit as claimed in any one of the above, the driving circuit is coupled to the display panel for driving the light emitting unit of the display panel to emit light.
The beneficial effects of this application are: unlike the prior art, the driving circuit of the display panel provided by the application comprises: a control circuit and a power supply circuit; the control circuit is used for generating pulse signals and enabling signals, the pulse signals are continuous pulse signals with preset pulse numbers, the enabling signals comprise a first enabling sub-signal, a second enabling sub-signal and a third enabling sub-signal which occur in the period of the continuous pulse signals, so that the first power signal, the second power signal and the power adjusting signal which are output by the power supply circuit can be determined based on the pulse signals and the enabling signals, and then the light emitting unit is driven to emit light, the output of each power supply signal of the power supply circuit can be determined by the pulse signals and the enabling signals together, and because the pulse signals are continuous pulse signals, namely, the pulse signals are output only once, the setting of the voltage of each power supply signal can be completed, the waste of the pulse signals can be effectively avoided, and the control efficiency of the power supply output is improved.
Drawings
FIG. 1 is a schematic diagram of voltage timing control of a prior art display panel driving method;
FIG. 2 is a schematic diagram of an embodiment of a driving circuit of the present application;
FIG. 3 is a schematic diagram illustrating voltage timing control of the driving circuit of FIG. 2 in a specific application scenario;
FIG. 4 is a schematic diagram of voltage timing control of the driving circuit of FIG. 2 in another specific application scenario;
FIG. 5 is a flow chart of an embodiment of a driving method of the present application;
fig. 6 is a schematic structural diagram of an embodiment of a display device of the present application.
Detailed Description
The inventor finds that along with the continuous development of display technology, the functions of the display panel are more and more abundant and diversified, wherein a complete set of drive circuits of the display panel not only need the input and output of digital signals, but also need the output of various analog signals; the DDIC is mainly used for converting the input of digital signals into the output of analog signals, and the PMIC is used for converting analog voltages so as to ensure the voltage supply of the DDIC and the panel.
As shown in fig. 1, fig. 1 is a schematic voltage timing control diagram of a driving method of a display panel in the prior art, most of DDIC chips currently adopt a general Swire communication protocol to control PMIC, so as to control AVDD, ELVSS, ELVDD voltage and switching on/off timing outputted by PMIC. It is understood that ELVSS and ELVDD correspond to the reference numerals of two power output terminals and corresponding power signals respectively for the power supply system of the display panel to supply power to the light emitting units thereof, and AVDD corresponds to the reference numerals of the adjustment signals correspondingly output by the power supply system.
The general Swire signal protocol typically contains two signals, one being the EN signal and the other being the Swire signal; the EN signal is an AVDD enabling signal and is used as a reference time signal for starting or stopping the PMIC; while Swire can control the turn-on timing and voltage level of AVDD, ELVSS, and ELVDD, respectively, by the phase and number of the pulse signals output therefrom.
However, in the conventional Swire communication protocol, the ELVSS, ELVDD and AVDD are controlled by outputting pulse signals one by one and a certain time is provided between every two adjacent pulse signals, so that the Swire signal is inevitably wasted and the communication efficiency is low.
In order to effectively reduce waste of Swire signals in power supply signal control and improve control efficiency of power supply output, the application provides a driving circuit, a driving method and a display device of a display panel. The present application is described in further detail below with reference to the drawings and examples. It is specifically noted that the following examples are only for illustration of the present application, but do not limit the scope of the present application. Likewise, the following embodiments are only some, but not all, of the embodiments of the present application, and all other embodiments obtained by one of ordinary skill in the art without making any inventive effort are within the scope of the present application.
Reference in the specification to "an embodiment" means that a particular feature, structure, or characteristic described in connection with the embodiment may be included in at least one embodiment of the application. The appearances of such phrases in various places in the specification are not necessarily all referring to the same embodiment, nor are separate or alternative embodiments mutually exclusive of other embodiments. Those of skill in the art will explicitly and implicitly appreciate that the embodiments described herein may be combined with other embodiments.
Referring to fig. 2-3, fig. 2 is a schematic structural diagram of an embodiment of the driving circuit of the present application, and fig. 3 is a schematic voltage timing control diagram of the driving circuit of fig. 2 in a specific application scenario. In the present embodiment, the driving circuit 10 specifically includes a control circuit 11 and a power supply circuit 12.
The control circuit 11 is specifically configured to generate a pulse signal and an enable signal, that is, an EN signal and a Swire signal as shown in fig. 3.
It should be noted that, the pulse signal refers to a discrete signal, and has various shapes, and compared with a common analog signal (such as a sine wave), the waveforms are discontinuous on the Y-axis (there is a significant interval between the waveforms), but have a certain periodicity, and the most common pulse wave is a rectangular wave (i.e. a square wave).
The enabling signal is similar to a trigger signal, and is mainly a switching signal for ensuring the normal operation of a circuit or a device. That is, a certain function in the integrated circuit can be turned on or off by this signal.
In this embodiment, the pulse signal is specifically a continuous pulse signal including a preset number of pulses. Continuous means here that in particular the pulse signal is of a very short duration for every two adjacent pulses, without the two adjacent pulses being spaced significantly longer than the other pulses.
And the enable signal specifically includes a first enable sub-signal, a second enable sub-signal, and a third enable sub-signal that occur during the continuous pulse signal. It can be understood that the first enabling sub-signal, the second enabling sub-signal and the third enabling sub-signal are specifically corresponding to the instantaneous switch signals received simultaneously at different moments respectively in the period of receiving the continuous pulse signals by the power circuit 12, so as to be capable of triggering one output signal of the power circuit 12 respectively.
Specifically, the power circuit 12 is coupled to the control circuit 11 and the external light emitting unit, and it is understood that the power circuit 12 is specifically configured to output a corresponding power signal and an adjustment signal to the light emitting unit of the display panel under the signal control of the control circuit 11, so as to drive the light emitting unit to perform light emitting display.
It is understood that the control circuit 11 may be specifically configured as a DDIC chip, and the power supply circuit 12 may be configured as a PMIC chip; alternatively, the control circuit 11 and the power supply circuit 12 may be corresponding to a circuit subunit in the display panel, which is not limited in this application.
The power supply circuit 12 determines, based on the pulse signal and the enable signal received by the power supply circuit 12 and sent by the control circuit 11, a first power supply signal, a second power supply signal and a power adjustment signal that are correspondingly output by the power supply circuit 12, for example, determines, under the combined action of the pulse signal and the enable signal, a sending time and a voltage level of the first power supply signal, the second power supply signal and the power adjustment signal that are correspondingly output to the light emitting unit of the display panel, so as to further supply power and adjust power to the light emitting unit, so as to drive the light emitting unit to perform light emitting display. In other embodiments, the light emitting unit may be replaced by any other reasonable functional module in the display panel, and the control circuit 11 and the power circuit 12 correspondingly control and output the first power signal, the second power signal and the power adjustment signal, so as to further enable corresponding functional operation, which is not limited in this application.
In the above scheme, the pulse signal and the enable signal are utilized to jointly determine the output of each power signal of the power circuit 12, and the pulse signal is a continuous pulse signal, that is, the pulse signal is only output once to complete the setting of the voltage of each power signal, so that the waste of the pulse signal can be effectively avoided, and the control efficiency of the power output is improved.
Further, in an embodiment, as shown in fig. 3, the enable signal is a continuous square wave signal EN, and corresponds to a continuous pulse signal, that is, the square wave signal EN includes three rising edges or falling edges during a period when the Swire signal appears simultaneously, and the three rising edges or falling edges respectively correspond to the triggering edges of the first enable sub-signal, the second enable sub-signal and the third enable sub-signal in the enable signal. And the square wave signal EN may be in any reasonable waveform pattern, such as a square wave with a fixed high-low level cycle period, or an irregular square wave, during other periods when the Swire signal does not appear, which is not limited in this application.
The power supply circuit 12 is further configured to detect trigger edges of the first enable sub-signal, the second enable sub-signal and the third enable sub-signal in the enable signals, so as to determine an instant time of each rising edge or falling edge of the square wave signal EN during a period in which the first enable sub-signal, the second enable sub-signal and the third enable sub-signal occur simultaneously, that is, during a period in which the Swire signal occurs simultaneously, as trigger times of the first power supply signal, the second power supply signal and the power adjustment signal, that is, ELVDD, ELVSS and AVDD analog electrical signals, so that the power supply circuit 12 can be triggered to send the ELVDD, ELVSS and AVDD analog electrical signals to the light emitting units of the display panel at corresponding times, and further supply power to and adjust power of the light emitting units to drive the light emitting units to perform light emitting display.
The EN signal is an AVDD enabling signal and is used as a reference time signal for starting or stopping the PMIC; ELVDD and ELVSS may be understood as positive and negative power supply signals of the light emitting cells to supply driving power to the light emitting cells; and AVDD may be understood as a brightness adjustment signal of the light emitting unit to be able to correspondingly adjust the light emitting brightness or light emitting pattern of the light emitting unit. In other embodiments, the ELVDD, ELVSS and AVDD may be replaced with any other electrical signals that may be used by a reasonable light emitting unit, which is not limited in this application.
Further, in an embodiment, since the instant time of each rising edge or falling edge of the square wave signal EN corresponds to a different transmission time of the Swire signal, respectively, during the period in which the Swire signal appears simultaneously, that is, each of the transmission times corresponds to a different number of pulses transmitted to the power supply circuit 12 by the control circuit 11, respectively. The power supply circuit 12 is further configured to determine count values of corresponding pulses of the pulse signals corresponding to the occurrence timings of the trigger edges of the first enable sub-signal, the second enable sub-signal and the third enable sub-signal in the enable signals, so as to determine voltage levels of the first power supply signal, the second power supply signal and the power adjustment signals, that is, ELVDD, ELVSS and AVDD, based on the count values of the corresponding pulses, that is, the number of pulses of the Swire signal that have been received by the power supply circuit 12 at the corresponding timings.
It can be understood that the voltage levels of ELVDD, ELVSS and AVDD triggered at the time corresponding to the pulses having different count values are different, so that the control circuit 11 can adjust the voltage levels of ELVDD, ELVSS and AVDD output by the power circuit 12 by adjusting the pulse position of the Swire signal corresponding to the instant time of each rising edge or falling edge of the square wave signal EN. Wherein the count value is not greater than a preset number of pulses.
Optionally, the power supply circuit 12 further comprises a counter 121 for counting up or counting down pulses in the pulse signal. In other embodiments, the counter 121 may be included in any other reasonable circuit of the display panel and electrically connected to the power circuit 12, which is not limited in this application.
Further, in an embodiment, the power circuit 12 outputs the first power signal, the second power signal and the power adjustment signal at different time, so that the problem of output timing is unavoidable. The power supply circuit 12 is further configured to detect a level state of the enable signal at the time of a first pulse in the continuous pulse signal, so as to be able to determine a counting mode of pulses in the pulse signal and an order of outputting the first power supply signal, the second power supply signal, and the power adjustment signal based on the level state of the enable signal.
It will be appreciated that the level states include in particular low and high levels, and that the manner in which the pulses are counted includes counting up and counting down.
Specifically, as shown in fig. 3, when the level state of the enable signal is the first state, for example, the low level state, when the first pulse in the continuous pulse signal is detected, the power supply circuit 12 counts the pulses in the pulse signal gradually, that is, in an incremental manner, for example, when the first pulse is counted as 1, when the second pulse is counted as 2, and so on, by sequentially increasing the count by 1, until the count is the preset number of pulses, and the continuous pulse signal stops when it disappears. At this time, the power supply circuit 12 sequentially outputs the second power supply signal, the power adjustment signal, and the first power supply signal, that is, ELVSS, AVDD, and ELVDD, to the light emitting unit.
Fig. 4 is a schematic diagram of voltage timing control of the driving circuit in fig. 2 in another specific application scenario, as shown in fig. 4. When the level state of the enable signal is the second state, i.e., the high level, in the continuous pulse signal, the power supply circuit 12 counts the pulses in the pulse signal gradually, i.e., incrementally, when the first pulse is detected, for example, the count is the preset pulse number 87, the count is 86 when the second pulse is detected, and so on, by sequentially decrementing the count by 1 until the count is 0, and the continuous pulse signal stops when it disappears. At this time, the power supply circuit 12 sequentially outputs the first power supply signal, the power adjustment signal, and the second power supply signal, that is, ELVDD, AVDD, and ELVSS, to the light emitting unit.
In other embodiments, the first state may be a high level, and the second state may be a low level, and the corresponding signal output sequence of the power circuit 12 may be any other reasonable sequence, which is not limited in this application.
Further, as shown in fig. 3, when the level state of the enable signal is the first state when the first pulse of the continuous pulse signal is detected, the power supply circuit 12 is configured to gradually increase the count of the pulses in the pulse signal, and when the count value of the corresponding pulse of the pulse signal corresponding to the trigger edge of the first enable sub-signal, that is, the occurrence time of the first falling edge of the square wave signal EN during the period when the Swire signal occurs, is in the first range, the trigger edge of the first enable sub-signal is configured to trigger the second power supply signal, that is, ELVSS. And the count value of the corresponding pulse of the pulse signal corresponding to the trigger edge of the first enable sub-signal is used to determine the voltage level of the second power supply signal.
It is understood that the trigger edge of the first enable sub-signal corresponds to the current count value of the pulse signal being in the first range, and different count values in the first range correspond to different voltage levels of the second power supply signal.
And when the trigger edge of the second enable sub-signal, that is, the count value of the corresponding pulse of the pulse signal corresponding to the occurrence time of the second falling edge of the square wave signal EN in the period of occurrence of the Swire signal is in the second range, the trigger edge of the second enable sub-signal is used for triggering the power adjustment signal, that is, AVDD. And the count value of the corresponding pulse of the pulse signal corresponding to the trigger edge of the second enable sub-signal is used to determine the voltage class of the power adjustment signal.
When the count value of the corresponding pulse of the pulse signal corresponding to the occurrence time of the third falling edge of the square wave signal EN in the period of occurrence of the Swire signal is in the third range, the trigger edge of the third enabling sub-signal is used for triggering the first power supply signal, that is, ELVDD. And the count value of the corresponding pulse of the pulse signal corresponding to the occurrence time of the trigger edge of the third enabling sub-signal is used for determining the voltage level of the first power supply signal.
Therefore, the count value corresponding to the first range is smaller than the count value corresponding to the second range, and the count value corresponding to the second range is smaller than the count value corresponding to the third range.
Further, as shown in fig. 4, when the level state of the enable signal is the second state when the first pulse of the continuous pulse signal is detected, the power supply circuit 12 gradually decreases the count of the pulses in the pulse signal, and when the trigger edge of the first enable sub-signal, that is, the count value of the corresponding pulse of the pulse signal corresponding to the occurrence time of the first falling edge of the square wave signal EN during the period when the Swire signal occurs is in the third range, the trigger edge of the first enable sub-signal is used to trigger the first power supply signal, that is, ELVDD. It can be understood that, at this time, the count value of the corresponding pulse is first in the third range because the count is counted in a decrementing manner, and the count value of the corresponding pulse of the pulse signal corresponding to the trigger edge of the first enable sub-signal is used to determine the voltage level of the first power signal.
And when the trigger edge of the second enable sub-signal, that is, the count value of the corresponding pulse of the pulse signal corresponding to the occurrence time of the second falling edge of the square wave signal EN in the period of occurrence of the Swire signal is in the second range, the trigger edge of the second enable sub-signal is used for triggering the power adjustment signal, that is, AVDD. And the count value of the corresponding pulse of the pulse signal corresponding to the trigger edge of the second enable sub-signal is used to determine the voltage class of the power adjustment signal.
When the count value of the corresponding pulse of the pulse signal corresponding to the occurrence time of the third falling edge of the square wave signal EN in the period of occurrence of the Swire signal is in the first range, the trigger edge of the third enabling sub-signal is used for triggering the second power supply signal, namely ELVSS. And the count value of the corresponding pulse of the pulse signal corresponding to the occurrence time of the trigger edge of the third enabling sub-signal is used for determining the voltage level of the second power supply signal.
According to the scheme, the pulse signals and the enabling signals are utilized to jointly determine the actual voltages of the first power supply signals, the second power supply signals and the power regulating signals, and the first power supply signals, the second power supply signals and the power regulating signals can be set under the condition that the pulse signals are output once; and the corresponding pulse counting mode is determined by utilizing the potential state of the first pulse rising edge of the pulse signal and enabling the signal, and the output time sequence of the first power signal, the second power signal and the power regulating signal can be set under the condition that the pulse signal is output once, so that the corresponding control efficiency is improved to a great extent, and the frequency of the pulse signal is reduced.
In a specific embodiment, the number of preset pulses is 87, the first range is 1-53, the second range is 54-78, and the third range is 83-87. In other embodiments, the preset pulse number, the first range, the second range, and the third range may be any other reasonable value or value interval, which is not limited in this application.
From this, 1-53 pulses are specifically used to control the ELVSS voltage, while 54-78 pulses are used to control the AVDD voltage, and 83-87 pulses are used to control the ELVDD voltage. According to the voltage setting protocol, the maximum pulse number output by Swire to the PMIC is 87 pulses, and the actual pulse numbers corresponding to different voltages can be judged through the falling edge of an EN signal, for example, the first falling edge of EN falls at 37 Swire pulse positions, and the ELVSS actually sets the voltage to be the voltage value corresponding to 37 Swire pulses; the second falling edge of EN is located at 58 Swire pulse positions, and the actual voltage of AVDD is the voltage value corresponding to 58 Swire pulses; the third EN falling edge falls at 82 Swire pulse positions, and the ELVDD actually sets the voltage to a voltage value corresponding to 82 Swire pulses; and no Swire pulse exists in one interval, the actual voltage is the default voltage.
In other implementations, the first to third falling edges of EN may also respectively fall at any other reasonable Swire pulse position, which is not limited in this application.
The corresponding relation between different Swire pulse positions and corresponding control results is as follows:
next, supplementary explanation:
| rising edge | Output discharge | Rising edge | Conversion time |
| No pulse | Is controlled by a processor | No pulse | 12ms |
| 79 | ON | 81 | Rapid and convenient |
| 80 | OFF | 82 | 12ms |
The above 1-87 specifically corresponds to that the rising edge of the EN signal occurs at the pulse position corresponding to the Swire signal, and the rising edge may be replaced by the falling edge, which is not limited in this application.
Referring to fig. 5, fig. 5 is a flow chart of an embodiment of the driving method of the present application. Specifically, the method may include the steps of:
s21: the pulse signal and the enable signal are acquired.
It can be understood that the driving method in this embodiment is specifically a method for driving the light emitting unit of the display panel by a driving circuit, so that the light emitting unit performs light emitting display. The driving circuit specifically includes a control circuit and a power circuit coupled to each other, and the driving circuit is the driving circuit 10 described in any of the above embodiments, and detailed descriptions thereof will be omitted herein with reference to fig. 1-4.
The control circuit of the driving circuit is specifically configured to generate a pulse signal and an enable signal, so as to be capable of correspondingly acquiring the pulse signal and the enable signal.
The pulse signal is a continuous pulse signal comprising a preset pulse number. And continuous here means in particular that the pulse signal is of a very short interval time between every two adjacent pulses, without the occurrence of the interval time between two adjacent pulses being significantly longer than the other interval time.
And the enable signal specifically includes a first enable sub-signal, a second enable sub-signal, and a third enable sub-signal that occur during the continuous pulse signal. It can be understood that the first enabling sub-signal, the second enabling sub-signal and the third enabling sub-signal are specifically corresponding to the instantaneous switch signals received simultaneously at different moments respectively in the period that the power supply circuit receives the continuous pulse signals, so as to trigger one path of output signals of the power supply circuit respectively.
S22: the output first power signal, second power signal and power adjustment signal are determined based on the pulse signal and the enable signal to drive the light emitting unit of the display panel to emit light.
Further, after the power supply circuit receives the pulse signal and the enable signal sent by the control circuit, the first power signal, the second power signal and the power adjustment signal which are correspondingly output by the power supply circuit can be determined based on the pulse signal and the enable signal, for example, the sending time and the voltage level of the first power signal, the second power signal and the power adjustment signal which are correspondingly output to the light emitting unit of the display panel are determined under the combined action of the pulse signal and the enable signal, and then the light emitting unit is powered and power adjusted to drive the light emitting unit to emit light for display.
Referring to fig. 6, fig. 6 is a schematic structural diagram of an embodiment of a display device of the present application.
In the present embodiment, the display device 30 includes a display panel 31 and a driving circuit 32, and the driving circuit 32 is coupled to the display panel 31 for driving the light emitting units of the display panel 31 to emit light. It should be noted that the driving circuit 32 described in this embodiment is the driving circuit 10 described in any of the above embodiments, and will not be described herein.
The beneficial effects of this application are: unlike the prior art, the driving circuit of the display panel provided by the application comprises: a control circuit and a power supply circuit; the control circuit is used for generating pulse signals and enabling signals, the pulse signals are continuous pulse signals with preset pulse numbers, the enabling signals comprise a first enabling sub-signal, a second enabling sub-signal and a third enabling sub-signal which occur in the period of the continuous pulse signals, so that the first power signal, the second power signal and the power adjusting signal which are output by the power supply circuit can be determined based on the pulse signals and the enabling signals, and then the light emitting unit is driven to emit light, the output of each power supply signal of the power supply circuit can be determined by the pulse signals and the enabling signals together, and because the pulse signals are continuous pulse signals, namely, the pulse signals are output only once, the setting of the voltage of each power supply signal can be completed, the waste of the pulse signals can be effectively avoided, and the control efficiency of the power supply output is improved.
The foregoing description is only of embodiments of the present application, and is not intended to limit the scope of the patent application, and all equivalent structures or equivalent processes using the descriptions and the contents of the present application or other related technical fields are included in the scope of the patent application.
Claims (9)
1. A driving circuit of a display panel, the driving circuit comprising:
a control circuit for generating a pulse signal and an enable signal; the pulse signal is a continuous pulse signal comprising a preset pulse number, and the enabling signal comprises a first enabling sub-signal, a second enabling sub-signal and a third enabling sub-signal which occur in the period of the continuous pulse signal;
a power supply circuit coupled to the control circuit and the external light emitting unit to determine a first power supply signal, a second power supply signal, and a power adjustment signal outputted by the power supply circuit based on the pulse signal and the enable signal to drive the light emitting unit to emit light; the power supply circuit is used for detecting trigger edges of a first enabling sub-signal, a second enabling sub-signal and a third enabling sub-signal in the enabling signals so as to determine trigger moments of the first power supply signal, the second power supply signal and the power regulating signal based on the occurrence moments of the trigger edges of the first enabling sub-signal, the second enabling sub-signal and the third enabling sub-signal.
2. The driving circuit according to claim 1, wherein,
the power supply circuit is further configured to determine count values of corresponding pulses of the pulse signals corresponding to occurrence moments of trigger edges of a first enable sub-signal, a second enable sub-signal and a third enable sub-signal in the enable signals, so as to determine voltage levels of the first power supply signal, the second power supply signal and the power adjustment signal based on the count values of the corresponding pulses; wherein the count value is not greater than the preset pulse number.
3. The driving circuit according to claim 1, wherein,
the power supply circuit is used for detecting the level state of the enabling signal when the first pulse in the continuous pulse signals so as to determine the counting mode of the pulses in the pulse signals and the sequence of outputting the first power supply signal, the second power supply signal and the power regulating signal based on the level state of the enabling signal.
4. The driving circuit according to claim 3, wherein,
when the power supply circuit detects that the level state of the enabling signal is the first state when the first pulse in the continuous pulse signals is detected, the counting mode of the pulses in the pulse signals is gradually increased, and the power supply circuit sequentially outputs the second power supply signal, the power regulating signal and the first power supply signal to the light emitting unit; or (b)
When the power supply circuit detects that the level state of the enabling signal is the second state when the first pulse in the continuous pulse signals is detected, the counting mode of the pulses in the pulse signals is gradually reduced, and the power supply circuit sequentially outputs the first power supply signal, the power regulating signal and the second power supply signal to the light emitting unit.
5. The driving circuit according to claim 4, wherein,
when the count value of the corresponding pulse of the pulse signal corresponding to the occurrence time of the trigger edge of the first enabling sub-signal is in a first range, the trigger edge of the first enabling sub-signal is used for triggering the second power supply signal, and the count value of the corresponding pulse of the pulse signal corresponding to the trigger edge of the first enabling sub-signal is used for determining the voltage level of the second power supply signal; or when the count value of the corresponding pulse of the pulse signal corresponding to the occurrence time of the trigger edge of the first enabling sub-signal is in a third range, the trigger edge of the first enabling sub-signal is used for triggering the first power supply signal, and the count value of the corresponding pulse of the pulse signal corresponding to the trigger edge of the first enabling sub-signal is used for determining the voltage level of the first power supply signal;
when the count value of the corresponding pulse of the pulse signal corresponding to the occurrence time of the trigger edge of the second enabling sub-signal is in a second range, the trigger edge of the second enabling sub-signal is used for triggering the power regulating signal, and the count value of the corresponding pulse of the pulse signal corresponding to the trigger edge of the second enabling sub-signal is used for determining the voltage level of the power regulating signal;
when the count value of the corresponding pulse of the pulse signal corresponding to the occurrence time of the trigger edge of the third enabling sub-signal is in a third range, the trigger edge of the third enabling sub-signal is used for triggering the first power supply signal, and the count value of the corresponding pulse of the pulse signal corresponding to the occurrence time of the trigger edge of the third enabling sub-signal is used for determining the voltage level of the first power supply signal; or when the count value of the corresponding pulse of the pulse signal corresponding to the occurrence time of the trigger edge of the third enabling sub-signal is in the first range, the trigger edge of the third enabling sub-signal is used for triggering the second power supply signal, and the count value of the corresponding pulse of the pulse signal corresponding to the occurrence time of the trigger edge of the third enabling sub-signal is used for determining the voltage level of the second power supply signal.
6. The driving circuit according to claim 5, wherein,
the number of the preset pulses is 87, the first range is 1-53, the second range is 54-78, and the third range is 83-87.
7. The driving circuit according to claim 3, wherein,
the power supply circuit further includes a counter for counting up or counting down pulses in the pulse signal.
8. A driving method of a display panel, the driving method comprising:
acquiring a pulse signal and an enabling signal; the pulse signal is a continuous pulse signal comprising a preset pulse number, and the enabling signal comprises a first enabling sub-signal, a second enabling sub-signal and a third enabling sub-signal which occur in the period of the continuous pulse signal;
detecting trigger edges of a first enabling sub-signal, a second enabling sub-signal and a third enabling sub-signal in the enabling signals;
and determining the trigger time of the first power supply signal, the second power supply signal and the power adjustment signal based on the trigger time of the first enabling sub-signal, the second enabling sub-signal and the third enabling sub-signal so as to drive the light emitting unit of the display panel to emit light.
9. A display device, characterized in that the display device comprises a display panel and the driving circuit of any one of claims 1-7, the driving circuit being coupled to the display panel for driving the light emitting units of the display panel to emit light.
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Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| RU2523162C1 (en) * | 2013-01-30 | 2014-07-20 | Государственное научное учреждение Всероссийский селекционно-технологический институт садоводства и питомниководства Российской академии сельскохозяйственных наук (ГНУ ВСТИСП Россельхозакадемии) | Device for magnetic-pulse processing of plants |
| CN112103954A (en) * | 2020-09-11 | 2020-12-18 | 西安交通大学 | Non-impact switching system, device and method for voltage compensation converter of hybrid distribution transformer |
Family Cites Families (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7911190B2 (en) * | 2007-02-14 | 2011-03-22 | Texas Instruments Incorporated | Regulator with automatic power output device detection |
| CN101883454B (en) * | 2009-05-08 | 2014-06-11 | 复旦大学 | LED driving chip with single-line pulse control mode |
| KR102217614B1 (en) * | 2014-10-23 | 2021-02-22 | 삼성디스플레이 주식회사 | Display device and electronic device having the same |
| KR102228146B1 (en) * | 2014-11-12 | 2021-03-18 | 삼성디스플레이 주식회사 | Power suplly device and display device having the same |
| KR102339646B1 (en) * | 2015-08-31 | 2021-12-15 | 엘지디스플레이 주식회사 | Organic Light Emitting Diode |
| CN110444162B (en) * | 2019-07-18 | 2020-10-16 | 武汉华星光电半导体显示技术有限公司 | Display device and power management chip for same |
-
2021
- 2021-11-22 CN CN202111389134.3A patent/CN114093297B/en active Active
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| RU2523162C1 (en) * | 2013-01-30 | 2014-07-20 | Государственное научное учреждение Всероссийский селекционно-технологический институт садоводства и питомниководства Российской академии сельскохозяйственных наук (ГНУ ВСТИСП Россельхозакадемии) | Device for magnetic-pulse processing of plants |
| CN112103954A (en) * | 2020-09-11 | 2020-12-18 | 西安交通大学 | Non-impact switching system, device and method for voltage compensation converter of hybrid distribution transformer |
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