CN114039477A - Complementary signal generating circuit with adjustable dead time - Google Patents

Complementary signal generating circuit with adjustable dead time Download PDF

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Publication number
CN114039477A
CN114039477A CN202111368964.8A CN202111368964A CN114039477A CN 114039477 A CN114039477 A CN 114039477A CN 202111368964 A CN202111368964 A CN 202111368964A CN 114039477 A CN114039477 A CN 114039477A
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signal
capacitor
circuit
voltage
resistor
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高志刚
黄生辉
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Beijing Institute of Technology BIT
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Beijing Institute of Technology BIT
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    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00—Details of apparatus for conversion
    • H02M1/08—Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00—Details of apparatus for conversion
    • H02M1/08—Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters
    • H02M1/088—Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters for the simultaneous control of series or parallel connected semiconductor devices
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00—Details of apparatus for conversion
    • H02M1/38—Means for preventing simultaneous conduction of switches

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Inverter Devices (AREA)

Abstract

The invention discloses a complementary signal generating circuit with adjustable dead time, and belongs to the technical field of power electronics. The invention mainly comprises a signal phase-shifting circuit, a signal comparison circuit and a signal combination circuit. The signal phase-shifting circuit performs phase-shifting processing on the input pulse signal, and the phase-shifting phase is adjustable; the signal comparison circuit compares the pulse signal output by the phase shift circuit with a specific voltage, and amplifies and shapes the pulse signal; the signal combination circuit is used for carrying out logic combination processing on the signals and outputting complementary signals with dead zones. The invention can provide conditions for driving power electronic devices in power electronic equipment, change the length of a dead zone by changing the parameters of resistance and capacitance in a circuit, meet the requirements of different occasions, realize the normal work of the equipment and improve the reliability and stability of a system. The invention does not depend on the dead zone generating function of the control chip, is not limited by the number of pins and hardware resources of the micro control chip, and can better meet the actual requirement.

Description

Complementary signal generating circuit with adjustable dead time
Technical Field
The invention relates to a complementary signal generating circuit with adjustable dead time, which can be used in various types of power electronic equipment to generate complementary signals containing dead time to drive power electronic devices to work and belongs to the technical field of power electronics.
Background
At present, in a half-bridge circuit, a full-bridge circuit and a three-phase bridge inverter circuit power electronic device, an upper power electronic device and a lower power electronic device of the same bridge arm need to be driven by complementary signals, and dead zones are added on signal edges to improve reliability. At present, two complementary signals are mainly generated by a micro control chip, for example, based on the advanced timer function of the control chip, two complementary pulses with adjustable dead time can be generated. However, the method of generating complementary pulses by using a micro-controller chip has many limitations, for example, a specific type of micro-controller chip needs to be selected, and only some control chips with advanced timer function can generate complementary pulses with dead zones, so that the method has the problems of high cost and poor flexibility. In addition, when a large number of complementary pulses are required, a single micro control chip is difficult to meet the requirement, and if the number of the micro control chips is increased, the problems of complex clock synchronization, difficult data sharing, low reliability and the like are caused. Therefore, the complementary pulse generating circuit with the adjustable dead zone has the characteristics of low cost, simple structure, high reaction speed, low power consumption and the like, can be used in power electronic equipment, generates an output signal which is complementary with an input signal and contains the dead zone based on the input signal, and is used for driving a power electronic device to work. The circuit provided by the invention is composed of three circuits, namely a signal phase-shifting circuit, a signal comparison circuit and a signal combination circuit. A signal phase-shifting circuit is formed by utilizing basic elements such as an adjustable resistor, a capacitor, a diode, a triode and the like; the voltage stabilizing diode and the operational amplifier form a signal comparison circuit, when the voltage of an input signal of the signal comparison circuit is higher than a large threshold value, a low level is output, and when the voltage of the input signal of the signal comparison circuit is lower than a small threshold value, a high level is output; the signal combination circuit consists of a NOT gate, an AND gate and an OR gate, and finally obtains a complementary signal which is opposite to the input signal and has a dead zone.
In power electronic devices including bridge configurations (e.g., half-bridge circuits, full-bridge circuits, and three-phase bridges), the upper and lower switching devices of the same bridge arm need to be driven with complementary signals having dead zones. The invention provides a complementary signal generating circuit with adjustable dead time, which can generate a pair of complementary driving signals containing the dead time based on a driving signal of one power electronic device, drive two power electronic switching devices on the same bridge arm to normally work and provide guarantee for long-term stable operation of a system.
Currently, microcontroller chips are mainly used to generate a pair of complementary signals and insert dead zones into the signals. This solution has some drawbacks:
1. only a microcontroller of a specific model which has the functions of generating dead zones and generating complementary signals can be used, so that the system is high in cost and low in flexibility;
2. limited by the number of pins and hardware resources of the micro control chip, only a small number of complementary signals containing dead zones can be generated, and actual requirements cannot be met;
3. when the micro control chip is in a dead halt fault or a program operation error occurs, an error signal may be generated, so that the power electronic device is switched on or off erroneously.
Disclosure of Invention
In view of the above-mentioned drawbacks of the prior art, such as high cost, low flexibility and low reliability of the method for generating complementary signals by using a micro control chip, the present invention provides a complementary signal generating circuit with adjustable dead time, which is used for generating a set of signals with logic opposite to that of input signals and including dead zones, so as to provide conditions for driving power electronic devices in power electronic equipment, and can change the length of the dead zones by changing parameters of resistors and capacitors in the circuit, thereby meeting the requirements of different occasions, realizing normal operation of the equipment, and improving the reliability and stability of the system.
The purpose of the invention is realized by the following technical scheme.
The invention discloses a complementary signal generating circuit with adjustable dead time, which mainly comprises a signal phase-shifting circuit, a signal comparison circuit and a signal combination circuit. The signal phase-shifting circuit performs phase-shifting processing on the input pulse signal, and the phase-shifting phase is adjustable; the signal comparison circuit compares the pulse signal output by the phase shift circuit with a specific voltage, amplifies and shapes the pulse signal, and the signal combination circuit is responsible for carrying out logic combination processing on the signal and outputting a complementary signal with a dead zone.
The signal phase shift circuit performs phase shift processing on the input pulse signal, and the phase shift phase is adjustable. The signal phase shift circuit is mainly composed of resistors (R1 and R2), a capacitor C1, a diode D1 and a PNP type triode Q1; when the input signal x is at a high level, the triode Q1 is turned off, the capacitor C1 is charged through the resistor R1, the charging time t1 of the capacitor is changed by adjusting the values of the resistor R1 and the capacitor C1, and the calculation method of t1 is as shown in formula (1); when the input signal x is at a low level, the transistor Q1 is turned on, the capacitor C1 discharges through the resistor R2, and the discharge time t2 of the capacitor is changed by adjusting the values of the resistor R2 and the capacitor C1, and the calculation method of t2 is as shown in formula (2). The signal comparison circuit is used for shaping and amplifying an output signal y1 of the phase shift circuit, and comprises resistors (R3, R4 and R5), capacitors (C2 and C3), voltage stabilizing diodes (D2 and D3) and a comparator U2; the signal combination circuit logically combines the input signal with a signal generated by the signal comparison circuit to generate a signal which contains a dead zone and is opposite to the input signal, and the signal combination circuit consists of an OR gate U2, an AND gate U3 and a NOT gate U4; the two input signals of the and gate U3 are x and y2, respectively, and the output signal is z 1; the two input signals of the or gate U2 are x and y2, respectively, and the output signal of the or gate U2 generates an output signal z2 after passing through the not gate U4.
t1＝5R1C1 (1)
t2＝5R2C1 (2)
The anode of diode D1 is connected to an input signal, denoted by x. The anode of the diode D1 is connected with the base of the triode Q1, the cathode of the diode D1 is connected with one end of the resistor R1, and the other end of the resistor R1 is connected with the anode of the capacitor C1. One end of the resistor R2 is connected with the anode of the capacitor C1, and the other end of the resistor R2 is connected with the emitter of the diode Q1. The collector of the transistor Q1 is connected to the negative terminal of the dc power supply E1. The negative pole of the capacitor C1 is connected to the negative pole of the dc voltage E1. The positive voltage of the capacitor C1 is represented by y1, and y1 is the signal obtained after the input signal x is phase-shifted. One end of the resistor R3 is connected to the positive electrode of the dc voltage E1, and the other end of the resistor R3 is connected to the positive electrode of the capacitor C2. The anode of the capacitor C2 is connected with the cathode of the voltage stabilizing diode D2, and the cathode of the capacitor C2 is connected with the cathode of the direct current voltage E1. The anode of the zener diode D2 is connected to the cathode of the dc voltage E1. One end of the resistor R4 is connected to the positive electrode of the dc voltage E1, and the other end of the resistor R4 is connected to the positive electrode of the capacitor C3. The anode of the capacitor C3 is connected with the cathode of the voltage stabilizing diode D3, and the cathode of the capacitor C3 is connected with the cathode of the direct current voltage E1. The anode of the zener diode D3 is connected to the cathode of the dc voltage E1. The voltage of the capacitor C3 is determined by the breakdown voltage of the zener diode D3, the positive pole of the capacitor C3 is connected to the inverting input terminal of the comparator U1, and the non-inverting input terminal of the comparator U1 is connected to the signal y 1. One end of the resistor R5 is connected with the anode of the capacitor C2, and the other end of the resistor R5 is connected with the output end of the comparator U1. The output signal of the comparator U1 is denoted y 2. The signal combination circuit combines the input signal x of the circuit with the output signal of the comparator U1, the two input signals of the and gate U3 are x and y2, respectively, and the output signal is z 1. The two input signals of the or gate U2 are x and y2, respectively, and the output signal of the or gate U2 generates an output signal z2 after passing through the not gate U4.
The length of the dead zone is changed by changing the parameters of the resistor and the capacitor in the circuit, so that the requirements of different occasions are met, the normal work of equipment is realized, and the reliability and the stability of the system are improved.
The invention discloses a working method of a complementary signal generating circuit with adjustable dead time, which comprises the following steps:
the method comprises the following steps: when the input signal x is high, the transistor Q1 is in off state, the input signal charges the C1 through the diode D1 and the resistor R1, and the voltage of the positive electrode of the C1 will slowly increase. When the input pulse signal is at a low level, the triode Q1 is in a conducting state, the capacitor C1 discharges through a series circuit of the resistor R2 and the triode Q1, and the voltage drop of the positive electrode of the capacitor C1 gradually decreases. Thus, a signal y lagging behind x by a certain phase is obtained, and the phase shifting function is realized. For the signal y, the charging and discharging processes of the capacitor are not completed instantly, so that the rising edge and the falling edge of the signal y are not strictly vertical jump processes, but have certain gradients. In addition, the charging time of the capacitor C1 is adjusted by adjusting the resistance value of R1, or the discharging time of the capacitor C1 is adjusted by adjusting the resistance value of the resistor R2, so that the purpose of adjusting the phase delay is achieved.
Step two: when the signal y1 is greater than the voltage of the positive electrode of the capacitor C3, the voltage of the output end y2 of the comparator is at a high level; when the signal y1 is less than the positive voltage of the capacitor C3, the voltage at the output terminal y2 of the comparator is low. Therefore, although the edge of the signal y1 changes slowly, the edge of the output y2 signal becomes steep after passing through the signal comparison circuit. The shape of the signal is further adjusted by selecting the Zener diode D3 with different breakdown voltages and changing the turning moment of the signal y 2. By selecting the zener diode D3 with different breakdown voltages, the supply voltage of the comparator is changed, and the voltage amplitude when the signal y2 is at a high level is changed.
Step three: after the signal x and the signal y2 pass through the AND gate U3, the high level time of the output z2 signal is shorter than that of the signal x; after the signal x and the signal y2 pass through the or gate U2, the time of the high level in the obtained signal is longer than that of the signal x; after passing through the not gate U4, the low level in the signal z2 is generated for a longer time than the high level of the signal x; namely, two complementary signals z1 and z2 containing dead zone are generated according to the signal x, and the dead zone time is adjustable.
Preferably, the complementary signal generating circuit with the adjustable dead time is suitable for power electronic devices with bridge structures, wherein the power electronic devices with the bridge structures comprise half-bridge circuits, full-bridge circuits and three-phase bridge circuits. The complementary signal generating circuit with the adjustable dead time generates a pair of complementary signals containing the dead time based on one path of input signals, the two signals are subjected to electrical isolation and voltage amplitude processing to drive a power electronic switching element in a power electronic device, and the length of the dead time is changed by changing parameters of a resistor and a capacitor in the circuit, so that the requirements of different occasions are met, normal operation of equipment is realized, and the reliability and the stability of a system are improved.
The power electronic switching device comprises a MOSFET and an IGBT.
Has the advantages that:
1. the invention discloses a complementary signal generating circuit with adjustable dead time, which is used for generating a pair of complementary signals containing dead time after performing phase shifting, shaping amplification and logic combination processing on a path of input signals, can be used in power electronic equipment, realizes normal driving of a power electronic switching device, and has stronger reliability and higher stability.
2. The complementary signal generating circuit with the adjustable dead time disclosed by the invention does not depend on the dead time generating function of the control chip, so that the functional requirement on the control chip is lower, any common pin of the control chip can be used as an input signal, and the complementary signal generating circuit is more flexible, namely the complementary signal generating circuit is not limited by the number of pins and hardware resources of the micro control chip any more, and can meet the actual requirement.
3. The invention discloses a complementary signal generating circuit with adjustable dead time, which uses main devices comprising a resistor, a capacitor, a diode, a voltage stabilizing diode, a triode, a comparator, a NOT gate, an AND gate and an OR gate, and has the advantages of simple circuit structure, low cost, low power consumption and the like.
Drawings
FIG. 1 shows a complementary pulse generating circuit with adjustable dead zone, which is composed of a phase shift circuit, a signal comparison circuit and a signal combination.
FIG. 2 is a diagram of waveforms of key signals in the circuit of the present invention.
Detailed Description
For a better understanding of the objects and advantages of the present invention, reference should be made to the following detailed description taken in conjunction with the accompanying drawings and examples.
As shown in fig. 1, the complementary signal generating circuit with adjustable dead time disclosed in this embodiment is composed of a signal phase shift circuit, a signal comparison circuit and a signal combination circuit, and the whole circuit is composed of a resistor R1, a resistor R2, a resistor R3, a resistor R4, a resistor R5, a capacitor C1, a capacitor C2, a capacitor C3, a diode D1, a zener diode D2, a zener diode D3, a PNP transistor Q1, a comparator U1, an or gate U2, an and gate U3 and a not gate U4. The dc voltage is E1.
The specific connection mode and the working principle of the complementary signal generating circuit with adjustable dead time disclosed by the embodiment are as follows:
1. the signal phase shift circuit is used for performing phase shift processing on an input pulse signal, and the phase shift phase is adjustable.
The anode of diode D1 is connected to an input signal, denoted by x. The anode of the diode D1 is connected with the base of the triode Q1, the cathode of the diode D1 is connected with one end of the resistor R1, and the other end of the resistor R1 is connected with the anode of the capacitor C1. One end of the resistor R2 is connected with the anode of the capacitor C1, and the other end of the resistor R2 is connected with the emitter of the diode Q1. The collector of the transistor Q1 is connected to the negative terminal of the dc power supply E1. The negative pole of the capacitor C1 is connected to the negative pole of the dc voltage E1. The positive voltage of the capacitor C1 is represented by y1, and y1 is the signal obtained after the input signal x is phase-shifted.
The working method of the signal phase-shifting circuit is as follows:
when the input signal x is high, the transistor Q1 is in off state, the input signal charges the C1 through the diode D1 and the resistor R1, and the voltage of the positive electrode of the C1 will slowly increase. When the input pulse signal is at a low level, the triode Q1 is in a conducting state, the capacitor C1 discharges through a series circuit of the resistor R2 and the triode Q1, and the voltage drop of the positive electrode of the capacitor C1 gradually decreases. Therefore, a signal y lagging a certain phase position of x can be obtained, and the phase shifting function is realized. For the signal y, the charging and discharging processes of the capacitor are not completed instantaneously, so that the rising edge and the falling edge of the signal y are not strictly vertical jump processes, but are completed slowly. In addition, the charging time of the capacitor C1 can be adjusted by adjusting the resistance value of R1, and the discharging time of the capacitor C1 can be adjusted by adjusting the resistance value of the resistor R2, so that the purpose of adjusting the phase delay is achieved.
2. The signal comparison circuit compares the pulse signal output by the phase shift circuit with a specific voltage, and amplifies and shapes the pulse signal.
One end of the resistor R3 is connected to the positive electrode of the dc voltage E1, and the other end of the resistor R3 is connected to the positive electrode of the capacitor C2. The anode of the capacitor C2 is connected with the cathode of the voltage stabilizing diode D2, and the cathode of the capacitor C2 is connected with the cathode of the direct current voltage E1. The anode of the zener diode D2 is connected to the cathode of the dc voltage E1. The voltage of the capacitor C2 is determined by the breakdown voltage of the zener diode D2 for supplying power to the comparator U1.
One end of the resistor R4 is connected to the positive electrode of the dc voltage E1, and the other end of the resistor R4 is connected to the positive electrode of the capacitor C3. The anode of the capacitor C3 is connected with the cathode of the voltage stabilizing diode D3, and the cathode of the capacitor C3 is connected with the cathode of the direct current voltage E1. The anode of the zener diode D3 is connected to the cathode of the dc voltage E1. The voltage of the capacitor C3 is determined by the breakdown voltage of the zener diode D3, the positive pole of the capacitor C3 is connected to the inverting input terminal of the comparator U1, and the non-inverting input terminal of the comparator U1 is connected to the signal y 1. One end of the resistor R5 is connected with the anode of the capacitor C2, and the other end of the resistor R5 is connected with the output end of the comparator U1. The output signal of the comparator U1 is denoted y 2.
The working method of the signal comparison circuit is as follows:
when the signal y1 is greater than the voltage of the positive electrode of the capacitor C3, the voltage of the output end y2 of the comparator is at a high level; when the signal y1 is less than the positive voltage of the capacitor C3, the voltage at the output terminal y2 of the comparator is low. Therefore, although the edge of the signal y1 changes slowly, the edge of the output y2 signal becomes steep after passing through the signal comparison circuit. By selecting the Zener diode D3 with different breakdown voltages, the turning moment of the signal y2 can be changed, and the shape of the signal can be further adjusted. By selecting the zener diode D3 with different breakdown voltages, the supply voltage of the comparator can be changed, and the voltage amplitude when the signal y2 is high can be changed. Thus, the signal y2 is approximately the same shape as the input signal x1, but with a phase lag.
3. The signal combination circuit is used for carrying out logic combination processing on the signals and outputting complementary signals with dead zones.
The signal combination circuit combines the input signal x of the circuit with the output signal of the comparator U1, the two input signals of the and gate U3 are x and y2, respectively, and the output signal is z 1. The two input signals of the or gate U2 are x and y2, respectively, and the output signal of the or gate U2 generates an output signal z2 after passing through the not gate U4.
The working method of the signal combination circuit is as follows:
after the signal x and the signal y2 pass through the AND gate U3, the high level time of the output z2 signal is shorter than that of the signal x; after the signal x and the signal y2 pass through the or gate U2, the high level of the signal x takes longer time than the high level of the signal x, and after the signal x passes through the not gate U4, the low level of the signal z2 is generated for longer time than the high level of the signal x.
Waveforms of the signal x, the signal y1, the signal y2, the signal z1, and the signal z2 are shown in fig. 2. In summary, the present embodiment can generate two complementary paths of signals z1 and z2 including dead zones according to the signal x, and the dead zone time is adjustable, so as to provide conditions for driving the power electronic device to normally operate.
The present embodiment is applied to power electronic devices including bridge structures, such as half-bridge, full-bridge, and three-phase bridge circuits. The circuit provided by the invention can generate a pair of complementary signals containing dead zones based on one path of input signals, the signals and the signals are subjected to electrical isolation and voltage amplitude processing to drive various power electronic switching devices such as MOSFET (metal oxide semiconductor field effect transistor), IGBT (insulated gate bipolar transistor) and the like in a power electronic device, and the length of the dead zones can be changed by changing the parameters of resistance and capacitance in the circuit, so that the requirements of different occasions are met, the normal work of equipment is realized, and the reliability and the stability of a system are improved.
The above detailed description is intended to illustrate the objects, aspects and advantages of the present invention, and it should be understood that the above detailed description is only exemplary of the present invention and is not intended to limit the scope of the present invention, and any modifications, equivalents, improvements and the like made within the spirit and principle of the present invention should be included in the scope of the present invention.

Claims (6)

1. A complementary signal generating circuit with adjustable dead time, comprising: the circuit mainly comprises a signal phase-shifting circuit, a signal comparison circuit and a signal combination circuit; the signal phase-shifting circuit performs phase-shifting processing on the input pulse signal, and the phase-shifting phase is adjustable; the signal comparison circuit compares the pulse signal output by the phase shift circuit with a specific voltage, amplifies and shapes the pulse signal, and the signal combination circuit is responsible for carrying out logic combination processing on the signal and outputting a complementary signal with a dead zone.
2. The complementary signal generating circuit with adjustable dead time of claim 1, wherein: the signal phase-shifting circuit performs phase-shifting processing on the input pulse signal, and the phase-shifting phase is adjustable; the signal phase shift circuit is mainly composed of resistors (R1 and R2), a capacitor C1, a diode D1 and a PNP type triode Q1; when the input signal x is at a high level, the triode Q1 is turned off, the capacitor C1 is charged through the resistor R1, the charging time t1 of the capacitor is changed by adjusting the values of the resistor R1 and the capacitor C1, and the calculation method of t1 is as shown in formula (1); when the input signal x is at a low level, the triode Q1 is turned on, the capacitor C1 discharges through the resistor R2, the discharge time t2 of the capacitor is changed by adjusting the values of the resistor R2 and the capacitor C1, and the calculation method of t2 is as shown in formula (2); the signal comparison circuit is used for shaping and amplifying an output signal y1 of the phase shift circuit, and comprises resistors (R3, R4 and R5), capacitors (C2 and C3), voltage stabilizing diodes (D2 and D3) and a comparator U2; the signal combination circuit logically combines the input signal with a signal generated by the signal comparison circuit to generate a signal which contains a dead zone and is opposite to the input signal, and the signal combination circuit consists of an OR gate U2, an AND gate U3 and a NOT gate U4; the two input signals of the and gate U3 are x and y2, respectively, and the output signal is z 1; the two input signals of the or gate U2 are x and y2, respectively, and the output signal of the or gate U2 generates an output signal z2 after passing through the not gate U4;
t1＝5R1C1 (1)
t2＝5R2C1 (2)
3. the complementary signal generating circuit with adjustable dead time of claim 2, wherein: the anode of diode D1 is connected to an input signal, denoted by x; the anode of the diode D1 is connected with the base electrode of the triode Q1, the cathode of the diode D1 is connected with one end of the resistor R1, and the other end of the resistor R1 is connected with the anode of the capacitor C1; one end of the resistor R2 is connected with the anode of the capacitor C1, and the other end of the resistor R2 is connected with the emitter of the diode Q1; the collector of the triode Q1 is connected with the negative electrode of the direct-current power supply E1; the negative electrode of the capacitor C1 is connected with the negative electrode of the direct-current voltage E1; the positive voltage of the capacitor C1 is represented by y1, and y1 is a signal obtained after the phase of the input signal x is shifted; one end of the resistor R3 is connected with the anode of the direct-current voltage E1, and the other end of the resistor R3 is connected with the anode of the capacitor C2; the anode of the capacitor C2 is connected with the cathode of the voltage stabilizing diode D2, and the cathode of the capacitor C2 is connected with the cathode of the direct-current voltage E1; the anode of the voltage-stabilizing diode D2 is connected with the cathode of the direct-current voltage E1; one end of the resistor R4 is connected with the anode of the direct-current voltage E1, and the other end of the resistor R4 is connected with the anode of the capacitor C3; the anode of the capacitor C3 is connected with the cathode of the voltage stabilizing diode D3, and the cathode of the capacitor C3 is connected with the cathode of the direct-current voltage E1; the anode of the voltage-stabilizing diode D3 is connected with the cathode of the direct-current voltage E1; the voltage of the capacitor C3 is determined by the breakdown voltage of the voltage stabilizing diode D3, the positive pole of the capacitor C3 is connected with the inverting input end of the comparator U1, and the non-inverting input end of the comparator U1 is connected with the signal y 1; one end of the resistor R5 is connected with the anode of the capacitor C2, and the other end of the resistor R5 is connected with the output end of the comparator U1; the output signal of the comparator U1 is represented by y 2; the signal combination circuit combines an input signal x of the circuit and an output signal of the comparator U1, the two input signals of the AND gate U3 are x and y2 respectively, and the output signal is z 1; the two input signals of the or gate U2 are x and y2, respectively, and the output signal of the or gate U2 generates an output signal z2 after passing through the not gate U4.
4. The complementary signal generating circuit with adjustable dead time of claim 3, wherein: the length of the dead zone is changed by changing the parameters of the resistor and the capacitor in the circuit, so that the requirements of different occasions are met, the normal work of equipment is realized, and the reliability and the stability of the system are improved.
5. The complementary signal generating circuit with adjustable dead time of claim 1, 2, 3 or 4, wherein the working method is as follows:
the method comprises the following steps: when the input signal x is at a high level, the transistor Q1 is in an off state, the input signal charges the C1 through the diode D1 and the resistor R1, and the voltage of the positive electrode of the C1 is slowly increased; when the input pulse signal is at a low level, the triode Q1 is in a conducting state, the capacitor C1 discharges through a series loop of the resistor R2 and the triode Q1, and the voltage drop of the positive electrode of the capacitor C1 is gradually reduced; thus obtaining a signal y lagging behind x by a certain phase to realize the phase shifting function; for the signal y, the charge and discharge process of the capacitor is not completed instantly, so that the rising edge and the falling edge of the signal y are not strictly vertical jump processes but have certain gradients; in addition, the charging time of the capacitor C1 is adjusted by adjusting the resistance value of R1, or the discharging time of the capacitor C1 is adjusted by adjusting the resistance value of the resistor R2, so that the purpose of adjusting the phase delay is achieved;
step two: when the signal y1 is greater than the voltage of the positive electrode of the capacitor C3, the voltage of the output end y2 of the comparator is at a high level; when the signal y1 is less than the voltage of the positive electrode of the capacitor C3, the voltage of the output end y2 of the comparator is low level; therefore, although the edge of the signal y1 changes slowly, the edge of the output y2 signal becomes steep after passing through the signal comparison circuit; the turning moment of the signal y2 is changed by selecting the voltage stabilizing diode D3 with different breakdown voltages, and the shape of the signal is further adjusted; the voltage supply voltage of the comparator is changed by selecting the voltage stabilizing diode D3 with different breakdown voltages, and the voltage amplitude value of the signal y2 is changed to be at a high level;
step three: after the signal x and the signal y2 pass through the AND gate U3, the high level time of the output z2 signal is shorter than that of the signal x; after the signal x and the signal y2 pass through the or gate U2, the time of the high level in the obtained signal is longer than that of the signal x; after passing through the not gate U4, the low level in the signal z2 is generated for a longer time than the high level of the signal x; namely, two complementary signals z1 and z2 containing dead zone are generated according to the signal x, and the dead zone time is adjustable.
6. The complementary signal generating circuit with adjustable dead time of claim 5, wherein: particularly applicable to power electronic devices including bridge structures, including half-bridge, full-bridge, and three-phase bridge circuits; the complementary signal generating circuit with the adjustable dead time generates a pair of complementary signals containing the dead time based on one path of input signals, the two signals are subjected to electrical isolation and voltage amplitude processing to drive a power electronic switching element in a power electronic device, and the length of the dead time is changed by changing parameters of a resistor and a capacitor in the circuit, so that the requirements of different occasions are met, normal operation of equipment is realized, and the reliability and the stability of a system are improved;
the power electronic switching device comprises a MOSFET and an IGBT.
CN202111368964.8A 2021-11-11 2021-11-11 Complementary signal generating circuit with adjustable dead time Pending CN114039477A (en)

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