CN114005939A - Double-ion-grid neuromorphic device and preparation method thereof - Google Patents
Double-ion-grid neuromorphic device and preparation method thereof Download PDFInfo
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- VYPSYNLAJGMNEJ-UHFFFAOYSA-N silicon dioxide Inorganic materials O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims description 7
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Abstract
The invention discloses a double-ion grid type neuromorphic device and a preparation method thereof. The device includes: a substrate; a back gate electrode formed on the substrate; a back gate dielectric which is an ionic oxide film and is formed on the back gate electrode; the two-dimensional film is formed on the back gate dielectric and positioned above the back gate electrode to be used as a channel; a source electrode and a drain electrode formed at both ends of the channel, respectively; the top gate electrode is formed on the back gate dielectric and is arranged in parallel with the channel at a certain interval, and the extending direction of the top gate electrode is orthogonal to the extending direction of the back gate electrode but is not overlapped; and the top gate medium is ionic gel, covers the channel and the top gate electrode, simultaneously applies pulse time sequences to the top gate and the back gate to regulate and control the channel conductance, realizes the quantitative increase or decrease of the device conductance range through the migration and injection of ions, simulates the regulation process of two front ends of the heterogeneous nerve synapse on one postsynaptic end, and realizes the calculation cooperative work simulation of the heterogeneous nerve morphology.
Description
Technical Field
The invention relates to the technical field of semiconductors, in particular to a double-ion-grid neuromorphic device and a preparation method thereof.
Background
The neuromorphic device is a novel electronic device with storage and calculation functions, has the capability of simulating the working mode of a human brain, and is an important component unit of a next-generation high-efficiency calculation chip. Therefore, the method has important significance for structural design and functional research and development of the neuromorphic device and enabling the neuromorphic device to have higher energy efficiency. The ion gate transistor utilizes the induction function of the two electron layers of ions and the movement of the ions to realize the regulation and control of channel current, which is very similar to the process of regulating and controlling potential by the ions in organisms. Therefore, ion gate transistors are increasingly being applied to analog neuromorphic devices.
The structure of the current common three-terminal transistor device only has a single gate electrode, and the regulation and control of a channel are completed through a gate dielectric. The single-gate transistor has limited gate control capability on a channel, has limited functions on the other hand, can only complete a single switch, and is difficult to meet the requirements of next generation of semiconductor high-gate control and multi-mode control.
Different from the traditional front-end-rear-end type nerve synapse, the heterogeneous nerve synapse can modulate a post-synaptic end through two synapse front ends, so that efficient weight iteration and calculation are realized, and the method is very important for developing normal life activities of organisms. Although the simulation of the conventional synapse function can be realized by using a single-gate transistor, the "two front ends and one back end" heterogeneous neurosynaptic function cannot be realized. Therefore, in order to simulate a complex biological nervous system with two front ends and one back end, it is important to explore a neuromorphic transistor device with a double gate to simulate a heterogeneous neurosynaptic behavior.
Disclosure of Invention
The invention discloses a double-ion grid type neuromorphic device which utilizes ionic gel as a grid medium, realizes a double-ended nerve synapse regulation function by means of a double-electron layer effect and the migration characteristic of movable ions, and is used for constructing a novel high-grid-control neuromorphic computing system.
The dual ion grid neuromorphic device includes: a substrate; a back gate electrode formed on the substrate; a back gate dielectric which is an ionic oxide film and is formed on the back gate electrode; the two-dimensional film is formed on the back gate dielectric and positioned above the back gate electrode to serve as a channel; a source electrode and a drain electrode formed at both ends of the channel, respectively; the top gate electrode is formed on the back gate dielectric and is arranged in parallel with the channel at a certain interval, the extending direction of the gate electrode is orthogonal to the extending direction of the back gate electrode, but the top gate electrode and the back gate electrode are not overlapped; and the top gate dielectric is ionic gel, covers the channel and the top gate electrode, simultaneously applies pulse time sequences to the top gate and the back gate to regulate and control the channel conductance, realizes the quantitative increase or decrease of the device conductance range through the migration and injection of ions, simulates the regulation process of two front ends of the heterogeneous nerve synapse on one post-synaptic end, and realizes the calculation and cooperative work simulation of the heterogeneous nerve morphology.
In the double ion gate neuromorphic device of the present invention, preferably, the back gate dielectric is LixSiO2、LixAlO2Or LixTi2O4。
In the double-ion-grid neuromorphic device of the present invention, preferably, the top-grid dielectric is Li-ion gel.
In the double ion grid neuromorphic device of the present invention, preferably, the two-dimensional thin film is WSe2,MoSe2,WS2Or MoS2。
In the double ion gate neuromorphic device of the present invention, preferably, the top gate electrode and the channel are spaced apart by 50 μm to 150 μm.
The invention also discloses a preparation method of the double-ion grid type neuromorphic device, which comprises the following steps: forming a back gate electrode on a substrate; forming a back gate dielectric which is an ionic oxide film on the back gate electrode; forming a two-dimensional film as a channel on the back gate dielectric, wherein the two-dimensional film is positioned above the back gate electrode; forming a source electrode and a drain electrode at two ends of the channel respectively; forming a top gate electrode on the back gate dielectric, wherein the top gate electrode and the channel are arranged in parallel at a certain interval, the extending direction of the gate electrode is orthogonal to the extending direction of the back gate electrode, but the top gate electrode and the back gate electrode do not overlap; and dripping an ionic gel solution on the channel and the top gate electrode, heating to solidify the ionic gel solution to form ionic gel as a top gate medium, simultaneously applying pulse time sequences on the top gate and the back gate to regulate and control the channel conductance, realizing the quantitative increase or decrease of the device conductance range through the migration and injection of ions, simulating the regulation process of two front ends of the heterogeneous nerve synapse to one postsynaptic end, and realizing the calculation cooperative work simulation of the heterogeneous nerve morphology.
In the method for manufacturing a double-ion-gate neuromorphic device according to the present invention, preferably, the back gate dielectric is LixSiO2、LixAlO2Or LixTi2O4。
In the method for manufacturing a dual ion grid neuromorphic device according to the present invention, preferably, the solute of the ionic gel solution is LiClO controlled to have a mass ratio of 1:84Crystal and polyvinyl alcohol, and the solvent is deionized water with the concentration of 0.05 g/ml-2 g/ml.
In the method for preparing the double-ion-grid neuromorphic device, preferably, the two-dimensional film is WSe2,MoSe2,WS2Or MoS2。
In the preparation method of the double-ion grid type neuromorphic device, preferably, the heating temperature is 60-130 ℃, and the heating time is 5-20 min.
Has the advantages that:
(1) the traditional single-gate working mode is broken through, double-gate parallel operation of the top gate and the back gate is introduced, the gate control capability of the device can be improved, and the method has great potential in the aspect of improving the calculation efficiency.
(2) The ionic gel is used as a gate dielectric layer to prepare a neuromorphic transistor, and the conductance modulation of electronic synapses is realized by utilizing the movement of ions in the gel, so that the method is closer to the weight regulation and calculation process in the actual human brain.
(3) The appearance of the heterogeneous dual-ion grid neuromorphic device enables neuromorphic calculation to be more flexible and controllable, realizes integration of storage and calculation, is suitable for more complex cooperative calculation and weight alternation, and provides guidance for construction of a next-generation heterogeneous neuromorphic system.
Drawings
Fig. 1 is a flow chart of a method for manufacturing a double ion grid neuromorphic device.
Fig. 2 is a schematic view of the device structure after the back gate electrode is formed.
Fig. 3 is a schematic diagram of the device structure after the back gate dielectric is formed.
Fig. 4 is a schematic diagram of the device structure after forming a two-dimensional material layer.
Fig. 5 is a schematic structural diagram of the device after source-drain electrodes and top gate electrodes are formed.
Fig. 6 is a schematic diagram of the device structure after the top gate dielectric is formed.
Fig. 7 is a schematic diagram of the operating principle of a bimorph device of the double ion grid type.
Detailed Description
In order to make the objects, technical solutions and advantages of the present invention more clearly and completely understood, the technical solutions in the embodiments of the present invention will be described below with reference to the accompanying drawings in the embodiments of the present invention, and it should be understood that the specific embodiments described herein are only for explaining the present invention and are not intended to limit the present invention. The described embodiments are only some embodiments of the invention, not all embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
In the description of the present invention, it should be noted that the terms "upper", "lower", "vertical", "horizontal", and the like indicate orientations or positional relationships based on the orientations or positional relationships shown in the drawings, and are only for convenience in describing the present invention and simplifying the description, but do not indicate or imply that the referred device or element must have a specific orientation, be constructed in a specific orientation, and be operated, and thus, should not be construed as limiting the present invention. Furthermore, the terms "first" and "second" are used for descriptive purposes only and are not to be construed as indicating or implying relative importance.
Furthermore, numerous specific details of the invention, such as structure, materials, dimensions, processing techniques and techniques of the devices are described below in order to provide a more thorough understanding of the invention. However, as will be understood by those skilled in the art, the present invention may be practiced without these specific details. Unless otherwise specified below, each part in the device may be formed of a material known to those skilled in the art, or a material having a similar function developed in the future may be used.
Fig. 1 is a flow chart of a method for manufacturing a double ion grid neuromorphic device. As shown in fig. 1, the method for preparing the double ion grid neuromorphic device comprises the following steps:
step S1, a 1.5cm × 1.5cm silicon oxide label sheet is prepared as the substrate 100 for preparing the dual ion grid neuromorphic device. Preferred substrates may be selected from silicon oxide wafers, silicon wafers, glass, sapphire, and the like. Then, a back gate electrode Pd101 having a thickness of 50nm was prepared on the substrate 100 by using electron beam lithography and magnetron sputtering techniques, and the resulting structure was as shown in fig. 2. The back gate electrode material can also be selected from Pt, Au and the like; the thickness is preferably in the range of 30nm to 100 nm.
Step S2, growing Li with the thickness of 50nm by using a magnetron sputtering methodxSiO2As a back gate dielectric 102, the resulting structure is shown in fig. 3. The material of the back gate dielectric can also be LixAlO2、LixTi2O4Etc.; the thickness is preferably 30nm to 80 nm.
Step S3, using a two-dimensional film transfer platform to transfer WSe with the thickness of 5nm2The two-dimensional film 103 is transferred onto the back gate as the channel material of the neuromorphic device, and the resulting structure is shown in fig. 4. The channel material is preferably MoSe2,WS2,MoS2Etc.; the channel thickness is preferably 1nm to 10 nm.
In step S4, Ti/Pd is grown on both ends of the channel by using electron beam lithography and magnetron sputtering technique as the source electrode 104 and the drain electrode 105, and at the same time Ti/Pd is grown at a distance of 100 μm from the channel as the top gate electrode 107, and the resulting structure is shown in fig. 5. The extending direction of the formed top gate electrode 107 is parallel to the extending direction of the channel, the extending direction of the top gate electrode 107 is orthogonal to the extending direction of the back gate electrode 101, but the top gate electrode 107 and the back gate electrode 101 do not overlap, that is, the projections of the top gate electrode 107 and the back gate electrode 101 on the same horizontal plane do not cross and overlap each other. The source and drain electrode material can also be Ti/Au, Cr/Pd, Cr/Au, Ni/Pd, Ni/Au, etc.; the thickness is preferably 5-15 nm/30-100 nm; the distance between the top electrode and the channel is preferably 50-150 microns; the area of the source-drain electrode and the top-gate electrode is preferably 60 μm × 60 μm to 150 μm × 150 μm, and more preferably 100 μm × 100 μm.
Step S5, dripping Li ion gel solution on the two-dimensional film 103 and the top gate electrode 107 by using a liquid transfer gun, heating for 10min on a hot plate at 100 ℃ after dripping, so that the ion gel is solidified to be used as a top gate medium 108, and completing the preparation of the double-ion gate type neuromorphic device, wherein the obtained structure is shown in FIG. 6. Wherein, the solute in the ionic gel solution: LiClO4Crystal + polyvinyl alcohol (LiClO)4And polyvinyl alcohol at a mass ratio of 1:8), solvent in the solution: deionized water. The concentration of the solution is preferably 0.05g/ml to 2g/ml, and more preferably 0.1 g/ml. The baking temperature is preferably 60-130 ℃; the heating time is preferably 5-20 min.
As shown in fig. 7, the channel conductance is controlled by applying pulse timing to the top gate and the back gate simultaneously, and the quantitative increase or decrease of the device conductance range can be realized by the migration and injection of ions, which is similar to the regulation process of two front ends of a heterogeneous nerve synapse to a post-synaptic end, thereby realizing the cooperative work simulation such as heterogeneous nerve morphology calculation.
The above description is only for the specific embodiment of the present invention, but the scope of the present invention is not limited thereto, and any changes or substitutions that can be easily conceived by those skilled in the art within the technical scope of the present invention are included in the scope of the present invention.
Claims (10)
1. A double ion grid neuromorphic device characterized in that,
the method comprises the following steps:
a substrate;
a back gate electrode formed on the substrate;
a back gate dielectric which is an ionic oxide film and is formed on the back gate electrode;
the two-dimensional film is formed on the back gate dielectric and positioned above the back gate electrode to serve as a channel;
a source electrode and a drain electrode formed at both ends of the channel, respectively;
the top gate electrode is formed on the back gate dielectric and is arranged in parallel with the channel at a certain interval, the extending direction of the top gate electrode is orthogonal to the extending direction of the back gate electrode, but the top gate electrode and the back gate electrode are not overlapped;
a top gate dielectric, which is an ionic gel, covering the channel and the top gate electrode,
pulse time sequences are simultaneously applied to the top gate and the back gate to regulate and control channel conductance, the quantitative increase or decrease of the conductance range of the device is realized through the migration and injection of ions, the regulation process of two front ends of the heterogeneous nerve synapse to one post-synaptic end is simulated, and the heterogeneous nerve morphology calculation cooperative work simulation is realized.
2. The dual ion grid neuromorphic device of claim 1,
the back gate dielectric is LixSiO2、LixAlO2Or LixTi2O4。
3. The dual ion grid neuromorphic device of claim 1,
the top gate medium is Li ion gel.
4. The dual ion grid neuromorphic device of claim 1,
the two-dimensional film is WSe2,MoSe2,WS2Or MoS2。
5. The dual ion grid neuromorphic device of claim 1,
the distance between the top gate electrode and the channel is 50-150 mu m.
6. A method for preparing a double ion grid type neuromorphic device is characterized in that,
the method comprises the following steps:
forming a back gate electrode on a substrate;
forming a back gate dielectric which is an ionic oxide film on the back gate electrode;
forming a two-dimensional film as a channel on the back gate dielectric, wherein the two-dimensional film is positioned above the back gate electrode;
forming a source electrode and a drain electrode at two ends of the channel respectively;
forming a top gate electrode on the back gate dielectric, wherein the top gate electrode and the channel are arranged in parallel at a certain interval, the extending direction of the top gate electrode is orthogonal to the extending direction of the back gate electrode, but the top gate electrode and the back gate electrode are not overlapped;
dropping an ionic gel solution on the channel and the top gate electrode, heating to solidify the ionic gel solution to form ionic gel as a top gate dielectric,
pulse time sequences are simultaneously applied to the top gate and the back gate to regulate and control channel conductance, the quantitative increase or decrease of the conductance range of the device is realized through the migration and injection of ions, the regulation process of two front ends of the heterogeneous nerve synapse to one post-synaptic end is simulated, and the heterogeneous nerve morphology calculation cooperative work simulation is realized.
7. The method of preparing a dual ion grid neuromorphic device of claim 6,
the back gate dielectricIs LixSiO2、LixAlO2Or LixTi2O4。
8. The method of preparing a dual ion grid neuromorphic device of claim 6,
the solute of the ionic gel solution is LiClO with the mass ratio controlled at 1:84Crystal and polyvinyl alcohol, and the solvent is deionized water with the concentration of 0.05 g/ml-2 g/ml.
9. The method of preparing a dual ion grid neuromorphic device of claim 6,
the two-dimensional film is WSe2,MoSe2,WS2Or MoS2。
10. The method of preparing a dual ion grid neuromorphic device of claim 6,
the heating temperature is 60-130 ℃, and the heating time is 5-20 min.
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CN114744060A (en) * | 2022-04-14 | 2022-07-12 | 浙江理工大学 | Power grid corona monitor and preparation method thereof |
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CN114744060A (en) * | 2022-04-14 | 2022-07-12 | 浙江理工大学 | Power grid corona monitor and preparation method thereof |
CN114744060B (en) * | 2022-04-14 | 2023-08-29 | 浙江理工大学 | Electric network corona monitor and preparation method thereof |
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