CN113993227B - Communication module and terminal equipment - Google Patents
Communication module and terminal equipment Download PDFInfo
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- CN113993227B CN113993227B CN202111173277.0A CN202111173277A CN113993227B CN 113993227 B CN113993227 B CN 113993227B CN 202111173277 A CN202111173277 A CN 202111173277A CN 113993227 B CN113993227 B CN 113993227B
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- 238000004891 communication Methods 0.000 title claims abstract description 225
- 238000002955 isolation Methods 0.000 claims abstract description 126
- 239000003990 capacitor Substances 0.000 claims description 46
- 238000010586 diagram Methods 0.000 description 5
- 238000004590 computer program Methods 0.000 description 3
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- 238000010295 mobile communication Methods 0.000 description 2
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04W—WIRELESS COMMUNICATION NETWORKS
- H04W88/00—Devices specially adapted for wireless communication networks, e.g. terminals, base stations or access point devices
- H04W88/02—Terminal devices
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Abstract
The application discloses a communication module and terminal equipment, wherein the communication module comprises a communication module and an antenna tuning module; the communication module comprises a first fixed pin, a first direct current signal communication unit, a first clock signal communication unit and a first isolation unit; the antenna tuning module comprises a second direct current signal communication unit, a second clock signal communication unit and a second isolation unit; the first direct current signal communication unit transmits direct current signals with the second direct current signal communication unit through the first isolation unit, the first fixed pin and the second isolation unit; the first clock signal communication unit transmits clock signals with the second clock signal communication unit through the first isolation unit, the first fixed pin and the second isolation unit; the first isolation unit and the second isolation unit isolate the direct current signal from the clock signal. The direct current signal and the clock signal share the first fixed pin and can be normally transmitted, so that the communication module adopting the M.2 interface can meet the MIPI standard communication requirement.
Description
Technical Field
The present application relates to the field of communications technologies, and in particular, to a communication module and a terminal device.
Background
With the development of communication technology, terminal devices have evolved from the original 2G communication age to 3G, 4G, even 5G communication, and so on. Accordingly, corresponding fittings are also required to be developed to meet the higher-level communication demands. The antenna is one of them, in the 3G communication era, the frequency range of the antenna is only required to meet 700MHz to 2200MHz, and in the 4G and 5G communication era, the frequency range of the antenna is required to reach 6G at the highest.
In order to enable the antenna to meet the requirements of higher frequency ranges, an antenna tuning switch (antenna tuning switching) is generated, and the antenna tuning switch can better consider the performance index of a wide frequency range. The current antenna tuning switch needs to communicate with the communication module through the mobile industry processor interface (mobile industry processor interface, MIPI) standard, however, the communication channel reserved by the m.2 interface adopted by the current communication module cannot meet the MIPI standard communication requirement.
Disclosure of Invention
The application aims to provide a communication module and terminal equipment, so that a communication channel reserved by M.2 and an antenna tuning switch can communicate according to MIPI standard.
The first aspect of the present application provides a communication module, including: a communication module and an antenna tuning module; the communication module comprises a first fixed pin, a first direct current signal communication unit, a first clock signal communication unit and a first isolation unit; the antenna tuning module comprises a second direct current signal communication unit, a second clock signal communication unit and a second isolation unit; the first direct current signal communication unit and the first clock signal communication unit are respectively connected with one end of the first isolation unit; the other end of the first isolation unit is connected with one end of the first fixed pin; the other end of the first fixed pin is connected with one end of a second isolation unit, and the other end of the second isolation unit is respectively connected with a second direct current signal communication unit and a second clock signal communication unit; the first direct current signal communication unit sequentially passes through the first isolation unit, the first fixed pin and the second isolation unit, and transmits direct current signals with the second direct current signal communication unit; the first clock signal communication unit sequentially passes through the first isolation unit, the first fixed pin and the second isolation unit, and transmits clock signals with the second clock signal communication unit; the first isolation unit and the second isolation unit are used for isolating the direct current signal and the clock signal.
In one embodiment, the first isolation unit includes a first ac isolation portion and a first dc isolation portion; the first direct current signal communication unit is connected with one end of the first alternating current isolation part, and the first clock signal communication unit is connected with one end of the first direct current isolation part; the other ends of the first alternating current isolation part and the first direct current isolation part are respectively connected with the first fixed pin.
In one embodiment, the first ac isolation portion includes a first inductor and the first dc isolation portion includes a first capacitor; the first direct current signal communication unit is connected with one end of a first inductor, the first clock signal communication unit is connected with one end of a first capacitor, and the other end of the first inductor is connected with one end of a first fixed pin respectively with the other end of the first capacitor.
In one embodiment, the first ac isolation portion includes a plurality of first inductors connected in series, and the first dc isolation portion includes a plurality of first capacitors connected in parallel; the first direct current signal communication unit is connected with one ends of a plurality of first inductors, the first clock signal communication unit is connected with one ends of a plurality of first capacitors, and the other ends of the plurality of first inductors and the other ends of the plurality of first capacitors are respectively connected with one ends of the first fixed pins.
In one embodiment, the second isolation unit includes a second ac isolation portion and a second dc isolation portion; the other end of the first fixed pin is respectively connected with one end of the second alternating current isolation part and one end of the second direct current isolation part; the other end of the second alternating current isolation part is connected with the second direct current signal communication unit, and the other end of the second direct current isolation part is connected with the second clock signal communication unit.
In one embodiment, the second ac isolation portion includes a second inductor and the second dc isolation portion includes a second capacitor; the other end of the first fixed pin is connected with one end of a second inductor and one end of a second capacitor respectively, and the other end of the second inductor is connected with a second direct current signal communication unit; the other end of the second capacitor is connected with the second clock signal communication unit.
In one embodiment, the second ac isolation portion includes a plurality of second inductors connected in series, and the second dc isolation portion includes a plurality of second capacitors connected in parallel; the other end of the first fixed pin is respectively connected with one ends of a plurality of second inductors and one ends of a plurality of second capacitors, and the other ends of the plurality of second inductors are connected with a second direct current signal communication unit; the other ends of the second capacitors are connected with the second clock signal communication unit.
In one embodiment, the communication module further includes a second fixed pin and a first data signal communication unit, and the antenna tuning module further includes a second data signal communication unit; the first data signal communication unit, the second fixed pin and the second data signal communication unit are connected in sequence; the first data signal communication unit transmits data signals with the second data signal communication unit through the second fixed pin.
A second aspect of the present application provides a terminal device, including any one of the communication modules of the first aspect of the present application.
The communication module provided by the application has the advantages that the first direct current signal communication unit and the second direct current signal communication unit are communicated through the first fixed pin, the first clock signal communication unit and the second clock signal communication unit are also communicated through the first fixed pin, namely, the direct current signal and the clock signal share the first fixed pin, and the first isolation unit and the second isolation unit are arranged to isolate the direct current signal from the clock signal, so that the direct current signal and the clock signal can be normally transmitted under the condition of sharing the first fixed pin, and the communication module adopting the M.2 interface can meet the MIPI standard communication requirement.
Drawings
In order to more clearly illustrate the technical solution of the present application, the drawings that are used in the embodiments will be briefly described below.
Fig. 1 is a block diagram of a communication module according to an embodiment of the application.
Fig. 2 is a block diagram of a communication module according to another embodiment of the present application.
Fig. 3 is a block diagram of a communication module according to another embodiment of the present application.
Fig. 4 is a block diagram of a communication module according to another embodiment of the present application.
Fig. 5 is a block diagram of a terminal device according to an embodiment of the present application.
Reference numerals illustrate:
The communication module 100, the communication module 110, the first fixed pin 111, the first dc signal communication unit 112, the first clock signal communication unit 113, the first isolation unit 114, the first ac isolation unit 1141, the first dc isolation unit 1142, the second fixed pin 115, the first data signal communication unit 116, the antenna tuning module 120, the second dc signal communication unit 121, the second clock signal communication unit 122, the second isolation unit 123, the second ac isolation unit 1231, the second dc isolation unit 1232, the second data signal communication unit 124, the first inductor L1, the first capacitor C1, the second inductor L2, the second capacitor C2, the terminal device 200, the system bus 201, the processor 202, the nonvolatile memory 203, the internal memory 204, the network interface 205, the display screen 206, the input device 207, the radio frequency unit 208, the operating system 209, the computer program 210, and the antenna 211.
DETAILED DESCRIPTION OF EMBODIMENT (S) OF INVENTION
The technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present application.
When the communication module and the antenna tuning module 102 communicate through the MIPI standard, three DATA including the clock signal CLK, the dc signal VIO and the DATA signal DATA need to be transmitted, so in theory, three communication channels need to be provided between the communication module and the antenna tuning module 102. However, the current communication module adopts an m.2 communication module 101, wherein the definition of PINs (PIN PINs) of the m.2 communication module 101 is already fixed in advance, wherein PINs 56 are defined for transmitting clock signals, PINs 58 are defined for transmitting direct current signals, and channels for transmitting direct current signals are absent.
For the above reasons, referring to fig. 1, an embodiment of the present application provides a communication module 100, including: a communication module 110 and an antenna tuning module 120.
The communication module 110 includes a first fixed pin 111, a first dc signal communication unit 112, a first clock signal communication unit 113, and a first isolation unit 114; the antenna tuning module 120 includes a second dc signal communication unit 121, a second clock signal communication unit 122, and a second isolation unit 123. The communication module 100 is an m.2 communication module 110, and the first fixed PIN 111 is a PIN56 PIN preset by the m.2 communication module 110. The first and second dc signal communication units 112 and 121 may communicate with each other to transmit dc signals. The first clock signal communication unit 113 and the second clock signal communication unit 122 may communicate with each other to transmit clock signals.
The first dc signal communication unit 112 and the first clock signal communication unit 113 are respectively connected to one end of the first isolation unit 114; the other end of the first isolation unit 114 is connected to one end of the first fixed pin 111; the other end of the first fixed pin 111 is connected to one end of the second isolation unit 123, and the other end of the second isolation unit 123 is connected to the second dc signal communication unit 121 and the second clock signal communication unit 122, respectively.
The first dc signal communication unit 112 sequentially passes through the first isolation unit 114, the first fixed pin 111, and the second isolation unit 123, and performs dc signal transmission with the second dc signal communication unit 121; the first clock signal communication unit 113 sequentially passes through the first isolation unit 114, the first fixed pin 111 and the second isolation unit 123, and performs clock signal transmission with the second clock signal communication unit 122; the first isolation unit 114 and the second isolation unit 123 are used for isolating the direct current signal from the clock signal. The direct current signal is the direct current signal CLK required for communication according to MIPI standard, and the clock signal is the clock signal CLK required for communication according to MIPI standard.
As can be seen from the above, when the first dc signal communication unit 112 and the second dc signal communication unit 121 communicate, the first fixed pin 111 is passed, and when the first clock signal communication unit 113 and the second clock signal communication unit 122 communicate, the first fixed pin 111 is also passed. And under the isolation of the first isolation unit 114 and the second isolation unit 123, the direct current signal and the clock signal are isolated from each other, and can be normally transmitted. Therefore, in the communication module 100 provided by the embodiment of the application, the first direct current signal communication unit 112 and the second direct current signal communication unit 121 are communicated through the first fixed pin 111, and the first clock signal communication unit 113 and the second clock signal communication unit 122 are also communicated through the first fixed pin 111, that is, the direct current signal and the clock signal share the first fixed pin 111, and the first isolation unit 114 and the second isolation unit 123 are provided to isolate the direct current signal and the clock signal, so that the direct current signal and the clock signal can be normally transmitted under the condition of sharing the first fixed pin 111, and the communication module 110 adopting the m.2 interface can meet the communication requirement of the MIPI standard.
In one embodiment, referring to fig. 2, the first isolation unit 114 includes a first ac isolation portion 1141 and a first dc isolation portion 1142. The first dc signal communication unit 112 is connected to one end of the first ac isolation portion 1141, and the first clock signal communication unit 113 is connected to one end of the first dc isolation portion 1142; the other ends of the first ac isolation portion 1141 and the first dc isolation portion 1142 are connected to the first fixed pin 111, respectively.
Therefore, the first ac isolation portion 1141 is connected between the first dc signal communication unit 112 and the first fixed pin 111 to ensure that the dc signal can be transmitted to the first dc signal communication unit 112, and meanwhile, the clock signal is blocked to prevent the clock signal from being transmitted to the first dc signal communication unit 112. The first dc isolation part 1142 is connected between the first clock signal communication unit 113 and the first fixed pin 111 to ensure that the clock signal can be transmitted to the first clock signal communication unit 113, and meanwhile, blocks the dc signal to prevent the dc signal from being transmitted to the first clock signal communication unit 113.
In one embodiment, referring to fig. 2 and 3, the first ac isolation portion 1141 includes a first inductor L1, and the first dc isolation portion 1142 includes a first capacitor C1. The first dc signal communication unit 112 is connected to one end of the first inductor L1, the first clock signal communication unit 113 is connected to one end of the first capacitor C1, and the other end of the first inductor L1 and the other end of the first capacitor C1 are connected to one end of the first fixed pin 111, respectively.
Therefore, the first inductor L1 is connected between the first dc signal communication unit 112 and the first fixed pin 111, and the dc signal can be ensured to be transmitted to the first dc signal communication unit 112 by using the dc-to-ac isolation performance of the first inductor L1, and meanwhile, the clock signal can be blocked to prevent the clock signal from being transmitted to the first dc signal communication unit 112. The first capacitor C1 is connected between the first clock signal communication unit 113 and the first fixed pin 111, and ensures that the clock signal can be transmitted to the first clock signal communication unit 113 by using the ac blocking performance of the first capacitor C1, and simultaneously isolates the dc signal to prevent the dc signal from being transmitted to the first clock signal communication unit 113.
In another embodiment, referring to fig. 4, the first ac isolation portion 1141 includes a plurality of first inductors L1 connected in series, and the first dc isolation portion 1142 includes a plurality of first capacitors C1 connected in parallel, where a plurality means two or more, and two are taken as an example. The first dc signal communication unit 112 is connected to one ends of the plurality of first inductors L1, the first clock signal communication unit 113 is connected to one ends of the plurality of first capacitors C1, and the other ends of the plurality of first inductors L1 and the other ends of the plurality of first capacitors C1 are respectively connected to one ends of the first fixed pins 111.
The inductance of the plurality of series-connected first inductors L1 is significantly increased compared to the single first inductor L1, so that the plurality of series-connected first inductors L1 can better isolate the ac signal and prevent the clock signal from being cross-linked to the first dc signal communication unit 112. Compared with a single first capacitor C1, the plurality of parallel first capacitors C1 have significantly increased capacitance, so that the DC signals can be better isolated, and the DC signals can be prevented from being crossly connected to the first clock signal communication unit 113.
In one embodiment, referring to fig. 2 and 3, the second isolation unit 123 includes a second ac isolation part 1231 and a second dc isolation part 1232; the other end of the first fixed pin 111 is connected to one end of the second ac isolating part 1231 and one end of the second dc isolating part 1232, respectively; the other end of the second ac isolation part 1231 is connected to the second dc signal communication unit 121, and the other end of the second dc isolation part 1232 is connected to the second clock signal communication unit 122.
Therefore, the second ac isolation portion 1231 is connected between the second dc signal communication unit 121 and the first fixed pin 111, so as to ensure that the dc signal can be transmitted to the second dc signal communication unit 121, and at the same time, the clock signal is blocked, and the clock signal is prevented from being transmitted to the second dc signal communication unit 121. The second dc isolation part 1232 is connected between the second clock signal communication unit 122 and the first fixed pin 111 to ensure that the clock signal can be transmitted to the second clock signal communication unit 122, and meanwhile, blocks the dc signal and prevents the dc signal from being transmitted to the second clock signal communication unit 122.
In one embodiment, referring to fig. 3, the second ac isolation portion 1231 includes a second inductor L2, and the second dc isolation portion 1232 includes a second capacitor C2; the other end of the first fixed pin 111 is connected with one end of a second inductor L2 and one end of a second capacitor C2 respectively, and the other end of the second inductor L2 is connected with a second direct current signal communication unit 121; the other end of the second capacitor C2 is connected to the second clock signal communication unit 122.
Therefore, the second inductor L2 is connected between the second dc signal communication unit 121 and the first fixed pin 111, and the dc-to-ac performance of the second inductor L2 is utilized to ensure that the dc signal can be transmitted to the second dc signal communication unit 121, and meanwhile, the clock signal can be blocked, so that the clock signal can be prevented from being transmitted to the second dc signal communication unit 121. The second capacitor C2 is connected between the second clock signal communication unit 122 and the first fixed pin 111, and ensures that the clock signal can be transmitted to the second clock signal communication unit 122 by using the performance of the second capacitor C2 that the alternating current is blocked from direct current, and at the same time, isolates the direct current signal, and prevents the direct current signal from being transmitted to the second clock signal communication unit 122.
In another embodiment, referring to fig. 4, the second ac isolation portion 1231 includes a plurality of second inductors L2 connected in series, and the second dc isolation portion 1232 includes a plurality of second capacitors C2 connected in parallel, wherein the plurality means two or more, and two are taken as an example. The other ends of the first fixed pins 111 are respectively connected with one ends of a plurality of second inductors L2 and one ends of a plurality of second capacitors C2, and the other ends of the plurality of second inductors L2 are connected with a second direct current signal communication unit 121; the other ends of the plurality of second capacitors C2 are connected to the second clock signal communication unit 122.
The inductance of the plurality of series-connected second inductors L2 is significantly increased compared to the single second inductor L2, so that the plurality of series-connected second inductors L2 can better isolate the ac signal and prevent the clock signal from being cross-linked to the second dc signal communication unit 121. Compared with a single second capacitor C2, the plurality of parallel second capacitors C2 have significantly increased capacitance, so that the DC signal can be better isolated, and the DC signal is prevented from being crossly connected to the second clock signal communication unit 122.
In one embodiment, the communication module 110 further includes a second fixed pin 115 and a first data signal communication unit 116, and the antenna tuning module 120 further includes a second data signal communication unit 124, where the first data signal communication unit 116 and the second data signal communication unit 124 can communicate for transmitting data signals. The first data signal communication unit 116, the second fixed pin 115, and the second data signal communication unit 124 are sequentially connected; the first data signal communication unit 116 performs data signal transmission with the second data signal communication unit 124 through the second fixed pin 115. The second fixed PIN 115 is PIN58 defined by the m.2 communication module 110, and the data module can be transmitted between the first data signal communication unit 116 and the second data signal communication unit 124.
The embodiment of the application also provides a terminal device 200, which comprises the communication module 100 in any embodiment of the application.
Specifically, referring to fig. 5, the terminal device 200 may include devices such as a mobile phone, a tablet computer, a notebook computer, a palm computer, a Personal digital assistant (Personal DIGITAL ASSISTANT, PDA), a Portable media player (Portable MEDIA PLAYER, PMP), a navigation apparatus, a wearable device, a smart bracelet, a pedometer, and a fixed terminal such as a digital TV, a desktop computer, and the like.
The terminal device 200 may specifically include: a processor 202, a memory, a network interface 205, a display 206, an input device 207, and a radio frequency unit 208 connected via a system bus 201. The processor 202 is a control center of the terminal device 200, connects respective parts of the entire terminal device 200 using various interfaces and lines, and performs various functions of the terminal device 200 and processes data by running or executing software programs and/or modules stored in a memory, and calling data stored in the memory, thereby performing overall monitoring of the terminal device 200.
The memory may be used to store software programs as well as various data, and specifically includes a nonvolatile storage medium 203 and an internal memory 204. The nonvolatile storage medium 203 stores an operating system 209 and a computer program 210. The internal memory 204 provides an environment for the operation of the operating system 209 and computer programs 210 in the non-volatile storage medium 203. The memory may be in particular a high-speed random access memory, or a non-volatile memory or the like, such as a magnetic disk storage device, a flash memory device, or other volatile solid-state storage device.
The network interface 205 is used for communication with an external terminal through a network connection. Specifically, the network interface 205 may receive an input from an external device, or may transmit data between the terminal apparatus 200 and the external device.
The display 206 may be a liquid crystal display 206 or an electronic ink display 206. The input device 207 of the terminal device 200 may be a touch layer covered on the display screen 206, or may be a key, a track ball or a touch pad arranged on the housing of the terminal device 200, or may be an external keyboard, a touch pad or a mouse.
The radio frequency unit 208 may be used for receiving and transmitting signals during the information receiving or communication process, specifically, receiving downlink information of the base station, and then processing the downlink information for the processor 202; and, the uplink data is transmitted to the base station. In general, the radio unit 208 includes the communication module 100, an antenna 211, a transceiver, a low noise amplifier, a duplexer, and the like. The radio unit 208 may use any communication standard or protocol, such as: GSM (Global System of Mobile communication, global system for mobile communications), GPRS (GENERAL PACKET Radio Service), CDMA2000 (Code Division Multiple Access, code Division multiple access 2000), WCDMA (Wideband Code Division Multiple Access ), TD-SCDMA (Time Division-Synchronous Code Division Multiple Access, time Division synchronous code Division multiple access), FDD-LTE (Frequency Division Duplexing-Long Term Evolution, frequency Division duplex long term evolution), TDD-LTE (Time Division Duplexing-Long Term Evolution, time Division duplex long term evolution), and the like.
The foregoing has outlined rather broadly the more detailed description of embodiments of the application in order that the detailed description of the principles and embodiments of the application may be implemented in order that the detailed description of the embodiments may be better understood.
Claims (9)
1. A communication module, comprising: a communication module and an antenna tuning module; the communication module is an M.2 communication module;
The communication module comprises a first fixed pin, a first direct current signal communication unit, a first clock signal communication unit and a first isolation unit; the antenna tuning module comprises a second direct current signal communication unit, a second clock signal communication unit and a second isolation unit; the first fixed PIN is a PIN56 PIN preset by the M.2 communication module;
The first direct current signal communication unit and the first clock signal communication unit are respectively connected with one end of the first isolation unit; the other end of the first isolation unit is connected with one end of the first fixed pin; the other end of the first fixed pin is connected with one end of the second isolation unit, and the other end of the second isolation unit is respectively connected with the second direct current signal communication unit and the second clock signal communication unit;
The first direct current signal communication unit sequentially passes through the first isolation unit, the first fixed pin and the second isolation unit, and transmits direct current signals with the second direct current signal communication unit; the first clock signal communication unit sequentially passes through the first isolation unit, the first fixed pin and the second isolation unit to transmit clock signals with the second clock signal communication unit; the first isolation unit and the second isolation unit are used for isolating the direct current signal and the clock signal;
The first fixed pin is shared when the direct current signal and the clock signal are transmitted.
2. The communication module of claim 1, wherein the first isolation unit comprises a first ac isolation portion and a first dc isolation portion;
the first direct current signal communication unit is connected with one end of the first alternating current isolation part, and the first clock signal communication unit is connected with one end of the first direct current isolation part; the other ends of the first alternating current isolation part and the first direct current isolation part are respectively connected with the first fixed pin.
3. The communication module of claim 2, wherein the first ac isolation portion comprises a first inductor and the first dc isolation portion comprises a first capacitor;
The first direct current signal communication unit is connected with one end of the first inductor, the first clock signal communication unit is connected with one end of the first capacitor, and the other end of the first inductor and the other end of the first capacitor are respectively connected with one end of the first fixed pin.
4. The communication module of claim 2, wherein the first ac isolation portion comprises a plurality of first inductors in series, and the first dc isolation portion comprises a plurality of first capacitors in parallel;
The first direct current signal communication unit is connected with one ends of a plurality of first inductors, the first clock signal communication unit is connected with one ends of a plurality of first capacitors, and the other ends of the first inductors and the other ends of the first capacitors are respectively connected with one ends of first fixed pins.
5. The communication module of claim 1, wherein the second isolation unit comprises a second ac isolation portion and a second dc isolation portion;
the other end of the first fixed pin is respectively connected with one end of the second alternating current isolation part and one end of the second direct current isolation part;
The other end of the second alternating current isolation part is connected with the second direct current signal communication unit, and the other end of the second direct current isolation part is connected with the second clock signal communication unit.
6. The communication module of claim 5, wherein the second ac isolation portion comprises a second inductor and the second dc isolation portion comprises a second capacitor;
The other end of the first fixed pin is connected with one end of the second inductor and one end of the second capacitor respectively, and the other end of the second inductor is connected with the second direct current signal communication unit; the other end of the second capacitor is connected with the second clock signal communication unit.
7. The communication module of claim 5, wherein the second ac isolation portion comprises a plurality of second inductors in series, and the second dc isolation portion comprises a plurality of second capacitors in parallel;
The other ends of the first fixed pins are respectively connected with one ends of a plurality of second inductors and one ends of a plurality of second capacitors, and the other ends of the second inductors are connected with the second direct current signal communication unit; the other ends of the second capacitors are connected with the second clock signal communication unit.
8. The communication module according to any one of claims 1 to 7, wherein the communication module further comprises a second fixed pin and a first data signal communication unit, and the antenna tuning module further comprises a second data signal communication unit;
The first data signal communication unit, the second fixed pin and the second data signal communication unit are sequentially connected; the first data signal communication unit transmits data signals with the second data signal communication unit through the second fixed pin.
9. A terminal device comprising a communication module according to any one of claims 1 to 8.
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| CN202111173277.0A CN113993227B (en) | 2021-10-08 | 2021-10-08 | Communication module and terminal equipment |
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| CN111541051A (en) * | 2020-05-11 | 2020-08-14 | Oppo广东移动通信有限公司 | Antenna and communication device |
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