CN113960676B - FPGA-based time domain aviation electromagnetic multi-wave pulse transmitting device - Google Patents
FPGA-based time domain aviation electromagnetic multi-wave pulse transmitting device Download PDFInfo
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Abstract
The invention provides a time domain aviation electromagnetic multi-wave pulse transmitting device based on an FPGA, which comprises: the control switch module is connected with the FPGA module, and the FPGA module is connected with the driving signal generating circuit. The time domain aviation electromagnetic multi-wave pulse transmitting device based on the FPGA provided by the invention controls the waveform, the frequency and the pulse width of the transmitting current through pulse frequency modulation or pulse width modulation, and can generate a multi-high-quality bipolar multi-pulse waveform with high precision and strong controllability.
Description
Technical Field
The invention relates to the technical field of electromagnetic exploration, in particular to a time domain aviation electromagnetic multi-wave pulse transmitting device based on an FPGA.
Background
The Time domain aviation electromagnetic method (airwave Time-domain Electromagnetic, ATEM for short) is a method technology for carrying electromagnetic investigation equipment on a flight platform to carry out aviation transient electromagnetic measurement. The electromagnetic pulse signal is transmitted to the underground through the transmitting coil, and the distribution condition of the underground electrical structure is obtained through analyzing the electromagnetic response generated by the underground medium, so that the method has the advantages of being efficient, free of the need of ground personnel entering a work area and the like, is suitable for carrying out operation in complex areas such as marshes, deserts and forests, and is widely applied to the fields of mineral exploration, water resource and environment investigation, geological disaster prediction and the like.
The development of a time domain aviation electromagnetic system is advanced towards the direction of improving the detection depth of the system, meanwhile, shallow resolution capability of the system is also gradually emphasized, the transmitter is required to have broadband excitation signal transmitting capability when deep and shallow information is obtained in one flight, a stronger low-frequency signal is required to be used for obtaining the deep information, abundant high-frequency information is required to be used for finely describing a shallow geological structure, the shallow resolution is considered while a large-depth detection target is realized, and the space-time and aviation electromagnetic transmission is realized by adopting a half sine wave resonance transmitting technology commonly in the prior art, so that the deep information and the shallow resolution cannot be considered simultaneously. Therefore, it is necessary to design a time domain aviation electromagnetic multi-wave pulse transmitting device based on the FPGA.
Disclosure of Invention
The invention aims to provide a time domain aviation electromagnetic multi-wave pulse transmitting device based on an FPGA, which can control the waveform, frequency and pulse width of a transmitting current through pulse frequency modulation or pulse width modulation, and can generate a multi-high-quality bipolar multi-pulse waveform with high precision and strong controllability.
In order to achieve the above object, the present invention provides the following solutions:
an FPGA-based time domain aviation electromagnetic multi-wave pulse transmitting device, comprising: the control switch module is connected with the FPGA module, and the FPGA module is connected with the driving signal generating circuit;
the control switch module comprises a pulse width selection module, a charging frequency selection module, an emission fundamental frequency selection module, a triggering mode selection module and a waveform selection module, wherein the pulse width selection module, the charging frequency selection module, the emission fundamental frequency selection module, the triggering mode selection module and the waveform selection module are connected with the FPGA module, the triggering mode selection module, the waveform selection module, the pulse width selection module, the emission fundamental frequency selection module and the charging frequency selection module are all RS single-pole three-throw switches, the pulse width selection module corresponds to 20us, 30us and 35us charging pulse widths respectively and is used for selecting the charging pulse width, the emission fundamental frequency selection module corresponds to 12.5Hz, 25Hz and 50Hz emitting fundamental frequency respectively and is used for selecting the emission fundamental frequency, the charging frequency selection module corresponds to 2KHz,4KHz and 8KHz charging frequency respectively and is used for selecting the charging frequency, the triggering mode selection module corresponds to internal triggering, external triggering and point triggering respectively and is used for selecting the triggering mode, and the waveform selection module corresponds to single-wave and multi-wave combination wave forms respectively and is used for selecting the emission wave forms;
the FPGA module comprises a high-voltage energy storage driving logic module, an external trigger signal module, an internal crystal oscillator module, a clock management module, a switch potential processing module, a single multi-wave driving logic module, a full-bridge driving logic module and a damping absorption driving logic module, wherein the pulse width selection module, the charging frequency selection module and the transmitting fundamental frequency selection module are connected with the high-voltage energy storage driving logic module through knob potential processing modules, the trigger mode selection module is connected with the external trigger signal module and the internal crystal oscillator module, the external trigger signal module and the internal crystal oscillator module are connected with the clock management module, the clock management module is connected with the high-voltage energy storage driving logic module and the single multi-wave driving logic module and used for providing synchronous signals for the high-voltage energy storage driving logic module and the single multi-wave driving logic module, the waveform selection module is connected with the switch potential processing module, the full-bridge driving logic module and the damping absorption driving logic module, the full-bridge driving logic module is connected with the damping absorption driving logic module, and the high-voltage energy storage driving logic module, the single multi-wave driving logic module, the full-bridge driving logic module and the damping absorption driving logic module are connected with a damping driving signal generating circuit;
the driving signal generating circuit comprises a high-voltage charger circuit, an IGBT switching tube Q1, an IGBT switching tube Q2, an IGBT switching tube Q3, a full-bridge circuit formed by an IGBT switching tube Q4, a multi-wave transmitting circuit formed by an IGBT switching tube Q5 and an IGBT switching tube Q6, and a turn-off oscillation eliminating circuit formed by an IGBT switching tube Q7 and an IGBT switching tube Q8, wherein the high-voltage charger circuit is used for supplying power to the driving signal generating circuit, two ends of the full-bridge circuit are connected with a resonant capacitor C1 in parallel, the resonant capacitor C1 and two ends of a main bridge circuit of the full-bridge circuit are provided with the multi-wave transmitting circuit, two ends of the main bridge circuit of the full-bridge circuit are connected with the capacitor C2 in parallel, one end of the turn-off oscillation eliminating circuit is connected between the IGBT switching tube Q1 and the IGBT switching tube Q2 of the full-bridge circuit, the other end of the full-bridge circuit is connected between the IGBT switching tube Q3 and the IGBT switching tube Q4, the full-bridge circuit is connected with the IGBT switching tube Q3, the IGBT switching tube Q3 and the IGBT switching tube Q4 of the full-bridge circuit are connected with the single-bridge circuit, and the IGBT switching tube Q4 is connected with the IGBT switching tube Q7, and the IGBT switching tube Q6 is connected with the logic driving module and the damping tube Q8.
Optionally, the full-bridge driving logic module is connected with the IGBT switching tube Q1, the IGBT switching tube Q2, the IGBT switching tube Q3, and the IGBT switching tube Q4 of the full-bridge circuit through a second driving board, the single multi-wave driving logic module is connected with the IGBT switching tube Q5 and the IGBT switching tube Q6 of the multi-wave transmitting circuit through a first driving board, the damping absorbing driving logic module is connected with the IGBT switching tube Q7 and the IGBT switching tube Q8 of the turn-off oscillation eliminating circuit through a first driving board, and the high-voltage energy storage driving logic module is connected with the switching tube QH1, the switching tube QH2, and the switching tube QH3 of the high-voltage charger circuit through a second driving board.
Optionally, the model of the first driving plate is TD-BD-IGFB05K10, and the model of the second driving plate is 2SP0320V.
Optionally, the control switch module further includes a buzzer and an LED indicator, the buzzer and the LED indicator are connected to the FPGA module, the LED indicator includes a BOOST1 indicator, a BOOST2 indicator, a BOOST3 indicator, an ONF indicator, a WAVE1 indicator, a WAVE2 indicator, an LU indicator, a RD indicator, an RU indicator, an LD indicator, a DAMP indicator, and a TRIG indicator, the BOOST1 indicator, the BOOST2 indicator, the BOOST3 indicator are used for displaying a charging error, the ONF indicator is used for representing a BOOST capacitor discharging error, the WAVE1 indicator and the WAVE2 indicator are used for representing a single multi-WAVE error, the LU indicator, the RD indicator, the RU indicator, the LD indicator are used for displaying a full bridge front road error, the DAMP indicator is used for representing a damping error, and the TRIG indicator is used for representing a trigger signal.
Optionally, the FPGA module further includes an error alarm processing module and an error signal processing module, where the error signal processing module is connected with the driving signal generating circuit and is used to obtain an error signal of the driving signal generating circuit, and the error signal processing module is connected with the error alarm processing module and is connected with the buzzer and the LED indicator lamp and is used to display a specific error.
Optionally, the control switch module still includes voltage gauge outfit, ampere meter, control switch, drive power switch, emission switch and emergency brake switch, the voltage gauge outfit is used for showing resonant capacitor C1's voltage peak value, ampere meter is used for showing the current peak value, control switch, drive power switch, emission switch are toggle switch, and connect knob potential processing module, control switch is used for controlling the switch of total power supply, drive power switch is used for controlling the power supply of IGBT switch tube, emergency brake switch is the rotation reset switch, the rotation reset switch is connected knob potential processing module for cut off the power supply under emergency.
Optionally, the FPGA module further includes a peak detector, an a/D conversion module, and a monitor, where the peak detector is connected to the resonant capacitor C1 and is used to detect a voltage peak of the resonant capacitor C1, the peak detector is connected to the main circuit and is used to detect a current peak, the peak detector is connected to the a/D conversion module, the a/D conversion module is connected to the monitor, and the monitor is connected to the voltage meter and the current meter.
According to the specific embodiment provided by the invention, the invention discloses the following technical effects: according to the FPGA-based time domain aviation electromagnetic multi-wave pulse transmitting device, the waveform, the frequency and the pulse width of the transmitting current are precisely controlled through the pulse frequency modulation or the pulse width modulation mode, so that digital control is achieved, a multi-path digital driving signal with high precision and strong controllability can be generated, compared with a traditional half sine wave transmitting circuit, the main wave transmitting pulse of the FPGA-based time domain aviation electromagnetic multi-wave pulse transmitting device consists of two 1/4 sine waves, the duration and the steepness of the rising edge and the falling edge can be independently adjusted, narrower transmitting pulses can be obtained, the subsidiary wave transmitting pulse is a small-amplitude trapezoidal pulse with the rapid cutting-off edge, more high-frequency signal components are provided under the condition of guaranteeing the large transmitting current, and the test result proves that the high-quality bipolar multi-pulse waveform can be transmitted.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions of the prior art, the drawings that are needed in the embodiments will be briefly described below, it being obvious that the drawings in the following description are only some embodiments of the present invention, and that other drawings may be obtained according to these drawings without inventive effort for a person skilled in the art.
FIG. 1 is a block diagram of a time domain aviation electromagnetic multi-wave pulse transmitting device based on an FPGA according to an embodiment of the invention;
FIG. 2 is a schematic diagram of a control switch module;
FIG. 3 is a circuit diagram of a driving signal generation circuit;
FIG. 4 is a schematic diagram of a main bridge IGBT switching tube drive signal waveform;
FIG. 5 is a schematic diagram of waveforms of driving signals of IGBT switching tubes Q5-Q6;
FIG. 6 is a schematic diagram of waveforms of driving signals of IGBT switching tubes Q7-Q8;
FIG. 7 is a schematic diagram of waveforms of gating signals for switching tubes QH1, QH2 and QH3 of the high-voltage charger;
FIG. 8 is a high voltage protection circuit diagram;
fig. 9 is a circuit diagram of a multi-wave pulse transmitting circuit according to an embodiment of the present invention.
Detailed Description
The following description of the embodiments of the present invention will be made clearly and completely with reference to the accompanying drawings, in which it is apparent that the embodiments described are only some embodiments of the present invention, but not all embodiments. All other embodiments, which can be made by those skilled in the art based on the embodiments of the invention without making any inventive effort, are intended to be within the scope of the invention.
The invention aims to provide a time domain aviation electromagnetic multi-wave pulse transmitting device based on an FPGA, which controls the waveform, frequency and pulse width of a transmitting current through pulse frequency modulation or pulse width modulation, can generate a high-quality bipolar multi-pulse waveform with high precision and strong controllability, and reduces the risk of damage caused by dust contamination of an optical fiber connector.
In order that the above-recited objects, features and advantages of the present invention will become more readily apparent, a more particular description of the invention will be rendered by reference to the appended drawings and appended detailed description.
As shown in fig. 1, the time domain aviation electromagnetic multi-wave pulse transmitting device based on FPGA provided by the embodiment of the present invention includes: the control switch module is connected with the driving signal generating circuit;
as shown in fig. 2, the control switch module includes a pulse width selection module, a charging frequency selection module, an emitting fundamental frequency selection module, a trigger mode selection module, and a waveform selection module, where the pulse width selection module, the charging frequency selection module, the emitting fundamental frequency selection module, the trigger mode selection module, and the waveform selection module are connected to the FPGA module, the trigger mode selection module, the waveform selection module, the pulse width selection module, the emitting fundamental frequency selection module, and the charging frequency selection module are RS single-pole triple-throw switches, the pulse width selection module corresponds to 20us, 30us, and 35us charging pulse widths, and is used to select the charging pulse widths, the emitting fundamental frequency selection module corresponds to 12.5Hz, 25Hz, and 50Hz emitting fundamental frequencies, the charging frequency selection module corresponds to 2KHz,4KHz, and 8KHz charging frequencies, and is used to select the charging frequencies, the trigger mode selection module corresponds to internal trigger, external trigger and point trigger modes, the internal trigger is generated by an internal clock crystal of the FPGA module, the external trigger signal is generated by a system, the point trigger signal is generated by a button trigger state, the single-wave switch is a sine wave, the single-wave waveform is combined waveform, and the sine wave is a sine wave, and the sine wave is combined waveform, and the sine wave is combined, and the sine wave waveform is selected.
The FPGA module comprises a high-voltage energy storage driving logic module, an external trigger signal module, an internal crystal oscillator module, a clock management module, a switch potential processing module, a single multi-wave driving logic module, a full-bridge driving logic module and a damping absorption driving logic module, wherein the pulse width selection module, the charging frequency selection module and the transmitting fundamental frequency selection module are connected with the high-voltage energy storage driving logic module through knob potential processing modules, the trigger mode selection module is connected with the external trigger signal module and the internal crystal oscillator module, the external trigger signal module and the internal crystal oscillator module are connected with the clock management module, the clock management module is connected with the high-voltage energy storage driving logic module and the single multi-wave driving logic module and used for providing synchronous signals for the high-voltage energy storage driving logic module and the single multi-wave driving logic module, the waveform selection module is connected with the switch potential processing module, the full-bridge driving logic module and the damping absorption driving logic module, the full-bridge driving logic module is connected with the damping absorption driving logic module, and the high-voltage energy storage driving logic module, the single multi-wave driving logic module, the full-bridge driving logic module and the damping absorption driving logic module are connected with a driving circuit;
the high-voltage energy storage driving logic module is used for generating a charging control signal of the high-voltage charger circuit, the clock management module is used for obtaining a synchronous signal by frequency division of an external trigger signal or an internal crystal oscillator, the single multi-wave driving logic module is used for realizing a half sine pulse (single wave) or a half sine + trapezoid pulse (multi-wave) driving control signal, the full-bridge driving logic module is used for providing gating signals for four switching tubes of the full-bridge circuit, and the damping absorption driving logic module is used for generating control signals for damping a bridge circuit and at two ends of a transmitting coil when one transmitting pulse is formed.
As shown in fig. 3, the driving signal generating circuit includes a high-voltage charger circuit, an IGBT switching tube Q1, an IGBT switching tube Q2, an IGBT switching tube Q3, a full-bridge circuit formed by an IGBT switching tube Q4, a multi-wave transmitting circuit formed by an IGBT switching tube Q5 and an IGBT switching tube Q6, and a turn-off oscillation eliminating circuit formed by an IGBT switching tube Q7 and an IGBT switching tube Q8, where the high-voltage charger circuit is used to supply power to the driving signal generating circuit, two ends of the full-bridge circuit are connected in parallel with a resonant capacitor C1, two ends of the main bridge circuit of the resonant capacitor C1 and the full-bridge circuit are provided with the multi-wave transmitting circuit, two ends of the main bridge circuit of the full-bridge circuit are connected in parallel with a capacitor C2, one end of the turn-off oscillation eliminating circuit is connected between the multi-wave transmitting circuit Q1 and the IGBT switching tube Q2 of the full-bridge circuit, the other end is connected between the IGBT switching tube Q3 and the IGBT switching tube Q4 of the full-bridge circuit, the full-bridge driving logic module is connected with the IGBT switching tube Q2, the IGBT switching tube Q3 and the single-switch tube Q switching tube Q4 are connected with the logic driving module, and the turn-off oscillation eliminating circuit is connected with the IGBT switching tube Q6.
The left end of the IGBT switch tube Q7 is connected with a current connector JTxOA, the right end of the IGBT switch tube Q8 is connected with a current connector JTxOB, and a transmitting coil is connected between the current connector JTxOA and the current connector JTxOB.
The full-bridge driving logic module is connected with an IGBT switching tube Q1, an IGBT switching tube Q2, an IGBT switching tube Q3 and an IGBT switching tube Q4 of the full-bridge circuit through a second driving plate, the single multi-wave driving logic module is connected with an IGBT switching tube Q5 and an IGBT switching tube Q6 of the multi-wave transmitting circuit through a first driving plate, the damping absorption driving logic module is connected with an IGBT switching tube Q7 and an IGBT switching tube Q8 of the turn-off oscillation eliminating circuit through a first driving plate, and the high-voltage energy storage driving logic module is connected with a switching tube QH1, a switching tube QH2 and a switching tube QH of the high-voltage charger circuit through a second driving plate.
The model of the first driving plate is TD-BD-IGFB05K10, and the model of the second driving plate is 2SP0320V.
The IGBT switch tube driving signal generating circuit is mainly used for generating gate control signals of an IGBT used for a high-voltage charging capacitor and an inverter, different emission waveforms are realized by controlling switch signals of the IGBT, in an internal triggering mode, the triggering signals are obtained by dividing a system internal clock by 20MHz, in an external triggering mode, the triggering signals are provided by an external data acquisition system, the driving signal generating circuit synchronously generates all output signals by the triggering signals, wherein S1-S4 are main bridge control signals and gate control signals of IGBT switch tubes Q1-Q4, S1 and S4 have the same control logic, S2 and S3 are equivalent to S1 and S4 in time sequence to delay half cycles, as shown in FIG. 4, pulses with wider pulse widths are used for controlling rising edges of half sine waves, and pulses with narrower pulse widths are used for controlling generation of small-energy rapid turn-off trapezoid waves.
S5-S6 are gating signals of IGBT switching tubes Q5-Q6, and as shown in FIG. 5, the gating signals on the wavelet control bridge are controlled, the wide pulse corresponds to half sine pulse, and the narrow pulse corresponds to trapezoidal wave pulse. And the gating signals of the damping bridge circuit are S7-S8, and the IGBT switching tubes Q7-Q8 are controlled. As shown in fig. 6, each time a complete transmit pulse is formed, S7 and S8 are set high, and are damped and placed across the transmit coil to eliminate ringing, and the circuit achieves higher transmit efficiency than a direct parallel resistor.
The high-voltage charger circuit adopts a conventional BOOST circuit in the prior art, SH1, SH2 and SH3 are switching tube gating signals of the high-voltage charger circuits QH1, QH2 and QH3, the high-voltage energy storage driving logic module generates a high-voltage energy storage BOOST driving signal, the high-voltage energy storage BOOST driving signal is sent to the second driving board, and the second driving board adjusts the energy storage voltage by controlling the on-off time of a switching tube and adjusting the charging frequency and the charging pulse width of the high-voltage charger circuit.
The three control signals have the same control logic, and the adjustment of the transmitting power is realized by selecting the frequency and the pulse width of the gating signal. The gating signal waveforms are shown in fig. 7.
The control switch module further comprises a buzzer and an LED (light-emitting diode) indicator lamp, the buzzer and the LED indicator lamp are connected with the FPGA module, the LED indicator lamp comprises a BOOST1 indicator lamp, a BOOST2 indicator lamp, a BOOST3 indicator lamp, an ONF indicator lamp, a WAVE1 indicator lamp, a WAVE2 indicator lamp, an LU indicator lamp, a RD indicator lamp, an RU indicator lamp, an LD indicator lamp, a DAMP indicator lamp and a TRIG indicator lamp, the BOOST1 indicator lamp, the BOOST2 indicator lamp and the BOOST3 indicator lamp are used for displaying a charging error, the ONF indicator lamp is used for representing a BOOST capacitor discharging error, the WAVE1 indicator lamp and the WAVE2 indicator lamp are used for representing single multi-WAVE errors, the LU indicator lamp, the RD indicator lamp, the RU indicator lamp and the LD indicator lamp are used for displaying a full-bridge front error, the DAMP indicator lamp is used for representing a damping error, and the TRIG indicator lamp is used for representing a trigger signal.
The FPGA module further comprises an error alarm processing module and an error signal processing module, wherein the error signal processing module is connected with the driving signal generating circuit and used for acquiring an error signal of the driving signal generating circuit, the error signal processing module is connected with the error alarm processing module, and the error alarm processing module is connected with the buzzer and the LED indicator lamp and used for displaying specific errors.
When an error occurs in a certain switching tube, an error signal is returned to the error signal processing module through the driving plate by the optocoupler, and the error signal processing module sends the error signal to the error alarm processing module, so that an indicator lamp corresponding to the switching tube is turned on according to the function of the switching tube.
The control switch module further comprises a voltage meter head, a current meter head, a control power switch, a driving power switch, a transmitting switch and an emergency braking switch, wherein the voltage meter head is used for displaying a voltage peak value of the resonant capacitor C1, the current meter head is used for displaying a current peak value, the control power switch, the driving power switch and the transmitting switch are toggle switches and are connected with the knob potential processing module, the control power switch is used for controlling a switch of a main power supply, the driving power switch is used for controlling whether an IGBT (insulated gate bipolar transistor) is powered or not, the emergency braking switch is a rotary reset switch, rated impact voltage is 6KV, short-circuit protection is 10A, and the rotary reset switch is connected with the knob potential processing module and used for cutting off the power supply under an emergency condition.
The FPGA module further comprises a peak detector, an A/D conversion module and a monitor, wherein the peak detector is connected with an input end through a Hall voltage detector Vsensor1 and used for detecting a voltage peak value of the input end, the peak detector is connected with the resonance capacitor C1 through a Hall voltage detector Vsensor2 and used for detecting a voltage peak value of the resonance capacitor C1, the peak detector is connected with a transmitting coil through a Hall current detector Isnsor and used for detecting an output current peak value, the peak detector is connected with the A/D conversion module, the A/D conversion module is connected with the monitor, the monitor is connected with the voltage gauge head and the current gauge head, the control switch module further comprises a heat dissipation switch and a standby switch, the heat dissipation switch and the standby switch are toggle switches, the heat dissipation switch is empty and used for being connected with the radiator according to requirements, and the standby switch is used for controlling pre-charging of the resonance capacitor.
The function of the model parameters of the electrical components used in figure 3 is shown in the following table,
table 1 functional table for model parameters of electric elements
| Reference numerals | Model number | Main parameters | Description of the functionality |
| Q1Q4,Q2Q3 | FF1400R17IP4 | 1700V,1400A | Main bridge double-channel IGBT module |
| Q5Q6,Q7Q8 | FF1200R17KE3 | 1700V,1200A | Wavelet control and damping control IGBT module |
| D2 | DZ800S17K3 | 1700V,800A | Input-oriented high-power diode |
| DriverB | 2SP0320V | 1700V double-way | FF1400R17IP4 driving plate |
| DriverA | TD-BD-IGFB05K10 | 1700V double-way | FF1200R17KE3 driving plate |
| Isensor | LT1005-S | 1:5000 | Hall current sensor |
| Vsensor | CHV-50P/1000 | 0±1500V | Hall voltage sensor |
| JTxOA,JTxOB | FIC300B02 | Single core, 300A | High-current connector connected with transmitting coil |
| JHP1 | Y50DX32 | 4 cores, 100A | High-current connector connected with high-voltage power supply |
| JLP3 | Y50DX1402TK2 | 2 core, |
28V power input connector |
| Monitor | SGD70-A | 4-way AD | Key parameter monitor for inverter circuit |
| Fan1,Fan2 | 4114NH4 | Flow rate 355m3/h | High-power heat radiation fan |
| C1 | MKP-LL | 550uF，1800V | Resonant capacitor |
| C2 | MKP-LL | 1uF，1600V | Resonant capacitor |
| DC-DC1～2 | V24A28C100BL | 28V,100W | Voltage isolation converter |
Another embodiment of the invention is: as shown in fig. 9, the transmitting circuit includes a power supply portion, an energy storage filter case (an inductor L1, an electrolytic capacitor C1), a BOOST circuit (an inductor L2, an IGBT module S1, a diode D7, a high-voltage capacitor C2), a transmitting bridge circuit, etc., the inductors L1 and L2 adopt CMPQ2918-4R7 series large-current flat coil patch inductors, a single inductance 4.7uH, a direct-current resistor 2.6mΩ, a saturated current 62A, a temperature rise current 55A, the inductor L1 is composed of 2 and 12 strings, an equivalent inductance 28.2uH, the inductor L2 is composed of 6 and 18 strings, the equivalent inductance 14.1uH, when the IGBT controls a large current, due to the stray inductance in the transmitting circuit, spike voltages above kv are generated at the moment of IGBT turn-off, otherwise, the diode D9, resistors R1 and R2, the capacitor C5 form an RCD absorbing circuit, the transmitting function of the IGBT can be realized by controlling on-off of the IGBT modules S3 and S4, when the IGBT is in a half-wave state, and the transmitting function of the IGBT is in a half-wave state of being turned off, and the amplitude of the sine wave is in a half-wave 4 is turned off, when the transmitting is in a half-wave state of the amplitude is in a half-wave state, and the amplitude is in a half-wave state of the transmitting state of 4 is in a state.
From the above, the high-voltage protection circuit unit should be provided in the invention, and in the process of high-power transmission, stray inductance exists in the transmission circuit, so that a kilovolt spike voltage can be generated at the moment of transmission turn-off, and a reliable protection circuit needs to be designed to avoid overvoltage damage of the IGBT module. The overvoltage protection circuit is also called an absorption circuit, and is a circuit which is based on the characteristic that the voltage of the capacitor is not suddenly changed, rapidly absorbs and temporarily stores peak energy released by stray inductance at the turn-off moment of the IGBT into the capacitor and slowly releases the peak energy through the capacitor, so that the damage of the IGBT caused by the instant high voltage can be avoided;
the specific RCD snubber circuit is shown in fig. 8, and the circuit is composed of a capacitor C and a resistor R connected in parallel with a fast recovery diode D. The oscillation generated by the capacitor absorption circuit alone can be effectively avoided, and the fast recovery diode in the circuit can clamp the instantaneous voltage, so that the oscillation is restrained. The diode D bypasses the charging current of the resistor R, so that the resistor R only consumes energy when the capacitor discharges, and the power consumption is reduced.
The invention can realize the functions of a single wave driving signal generator and a multi-wave driving signal generator, and the specific analysis is as follows, wherein the analysis process of the single wave driving signal generator specifically comprises the following steps:
the gate control signal is realized through a state machine generating logic, when the table 2 is 'single wave emission', the switch states of S1, S2, S3 and S4 are '0' closed, and '1' is open;
TABLE 2 Single wave emission S1, S2, S3, S4 switch State
The working process is described as follows:
1) The system is powered on, and enters an initial state T0, and S1, S2, S3 and S4 are all closed;
2) Selecting single wave transmission, turning on a transmission switch, detecting the rising edge of a trigger signal, turning on states T1, S1 and S4, turning off S2 and S3, conducting a transmission bridge in the forward direction, and starting timing by a counter;
3) When the set emission waveform pulse width is counted, the state T2 is entered, the states S1, S2, S3 and S4 are all closed, and the counter is cleared;
4) When the rising edge of the trigger signal is detected again, the state T3 is entered, the states S1 and S4 are closed, the states S2 and S3 are opened, the transmitting bridge is reversely conducted, and the counter starts to count time;
5) When the set emission waveform pulse width is counted, the initial states T0, S1, S2, S3 and S4 are all closed, and the counter is cleared.
The specific analysis process of the multi-wave driving signal generator is as follows:
to achieve multi-wave transmission, it is necessary to transmit a main waveform (half sine wave) and a sub waveform (trapezoidal wave) simultaneously. The drive signals are jointly driven by the S1-S8 gating signals.
The S1-S4 gating signals are as follows:
the gate control signal is logically realized through the generation of a state machine, and when the table 3 is 'multi-wave emission', the switch states of S1, S2, S3 and S4 are '0' closed and '1' opened;
TABLE 3 "Multi-wave emission" S1, S2, S3, S4 switch states
| Status of | S1 | S2 | | S4 |
| T0 | ||||
| 0 | 0 | 0 | 0 | |
| |
1 | 0 | 0 | 1 |
| |
0 | 0 | 0 | 0 |
| |
1 | 0 | 0 | 1 |
| |
0 | 0 | 0 | 0 |
| |
0 | 1 | 1 | 0 |
| |
0 | 0 | 0 | 0 |
| |
0 | 1 | 1 | 0 |
The working process is described as follows:
1) After the system is electrified, the system enters an initial state T0, and S1, S2, S3 and S4 are all closed;
2) Selecting multi-wave transmission, turning on a transmission switch, detecting the rising edge of a trigger signal, turning on the state T1, S1 and S4, turning off S2 and S3, conducting the transmission bridge in the forward direction, generating a forward main wave, and starting timing by a counter;
3) When the set pulse width of the emission main waveform is counted, the states T2, S1, S2, S3 and S4 are all closed, and the counter is cleared and the timing is restarted;
4) When the counter counts to a set interval time, the state T3 is entered, the states S1 and S4 are opened, the states S2 and S3 are closed, the transmitting bridge is conducted forward, a forward side wave is generated, the counter is cleared, and timing is restarted;
5) When the counter counts the pulse width of the set transmitting auxiliary waveform, the entering states T4, S1, S2, S3 and S4 are all closed, and the counter is cleared;
6) When the rising edge of the trigger signal is detected again, the state T5, the state S1 and the state S4 are closed, the state S2 and the state S3 are opened, the transmitting bridge circuit is reversely conducted, a reverse main wave is generated, and the counter starts to count time;
7) When the counter counts to the set pulse width of the emission main waveform, the states T6, S1, S2, S3 and S4 are all closed, and the counter is cleared to restart timing;
8) When the counter counts to a set interval time, the state T7 is entered, the states S1 and S4 are closed, the states S2 and S3 are opened, the transmitting bridge is reversely conducted, reverse side waves are generated, the counter is cleared, and timing is restarted;
9) When the counter counts the pulse width of the set emission auxiliary waveform, the initial states T0, S1, S2, S3 and S4 are all closed, and the counter is cleared.
The S5-S6 gating signals are as follows:
in the case of "multi-wave emission" in table 4, the switching states of S5 and S6 are "0" off and "1" on;
TABLE 4 "Multi-wave emission" S5, S6 switch State
| Status of | | S6 |
| T0 | ||
| 0 | 0 | |
| |
1 | 0 |
| |
1 | 1 |
| |
0 | 0 |
| |
1 | 1 |
The working process is described as follows:
1) After the system is electrified, entering an initial state T0, and closing both S5 and S6;
2) Selecting multi-wave emission, opening an emission switch, detecting the rising edge of a trigger signal, entering states T1 and S5, opening S6, closing, and starting timing by a counter;
3) When the counter counts to a set value, the states T2, S5 and S6 are all opened, the energy of the capacitor C1 is released to the transmitting bridge circuit, a transmitting waveform main wave is generated, the counter is cleared, and timing is restarted;
4) When the counter counts to a set value, the state T3, the state S5 and the state S6 are closed, the energy of the capacitor C2 is released to the transmitting bridge circuit, the transmitting waveform side wave is generated, the counter is cleared, and timing is restarted;
5) When the counter counts to a set time interval, the states T4, S5 and S6 are all opened, the counter is cleared, and timing is restarted;
6) When the counter counts to the set value, the initial state T0 is entered, both S5 and S6 are closed, and the counter is cleared.
The gating signals for S7-S8 are as follows:
in the case of "multi-wave emission" in table 5, the switching states of S7 and S8 are "0" off and "1" on;
TABLE 5 "Multi-wave emission" S8, S9 switch State
| Status of | | S9 |
| T0 | ||
| 0 | 0 | |
| |
0 | 0 |
| |
1 | 1 |
| |
0 | 0 |
| |
0 | 0 |
| |
1 | 1 |
1) After the system is electrified, entering an initial state T0, and closing both S7 and S8;
2) Selecting multi-wave transmission, turning on a transmission switch, detecting the rising edge of a trigger signal, turning off the transmission bridge when the trigger signal enters states T1, S7 and S8, enabling the transmission waveform main wave to pass through a transmission coil, and starting timing by a counter;
3) When the counter counts to a set value, the counter enters a state T2, S7 and S8 and is opened, at the moment, the transmitting bridge is turned off, the access damping resistor R2 is used for absorbing turn-off oscillation, the counter is cleared, and timing is restarted;
4) When the counter counts to a set value, the state T3, S7 and S8 are closed, and the counter is cleared;
5) Detecting the rising edge of the transmitted waveform auxiliary wave, turning off the transmitting bridge when the state T4, the state S7 and the state S8 are all reached, enabling the transmitted waveform auxiliary wave to pass through the transmitting coil, and starting timing by a counter;
6) When the counter counts to a set value, the counter enters states T5, S7 and S8 and is opened, at the moment, the transmitting bridge is turned off, the access damping resistor R2 is used for absorbing turn-off oscillation, the counter is cleared, and timing is restarted;
7) When the counter counts to the set value, the initial state T0 is entered, both S7 and S8 are closed, and the counter is cleared.
According to the FPGA-based time domain aviation electromagnetic multi-wave pulse transmitting device provided by the invention, parameters such as a transmitting waveform, peak current and the like are tested, a transmitting fundamental frequency of 12.5Hz, a charging pulse width of 25s and a charging frequency of 1kHz are selected, the waveform is monitored in real time by adopting a FLUKE199C monitoring oscilloscope and a GMC CP-1005 monitoring current clamp, the actually measured output frequency of 12.51Hz and the peak current 548A are obtained, and the waveform is a half sine wave and trapezoidal wave combined waveform.
According to the FPGA-based time domain aviation electromagnetic multi-wave pulse transmitting device, the waveform, the frequency and the pulse width of the transmitting current are precisely controlled through the pulse frequency modulation or the pulse width modulation mode, so that digital control is achieved, a multi-path digital driving signal with high precision and strong controllability can be generated, compared with a traditional half sine wave transmitting circuit, the main wave transmitting pulse of the FPGA-based time domain aviation electromagnetic multi-wave pulse transmitting device consists of two 1/4 sine waves, the duration and the steepness of the rising edge and the falling edge can be independently adjusted, narrower transmitting pulses can be obtained, the subsidiary wave transmitting pulse is a small-amplitude trapezoidal pulse with the rapid cutting-off edge, more high-frequency signal components are provided under the condition of guaranteeing the large transmitting current, and the test result proves that the high-quality bipolar multi-pulse waveform can be transmitted.
The principles and embodiments of the present invention have been described herein with reference to specific examples, the description of which is intended only to assist in understanding the methods of the present invention and the core ideas thereof; also, it is within the scope of the present invention to be modified by those of ordinary skill in the art in light of the present teachings. In view of the foregoing, this description should not be construed as limiting the invention.
Claims (7)
1. The utility model provides a time domain aviation electromagnetism multiwave pulse transmitting device based on FPGA which characterized in that includes: the control switch module is connected with the FPGA module, and the FPGA module is connected with the driving signal generating circuit;
the control switch module comprises a pulse width selection module, a charging frequency selection module, an emission fundamental frequency selection module, a triggering mode selection module and a waveform selection module, wherein the pulse width selection module, the charging frequency selection module, the emission fundamental frequency selection module, the triggering mode selection module and the waveform selection module are connected with the FPGA module, the triggering mode selection module, the waveform selection module, the pulse width selection module, the emission fundamental frequency selection module and the charging frequency selection module are all RS single-pole three-throw switches, the pulse width selection module corresponds to 20us, 30us and 35us charging pulse widths respectively and is used for selecting the charging pulse width, the emission fundamental frequency selection module corresponds to 12.5Hz, 25Hz and 50Hz emitting fundamental frequency respectively and is used for selecting the emission fundamental frequency, the charging frequency selection module corresponds to 2KHz,4KHz and 8KHz charging frequency respectively and is used for selecting the charging frequency, the triggering mode selection module corresponds to internal triggering, external triggering and point triggering respectively and is used for selecting the triggering mode, and the waveform selection module corresponds to single-wave and multi-wave combination wave forms respectively and is used for selecting the emission wave forms;
the FPGA module comprises a high-voltage energy storage driving logic module, an external trigger signal module, an internal crystal oscillator module, a clock management module, a switch potential processing module, a single multi-wave driving logic module, a full-bridge driving logic module and a damping absorption driving logic module, wherein the pulse width selection module, the charging frequency selection module and the transmitting fundamental frequency selection module are connected with the high-voltage energy storage driving logic module through knob potential processing modules, the trigger mode selection module is connected with the external trigger signal module and the internal crystal oscillator module, the external trigger signal module and the internal crystal oscillator module are connected with the clock management module, the clock management module is connected with the high-voltage energy storage driving logic module and the single multi-wave driving logic module and used for providing synchronous signals for the high-voltage energy storage driving logic module and the single multi-wave driving logic module, the waveform selection module is connected with the switch potential processing module, the full-bridge driving logic module and the damping absorption driving logic module, the full-bridge driving logic module is connected with the damping absorption driving logic module, and the high-voltage energy storage driving logic module, the single multi-wave driving logic module, the full-bridge driving logic module and the damping absorption driving logic module are connected with a damping driving signal generating circuit;
the driving signal generating circuit comprises a high-voltage charger circuit, an IGBT switching tube Q1, an IGBT switching tube Q2, an IGBT switching tube Q3, a full-bridge circuit formed by an IGBT switching tube Q4, a multi-wave transmitting circuit formed by an IGBT switching tube Q5 and an IGBT switching tube Q6, and a turn-off oscillation eliminating circuit formed by an IGBT switching tube Q7 and an IGBT switching tube Q8, wherein the high-voltage charger circuit is used for supplying power to the driving signal generating circuit, two ends of the full-bridge circuit are connected with a resonant capacitor C1 in parallel, the resonant capacitor C1 and two ends of a main bridge circuit of the full-bridge circuit are provided with the multi-wave transmitting circuit, two ends of the main bridge circuit of the full-bridge circuit are connected with the capacitor C2 in parallel, one end of the turn-off oscillation eliminating circuit is connected between the IGBT switching tube Q1 and the IGBT switching tube Q2 of the full-bridge circuit, the other end of the full-bridge circuit is connected between the IGBT switching tube Q3 and the IGBT switching tube Q4, the full-bridge circuit is connected with the IGBT switching tube Q3, the IGBT switching tube Q3 and the IGBT switching tube Q4 of the full-bridge circuit are connected with the single-bridge circuit, and the IGBT switching tube Q4 is connected with the IGBT switching tube Q7, and the IGBT switching tube Q6 is connected with the logic driving module and the damping tube Q8.
2. The time domain aviation electromagnetic multi-wave pulse transmitting device based on the FPGA according to claim 1, wherein the full-bridge driving logic module is connected with an IGBT switching tube Q1, an IGBT switching tube Q2, an IGBT switching tube Q3 and an IGBT switching tube Q4 of the full-bridge circuit through a second driving board, the single multi-wave driving logic module is connected with an IGBT switching tube Q5 and an IGBT switching tube Q6 of the multi-wave transmitting circuit through a first driving board, the damping absorption driving logic module is connected with an IGBT switching tube Q7 and an IGBT switching tube Q8 of the turn-off oscillation eliminating circuit through a first driving board, and the high-voltage energy storage driving logic module is connected with a switching tube QH1, a switching tube QH2 and a switching tube QH3 of the high-voltage charger circuit through a second driving board.
3. The FPGA-based time domain aviation electromagnetic multi-wave pulse transmitting device of claim 2, wherein the first driving board is of the model TD-BD-IGFB05K10 and the second driving board is of the model 2sp0320V.
4. The FPGA-based time domain avionic multi-WAVE pulse transmitting device as defined in claim 3, wherein the control switch module further comprises a buzzer and an LED indicator, the buzzer and the LED indicator are connected to the FPGA module, the LED indicator comprises a BOOST1 indicator, a BOOST2 indicator, a BOOST3 indicator, an ONF indicator, a WAVE1 indicator, a WAVE2 indicator, an LU indicator, a RD indicator, an RU indicator, an LD indicator, a DAMP indicator, and a TRIG indicator, the BOOST1 indicator, the BOOST2 indicator, the BOOST3 indicator are used for displaying a charging error, the ONF indicator is used for representing a BOOST capacitor discharging error, the WAVE1 indicator, the WAVE2 indicator are used for representing a single error, the LU indicator, the RD indicator, the RU indicator, the LD indicator are used for displaying a full bridge front error, the DAMP indicator is used for representing a damping error, and the TRIG indicator is used for representing a trigger signal.
5. The time domain aviation electromagnetic multi-wave pulse transmitting device based on the FPGA as claimed in claim 4, wherein the FPGA module further comprises an error alarm processing module and an error signal processing module, the error signal processing module is connected with the driving signal generating circuit and used for obtaining an error signal of the driving signal generating circuit, the error signal processing module is connected with the error alarm processing module, and the error alarm processing module is connected with the buzzer and the LED indicator lamp and used for displaying specific errors.
6. The FPGA-based time domain aviation electromagnetic multi-wave pulse transmitting device according to claim 5, wherein the control switch module further comprises a voltage gauge head, a current gauge head, a control power switch, a driving power switch, a transmitting switch and an emergency braking switch, the voltage gauge head is used for displaying a voltage peak value of the resonant capacitor C1, the current gauge head is used for displaying a current peak value, the control power switch, the driving power switch and the transmitting switch are toggle switches and are connected with the knob potential processing module, the control power switch is used for controlling a switch of a main power supply, the driving power switch is used for controlling whether an IGBT switching tube is powered or not, the emergency braking switch is a rotating reset switch, and the rotating reset switch is connected with the knob potential processing module and used for cutting off power supply in an emergency condition.
7. The FPGA-based time domain aviation electromagnetic multi-wave pulse transmitting apparatus according to claim 6, wherein the FPGA module further comprises a peak detector and an a/D conversion module, and a monitor, the peak detector is connected to the resonance capacitor C1 and is used for detecting a voltage peak of the resonance capacitor C1, the peak detector is connected to a main circuit and is used for detecting a current peak, the peak detector is connected to the a/D conversion module, the a/D conversion module is connected to the monitor, and the monitor is connected to the voltage gauge head and the current gauge head.
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| US6967574B1 (en) * | 2003-01-21 | 2005-11-22 | The Johns Hopkins University | Multi-mode electromagnetic target discriminator sensor system and method of operation thereof |
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| CN102638212A (en) * | 2012-04-24 | 2012-08-15 | 台州学院 | Driver for brushless direct-current motor |
| CN106209024A (en) * | 2016-07-06 | 2016-12-07 | 西南科技大学 | Alpha ray basic pulse generator and launching technique |
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