CN113922683A - Single-stage wireless charging circuit based on digital rectifier - Google Patents

Single-stage wireless charging circuit based on digital rectifier Download PDF

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CN113922683A
CN113922683A CN202111131834.2A CN202111131834A CN113922683A CN 113922683 A CN113922683 A CN 113922683A CN 202111131834 A CN202111131834 A CN 202111131834A CN 113922683 A CN113922683 A CN 113922683A
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output
input
constant
voltage
circuit
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CN113922683B (en
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马彦昭
孙宇飞
樊晓桠
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Northwestern Polytechnical University
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Northwestern Polytechnical University
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    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M7/00—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
    • H02M7/02—Conversion of ac power input into dc power output without possibility of reversal
    • H02M7/04—Conversion of ac power input into dc power output without possibility of reversal by static converters
    • H02M7/12—Conversion of ac power input into dc power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H02M7/21—Conversion of ac power input into dc power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
    • H02M7/217—Conversion of ac power input into dc power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02J—CIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
    • H02J7/00—Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries
    • H02J7/02—Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries for charging batteries from ac mains by converters
    • H02J7/04—Regulation of charging current or voltage
    • H02J7/06—Regulation of charging current or voltage using discharge tubes or semiconductor devices
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00—Details of apparatus for conversion
    • H02M1/08—Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters
    • H02M1/088—Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters for the simultaneous control of series or parallel connected semiconductor devices
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02J—CIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
    • H02J2207/00—Indexing scheme relating to details of circuit arrangements for charging or depolarising batteries or for supplying loads from batteries
    • H02J2207/20—Charging or discharging characterised by the power electronics converter

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Charge And Discharge Circuits For Batteries Or The Like (AREA)

Abstract

The invention relates to a single-stage wireless charging circuit based on a digital rectifier. The digital rectifier main circuit generates alternating voltages VAC1 and VAC2, and transmits the battery voltage VBAT and the feedback voltage VFB to the constant-current constant-voltage control circuit. The high-speed current sampling circuit also converts the sampled inductive current into sampling voltage and transmits the sampling voltage to the constant-current constant-voltage control circuit. The constant-current constant-voltage control circuit outputs a switch signal SW1 to control high-speed current sampling to sample when the power tube is conducted; the output switching signals SG1 and SG2 control the switching of the power tube, thereby achieving the purpose of constant-current and constant-voltage charging. The invention solves the problem of low efficiency of the three-level structure. The service life of the battery can be prolonged by using a digital control constant current and constant voltage charging technology. Because of the digital design, the wireless charger of the invention has simple structure, good stability and convenient integration, and can reduce the area of a chip along with the reduction of the process size.

Description

Single-stage wireless charging circuit based on digital rectifier
Technical Field
The invention belongs to the technical field of electronic circuits, and relates to a single-stage wireless charging circuit based on a digital rectifier.
Background
Wireless charging is applied to various fields. In portable devices such as mobile phones, magnetic induction type wireless charging is used. Magnetic induction type wireless charging has no special requirement on resonance frequency, and the transmission distance of the magnetic induction type wireless charging is between a few millimeters and a few centimeters. For implantable medical devices, magnetic resonance wireless charging is often employed. The transmission distance of magnetic resonance wireless charging can reach several centimeters or even several meters, and the magnetic resonance wireless charging needs to work at a resonance frequency when transmitting energy. Currently, wireless charging of magnetic resonance type generally has two operating frequencies, two frequency bands of 13.56MHz and 6.78 MHz.
J.T.Hwang et al, "An All-in-One (Qi, PMA and A4WP)2.5W full Integrated Wireless Battery Charger IC for week Applications," ISSCC,2016, pp.378-380.
The current research on wireless charging structures is mainly shown in document 1. The wireless charger involved therein adopts a three-stage structure. The first stage is a diode rectifying circuit, the second stage is a DC-DC voltage stabilizing circuit, and the third stage is a constant current CC (constant current CC) and constant voltage CV (constant voltage CV) charging circuit. However, the efficiency of each stage of such a three-stage structure is limited by its structure, resulting in relatively low overall transmission efficiency.
Disclosure of Invention
Technical problem to be solved
In order to avoid the defects of the prior art, the invention provides a single-stage wireless charging circuit based on a digital rectifier, which solves the problem of low efficiency of a three-stage structure. The invention adopts the counter to replace the traditional shift register control mode, thereby greatly reducing the chip area. The invention adopts the constant current and constant voltage charging technology of digital control, can prolong the service life of the battery. The invention basically adopts digital design, has simple structure, good stability and convenient integration, and can reduce the area of a chip along with the reduction of the process size.
Technical scheme
A single-stage wireless charging circuit based on a digital rectifier is characterized by comprising a digital rectifier main circuit, a constant-current constant-voltage charging control circuit and a high-speed current sampling circuit; the charging signal generates a signal V through the wireless induction of the resonant inductor L and the resonant capacitor CAC1And VAC2Connecting numbersInput terminal of main circuit of rectifier, signal V of output terminalBATThe output voltage of the circuit is connected with the charged battery; simultaneous signal VAC1Is connected with the sampling input end of the high-speed current sampling circuit and is converted into a sampling voltage VSENThe output is fed back to the constant-current constant-voltage charging control circuit; further signal VAC1And VAC2Output signal V of main circuit of digital rectifierBATAnd VBATIs divided by a voltage signal VFBAre connected with the input end of the constant-current constant-voltage charging control circuit, and generate control signals through comparison of the battery voltage and a reference; output signal S of constant-current constant-voltage charging control circuitW1The high-speed current sampling circuit is connected with the input of the high-speed current sampling circuit and controls the starting time of the current sampling circuit; output signal SG1[0:8]An output signal S of the constant-current constant-voltage charging control circuit connected with the input of the main circuit of the digital rectifierG2[0:8]Connected to the input of the main circuit of the digital rectifier, signal SG1[0:8]And signal SG2[0:8]The magnitude of the charging current is controlled.
The main circuit of the digital rectifier comprises a resonant inductor L, a resonant capacitor C and a PMOS power tube M with 9 bitsP1-MP2NMOS power tube MN1-MN2A feedback resistor R1-R2And a capacitor CO(ii) a The resonance inductor L and the resonance capacitor C are in parallel connection, and one end V of the resonance inductor L and one end V of the resonance capacitor CAC1Connecting PMOS power tube MP1Drain terminal of NMOS power tube MN1Drain terminal and NMOS power tube MN2A gate terminal of (1); the other end V of the resonance inductor L and the resonance capacitor CAC2Connecting PMOS power tube MP2Drain terminal of NMOS power tube MN2Drain terminal and NMOS power tube MN1A gate terminal of (1); PMOS power tube MP1Gate terminal of the constant current and constant voltage charging control circuit and output signal SG1[0:8]End connection; PMOS power tube MP2Gate terminal of the constant current and constant voltage charging control circuit and output signal SG2[0:8]End connection; PMOS power tube MP1Source terminal and PMOS power tube MP2Source terminals of the first and second transistors are connected in common to an output voltage VBATA terminal; NMOS power tube MN1Source terminal and NMOS power tube MN2OfThe ends are connected to the power ground in common; feedback resistor R1And one end of (A) and (V)BATOne end is connected with the other end of the VFBEnd-connected, feedback resistor R2And one end of (A) and (V)FBThe ends are connected, and the other end is connected with a power ground; capacitor COAnd one end of battery BAT and VBATOne end connected to power ground and the other end connected to power ground.
The constant-current constant-voltage charging control circuit comprises a counter, comparators 1-6, a 9-bit NAND gate NAND-NAND2, a 9-bit driver BUF1-BUF2, a D trigger, a NOR gate NOR and a multiplexer MUX; UP 0 of the first bit input of the counter]Terminal sum DN [0]The end is connected with the output of the D trigger; the positive input terminal of the first comparator 1 and the output V of the main circuit of the digital rectifierAC1Terminal connected with negative input terminal connected with output V of main circuit of digital rectifierBATEnd connection; the positive input terminal of the second comparator 2 and the output V of the main circuit of the digital rectifierAC2The negative input end of the terminal is connected with the output V of the main circuit 1 of the digital rectifierBATEnd connection; the positive input end of the third comparator 3 is connected with the reference voltage, and the negative input end is connected with the output V of the main circuit of the digital rectifierFBEnd connection; the positive input terminal of the fourth comparator 4 and the output V of the high-speed current sampling circuitSENThe negative input end is connected with the output end of the multiplexer MUX; the positive input terminal of the fifth comparator 5 and the output V of the main circuit of the digital rectifierAC2Terminal connected with negative input terminal connected with output V of main circuit of digital rectifierAC1End connection; the positive input terminal of the sixth comparator 6 is connected to the reference voltage, and the negative input terminal is connected to the output V of the main circuit of the digital rectifierFBEnd connection; one input of the NAND gate NAND1 and the output S of the first comparator 1W1Connected with the other input to the output Q of the counter and with the output connected to the input of the driver BUF 1; one input of the NAND gate NAND2 and the output S of the second comparator 2W2Connected with the other input to the output Q of the counter and with the output connected to the input of the driver BUF 2; output S of driver BUF1G1Is connected with the input of the main circuit of the digital rectifier; output S of driver BUF2G2Is connected with the input of the main circuit of the digital rectifier; of D-inputs of D-flip-flops with NOR gatesThe output NOR is connected; the clock input end of the D trigger is connected with the output end of the fifth comparator 5; one input end of the NOR gate is connected with the output end of the third comparator 3, and the other input end of the NOR gate is connected with the input end of the fourth comparator 4; the selection end of the multiplexer MUX is connected with the output end of the sixth comparator 6; the input of the multiplexer MUX is connected to a reference voltage.
Advantageous effects
The invention provides a single-stage wireless charging circuit based on a digital rectifier. The digital rectifier main circuit generates alternating voltages VAC1 and VAC2, and transmits the battery voltage VBAT and the feedback voltage VFB to the constant-current constant-voltage control circuit. The high-speed current sampling circuit also converts the sampled inductive current into sampling voltage and transmits the sampling voltage to the constant-current constant-voltage control circuit. The constant-current constant-voltage control circuit outputs a switch signal SW1 to control high-speed current sampling to sample when the power tube is conducted; the output switching signals SG1 and SG2 control the switching of the power tube, thereby achieving the purpose of constant-current and constant-voltage charging.
Compared with a three-level wireless charger provided in the background technology, the single-level wireless charger adopts a single-level digital rectifier structure, and solves the problem of low efficiency of the three-level structure. The service life of the battery can be prolonged by using a digital control constant current and constant voltage charging technology. Because of the digital design, the wireless charger of the invention has simple structure, good stability and convenient integration, and can reduce the area of a chip along with the reduction of the process size.
1. The invention discloses a wireless charger with a single-stage structure, which comprises: the problem that the transmission efficiency of the traditional three-level structure is limited by each level is solved. The transmission efficiency of the whole system is improved by utilizing the advantages of a single-stage structure.
2. The invention discloses a digital control constant current and constant voltage charging mode: the use of constant current and constant voltage charging technology can prolong battery life, facilitate integration using digital control, and reduce chip area with the reduction of process size.
Drawings
FIG. 1 is a block diagram of a single-stage wireless charger based on a digital rectifier according to the present invention
FIG. 2 is a schematic diagram of a single-stage wireless charger circuit based on a digital rectifier according to the present invention
FIG. 3 is a timing diagram of the operation of the single-stage wireless charger based on the digital rectifier of the present invention
FIG. 4 is a specific implementation of the counter circuit of the single-stage wireless charger based on the digital rectifier according to the present invention
FIG. 5 is a specific implementation of the high-speed current sampling circuit of the single-stage wireless charger based on the digital rectifier according to the present invention
Detailed Description
The invention will now be further described with reference to the following examples and drawings:
reference is made to fig. 1-5. The invention discloses a single-stage wireless charger circuit based on a digital rectifier, which consists of a digital rectifier main circuit 1, a constant-current constant-voltage charging control circuit 2 and a high-speed current sampling circuit 3.
Single-stage wireless charger circuit based on digital rectifier, its characterized in that: the wireless charger circuit comprises a digital rectifier main circuit 1, a constant-current constant-voltage charging control circuit 2 and a high-speed current sampling circuit 3. Output signal V of main circuit 1 of digital rectifierBATAn output signal V of the main circuit 1 of the digital rectifier is connected with the input of the constant-current constant-voltage charging control circuit 2FBAn output signal V of the main circuit 1 of the digital rectifier is connected with the input of the constant-current constant-voltage charging control circuit 2AC2An output signal V of the main circuit 1 of the digital rectifier is connected with the input of the constant-current constant-voltage charging control circuit 2AC1An output signal V of the main circuit 1 of the digital rectifier is connected with the input of the constant-current constant-voltage charging control circuit 2AC1An output signal S of the constant-current constant-voltage charging control circuit 2 is connected with the input of the high-speed current sampling circuit 3W1An output signal S of the constant-current constant-voltage charging control circuit 2 is connected with the input of the high-speed current sampling circuit 3G1[0:8]An output signal S of a constant current and constant voltage charging control circuit 2 connected with the input of the main circuit 1 of the digital rectifierG2[0:8]And numberThe input of the word rectifier main circuit 1 is connected, and the output signal V of the high-speed current sampling circuit 3SENAnd is connected with the input of the constant-current and constant-voltage charging control circuit 2.
The wireless charger is composed of a constant current loop and a constant voltage loop. In the constant current loop control, a lower power tube M in a main circuit 1 of the digital rectifier is sampled by a high-speed current sampling circuit 3N1At the drain end VAC1Sampling the charging current and converting into a sampling voltage VSENAnd (6) outputting. The comparator 4 in the constant-current constant-voltage charging control circuit 2 compares VSENAnd a reference voltage output signal VCCAnd then output to D flip-flop through NAND gate, and UP [0 ] output when clock rising edge]And DN [0 ]]A signal. The counter receives UP [0 ]]And DN [0 ]]Post-signal control of Q [0:8 ]]Increase or decrease to control the switch MP1[k]And MP2[k]Increase or decrease, thereby increasing or decreasing the charging current. In a constant voltage loop, the output signal V of the main circuit 1 of the digital rectifierFBIs the battery voltage across the resistor R1And a resistor R2The partial pressure is generated. The comparator 3 in the constant-current constant-voltage charging control circuit 2 compares VFBAnd a reference voltage output signal VCVLike a constant current loop, when VFBWhen the voltage is higher than the reference voltage, the counter outputs the signal Q [0:8 ]]The number of switches is reduced, so that the charging current is reduced, and the purpose of constant voltage is achieved.
The main circuit 1 of the digital rectifier comprises a resonant inductor L, a resonant capacitor C and a PMOS power tube M with 9 bitsP1-MP2NMOS power tube MN1-MN2A feedback resistor R1-R2Capacitor COAnd a battery BAT. The resonance inductor L and the resonance capacitor C are in parallel connection, and one end V of the resonance inductor L and one end V of the resonance capacitor CAC1Connecting PMOS power tube MP1Drain terminal of NMOS power tube MN1Drain terminal and NMOS power tube MN2A gate terminal of (1); the other end V of the resonance inductor L and the resonance capacitor CAC2Connecting PMOS power tube MP2Drain terminal of NMOS power tube MN2Drain terminal and NMOS power tube MN1A gate terminal of (1); PMOS power tube MP1Gate terminal and constant current and voltage charging controlOutput S of circuit 2G1End connection; PMOS power tube MP2Gate terminal of and output S of the constant-current constant-voltage charging control circuit 2G2End connection; PMOS power tube MP1Source terminal and PMOS power tube MP2Source terminal of is commonly connected with VBATA terminal; NMOS power tube MN1Source terminal and NMOS power tube MN2The source ends of the power amplifiers are connected to the power ground in common; feedback resistor R1And one end of (A) and (V)BATOne end is connected with the other end of the VFBEnd-connected, feedback resistor R2And one end of (A) and (V)FBThe ends are connected, and the other end is connected with a power ground; capacitor COAnd one end of battery BAT and VBATOne end connected to power ground and the other end connected to power ground.
The constant-current constant-voltage charging control circuit 2 consists of a counter, comparators 1-6, a 9-bit NAND gate NAND-NAND2, a 9-bit driver BUF1-BUF2, a D trigger, a NOR gate NOR and a multiplexer MUX. UP 0 of the first bit input of the counter]Terminal sum DN [0]The end is connected with the output of the D trigger; the positive input terminal of the first comparator 1 and the output V of the main circuit 1 of the digital rectifierAC1The negative input end of the terminal is connected with the output V of the main circuit 1 of the digital rectifierBATEnd connection; the positive input terminal of the second comparator 2 and the output V of the main circuit 1 of the digital rectifierAC2The negative input end of the terminal is connected with the output V of the main circuit 1 of the digital rectifierBATEnd connection; the positive input end of the third comparator 3 is connected with the reference voltage, and the negative input end is connected with the output V of the main circuit 1 of the digital rectifierFBEnd connection; the positive input terminal of the fourth comparator 4 and the output V of the high-speed current sampling circuit 3SENThe negative input end is connected with the output end of the multiplexer MUX; the positive input terminal of the fifth comparator 5 and the output V of the main circuit 1 of the digital rectifierAC2The negative input end of the terminal is connected with the output V of the main circuit 1 of the digital rectifierAC1End connection; the positive input end of the sixth comparator 6 is connected with the reference voltage, and the negative input end is connected with the output V of the main circuit 1 of the digital rectifierFBEnd connection; one input of the NAND gate NAND1 and the output S of the first comparator 1W1Connected with the other input to the output Q of the counter and with the output connected to the input of the driver BUF 1; one input of NAND gate NAND2And the output S of the second comparator 2W2Connected with the other input to the output Q of the counter and with the output connected to the input of the driver BUF 2; output S of driver BUF1G1Is connected with the input of the main circuit 1 of the digital rectifier; output S of driver BUF2G2Is connected with the input of the main circuit 1 of the digital rectifier; the D input end of the D trigger is connected with the output NOR of the NOR gate; the clock input end of the D trigger is connected with the output end of the fifth comparator 5; one input end of the NOR gate is connected with the output end of the third comparator 3, and the other input end of the NOR gate is connected with the input end of the fourth comparator 4; the selection end of the multiplexer MUX is connected with the output end of the sixth comparator 6; the input of the multiplexer MUX is connected to a reference voltage.
The counter consists of a 9-bit register structure. Bit 0 consists of a JK flip-flop. The J end and the K end of the JK trigger are connected with a power supply voltage; the clock end is connected with the output end of the fifth comparator 5 of the constant-current constant-voltage charging control circuit 2. The 1 st bit to the 7 th bit have the same structure and are composed of a JK trigger, a NAND gate NAND1-NAND3 and inverters INV1-INV 2. The J end and the K end of the JK trigger are connected with the output of the NAND gate 3, and the clock end is connected with the output end of the fifth comparator 5 of the constant-current constant-voltage charging control circuit 2; one end of the input end of the NAND gate 1 is connected with the UP end of the previous bit, and the other end of the input end of the NAND gate is connected with the Q end of the previous bit; one end of the input end of the NAND gate 2 is connected with the DN end of the previous bit, and the other end is connected with the Q-bar end of the previous bit; the input of the inverter INV1 is connected to the output of the NAND gate NAND 1; the input of the inverter INV2 is connected to the output of the NAND gate NAND 2; the input end of the NAND gate 3 is connected with the output of the NAND gate 1 at one end and the output of the NAND gate 2 at the other end. Bit 8 consists of a JK flip-flop and NAND gates NAND1-NAND 3. The J end and the K end of the JK trigger are connected with the output end of the NAND gate 3; one end of the input end of the NAND gate 1 is connected with the UP end of the 7 th bit, and the other end is connected with the Q end of the 7 th bit; one end of the input end of the NAND gate 2 is connected with the Q-bar end of the 7 th bit, and the other end is connected with the DN end of the 7 th bit; one end of the input end of the NAND gate 3 is connected with the output of the NAND gate 1, and the other end is connected with the input end of the NAND gate NADN 2.
The high-speed current sampling circuit III comprises a switch and an NMOS sampling tube MS1-MS2Amplifier and current-to-voltage circuit. The amplifier is composed of PMOS transistor M1-M6And NMOS transistor M7-M8Composition VXTerminal and VYThe terminal is the source terminal input of the amplifier. PMOS transistor M for current-to-voltage circuit11-M14NMOS transistor M9Resistance RSAnd a capacitor CSAnd (4) forming. The control end of the switch and the output S of the first comparator 1 of the constant-current constant-voltage charging control circuit 2W1One end of the input end of the switch is connected with the ground, and the other end of the input end of the switch is connected with the output V of the main circuit 1 of the digital rectifierAC1End connection; NMOS sampling tube MS1Is connected to ground and the drain terminal is connected to the drain input V of the amplifierXConnecting; NMOS sampling tube MS2Is connected to the output terminal of the switch, and the drain terminal is connected to the drain input V of the amplifierYAre connected.
Reference is made to fig. 2-5. The wireless charger is implemented as follows, an inductor L and a capacitor C resonate to generate a sine wave VAC1And VAC2The comparator 1 compares the voltages of the VAC1 and the VBAT, when VAC1 is greater than VBAT, the output of the comparator controls the PMOS power transistor MP1 to be turned on, the comparator 2 compares the voltages of VAC2 and VBAT, and when VAC2 is greater than VBAT, the output of the comparator controls the PMOS power transistor MP2 to be turned on. The wireless charger of the invention has two modes, namely a constant current mode and a constant voltage mode. The comparator 6 compares the feedback voltage VFBSelecting the reference voltage of the comparator 4 with the reference voltage when the battery voltage V isBATSelecting the reference voltage V when the voltage is less than 2.8VREF_TCAt the moment, the constant current loop is charged by using a small current; when the battery voltage VBATWhen the voltage is larger than 2.8V, selecting the reference voltage VREF_CCAnd the constant current loop is charged by using large current.
In a constant current loop, the drain terminal V of a lower power tube MN1 in the main circuit 1 of the digital rectifier by the high-speed current sampling circuit 3AC1Sampling the charging current and converting into a sampling voltage VSENAnd (6) outputting. The fourth comparator 4 compares VSENAnd a reference voltage output signal VCCAnd then output to the D flip-flop through the NAND gateWhen the clock rises to the output UP [0 ]]And DN [0 ]]A signal. The counter receives UP [0 ]]And DN [0 ]]Post-signal control of Q [0:8 ]]Increase or decrease to control switch MP1[ k ]]And MP2[ k ]]Increase or decrease, thereby increasing or decreasing the charging current. When sampling voltage VSENWhen the voltage is higher than the reference voltage, the charging current is larger than the set value, and the D trigger DN [0 ]]Set to 1, the counter outputs Q [0:8 ]]And the number of the opened PMOS power tubes is reduced, so that the charging current is reduced. When sampling voltage VSENThe same applies to the case of a voltage lower than the reference voltage.
In a constant voltage loop, the output signal V of the main circuit 1 of the digital rectifierFBThe battery voltage is generated by dividing the voltage through the resistor R1 and the resistor R2. Comparator 3 compares VFBAnd a reference voltage output signal VCVLike a constant current loop, when VFBWhen the voltage is higher than the reference voltage, the counter outputs the signal Q [0:8 ]]The number of switches is reduced, so that the charging current is reduced, and the purpose of constant voltage is achieved.

Claims (5)

1. A single-stage wireless charging circuit based on a digital rectifier is characterized by comprising a digital rectifier main circuit, a constant-current constant-voltage charging control circuit and a high-speed current sampling circuit; the charging signal generates a signal V through the wireless induction of the resonant inductor L and the resonant capacitor CAC1And VAC2Signal V connected to the input and output of the main circuit of the digital rectifierBATThe output voltage of the circuit is connected with the charged battery; simultaneous signal VAC1Is connected with the sampling input end of the high-speed current sampling circuit and is converted into a sampling voltage VSENThe output is fed back to the constant-current constant-voltage charging control circuit; further signal VAC1And VAC2Output signal V of main circuit of digital rectifierBATAnd VBATIs divided by a voltage signal VFBAre connected with the input end of the constant-current constant-voltage charging control circuit, and generate control signals through comparison of the battery voltage and a reference; output signal S of constant-current constant-voltage charging control circuitW1The high-speed current sampling circuit is connected with the input of the high-speed current sampling circuit and controls the starting time of the current sampling circuit; output signal SG1[0:8]And digital rectifier mainThe input of the circuit is connected, and the output signal S of the constant-current constant-voltage charging control circuitG2[0:8]Connected to the input of the main circuit of the digital rectifier, signal SG1[0:8]And signal SG2[0:8]The magnitude of the charging current is controlled.
2. The digital rectifier based single stage wireless charging circuit of claim 1, wherein: the main circuit of the digital rectifier comprises a resonant inductor L, a resonant capacitor C and a PMOS power tube M with 9 bitsP1-MP2NMOS power tube MN1-MN2A feedback resistor R1-R2And a capacitor CO(ii) a The resonance inductor L and the resonance capacitor C are in parallel connection, and one end V of the resonance inductor L and one end V of the resonance capacitor CAC1Connecting PMOS power tube MP1Drain terminal of NMOS power tube MN1Drain terminal and NMOS power tube MN2A gate terminal of (1); the other end V of the resonance inductor L and the resonance capacitor CAC2Connecting PMOS power tube MP2Drain terminal of NMOS power tube MN2Drain terminal and NMOS power tube MN1A gate terminal of (1); PMOS power tube MP1Gate terminal of the constant current and constant voltage charging control circuit and output signal SG1[0:8]End connection; PMOS power tube MP2Gate terminal of the constant current and constant voltage charging control circuit and output signal SG2[0:8]End connection; PMOS power tube MP1Source terminal and PMOS power tube MP2Source terminals of the first and second transistors are connected in common to an output voltage VBATA terminal; NMOS power tube MN1Source terminal and NMOS power tube MN2The source ends of the power amplifiers are connected to the power ground in common; feedback resistor R1And one end of (A) and (V)BATOne end is connected with the other end of the VFBEnd-connected, feedback resistor R2And one end of (A) and (V)FBThe ends are connected, and the other end is connected with a power ground; capacitor COAnd one end of battery BAT and VBATOne end connected to power ground and the other end connected to power ground.
3. The digital rectifier based single stage wireless charging circuit of claim 1, wherein: the constant-current constant-voltage charging control circuit comprises a counter, 1-6 comparators, 9-bit NAND gate NAND-NAND2 and 9 bitsDrivers BUF1-BUF2, D flip-flops, NOR gates NOR and a multiplexer MUX; UP 0 of the first bit input of the counter]Terminal sum DN [0]The end is connected with the output of the D trigger; the positive input end of the first comparator (1) and the output V of the main circuit of the digital rectifierAC1Terminal connected with negative input terminal connected with output V of main circuit of digital rectifierBATEnd connection; the positive input end of the second comparator (2) and the output V of the main circuit of the digital rectifierAC2Terminal connected with negative input terminal connected with output V of main circuit of digital rectifierBATEnd connection; the positive input end of the third comparator (3) is connected with the reference voltage, and the negative input end is connected with the output V of the main circuit of the digital rectifierFBEnd connection; the positive input end of the fourth comparator (4) and the output V of the high-speed current sampling circuitSENThe negative input end is connected with the output end of the multiplexer MUX; the positive input end of the fifth comparator (5) and the output V of the main circuit of the digital rectifierAC2Terminal connected with negative input terminal connected with output V of main circuit of digital rectifierAC1End connection; the positive input end of the sixth comparator (6) is connected with the reference voltage, and the negative input end of the sixth comparator is connected with the output V of the main circuit of the digital rectifierFBEnd connection; one input of the NAND gate 1 and the output S of the first comparator (1)W1Connected with the other input to the output Q of the counter and with the output connected to the input of the driver BUF 1; one input of the NAND gate 2 and the output S of the second comparator (2)W2Connected with the other input to the output Q of the counter and with the output connected to the input of the driver BUF 2; output S of driver BUF1G1Is connected with the input of the main circuit of the digital rectifier; output S of driver BUF2G2Is connected with the input of the main circuit of the digital rectifier; the D input end of the D trigger is connected with the output NOR of the NOR gate; the clock input end of the D trigger is connected with the output end of the fifth comparator (5); one input end of the NOR gate is connected with the output end of the third comparator (3), and the other input end of the NOR gate is connected with the input end of the fourth comparator (4); the selection end of the multiplexer MUX is connected with the output end of the sixth comparator (6); the input of the multiplexer MUX is connected to a reference voltage.
4. According toThe digital rectifier based single stage wireless charging circuit of claim 1, wherein: the high-speed current sampling circuit comprises a switch and an NMOS sampling tube MS1-MS2An amplifier and a current-to-voltage circuit; the amplifier is composed of PMOS transistor M1-M6And NMOS transistor M7-M8Composition VXTerminal and VYThe end is the source end input of the amplifier; PMOS transistor M for current-to-voltage circuit11-M14NMOS transistor M9Resistance RSAnd a capacitor CSComposition is carried out; the control end of the switch and the output S of the first comparator (1) of the constant-current constant-voltage charging control circuitW1One end of the input end of the switch is connected with the ground, and the other end of the input end of the switch is connected with the output V of the main circuit of the digital rectifierAC1End connection; NMOS sampling tube MS1Is connected to ground and the drain terminal is connected to the drain input V of the amplifierXConnecting; NMOS sampling tube MS2Is connected to the output terminal of the switch, and the drain terminal is connected to the drain input V of the amplifierYAre connected.
5. The digital rectifier based single stage wireless charging circuit of claim 3, wherein: the counter comprises a 9-bit register structure; the 0 th bit consists of a JK trigger, and the J end and the K end of the JK trigger are connected with a power supply voltage; the clock end is connected with the output end of a fifth comparator (5) of the constant-current constant-voltage charging control circuit; the 1 st bit to the 7 th bit have the same structure and consist of a JK trigger, a NAND gate NAND1-NAND3 and an inverter INV1-INV 2; the J end and the K end of the JK trigger are connected with the output of the NAND gate 3, and the clock end is connected with the output end of a fifth comparator (5) of the constant-current constant-voltage charging control circuit; one end of the input end of the NAND gate 1 is connected with the UP end of the previous bit, and the other end of the input end of the NAND gate is connected with the Q end of the previous bit; one end of the input end of the NAND gate 2 is connected with the DN end of the previous bit, and the other end is connected with the Q-bar end of the previous bit; the input of the inverter INV1 is connected to the output of the NAND gate NAND 1; the input of the inverter INV2 is connected to the output of the NAND gate NAND 2; one end of the input end of the NAND gate 3 is connected with the output of the NAND gate 1, and the other end of the input end of the NAND gate is connected with the output of the NAND gate 2; the 8 th bit consists of a JK flip-flop and NAND gates NAND1-NAND 3; the J end and the K end of the JK trigger are connected with the output end of the NAND gate 3; one end of the input end of the NAND gate 1 is connected with the UP end of the 7 th bit, and the other end is connected with the Q end of the 7 th bit; one end of the input end of the NAND gate 2 is connected with the Q-bar end of the 7 th bit, and the other end is connected with the DN end of the 7 th bit; one end of the input end of the NAND gate 3 is connected with the output of the NAND gate 1, and the other end is connected with the input end of the NAND gate NADN 2.
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Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20010061468A (en) * 1999-12-28 2001-07-07 박종섭 Flexible counter
CN103457320A (en) * 2013-08-22 2013-12-18 电子科技大学 Lithium ion battery switch charging circuit
CN107465217A (en) * 2016-06-03 2017-12-12 深圳市富满电子集团股份有限公司 A kind of switching mode lithium battery charging circuit and chip without current sampling resistor
US10256661B1 (en) * 2017-12-15 2019-04-09 University Of Macau Reconfigurable bidirectional wireless charging transceiver
CN112311106A (en) * 2020-12-02 2021-02-02 青岛大学 Single-stage full-bridge constant-current constant-voltage wireless charging device and control method thereof
CN112421734A (en) * 2020-12-02 2021-02-26 青岛大学 Single-stage high-order compensation constant-current constant-voltage wireless charging device and method

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20010061468A (en) * 1999-12-28 2001-07-07 박종섭 Flexible counter
CN103457320A (en) * 2013-08-22 2013-12-18 电子科技大学 Lithium ion battery switch charging circuit
CN107465217A (en) * 2016-06-03 2017-12-12 深圳市富满电子集团股份有限公司 A kind of switching mode lithium battery charging circuit and chip without current sampling resistor
US10256661B1 (en) * 2017-12-15 2019-04-09 University Of Macau Reconfigurable bidirectional wireless charging transceiver
CN112311106A (en) * 2020-12-02 2021-02-02 青岛大学 Single-stage full-bridge constant-current constant-voltage wireless charging device and control method thereof
CN112421734A (en) * 2020-12-02 2021-02-26 青岛大学 Single-stage high-order compensation constant-current constant-voltage wireless charging device and method

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
FU-BIN YANG ET AL.: "Structure-Reconfigurable Power Amplifier (SR-PA) and 0X/1X Regulating Rectifier for Adaptive Power Control in Wireless Power Transfer System", IEEE JOURNAL OF SOLID-STATE CIRCUITS, vol. 56, no. 7, pages 2054 - 2064, XP011863165, DOI: 10.1109/JSSC.2020.3035429 *

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