CN113903296A - Pixel circuit and display device - Google Patents
Pixel circuit and display device Download PDFInfo
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- CN113903296A CN113903296A CN202111144749.XA CN202111144749A CN113903296A CN 113903296 A CN113903296 A CN 113903296A CN 202111144749 A CN202111144749 A CN 202111144749A CN 113903296 A CN113903296 A CN 113903296A
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- 230000000740 bleeding effect Effects 0.000 claims description 44
- 230000005669 field effect Effects 0.000 claims description 11
- 238000000034 method Methods 0.000 description 15
- 238000010586 diagram Methods 0.000 description 12
- 230000008569 process Effects 0.000 description 6
- 238000007599 discharging Methods 0.000 description 4
- 230000009471 action Effects 0.000 description 3
- 230000003071 parasitic effect Effects 0.000 description 3
- 238000012986 modification Methods 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- 230000007704 transition Effects 0.000 description 2
- 230000006978 adaptation Effects 0.000 description 1
- 230000005540 biological transmission Effects 0.000 description 1
- 238000004891 communication Methods 0.000 description 1
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
- G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
- G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
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Abstract
The application discloses a pixel circuit and a display device. The pixel circuit includes: a plurality of light emitting pixel units arranged in an array; the power lines are connected with the row driving lines of the corresponding rows through the row driving modules; the column driving module comprises a plurality of output ends which are respectively connected with the column driving lines of the corresponding columns; and the bleeder circuit is connected with the row driving wire, the bleeder circuit is connected with the reference voltage, the control end of the bleeder circuit is connected with a bleeder control signal, the bleeder control signal is used for controlling the bleeder circuit corresponding to the row driving wire to be conducted when the row driving wire is disconnected with the power line, and the bleeder circuit is used for enabling the current to flow to the second end from the first end in a one-way manner. According to the embodiment of the application, after the power supply of the row driving line of each row is stopped, the residual charges can be discharged, extra power consumption is avoided, the discharged current can limit the current in a single direction, and the light-emitting pixel units of other rows are prevented from emitting light due to the fact that the current is reversed.
Description
Technical Field
The application belongs to the technical field of display, and particularly relates to a pixel circuit and display equipment.
Background
At present, in a Mini LED (sub millimeter Light emitting diode)/Micro LED (Micro Light emitting diode) display device, a line scanning driving method is generally adopted to control pixels to emit Light. Each row of pixels is connected to a row drive line and each column of pixels is connected to a column drive line. The scanning signal corresponding to the row driving line can control the row driving line to receive the light-emitting voltage output by the power line, and the column driving line forms a current loop with the row driving line and the pixel unit after being gated, so that the pixel unit emits light.
In the conventional row scanning driving mode, because parasitic capacitances exist in the row driving line and the pixel units, when the scanning signal controls the disconnection of the row driving line and the power line, residual charges are easily generated on the row driving line. In order to release the residual charge, a conventional solution is to connect a bleeding circuit to bleed the residual charge on the row driving line. However, when the light-emitting pixel unit emits light normally, the charge draining of the draining circuit will generate additional useless power consumption.
Disclosure of Invention
The embodiment of the application provides a pixel circuit and display equipment, and the technical problem that an existing bleeder circuit has useless power consumption can be solved.
In a first aspect, an embodiment of the present application provides a pixel circuit, where the pixel circuit includes:
the light-emitting pixel units are arranged in an array;
the first ends of the row driving modules are connected with the power lines, the second ends of the row driving modules are connected with the row driving lines of the corresponding rows, the row driving lines are connected with the first ends of the light-emitting pixel units of the same row, and the control ends of the row driving modules are connected with the scanning signal lines of the corresponding rows;
the column driving module comprises a plurality of output ends, each output end is respectively connected with a column driving line of a corresponding column, and the column driving lines are connected with the second ends of the light-emitting pixel units of the same column;
the first end of the bleeder circuit is connected with the row driving wire, the second end of the bleeder circuit is connected with the reference voltage, the control end of the bleeder circuit is connected with a bleeder control signal, the bleeder control signal is used for controlling the bleeder circuit corresponding to the row driving wire to be conducted when the row driving wire is disconnected with the power line, and the bleeder circuit is used for enabling current to flow to the second end from the first end in a one-way mode.
In a second aspect, embodiments of the present application provide a display device including the pixel circuit as above.
Compared with the prior art, the pixel circuit and the display device provided by the embodiment of the application can control the conduction of the bleeder circuit corresponding to the row driving line through the bleeder control signal when the row driving line is disconnected with the power line by arranging the bleeder circuit so as to release the residual charges on the row driving line. The bleeder circuit can also limit the current to flow from the first end to the second end in a single direction, so that when the light-emitting pixel units in the next row emit light, the current cannot flow to the first end through the second end of the bleeder circuit and drive the light-emitting pixel units in the current row to emit light, and the phenomenon that the light-emitting pixel units in the previous row generate hidden brightness when the light-emitting pixel units in the next row emit light is avoided. When the light-emitting pixel unit normally operates, the bleeder circuit does not perform charge bleeding, but controls the bleeder circuit to bleed off residual charges on the row driving line through the bleeding control signal after the power supply line stops supplying power. When the light-emitting pixel unit is disconnected from the power line, the electric charges are discharged, and the phenomenon that when the light-emitting pixel unit is conducted to emit light, a discharge circuit synchronously operates with the light-emitting pixel unit to generate extra useless power consumption can be avoided.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings needed to be used in the embodiments of the present application will be briefly described below, and it is obvious that the drawings described below are only some embodiments of the present application, and it is obvious for those skilled in the art to obtain other drawings based on these drawings without creative efforts.
Fig. 1 is a schematic structural diagram of a pixel circuit according to an embodiment of the present disclosure;
fig. 2 is a schematic structural diagram of a pixel circuit according to another embodiment of the present disclosure;
FIG. 3 is a timing diagram of a scan signal and a bleeding control signal according to an embodiment of the present disclosure;
fig. 4 is a schematic structural diagram of a pixel circuit according to yet another embodiment of the present application;
fig. 5 is a schematic structural diagram of a pixel circuit according to yet another embodiment of the present application;
fig. 6 is a schematic structural diagram of a pixel circuit according to yet another embodiment of the present application;
fig. 7 is a schematic structural diagram of a pixel circuit according to yet another embodiment of the present application;
fig. 8 is a schematic structural diagram of a pixel circuit according to yet another embodiment of the present application;
fig. 9 is a schematic structural diagram of a pixel circuit according to yet another embodiment of the present application;
fig. 10 is a schematic structural diagram of a display device according to an embodiment of the present application.
Detailed Description
Features and exemplary embodiments of various aspects of the present application will be described in detail below, and in order to make objects, technical solutions and advantages of the present application more apparent, the present application will be further described in detail below with reference to the accompanying drawings and specific embodiments. It should be understood that the specific embodiments described herein are intended to be illustrative only and are not intended to be limiting. It will be apparent to one skilled in the art that the present application may be practiced without some of these specific details. The following description of the embodiments is merely intended to provide a better understanding of the present application by illustrating examples thereof.
It is noted that, herein, relational terms such as first and second, and the like may be used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Also, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising … …" does not exclude the presence of other identical elements in a process, method, article, or apparatus that comprises the element.
It should be noted that the embodiments and features of the embodiments in the present application may be combined with each other without conflict. The embodiments will be described in detail below with reference to the accompanying drawings.
At present, in Mini LED/Micro LED display devices, a scan driving method is usually adopted, a power signal is provided to a pixel unit of a corresponding row through a row driving line, and light emission of the corresponding pixel unit can be realized by gating a corresponding column through a column driving line. And the row driving line sequentially gates each row of pixel units to obtain a frame of picture image.
However, in the conventional row driving scanning method, because parasitic capacitances exist in the row driving line and the pixel units, when the row driving line is disconnected from the power line, charges still remain on the parasitic capacitances, so that the pixel units are turned on to emit light. In order to release the residual charges, a conventional technical means is to connect a bleeding circuit to the row driving line to bleed the residual charges on the row driving line. However, when the row driving line is conducted with the power line and the light-emitting pixel unit emits light normally, the bleeder circuit still continues to operate, thereby generating additional power consumption.
In order to solve the above technical problem, embodiments of the present application provide a variety of pixel circuits and display devices. The pixel circuit provided in the embodiments of the present application will be described first.
Fig. 1 shows a schematic structural diagram of a pixel circuit according to an embodiment of the present application. The pixel circuit includes a plurality of light emitting pixel units 1, a plurality of row driving modules 2, a column driving module 3, and a bleeding circuit 30.
The plurality of light emitting pixel units 1 are arranged in an array.
Each row driving module 2 corresponds to a row of light emitting pixel units 1, a first end of the row driving module 2 is connected with a power line PVDD, a second end of the row driving module 2 is connected with a row driving line 10 corresponding to the row, each row driving line 10 is connected with a first end of each light emitting pixel unit 1 on the same row, and a control end of the row driving module 2 is connected with a scanning signal line SCAN corresponding to the row. The SCAN signal lines SCAN may control the row driving module 2 to be turned on or off by the output SCAN signals. It is to be understood that the number of the SCAN signal lines SCAN is the same as the number of rows of the pixel circuits. SCAN1 is connected to row driver module 2 in the first row, and SCAN is connected to row driver module 2 in the nth row. The row driving module 2 may be a field effect Transistor (fet) or a Thin Film Transistor (TFT).
The column driving module 3 includes a plurality of output terminals (not shown), each of which is connected to a corresponding column driving line 20, and the column driving line 20 is connected to a second terminal of each of the light emitting pixel units 1 on the same corresponding column. The column driving module 3 can cause the corresponding light-emitting pixel unit 1 on the row driving line 10 corresponding to the conducted row driving module 2 to emit light by gating the corresponding column driving line 20.
A first end of the bleeder circuit 30 is connected to the row driving line 10, a second end of the bleeder circuit 30 is connected to the reference voltage Vref, and a control end of the bleeder circuit 30 is connected to the bleeder control signal CK. The bleeder control signal CK may control the bleeder circuit 30 corresponding to a certain row driving line 10 to be turned on when the row driving line 10 is disconnected from the power line PVDD, so that the bleeder circuit 30 connects the reference voltage Vref to the row driving line 10. Bleeder circuit 30 may also limit the direction of current flow to flow unidirectionally from the first terminal to the second terminal.
When the SCAN signal line SCAN controls the row driving module 2 in a certain row to be turned on, the row driving line 10 in the certain row may be connected to the power line PVDD through the row driving module 2, the first end of the light emitting pixel unit 1 in the certain row receives the power signal, and when the column driving module 3 controls the column driving line 20 in the corresponding column to be gated, the light emitting pixel unit 1 in the corresponding column in the light emitting pixel unit 1 in the certain row emits light. When the SCAN signal line SCAN controls the row driving module 2 to be turned off, residual charges exist on the row driving line 10, the bleeder control signal CK can control the bleeder circuit 30 corresponding to the row driving line 10 to be turned on, and at this time, the row driving line 10 can be connected to the reference voltage Vref through the bleeder circuit 30. The reference voltage Vref may be a ground terminal or a negative voltage. When there is residual charge on the row driving line 10, the residual charge can be discharged by the discharging circuit 30, so as to prevent the light-emitting pixel unit 1 from continuing to emit light when the row driving line 10 is not connected to the power line PVDD. It should be noted that, since the bleeder circuit 30 limits the current direction to be that the first end flows to the second end in a single direction, even if the voltage value of the reference voltage Vref increases to be higher than the voltage value on the row driving line 10, the current will not flow from the end of the reference voltage Vref to the row driving line 10, i.e. the light emitting pixel unit 1 on the row driving line 10 will not receive the reverse current light emission when the voltage value of the reference voltage Vref increases.
In this embodiment, by providing the bleeder circuit 30 connected to each row driving line 10, when the row driving line 10 is disconnected from the power line PVDD, the bleeder circuit 30 is controlled to be turned on by the bleeder control signal CK, and the reference voltage Vref is connected to the row driving line 10, so that the residual charges on the row driving line 10 are bled through the row driving line 10. When the row driving line 10 is normally connected to the power line PVDD, the bleeding circuit 30 is not turned on, and the charges on the row driving line 10 are not bled, so that extra power consumption caused by the bleeding of the charges by the bleeding circuit 30 when the light-emitting pixel unit 1 emits light normally is avoided. And because the bleeder circuit 30 can restrict the current direction to be a unidirectional flow, when the reference voltage Vref is higher than the residual charge voltage of the bleeder circuit 30, the bleeder circuit 30 is turned off, so that the light-emitting pixel units 1 of the row can be prevented from emitting light when the row driving module 2 is turned off, and the hidden-light phenomenon of the light-emitting pixel units 1 when other rows emit light is eliminated.
Referring to fig. 2, in some embodiments, the bleeding circuit 30 may include M bleeding modules 31. Where M may be the number of row driving lines 10, i.e. the bleeder circuits 30 correspond to the row driving lines 10 one to one. It will be appreciated that the number of bleed modules 31 may also be set higher than the number of row drive lines 10 or lower than the number of row drive lines 10. When the number of the bleeder modules 31 is higher than the number of the row driving wires 10, one row driving wire 10 may be connected with a plurality of bleeder modules 31, and simultaneously, the charge bleeder is performed through the plurality of bleeder modules 31, thereby increasing the bleeder speed. When the number of the bleeding modules 31 is less than the number of the row driving lines 10, one bleeding module 31 may be connected to a plurality of row driving lines 10, and one bleeding module 31 performs charge bleeding on the plurality of row driving lines 10, thereby reducing the number of the bleeding modules 31 and reducing the setting cost.
The bleeder module 31 may include a switch unit 311, a first end of the switch unit 311 is connected to the row driving line 10 corresponding to the bleeder module 31, a second end of the switch unit 311 is connected to the reference voltage Vref, and a control end of the switch unit 311 is connected to the bleeder control signal CK.
When a certain row of driving lines 10 is connected to the power line PVDD, the bleeding control signal CK may control the switch unit 311 of the bleeding module 31 corresponding to the row of driving lines 10 to be turned off, at this time, the bleeding module 31 does not work, and the row of light-emitting pixel units 1 emits light normally.
When the row driving line 10 is disconnected from the power line PVDD, the bleeding control signal CK may control the switch unit 311 to be turned on, and at this time, the bleeding module 31 may couple the reference voltage Vref to the row driving line 10 to bleed off the residual charges on the row driving line 10. When the row driving line 10 of the next row is connected to the power line PVDD, the bleeding control signal CK may control the switch unit 311 of the bleeding module 31 corresponding to the row driving line 10 to turn off, so as to prevent the row of light-emitting pixel units 1 from receiving the power voltage on the row driving line 10 of the next row through the reference voltage Vref end to emit light, that is, the bleeding control signal CK is set to control the switch unit 311 to conduct between the conduction intervals of the two row driving modules 2, so as to prevent the reference voltage Vref from increasing when the next row driving module 2 is conducted, so as to cause the current to be reversed, thereby realizing the unidirectional current flow.
It is understood that the SCAN signal lines SCAN can sequentially control the row driving module 2 of each row to be turned on, so that the light emitting pixel units 1 on the row driving line 10 emit light. Between the conduction of the row driving modules 2 in two adjacent rows, the drainage module 31 in the previous row may be controlled to conduct by the drainage control signal CK to drain the residual charges on the row driving line 10 in the previous row. That is, when the row driving line 10 of the row is turned off and the row driving line 10 of the next row is not yet turned on, the switch unit 311 of the bleeding module 31 corresponding to the row may be controlled to be turned on by the bleeding control signal CK to bleed off the residual charges on the row driving line 10. As shown in fig. 3, t1 is the turn-on duration of the row driving module 2 in the first row, t2 is the turn-on duration of the bleeder circuit 30 in the first row, and t3 is the turn-on duration of the row driving module 2 in the second row. It can be understood that, when the bleeder circuit 30 of the first row performs the bleeder of the residual charges, the row driving module 2 of the first row is already turned off, the row driving module 2 of the second row is not yet turned on, and the row driving line 10 is not connected to the power line PVDD at this time, and the bleeder circuit 30 does not generate additional useless power consumption when performing the bleeder.
Referring to fig. 4, in some embodiments, the bleeder module 31 may further include a discharge unit 312, a first end of the discharge unit 312 is connected to the row driving line 10 of the corresponding row, and a second end of the discharge unit 312 is connected to a first end of the switch unit 311.
The discharge unit 312 can limit the current when the row driving line 10 is discharged to avoid excessive current or current reversal when the residual charge is discharged.
In some embodiments, as shown in fig. 4, the discharge unit 312 may be a first resistor R1, and the first resistor R1 can limit the magnitude of the current when the residual charge on the row driving line 10 is discharged, so as to avoid an excessive instantaneous discharge current.
In some embodiments, as shown in fig. 5, the discharge unit 312 may be a first diode D1, a first terminal of the first diode D1 is connected to the row driving line 10 of the corresponding row, and a second terminal is connected to a first terminal of the switch unit 311. The first terminal of the first diode D1 may be an anode and the second terminal may be a cathode. The first diode D1 can play a role in limiting the current direction when the residual charges on the row driving line 10 are discharged, and when the voltage value of the reference voltage Vref is greater than the voltage value of the residual charges on the row driving line 10, the first diode D1 is cut off, thereby preventing the voltage on the row driving line 10 from increasing due to the increase of the reference voltage Vref, and eliminating the hidden-bright phenomenon of the light-emitting pixel unit 1.
In some embodiments, the switching unit 311 may include a first fet T1. The first end of the first fet T1 is connected to the row driving line 10 of the corresponding row, the second end of the first fet T1 is connected to the reference voltage Vref, and the control end of the first fet T1 is connected to the bleeding control signal CK.
In the M bleeder modules 31, each bleeder module 31 comprises a first fet T1, and the control terminal of each first fet T1 is connected to a different bleeder control signal CK. When the row driving line 10 corresponding to the first fet T1 is disconnected from the power line PVDD and the row driving line 10 in the next row is not connected to the power line PVDD, the discharge control signal CK can control the first fet T1 to be turned on, so that the residual charges in the row driving line 10 are discharged through the first fet T1.
Referring to fig. 6, in some embodiments, the switch unit 311 may include at least two first fets T1. On the same row driving line 10, a common node of the first terminal of each of the first fets T1 and the row driving line 10 may be a first node N1, and a common node of the first terminal of each of the light emitting pixel units 1 and the row driving line 10 may be a second node N2. When there are at least two first fets T1, there are correspondingly at least two first nodes N1. In two or more first nodes N1 on the same row driving line 10, at least one second node N2 may be included between every two adjacent first nodes N1. The second nodes N2 of the plurality of light emitting pixel cells 1 may divide the row driving line 10 into a plurality of segments, one segment between each adjacent two of the second nodes N2, and the last segment in each row driving line 10 continuing from the second node N2 farthest from the row driving module 2. Since at least one light-emitting pixel unit 1 is disposed between any two adjacent first fets T1, each first fet T1 is connected to a different segment of the row driving line 10, and the control terminals of the plurality of first fets T1 in the same row receive the same leakage control signal CK and can be turned on at the same time. The plurality of first field effect transistors T1 discharge residual charges to different segments of the row driving line 10 at the same time, so that the discharge speed of the residual charges on the row driving line 10 can be increased, and the discharge time can be reduced. Wherein, reducing the discharge time also increases the effective display time of each row of light-emitting pixel units.
It should be noted that the plurality of first fets T1 may be connected to the reference voltage Vref after being connected in series with a diode or a resistor, so as to limit the magnitude or direction of the leakage current when the residual charge is discharged, and avoid the light emitting pixel unit 1 from emitting light due to excessive leakage current or reverse current.
It will be appreciated that in some embodiments, the number of first field effects described above may be set to correspond to the number of light-emitting pixel cells 1 of the row, with the first node N1 and the second node N2 being alternately arranged. That is, each of the first fets T1 may access one of the segments on the row driving line 10 and discharge charges to the respective segments simultaneously when the first field effect is turned on, thereby increasing the discharge speed of the residual charges.
Referring to fig. 7, in some embodiments, the control terminal of each switch unit 311 may be connected to the SCAN signal line SCAN of the next row.
When the SCAN signal line SCAN of the row controls the row driving module 2 of the row to be turned on, the SCAN signal line SCAN of the next row controls the switch unit 311 to be turned off, and at this time, the light emitting pixel units 1 of the row emit light normally, and the bleeding circuit 30 does not operate. When the SCAN signal line SCAN of the next row generates a signal transition, the row driving module 2 of the row is already turned off, the row driving line 10 is disconnected from the power line PVDD, the control terminal of the switching unit 311 is turned on by receiving the transition signal, and at this time, the row driving line 10 may be connected to the reference voltage Vref through the switching unit 311, so as to implement the discharging of the residual charges.
In this embodiment, the switch units 311 in each row and the row driving modules 2 in the next row are connected to the same SCAN signal line SCAN to receive the same SCAN signal. That is, the switch unit 311 of the row and the row driving module 2 of the next row are turned on simultaneously. The row driving line 10 of the row can now perform a draining of residual charge by means of the switching unit 311. The next row of row driving lines 10 is connected to the power line PVDD through the row driving module 2, the next row of light-emitting pixel units 1 emit light normally, and the next row of switch units 311 is turned off at this time, so that the residual charges on the row driving lines 10 are not discharged.
Referring to fig. 8, in some embodiments, the bleeding circuit 30 may include:
a plurality of second diodes D2 corresponding to the number of the row driving lines 10, and a first end of each second diode D2 may be connected with the row driving line 10 of the corresponding row.
Second ends of all the second diodes D2 of the second fet T2 are connected to the first end of the second fet T2, a second end of the second fet T2 is connected to the reference voltage Vref, and a control end of the second fet T2 is connected to the bleeding control signal CK.
In this embodiment, the SCAN signal lines SCAN need to pass a preset time period after controlling the row driving module 2 in each row to be turned from the on state to the off state. The row driving module 2 of the next row is controlled to be turned on. That is, within the preset time period, neither the row driving module 2 in the previous row nor the row driving module 2 in the next row is turned on. Within the preset time period, the bleeding circuit 30 may be controlled to be turned on by the bleeding control signal CK, so as to bleed off the residual charges to the row driving line 10 in the previous row.
It can be understood that, since all the row driving lines 10 are connected to the first end of the second fet T2 through the second diode D2, when the second fet T2 is turned on, each row driving line 10 can be connected to the reference voltage Vref through the corresponding second diode D2 and the same second fet T2, so as to implement the discharging of the residual charge. That is, during the turn-on of the second field effect transistor T2, all the row drive lines 10 are able to effect the draining of residual charge. For one row driving line 10, after the row driving line 10 is connected and disconnected with the power line PVDD, when the SCAN signal line SCAN gates each subsequent row of light-emitting pixel units 1, the discharge of the residual charge can be realized within a preset time period when two adjacent row driving modules 2 are not turned on. Before the row driving module 2 corresponding to the row driving line 10 is turned on next time, the row driving line 10 can discharge residual charges for many times. And the second diode D2 can limit the current direction, so as to avoid the residual charges on one row driving line 10 flowing to another row driving line 10 to cause the light-emitting pixel unit 1 on another row driving line 10 to emit light when all the row driving lines 10 simultaneously discharge the residual charges.
Referring to fig. 9, in some embodiments, the control terminal of the second fet T2 is connected to the bleeding signal terminal of the column driving module 3. The column driving module 3 can control the second fet T2 to be turned on when the row driving line 10 is disconnected from the power line PVDD.
After the row driving module 2 in the previous row is changed from the on state to the off state, the row driving module 2 in the next row starts to be turned on after a preset time period. Within the preset time period, all the row driving modules 2 are in an off state, and at this time, the column driving module 3 may control the second field effect transistor T2 to be turned on, so as to implement the residual charge discharging of the previous row driving module 2. After the preset time period, when the next row of driving modules 2 starts to be turned on, the column driving module 3 may control the second fet T2 to be turned off, thereby stopping the bleeding.
In some embodiments, as shown in fig. 9, the bleeder circuit 30 may further include a second resistor R2, a first terminal of the second resistor R2 is connected to a second terminal of the second fet T2, and a second terminal of the second resistor R2 is connected to the reference voltage Vref.
The second resistor R2 can play a role of current limiting in the bleeding circuit 30, so as to avoid excessive transient current during the bleeding process of the residual charge.
An embodiment of the present application further provides a display device, please refer to fig. 10, where the display device may be a PC, a television, a display, a mobile terminal, a tablet computer, a wearable device, and the like, and the display device may include the pixel circuit provided in the embodiment of the present application.
The functional blocks shown in the above-described structural block diagrams may be implemented as hardware, software, firmware, or a combination thereof. When implemented in hardware, it may be, for example, an electronic circuit, an Application Specific Integrated Circuit (ASIC), suitable firmware, plug-in, function card, or the like. When implemented in software, the elements of the present application are the programs or code segments used to perform the required tasks. The program or code segments may be stored in a machine-readable medium or transmitted by a data signal carried in a carrier wave over a transmission medium or a communication link. A "machine-readable medium" may include any medium that can store or transfer information. Examples of a machine-readable medium include electronic circuits, semiconductor memory devices, ROM, flash memory, Erasable ROM (EROM), floppy disks, CD-ROMs, optical disks, hard disks, fiber optic media, Radio Frequency (RF) links, and so forth. The code segments may be downloaded via computer networks such as the internet, intranet, etc.
It should be noted that, in this document, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus.
The principles and embodiments of the present application are explained herein using specific examples, which are presented only to assist in understanding the method and its core concepts of the present application. It should be noted that there are no specific structures in the above description, and it will be apparent to those skilled in the art that various modifications, decorations, or changes can be made without departing from the principle of the present application, and the technical features can be combined in a suitable manner; such modifications, variations, combinations, or adaptations of the present invention using its spirit and scope, as defined by the claims, may be directed to other uses and embodiments.
Claims (12)
1. A pixel circuit, comprising:
a plurality of light emitting pixel units arranged in an array;
the first ends of the row driving modules are connected with power lines, the second ends of the row driving modules are connected with row driving lines of corresponding rows, the row driving lines are connected with the first ends of the light-emitting pixel units of the same row, and the control ends of the row driving modules are connected with scanning signal lines of the corresponding rows;
the column driving module comprises a plurality of output ends, each output end is respectively connected with a column driving line of a corresponding column, and the column driving lines are connected with the second ends of the light-emitting pixel units of the same column;
the first end of the bleeder circuit is connected with the row driving wire, the second end of the bleeder circuit is connected with a reference voltage, the control end of the bleeder circuit is connected with a bleeder control signal, the bleeder control signal is used for controlling the conduction of the bleeder circuit corresponding to the row driving wire when the row driving wire is disconnected with the power line, and the bleeder circuit is used for enabling current to flow to the second end from the first end in a one-way mode.
2. The pixel circuit of claim 1, wherein the bleeding circuit comprises M bleeding modules, M being the number of the row drive lines, the bleeding module comprising:
and a first end of the switch unit is connected with the corresponding row driving wire, a second end of the switch unit is connected with a reference voltage, and a control end of the switch unit is connected with the discharge control signal.
3. The pixel circuit of claim 2, wherein the bleeding module further comprises:
and the first end of the discharge unit is connected with the row driving wire of the corresponding row, and the second end of the discharge unit is connected with the first end of the switch unit.
4. The pixel circuit according to claim 3, wherein the discharge unit comprises a first resistor.
5. A pixel circuit according to claim 3, wherein the discharge unit comprises a first diode, a first end of the first diode being connected to the row driving line of the corresponding row, and a second end of the first diode being connected to the first end of the switch unit.
6. The pixel circuit according to claim 2, wherein the switch unit comprises a first fet, a first terminal of the first fet is connected to the row driving line of the corresponding row, a second terminal of the first fet is connected to the reference voltage, and a control terminal of the first fet is connected to the bleeding control signal.
7. A pixel circuit according to claim 6, wherein the switching unit comprises at least two first FETs, a first end of each first FET being at a first node with a common node of the row driving line, a first end of each light-emitting pixel unit being at a second node with a common node of the row driving line, at least one second node being included between every two adjacent first nodes on the row driving line.
8. The pixel circuit according to claim 2, wherein a control terminal of the switching unit is connected to a scanning signal line of a next row.
9. The pixel circuit of claim 1, wherein the bleeding circuit comprises:
a plurality of second diodes corresponding to the number of the row driving lines, a first end of the second diode being connected with the row driving line of the corresponding row;
and the first end of the second field effect transistor is connected with the second ends of all the second diodes, the second end of the second field effect transistor is connected with the reference voltage, and the control end of the second field effect transistor is connected with the discharge control signal.
10. The pixel circuit according to claim 9, wherein a control terminal of the second fet is connected to a bleeding signal terminal of the column driver module;
and the column driving module is used for controlling the second field effect transistor to be conducted when the row driving line is disconnected with the power line.
11. The pixel circuit of claim 9, wherein the bleeding circuit further comprises:
and a first end of the second resistor is connected with a second end of the second field effect transistor, and a second end of the second resistor is connected with a reference voltage.
12. A display device comprising the pixel circuit according to any one of claims 1 to 11.
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| CN202111144749.XA CN113903296A (en) | 2021-09-28 | 2021-09-28 | Pixel circuit and display device |
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| CN202111144749.XA CN113903296A (en) | 2021-09-28 | 2021-09-28 | Pixel circuit and display device |
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