CN113889458A - Packaged device and electronic apparatus - Google Patents

Packaged device and electronic apparatus Download PDF

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Publication number
CN113889458A
CN113889458A CN202111205884.0A CN202111205884A CN113889458A CN 113889458 A CN113889458 A CN 113889458A CN 202111205884 A CN202111205884 A CN 202111205884A CN 113889458 A CN113889458 A CN 113889458A
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CN
China
Prior art keywords
substrate
connector
circuit board
coupled
flexible circuit
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CN202111205884.0A
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Chinese (zh)
Inventor
马超
范文锴
郭健炜
符会利
黄成德
陈彦斌
胡勇
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Pingtouge Shanghai Semiconductor Co Ltd
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Pingtouge Shanghai Semiconductor Co Ltd
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Priority to CN202111205884.0A priority Critical patent/CN113889458A/en
Publication of CN113889458A publication Critical patent/CN113889458A/en
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/52Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/538Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
    • H01L23/5384Conductive vias through the substrate with or without pins, e.g. buried coaxial conductors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49811Additional leads joined to the metallisation on the insulating substrate, e.g. pins, bumps, wires, flat leads
    • H01L23/49816Spherical bumps on the substrate for external connection, e.g. ball grid arrays [BGA]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/16Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof the devices being of types provided for in two or more different main groups of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. forming hybrid circuits

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Combinations Of Printed Boards (AREA)

Abstract

The disclosed embodiment provides a packaging device and an electronic device. The packaged device includes: a first substrate having a first surface; a semiconductor chip coupled to a first surface of the first substrate; a signal transfer device coupled to the first surface of the first substrate; at least a part of signals of the semiconductor chip are coupled to an external circuit through the signal transfer device. The number of connectors on the substrate is reduced by leading out a part of signals of the semiconductor chip in the packaged device to an external circuit via the signal transfer device, thereby reducing the product size of the packaged device.

Description

Packaged device and electronic apparatus
Technical Field
The present disclosure relates to semiconductor devices, and more particularly, to a packaged device and an electronic apparatus.
Background
With the rapid development of modern electronic design field, the trend of miniaturization of packaged devices will make traditional packaging technology (e.g. FCBGA, flip chip ball grid array) face a series of problems in future high frequency, high speed and high density application scenarios. For example, as the number of signals increases, the pitch between the pins cannot be infinitely reduced (minimum pitch constraint), and thus only the size of the packaged device can be increased, which is contrary to the device miniaturization requirement. For another example, as the number of signals increases, if there are too many vias from the top layer to the bottom layer of the packaged device, the integrity of the power plane may be compromised, thereby causing power supply problems, while impedance discontinuities may be caused if there are too many vias from the top layer to the bottom layer of the packaged device, and if the size of the bottom layer connectors (e.g., BGA solder balls) for electrical connection to external circuitry is too large.
Disclosure of Invention
In view of the above, the present disclosure provides a package device and an electronic apparatus to solve the above problems.
According to a first aspect of embodiments of the present disclosure, there is provided a packaged device comprising:
a first substrate having a first surface;
a semiconductor chip coupled to a first surface of the first substrate;
a signal relay device coupled to the first surface of the first substrate;
wherein at least a portion of the signals of the semiconductor chip are coupled to the external circuit via the signal relay device.
Optionally, the method further comprises:
a plurality of connections including a first end coupled to a second surface of the first substrate opposite the first surface and a second end for coupling with external circuitry,
wherein remaining signals other than the at least a portion of signals are coupled to the external circuit via the plurality of connections.
Optionally, the signal transfer device is disposed at an edge position of the first surface of the first substrate.
Optionally, a groove is disposed on the first surface of the first substrate, and is used for accommodating the signal adapting device.
Optionally, the signal transfer device includes:
the adapter plate is fixed on the first surface of the first substrate;
a connector soldered to the interposer,
the flexible circuit board comprises a fixed end and a free end, the fixed end is fixedly connected with the connector, and the free end is used for being connected with the external circuit.
Optionally, the connector includes a first connector and a second connector respectively welded on the first surface and the second surface of the interposer, where the first surface and the second surface are opposite, the flexible circuit board includes a first flexible circuit board and a second flexible circuit board, a fixed end of the first flexible circuit board is fixedly connected to the first connector, a free end of the first flexible circuit board is used for connecting to the external circuit, a fixed end of the second flexible circuit board is fixedly connected to the second connector, and a free end of the second flexible circuit board is used for connecting to the external circuit.
Optionally, the fixed end of the first flexible circuit board corresponds to the fixed connection position of the first connector and the fixed end of the second flexible circuit board corresponds to the fixed connection position of the second connector, and the contact areas of the fixed connections are the same.
Optionally, the first substrate is a package substrate.
According to a second aspect of embodiments of the present disclosure, there is provided a packaged device comprising:
a plurality of substrates, each substrate having a first surface;
a plurality of semiconductor chips respectively coupled to first surfaces of the plurality of substrates;
at least one signal relay device, each coupled to first surfaces of a first substrate and a second substrate of the plurality of substrates at the same time, and configured to transmit at least a portion of a signal between two semiconductor chips between the semiconductor chip coupled to the first substrate and the semiconductor chip coupled to the second substrate, the first substrate and the second substrate being any two substrates of the plurality of substrates.
Optionally, the method further comprises: a plurality of connector arrays in one-to-one correspondence with the plurality of substrates, each connector array comprising a plurality of connectors, each connector in each connector array having a first end coupled to a second surface of its corresponding substrate opposite to the first surface and a second end for coupling with an external circuit, wherein the remaining signals other than the at least a portion of signals are coupled to the external circuit via the connector arrays.
Optionally, the signal transfer device includes:
two physically separate interposer boards coupled to the first surface of the first substrate and the first surface of the second substrate, respectively;
two physically separated connectors that are respectively soldered to the two adapter plates;
a flexible circuit board including two connectors coupled to the first and second connectors, respectively. According to a third aspect of the embodiments of the present disclosure, there is provided an electronic apparatus including:
the above-described packaged device;
a printed circuit board used as the external circuit.
According to a fourth aspect of the embodiments of the present disclosure, there is provided an electronic apparatus including:
the above-described packaged device;
a Printed Circuit Board (PCB) having a plurality of printed circuit boards,
the packaging device provided by the embodiment leads a part of electric signals of the semiconductor chip to an external circuit through the signal switching device, and leads the rest of electric signals to the external circuit through the connecting piece welded on the substrate, so that the number of the connecting pieces of the substrate can be reduced, when the number of the connecting pieces of the packaging substrate is reduced, the size of the packaging device can be reduced correspondingly on the whole, and meanwhile, the number of the via holes and the length of the via holes between the surface layer and the bottom layer of the packaging device are reduced, so that the problems of power supply and impedance discontinuity are solved.
In the BGA package, the solder balls are used as connectors, and the reduction of the number of solder balls can significantly reduce the size of the packaged device, which is more beneficial to the trend of light weight, thinness and miniaturization of products.
Drawings
The foregoing and other objects, features, and advantages of the disclosure will be apparent from the following description of embodiments of the disclosure, which refers to the accompanying drawings in which:
FIG. 1 is a block diagram of a packaged device provided by an embodiment of the present disclosure;
FIG. 2 is a block diagram of a packaged device provided by another embodiment of the present disclosure;
fig. 3 is a block diagram of a signal transfer device according to an embodiment of the present disclosure;
FIG. 4 is a schematic plan view of the positional relationship between a plurality of signal transfer devices and a semiconductor chip;
fig. 5 is a schematic structural diagram of an electronic apparatus constructed based on the above packaged device according to an embodiment of the present disclosure;
fig. 6 is a schematic structural diagram of an electronic apparatus constructed based on the above packaged device according to another embodiment of the present disclosure;
fig. 7 is a structural block diagram of an electronic device according to still another embodiment of the present disclosure.
Detailed Description
The present disclosure is described below based on examples, but the present disclosure is not limited to only these examples. In the following detailed description of the present disclosure, some specific details are set forth in detail. It will be apparent to those skilled in the art that the present disclosure may be practiced without these specific details. Well-known methods, procedures, and procedures have not been described in detail so as not to obscure the present disclosure. The figures are not necessarily drawn to scale.
This document refers to the following terms.
The term "solder ball" or "solder ball" as used in the BGA packaging process refers to a pin located on the exterior of the package that is generally spherical in shape and is therefore referred to as a solder ball or solder ball. The connector proposed in the embodiments of the present disclosure is a more general electronic connection element, and its form includes, but is not limited to, a ball shape, and may refer to not only BGA packaging process but also other packaging process, and thus the term "connector" is defined according to its function. Other packaging processes, such as mounting a chip to a printed circuit board using an IC socket, may first solder the IC socket to the printed circuit board and then insert the chip into the IC socket in order to avoid damage to the chip during soldering.
Fig. 1 is a block diagram of a packaged device provided by an embodiment of the present disclosure. As shown in the figure, the packaged device 100 includes a substrate 103 and a semiconductor chip 101 disposed over the substrate 103.
The substrate 103 serves as a core material for chip packaging, and can protect, fix and support the chip, enhance the heat conduction and heat dissipation performance of the chip, and ensure that the chip is not damaged physically. The substrate 103 is typically composed of a plurality of layers. The plurality of layers may be a power supply layer, a signal layer, a ground layer, and an insulating layer according to the functions of the respective layers. And the various layers are typically constructed of conductive and/or insulative materials, e.g., the signal layer is constructed using conductive metal such as copper foil and the ground layer is constructed of insulative material. Electrical interconnections between the different layers are realized using vias. The via hole is realized by adopting a mode of filling the hole with electroplated copper or electroplating copper bumps after laser drilling.
The interior of the substrate 103 includes electrically connected signal conductors and signal vias. The signal wires may be disposed on the signal layer and electrically connected to an external Circuit, which may be an external PCB (Printed Circuit Board) or an external semiconductor chip (die)101, through the signal vias.
As shown in the figure, a connection member 102 is provided on the upper surface of the substrate 103 to be electrically connected to the semiconductor chip 101. A lower surface of the substrate 103 is provided with a pad 105 and a solder ball 104 electrically connected to the pad 105. The solder balls 104 are used for electrical connection with an external circuit (e.g., a printed circuit board). It should be noted that the use of solder balls to connect external circuits is based on BGA packaging processes. BGA packages, i.e., ball grid array packages, are fabricated by forming solder balls distributed in an array on the bottom surface of a package substrate as terminals for interconnecting with a substrate (e.g., a printed circuit board), but the connection method in this embodiment is not limited to BGA packages, and thus other types of connectors may be used to electrically connect with an external circuit, such connectors (including solder balls) may be made of a single metal, such as copper or nickel, or an alloy material with good conductive properties, such as an alloy, including but not limited to SnAg alloy, SnCu alloy, SnCuBi, etc., and the shape of the connectors is not limited to spheres, but may be columns, drums, or cuboids.
In the present embodiment, the semiconductor chip 101 may be various chips, such as a memory chip, a radio frequency chip, a processor chip, a high-speed communication chip, a microelectronic system chip, and the like, according to functional division. Further, it should be understood that although a single semiconductor chip is shown on the substrate on the figure, any number of chips may be coupled to the substrate 103.
Based on the device structure described above, it can be understood that an electrical signal may be transmitted from the semiconductor chip 101 to the solder balls 104 via the signal wires and the signal vias in the substrate and then to an external circuit via the solder balls 104, or an electrical signal may be transmitted from an external circuit to the solder balls 104 and then to the semiconductor chip 101 via the signal wires and the signal vias in the substrate. This is a signal transmission path in a normal case. In addition, the power supply signal is also transmitted from an external power supply to the semiconductor device 101 via the solder balls 104 and the substrate.
In this embodiment, the packaged device 100 further includes a signal relay 106 disposed on the upper surface of the substrate 103. The signal relay device 106 will take over a part of the transmission task of the electrical signal between the semiconductor chip 101 and the external circuit. That is, a part of the electrical signal from the semiconductor chip 101 is not transmitted to the solder balls, but is transmitted to the external circuit by the solder balls, but is transmitted to the signal relay 106, and is transmitted to the external circuit by the signal relay 106.
As can be seen from the figure, the signal relay means 106 are explicitly arranged at corresponding positions on the upper surface of the substrate 103. In some embodiments, however, a recess (not shown) may be disposed at a corresponding location on the upper surface of the substrate 103, and an electrically connected pin may be disposed within the recess for receiving at least a portion of the signal transition device 106 and electrically connecting with the signal transition device 106. This helps to reduce the size of the packaged device.
The signal transmission paths between the signal relay device 106 and the semiconductor chip 101 may be various. In some embodiments, as shown in fig. 1, the signal relay 106 receives electrical signals from the semiconductor chip 101 from the substrate 103 and transmits the electrical signals to an external circuit. In other embodiments, the packaged device shown in fig. 2 is different from the packaged device 100 shown in fig. 1 in that the signal adapter 106 is directly electrically connected to the semiconductor chip 101, so that a part of the electrical signals of the semiconductor chip 101 are transmitted to the signal adapter 106 through the wires 108 and then transmitted to the external circuit by the signal adapter 106.
In the package device provided by the embodiment, a part of the electrical signals of the semiconductor chip are led out to the external circuit through the signal switching device, and the rest of the electrical signals are led out to the external circuit through the connecting pieces of the substrate, so that the number of the connecting pieces of the substrate is correspondingly reduced, when the number of the connecting pieces of the substrate is reduced, the overall size of the package device is reduced, especially in the BGA package, the solder balls are used as the connecting pieces, and the reduction of the number of the solder balls can further remarkably reduce the size of the package device, thereby being beneficial to the light, thin and miniaturization trends of the overall product.
It should be understood that the number of signals transferred by the signal transfer device can be designed according to actual needs, for example, all signals of the semiconductor chip are transferred to the external circuit through the signal transfer device (in this case, the package device may omit the connector), or only a part of the signals are transferred to the external circuit through the signal transfer device.
Fig. 3 is a structural diagram of a signal transfer device according to an embodiment of the present disclosure. As shown in the figure, the signal transfer device 300 includes a transfer board 301, a connector 302, and a flexible circuit board 303.
The interposer 301 may be a PCB or a FPC. The interposer 301 includes a first surface and a second surface corresponding to each other, a portion of the first surface is in contact with and electrically connected to the upper surface of the substrate 103, and the substrate 103 also plays a role in supporting and fixing the signal adapter 300. A connector 302 is welded to each of a portion of the first surface and a portion corresponding to the second surface of the interposer 301, and the interposer 301 is in fixed contact with and electrically connected to the two flexible circuit boards 303 via the two connectors 302. For convenience of explanation, the end of the flexible circuit board 303 fixed to the connector 302 is referred to as a fixed end 3031, and the end away from the fixed end 3031 is referred to as a free end 3032. Since the flexible circuit board 303 has a bendable physical property, the free end 3032 can be bent to facilitate electrical connection with an external circuit.
In some embodiments, the fixed end 3031 of the flexible circuit board is fixedly connected to the connector at a position corresponding to the fixed end of the second flexible circuit board and the second connection, and the contact areas of the fixed connection and the second connection are the same.
In addition to the above-described embodiment, a modification may be provided in which only one connector 302 is soldered to one surface of the interposer 301, and the interposer 302 is electrically connected to one flexible circuit board 303. However, two connectors can transmit more electric signals than one connector, and the connectors are arranged on two opposite surfaces of the adapter board, so that the high-density outgoing line and the opposite low-density outgoing line can be realized under the condition that the size of the packaged device is fixed.
On the basis of the above embodiment, another modification may be provided, in which, based on fig. 3, the connector 302 is removed, and the flexible circuit board 303 is directly soldered to the interposer 301 by pressure welding in the area of the original connector 302.
On the basis of the above embodiment, another modification may be provided, in which the signal relay device is constructed by using only a flexible circuit board, one end of the flexible circuit board may be directly fixed and electrically connected to the upper surface of the substrate by soldering, and the other end is used for coupling with an external circuit.
On the basis of the above embodiment, the signal transfer device may be plural, and the positional relationship with the semiconductor chip is not fixed. Fig. 4 is a schematic plan view showing the positional relationship between a plurality of signal relay devices and a semiconductor chip, and as shown in fig. 4, four signal relay devices 106 of arbitrary shapes are arranged around the semiconductor chip 101 in four directions. That is, the signals drawn from the semiconductor chip 101 can be supplied to the external circuit via the four signal relay devices 106.
Fig. 5 is a schematic structural diagram of an electronic apparatus constructed based on a packaged device according to an embodiment of the present disclosure. As shown in the figure, the electronic device 500 includes a packaged device and a substrate 501. The packaged device includes a substrate 503 and a substrate 514. A plurality of connectors 502 and a plurality of connectors 516 are provided on the lower surfaces of the base plate 503 and the base plate 514 for electrical connection with the printed circuit board 501. The upper surfaces of the substrate 503 and the substrate 514 are provided with connectors 504 and 513 for electrical connection with the semiconductor chip 505 and the semiconductor chip 512, respectively.
In some embodiments, the substrates 502 and 516 may be electrically connected to the printed circuit board 501 using a BGA packaging process, in which case the plurality of connectors 502 and the plurality of connectors 516, including pads and solder balls, disposed on the lower surfaces of the substrates 503 and 514 are arranged in an array on the lower surfaces.
In some embodiments, semiconductor chips 505 and 512 may be electrically connected to the upper surfaces of substrates 503 and 514 using a flip Chip on Board (f iotap Chip on Board), respectively. The flip Chip on Board (i.e., the flip Chip on Board) is formed by making various micro solder bumps at corresponding points around the Chip itself and connecting the micro solder bumps with corresponding pads prepared on the top surface of the substrate, and when the solder bumps are disposed on all the surfaces of the Chip, the flip Chip bonding is particularly called C4 (Controlled plated Chip Connection). And connecting the bonding area on the chip with the bonding area on the substrate by adopting a wire bonding process. And then molding and encapsulating by adopting a molding and encapsulating process.
As shown in the figure, the signal transfer device includes a transfer board 507, a connector 508, a flexible circuit board 509, a connector 510, and a transfer board 511. The lower surface of the interposer 507 is in contact with and electrically connected to the upper surface of the substrate 503. A connector 508 is soldered to the upper surface of the interposer 507, and is fixed and electrically connected to the flexible circuit board 509 via the connector 508. The flexible circuit board 509 is fixed and electrically connected to the interposer 511 by the connector 510. The upper surface of the interposer 511 is fixed and electrically connected to the connector 510, and the lower surface of the interposer 511 is fixed and electrically connected to the upper surface of the substrate 514. The substrate 503 and the substrate 514 serve as a carrier and a fixing means for the signal relay device and an electrical connection.
In the above-described electronic device, signal transmission between the semiconductor chips 505 and 512 is realized through two paths: a part of signals are transmitted from the semiconductor chip 505 to the printed circuit board 501 through the connector 504, the substrate 503 and the connector 502, and then from the printed circuit board 501 to the semiconductor chip 512 through the connector 516, the substrate 514 and the connector 513; another part of the signals are transmitted from the semiconductor chip 505 to the interposer 507 via the connector 504 and the substrate 503, then transmitted from the interposer 507 to the connector 510 via the connector 508 and the flexible circuit board 509, and transmitted from the connector 510 to the semiconductor chip 512 via the interposer 511, the substrate 514 and the connector 513. Of course, the signal may also be transmitted in the reverse path.
It should be understood that although the packaged device illustrated in fig. 5 includes two semiconductor chips, the scope of the present disclosure is not so limited. In some embodiments, a packaged device including more than two semiconductor chips is provided, the specific structure of which is described below: a plurality of substrates, each substrate having a first surface and a second surface opposite the first surface; a plurality of semiconductor chips respectively coupled to the plurality of first surfaces of the plurality of substrates; a plurality of connector arrays in one-to-one correspondence with the plurality of substrates, each connector array including a plurality of connectors, each connector in each connector array having a first end coupled to the second surface of its corresponding substrate and a second end for coupling with an external circuit; at least one signal relay device, each coupled to the first surfaces of the first and second substrates of the plurality of substrates simultaneously, and transmitting at least a portion of the signal between the semiconductor chip coupled to the first substrate and the semiconductor chip coupled to the second substrate, the first and second substrates being any two substrates of the plurality of substrates. That is, in the packaged device including a plurality of (two or more) semiconductor chips, at least a part of signals of the two semiconductor chips are transmitted through the signal transfer means so as not to be transmitted through the connection member, so that the number of connection members of the substrate is reduced and thus the size of the packaged device is reduced, and at the same time, since the number of vias and the length of the vias between the surface layer and the bottom layer of the packaged device are reduced, it is possible to help solve the power supply problem and the impedance discontinuity problem.
In addition, it should be understood that in a packaged device including a plurality of (two or more) semiconductor chips, the number of signals to be switched by the signal switching device may be designed according to actual needs, for example, all signals between two semiconductor chips may be switched by the signal switching device, only a part of signals may be switched, or some semiconductor chips may be switched by using the signal switching device, but some semiconductor chips are not provided with the signal switching device.
Fig. 6 is a schematic structural diagram of an electronic apparatus constructed based on the above packaged device according to another embodiment of the present disclosure. As shown in the figure, the electronic device 600 includes a printed circuit board 601, a substrate 603, and a substrate 614.
Connectors 602 and 616 are provided on the lower surfaces of the substrate 603 and the substrate 614 for electrical connection with the printed circuit board 601. The upper surfaces of the substrate 603 and the substrate 614 are provided with connectors 604 and 613 for electrically connecting the semiconductor chip 605 and the semiconductor chip 612, respectively.
The difference from fig. 5 is that two separate signal adapter devices are used in the electronic device, and referring to the illustration, one signal adapter device composed of the adapter plate 607, the connector 608 and the flexible circuit board 609 is electrically connected to the printed circuit board 601, and the other signal adapter device composed of the adapter plate 611, the connector 610 and the flexible circuit board 617 is coupled to the printed circuit board 601.
In the above-described electronic device, a part of the signal transmission between the semiconductor chips 605 and 612 is via the two signal relay devices and the printed circuit board 601, a part of the signal is transmitted from the semiconductor chip 605 to the printed circuit board 601 via the signal relay device composed of the relay board 607, the connector 608, and the flexible circuit board 609, and then from the printed circuit board 601 to the semiconductor chip 612 via the signal relay device composed of the relay board 611, the connector 610, and the flexible circuit board 617, and the signal can also be transmitted in the reverse path.
In the electronic device provided in the above embodiment, the signal transfer device is used for transmitting a part of the signals between the two semiconductor chips, so that the number of the connecting members between the substrate and the printed circuit board is reduced, and accordingly, the number of the vias between the packaged device from the surface layer to the bottom layer is reduced, thereby avoiding the integrity of the power layer in the substrate from being damaged, and the size of the electronic device is reduced due to the reduction of the number of the connecting members between the substrate and the printed circuit board. Particularly in BGA packages, the reduction in the number of solder balls as connectors enables the electronic device to be more significantly reduced in size, thereby contributing to the trend toward lighter, thinner and smaller products as a whole.
Fig. 7 is a structural block diagram of an electronic device according to still another embodiment of the present disclosure. As shown in the drawing, the electronic device provides a motherboard 1000, and various components are provided on the motherboard 1000. The motherboard 1000 is, for example, a printed circuit board. Motherboard 1000 carries various components thereon including, without limitation, processor 1002, graphics processor 1003, dynamic random access memory 1004, static random access memory 1010, flash memory 1006, GPS chip 1008, and the like. These components are physically and electrically coupled to motherboard 1000. Motherboard 1000 provides communication functionality between the various components. In further embodiments, for example, the functions of some components may be integrated in the processor, for example, the dynamic random access memory 1004 and the static random access memory 1010 may be integrated in a system on chip and be regarded as the processor 1002 in this embodiment.
The processor is from a traditional computer system, and is a processor for performing overall control and scheduling functions. Processors are very efficient in logic control but often have deficiencies in specificity, and therefore, sometimes they are integrated with various specialized acceleration units, such as acceleration units dedicated to neural network model computations, graphics processors that are more efficient in graphics processing, and so forth. In this embodiment, the processor 1002 and the graphics processor 1003 are integrated in the same electronic device through the motherboard 1000.
The communication chip enables wireless communication to facilitate the transfer of data to and from the electronic device 10. The term "wireless" does not mean that the associated devices do not contain any wires, although in some embodiments they may not. The communication chip may implement any of a variety of wireless standards or protocols, including but not limited to Wi-Fi (IEEE 802.11 series), WiMAX (IEEE 802.16 series), IEEE 802.20, Long Term Evolution (LTE), Ev-DO, HSPA +, HSDPA +, HSUPA +, EDGE, GSM, GPRS, CDMA, TDMA, DECT, Bluetooth, derivatives thereof, and any other wireless protocol designated as 3G, 4G, 5G, and above. Since there are many different communication protocols, a separate communication chip can be constructed based on each communication protocol. For example, the motherboard 1000 is provided with a GPS chip 1008 and a bluetooth chip 1007, and the motherboard 1000 is also provided with chips dedicated to long-distance wireless communication, such as GPS, EDGE, GPRS, CDMA, WiMAX, LTE, Ev-DO, and the like. In addition, other functions, such as video codecs, compasses, various component drivers, and the like, may also form various components and be integrated into the electronic device 10 via the motherboard 1000.
In the drawings, although not shown, according to the above-described embodiments, signal relay devices are included in some of the components, and thus, signal transmission between two components having the signal relay devices is performed by a part of signals through the motherboard 1000 and another part of signals through the signal relay devices. This helps reduce the connections between the components and motherboard 1000 and also helps reduce signal interference.
In addition, some components that are not integrated into the device 10 via the motherboard 1000 are included in the electronic device, such as a sound card 1009, a keyboard 1012, a network card 1014, and a mouse 1013. These components provide input and output functions for the device 10.
Based on the above packaged device, the present disclosure also provides a method of forming such a packaged device, comprising: respectively arranging a semiconductor chip and a signal switching device on the first surface of the substrate; coupling a portion of the signals of the semiconductor chip to the substrate and bonding the remaining signals of the semiconductor chip to the signal relay device.
By this method, signals of the semiconductor chip can be transferred to the printed circuit board through the substrate and the signal relay device, thereby contributing to a reduction in the number of connections between the substrate and the printed circuit board, and thus contributing to a reduction in the size of a packaged device including the substrate and the semiconductor chip.
It is to be understood that the substrate in the above embodiments may be one of a package substrate, a printed circuit board, and an intermediate substrate.
Commercial value of the disclosed embodiments
The packaging device provided by the embodiment of the disclosure transmits a part of signals of the semiconductor chip to an external circuit through the signal switching device. Such improvements contribute to reduction in product size of packaged devices, conform to areas where products are thin, light and small, and thus have economic and commercial values.
It should be understood that the same or similar parts in the various embodiments are referred to each other in the specification, and each embodiment is described with emphasis instead of the other embodiments. In particular, as for the method embodiments, since they are substantially similar to the methods described in the apparatus and system embodiments, the description is simple, and the relevant points can be referred to the partial description of the other embodiments.
It should be understood that the above description describes particular embodiments of the present specification. Other embodiments are within the scope of the following claims. In some cases, the actions or steps recited in the claims may be performed in a different order than in the embodiments and still achieve desirable results. In addition, the processes depicted in the accompanying figures do not necessarily require the particular order shown, or sequential order, to achieve desirable results. In some embodiments, multitasking and parallel processing may also be possible or may be advantageous.
It should be understood that an element described herein in the singular or shown in the figures only represents that the element is limited in number to one. Furthermore, modules or elements described or illustrated herein as separate may be combined into a single module or element, and modules or elements described or illustrated herein as single may be split into multiple modules or elements.
It is also to be understood that the terms and expressions employed herein are used as terms of description and not of limitation, and that the embodiment or embodiments of the specification are not limited to those terms and expressions. The use of such terms and expressions is not intended to exclude any equivalents of the features shown and described (or portions thereof), and it is recognized that various modifications may be made within the scope of the claims. Other modifications, variations, and alternatives are also possible. Accordingly, the claims should be looked to in order to cover all such equivalents.

Claims (12)

1. A packaged device, comprising:
a first substrate having a first surface;
a semiconductor chip coupled to a first surface of the first substrate;
a signal relay device coupled to the first surface of the first substrate;
wherein at least a portion of the signals of the semiconductor chip are coupled to an external circuit via the signal relay device.
2. The packaged device of claim 1, further comprising:
a plurality of connections including a first end coupled to a second surface of the first substrate opposite the first surface and a second end for coupling with external circuitry,
wherein the remaining signals other than the at least a portion of the signals are coupled to an external circuit via the plurality of connections.
3. The packaged device of claim 1 or 2, wherein the signal relay device is disposed at an edge position of the first surface of the first substrate.
4. The packaged device of claim 1 or 2, wherein the first surface of the first substrate is provided with a recess for receiving the signal adapting means.
5. A packaged device according to claim 1 or 2, said signal relay means comprising:
the adapter plate is fixed on the first surface of the first substrate;
a connector soldered to the interposer,
the flexible circuit board comprises a fixed end and a free end, the fixed end is fixedly connected with the connector, and the free end is used for being connected with an external circuit.
6. The packaged device as claimed in claim 5, wherein the connector comprises a first connector and a second connector respectively soldered on the first surface and the second surface of the interposer, and the flexible circuit board comprises a first flexible circuit board and a second flexible circuit board, a fixed end of the first flexible circuit board is fixedly connected with the first connector, a free end of the first flexible circuit board is used for connecting with an external circuit, a fixed end of the second flexible circuit board is fixedly connected with the second connector, and a free end of the second flexible circuit board is used for connecting with an external circuit.
7. The packaging device of claim 6, wherein the fixed end of the first flexible circuit board is fixedly connected with the first connector at a position corresponding to the fixed end of the second flexible circuit board and the second connector at a position corresponding to the fixed end of the second flexible circuit board, and the contact areas of the fixed connection are the same.
8. The packaged device according to any one of claims 1 to 7, wherein the first substrate is a package substrate.
9. A packaged device, comprising:
a plurality of substrates, each substrate having a first surface;
a plurality of semiconductor chips respectively coupled to first surfaces of the plurality of substrates;
at least one signal relay device, each coupled to first surfaces of a first substrate and a second substrate of the plurality of substrates at the same time, and configured to transmit at least a portion of a signal between two semiconductor chips between the semiconductor chip coupled to the first substrate and the semiconductor chip coupled to the second substrate, the first substrate and the second substrate being any two substrates of the plurality of substrates.
10. The packaged device of claim 9, further comprising:
a plurality of connector arrays in one-to-one correspondence with the plurality of substrates, each connector array comprising a plurality of connectors, each connector in each connector array having a first end coupled to a second surface of its corresponding substrate opposite to the first surface and a second end for coupling with an external circuit, wherein the remaining signals other than the at least a portion of signals are coupled to the external circuit via the connector arrays.
11. The packaged device of claim 9, said signal relay comprising:
two physically separate interposer boards coupled to the first surface of the first substrate and the first surface of the second substrate, respectively;
two physically separated connectors that are respectively soldered to the two adapter plates;
a flexible circuit board including two connectors coupled to the first and second connectors, respectively.
12. An electronic device, comprising:
the packaged device of any of claims 1 to 8, or,
a packaged device according to any of claims 9 to 11; and
a printed circuit board used as the external circuit.
CN202111205884.0A 2021-10-15 2021-10-15 Packaged device and electronic apparatus Pending CN113889458A (en)

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Application Number Priority Date Filing Date Title
CN202111205884.0A CN113889458A (en) 2021-10-15 2021-10-15 Packaged device and electronic apparatus

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202111205884.0A CN113889458A (en) 2021-10-15 2021-10-15 Packaged device and electronic apparatus

Publications (1)

Publication Number Publication Date
CN113889458A true CN113889458A (en) 2022-01-04

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Family Applications (1)

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CN202111205884.0A Pending CN113889458A (en) 2021-10-15 2021-10-15 Packaged device and electronic apparatus

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Country Link
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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2023212985A1 (en) * 2022-05-03 2023-11-09 昆山睿翔讯通通信技术有限公司 Antenna module and production method therefor

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2023212985A1 (en) * 2022-05-03 2023-11-09 昆山睿翔讯通通信技术有限公司 Antenna module and production method therefor

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