CN113809218B - Packaging method of CSP chip - Google Patents

Packaging method of CSP chip Download PDF

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Publication number
CN113809218B
CN113809218B CN202111103994.6A CN202111103994A CN113809218B CN 113809218 B CN113809218 B CN 113809218B CN 202111103994 A CN202111103994 A CN 202111103994A CN 113809218 B CN113809218 B CN 113809218B
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China
Prior art keywords
csp
packaging
chip
csp chip
chips
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CN202111103994.6A
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Chinese (zh)
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CN113809218A (en
Inventor
赵永学
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Shenzhen Zhaoyan Technology Co ltd
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Shenzhen Zhaoyan Technology Co ltd
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/48—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
    • H01L33/50—Wavelength conversion elements
    • H01L33/501—Wavelength conversion elements characterised by the materials, e.g. binder
    • H01L33/502—Wavelength conversion materials
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
    • H01L25/04—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
    • H01L25/075—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L33/00
    • H01L25/0753—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L33/00 the devices being arranged next to each other
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/48—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/48—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
    • H01L33/52—Encapsulations
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2933/00—Details relating to devices covered by the group H01L33/00 but not provided for in its subgroups
    • H01L2933/0008—Processes
    • H01L2933/0033—Processes relating to semiconductor body packages
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2933/00—Details relating to devices covered by the group H01L33/00 but not provided for in its subgroups
    • H01L2933/0008—Processes
    • H01L2933/0033—Processes relating to semiconductor body packages
    • H01L2933/0041—Processes relating to semiconductor body packages relating to wavelength conversion elements
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2933/00—Details relating to devices covered by the group H01L33/00 but not provided for in its subgroups
    • H01L2933/0008—Processes
    • H01L2933/0033—Processes relating to semiconductor body packages
    • H01L2933/005—Processes relating to semiconductor body packages relating to encapsulations

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Computer Hardware Design (AREA)
  • Manufacturing & Machinery (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
  • Led Device Packages (AREA)

Abstract

The invention discloses a CSP chip packaging method, which comprises the following steps: s1, arranging a plurality of CSP chips on a fixed film by a chip arranging machine; s2: manufacturing a CSP chip packaging mould; s3: uniformly spin-coating fluorescent powder glue solution in the CSP chip packaging mould through a glue dispenser, and pressing a plurality of CSP chips arranged on the fixed film into the CSP chip packaging mould through a pressing machine; and S4, heating the CSP chip packaging die to enable the packaged CSP chip to be separated from the CSP chip packaging die. The invention can complete the separation of CSP chips after encapsulation without cutting.

Description

Packaging method of CSP chip
Technical Field
The invention relates to the technical field of packaging, in particular to a packaging method of a CSP chip.
Background
The novel chip-scale package LED (CSP LED; chip Scale Package LED) based on the flip chip is characterized in that the bottom surface of the chip is provided with electrodes, and the upper surface and the side surface of the chip are directly packaged with packaging colloid, so that the electrodes on the bottom surface are exposed. The existing chip-scale packaging LED usually adopts five-sided light emission, namely the top surface and four side surfaces of the LED can emit light, and the packaging process of the LED is relatively simple, and the specific process is as follows: firstly, paving a fixing film on a carrier plate, then fixing an LED chip on the fixing film, then packaging fluorescent glue on the LED chip, pressing the fluorescent glue by using a pressing plate in the process of packaging the fluorescent glue, reliably coating the fluorescent glue on the LED chip, then cutting the solidified fluorescent glue, and finally separating the carrier plate and the fixing film. This process, while simple, is prone to dicing irregularities during dicing, and the dicing powder may contaminate the CSP chip. Therefore, in view of the shortcomings of the practical manufacturing and implementation of the above-mentioned scheme, the above-mentioned scheme is modified and improved, and the above-mentioned scheme is aided by professional knowledge and experience, and after multi-party skillful and experimental, the present design is created, so that a CSP chip packaging method is provided for solving the above-mentioned problems.
Disclosure of Invention
It is an object of the present invention to provide a method for packaging CSP chips so as to solve the above-mentioned problems.
The encapsulation method of the CSP chip can be realized by the following technical scheme:
the invention discloses a CSP chip packaging method, which comprises the following steps:
s1, arranging a plurality of CSP chips on a fixed film by a chip arranging machine;
s2: manufacturing a CSP chip packaging mould;
s3: uniformly spin-coating fluorescent powder glue solution in the CSP chip packaging mould through a glue dispenser, and pressing a plurality of CSP chips arranged on the fixed film into the CSP chip packaging mould through a pressing machine;
and S4, heating the CSP chip packaging die to enable the packaged CSP chip to be separated from the CSP chip packaging die.
In one embodiment, the step S2 includes preparing a metal substrate, where a plurality of layers of photoresist layers are disposed on the substrate, and the height of the photoresist layers is consistent with the height of the CSP chip; etching the plurality of layers of photoresist layers through a photoetching machine to form a plurality of photoresist blocks, wherein patterns formed by the plurality of photoresist blocks are matched with the shapes of the plurality of CSP chips arranged on the fixed film; etching out the non-photosensitive areas of the multiple layers of photosensitive adhesive layers through etching liquid; then electroplating the substrate to enable the electroplating additive to be attached to the etched non-photosensitive area to form an electroplated layer; then polishing the electroplated layer to ensure that the height of the electroplated layer is consistent with the height of the CSP chip; and etching the photosensitive glue blocks through another etching solution to form a plurality of packaging cavities, wherein the patterns formed by the plurality of packaging cavities are matched with the shapes of the plurality of CSP chips arranged on the fixed film.
In one embodiment, the substrate is made of copper plate or aluminum plate.
In one embodiment, the material of the electroplating additive is nickel or copper.
In one embodiment, the CSP chips are distributed in an array with gaps between adjacent CSP chips.
In one embodiment, the fixing film is a UV film.
In one embodiment, the phosphor glue solution is uniformly distributed in the plurality of packaging cavities in the CSP chip packaging die.
In one embodiment, the CSP chip is an LED chip.
Compared with the prior art, the CSP chip packaging method has the beneficial effects that:
the encapsulation method of the CSP chip comprises the steps of etching photosensitive glue through a photoetching machine, etching an area which is not photosensitive through etching liquid, electroplating the area which is not photosensitive through electroplating, etching the area which is photosensitive through another etching liquid, so that an encapsulation cavity matched with the CSP chip is formed, internally coating fluorescent powder glue solution in the encapsulation cavity, laminating a fixing film which is arranged with the CSP chip in the encapsulation cavity, thereby realizing encapsulation of the CSP chip, separating the encapsulated CSP chip from a CSP chip encapsulation mould through heating, realizing encapsulation process of the CSP chip, enabling encapsulation of the CSP chip to be more environment-friendly through the action of the encapsulation mould, and simultaneously effectively preventing pollution to the CSP chip.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings that are needed in the embodiments will be briefly described below, it being understood that the following drawings only illustrate some embodiments of the present invention and therefore should not be considered as limiting the scope, and other related drawings may be obtained according to these drawings without inventive effort for a person skilled in the art.
FIG. 1 is a schematic diagram of a production flow of a CSP chip packaging method of the present invention;
fig. 2 is a schematic view of a structure in which a CSP chip is disposed on a UV film in a CSP chip packaging method of the present invention;
fig. 3 is a schematic diagram of a manufacturing process of a CSP chip packaging mold in the CSP chip packaging method of the invention.
The figures indicate: 11, fixing the film; 12, CSP chip; 13, a substrate; 14, a photoresist layer; 141, a photosensitive glue block; 15, electroplating layers; 151, enclosing the cavity.
Detailed Description
For the purpose of making the objects, technical solutions and advantages of the embodiments of the present invention more apparent, the technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present invention, and it is apparent that the described embodiments are some embodiments of the present invention, but not all embodiments of the present invention. The components of the embodiments of the present invention generally described and illustrated in the figures herein may be arranged and designed in a wide variety of different configurations.
Thus, the following detailed description of the embodiments of the invention, as presented in the figures, is not intended to limit the scope of the invention, as claimed, but is merely representative of selected embodiments of the invention. All other embodiments, which can be made by those skilled in the art based on the embodiments of the invention without making any inventive effort, are intended to be within the scope of the invention.
It should be noted that: like reference numerals and letters denote like items in the following figures, and thus once an item is defined in one figure, no further definition or explanation thereof is necessary in the following figures.
In the description of the present invention, it should be noted that, the azimuth or positional relationship indicated by the terms "upper", "lower", etc. are based on the azimuth or positional relationship shown in the drawings, or the azimuth or positional relationship in which the inventive product is conventionally put in use, are merely for convenience of describing the present invention and simplifying the description, and are not indicative or implying that the apparatus or element to be referred to must have a specific azimuth, be configured and operated in a specific azimuth, and therefore, should not be construed as limiting the present invention.
Furthermore, in the present invention, unless expressly stated or limited otherwise, a first feature may include first and second features being in direct contact, either above or below a second feature, or through additional feature contacts therebetween, rather than being in direct contact. Moreover, the first feature being above, over, and on the second feature includes the first feature being directly above and obliquely above the second feature, or simply indicating that the first feature is higher in level than the second feature. The first feature being below, beneath, and beneath the second feature includes the first feature being directly below and obliquely below the second feature, or simply indicates that the first feature is less level than the second feature.
Furthermore, the terms "horizontal," "vertical," and the like do not denote a requirement that the component be absolutely horizontal or overhang, but rather may be slightly inclined. As "horizontal" merely means that its direction is more horizontal than "vertical", and does not mean that the structure must be perfectly horizontal, but may be slightly inclined.
In the description of the present invention, it should also be noted that, unless explicitly specified and limited otherwise, the terms "disposed," "connected," and "connected" are to be construed broadly, and may be, for example, fixedly connected, detachably connected, or integrally connected; can be mechanically or electrically connected; can be directly connected or indirectly connected through an intermediate medium, and can be communication between two elements. The specific meaning of the above terms in the present invention will be understood in specific cases by those of ordinary skill in the art.
Referring to fig. 1-3, the method for packaging CSP chips of the present invention includes the following steps:
s1: the sheet arranging machine arranges a plurality of CSP chips 12 on the fixed film 11; in this embodiment, the number of CSP chips 12 is a plurality, the CSP chips 12 are distributed in an array, a gap is left between adjacent CSP chips 12, the fixing film 11 has a certain adhesion force, and can absorb the CSP chips 12 thereon, preferably, the fixing film 11 is a UV film, and the CSP chips 12 are LED chips;
s2: preparing a metal substrate 13 by manufacturing a CSP chip packaging die, wherein a plurality of layers of photoresist layers 14 are arranged on the substrate 13, the height of the photoresist layers 14 is consistent with that of the CSP chip 12, the substrate 13 is made of a copper plate or an aluminum plate, and in the embodiment, the substrate 13 is made of the aluminum plate; etching the plurality of photoresist layers 14 by a photoetching machine to form a plurality of photoresist blocks 141, wherein the patterns formed by the plurality of photoresist blocks 141 are matched with the shapes of the plurality of CSP chips 12 arranged on the fixed film 11; etching away the non-photosensitive areas of the plurality of layers of the photosensitive adhesive layer 14 by etching liquid; then, electroplating the substrate 13 to enable an electroplating additive to be attached to the etched non-photosensitive area to form an electroplated layer 151, wherein the electroplating additive is made of nickel or copper; then polishing the plating layer 151 so that the height of the plating layer 151 coincides with the height of the CSP chip 12; etching the plurality of photosensitive resin blocks 141 by another etching solution to form a plurality of packaging cavities 151, wherein the pattern formed by the plurality of packaging cavities 151 is matched with the shape of the plurality of CSP chips 12 arranged on the fixed film 11, so that the final CSP chip packaging mould is formed;
s3: uniformly spin-coating fluorescent powder glue solution in the CSP chip packaging mould through a glue dispenser, and pressing a plurality of CSP chips 12 arranged on the fixed film 11 into the CSP chip packaging mould through a pressing machine; the plurality of encapsulation cavities 151 in the CSP chip encapsulation mold are uniformly distributed with fluorescent powder glue solution, and the plurality of CSP chips 12 are pressed in the corresponding encapsulation cavities 151, so that the fluorescent powder glue solution covers the CSP chips 12 to complete encapsulation of the CSP chips 12;
s4, heating the CSP chip packaging mold to enable the packaged CSP chip 12 to be separated from the CSP chip packaging mold; and heating the CSP chip packaging mold to separate the CSP chip 12 from the corresponding packaging cavity 151, thereby completing the packaging and demolding of the CSP chip 12.
The CSP chip packaging method realizes the manufacture of the CSP chip packaging mold through the etching and electroplating actions of the photoetching machine, and can finish the separation of the CSP chip after packaging without cutting, so that the CSP chip packaging is more environment-friendly and pollution to the CSP chip is prevented.
The technical features of the above-described embodiments may be arbitrarily combined, and all possible combinations of the technical features in the above-described embodiments are not described for brevity of description, however, as long as there is no contradiction between the combinations of the technical features, they should be considered as the scope of the description.
The above examples illustrate only a few embodiments of the invention, which are described in detail and are not to be construed as limiting the scope of the invention. It should be noted that it will be apparent to those skilled in the art that several variations and modifications can be made without departing from the spirit of the invention, which are all within the scope of the invention. Accordingly, the scope of protection of the present invention is to be determined by the appended claims.

Claims (7)

1. A method for packaging a CSP chip, comprising the steps of:
s1, arranging a plurality of CSP chips on a fixed film by a chip arranging machine;
s2: manufacturing a CSP chip packaging mould;
s3: uniformly spin-coating fluorescent powder glue solution in the CSP chip packaging mould through a glue dispenser, and pressing a plurality of CSP chips arranged on the fixed film into the CSP chip packaging mould through a pressing machine;
s4, heating the CSP chip packaging die to enable the packaged CSP chip to be separated from the CSP chip packaging die;
s2, preparing a metal substrate, wherein a plurality of layers of photoresist layers are arranged on the substrate, and the height of the photoresist layers is consistent with the height of the CSP chip; etching the plurality of layers of photoresist layers through a photoetching machine to form a plurality of photoresist blocks, wherein patterns formed by the plurality of photoresist blocks are matched with the shapes of the plurality of CSP chips arranged on the fixed film; etching out the non-photosensitive areas of the multiple layers of photosensitive adhesive layers through etching liquid; then electroplating the substrate to enable the electroplating additive to be attached to the etched non-photosensitive area to form an electroplated layer; then polishing the electroplated layer to ensure that the height of the electroplated layer is consistent with the height of the CSP chip; and etching the photosensitive glue blocks through another etching solution to form a plurality of packaging cavities, wherein the patterns formed by the plurality of packaging cavities are matched with the shapes of the plurality of CSP chips arranged on the fixed film.
2. The method for packaging a CSP chip of claim 1, wherein the substrate is copper or aluminum.
3. The method of claim 1, wherein the electroplated additive is nickel or copper.
4. The method of packaging CSP chips of claim 1, wherein the CSP chips are distributed in an array with gaps between adjacent CSP chips.
5. The method for packaging a CSP chip of claim 1, wherein the fixing film is a UV film.
6. The method for packaging a CSP chip of claim 1, wherein the plurality of packaging cavities in the CSP chip packaging mold are uniformly distributed with phosphor glue solution.
7. The method of packaging a CSP chip according to any one of claims 1-6, wherein the CSP chip is an LED chip.
CN202111103994.6A 2021-09-18 2021-09-18 Packaging method of CSP chip Active CN113809218B (en)

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CN113809218B true CN113809218B (en) 2024-01-12

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Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN104393154A (en) * 2014-12-09 2015-03-04 武汉大学 Wafer level packaging method for LED (Light-Emitting Diode) chip level white light source
DE202016103927U1 (en) * 2016-07-20 2016-08-04 Shu-Hung Lin Housing technology for CSP LEDs
CN106374025A (en) * 2016-11-02 2017-02-01 深圳市兆驰节能照明股份有限公司 Cylindrical CSP light source and manufacturing device and manufacturing method thereof
CN106449945A (en) * 2016-12-07 2017-02-22 湘能华磊光电股份有限公司 Mold injection method for manufacturing CSP chip
CN108400218A (en) * 2018-01-22 2018-08-14 东莞中之光电股份有限公司 A kind of LED encapsulation method based on CSP patterns

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN104393154A (en) * 2014-12-09 2015-03-04 武汉大学 Wafer level packaging method for LED (Light-Emitting Diode) chip level white light source
DE202016103927U1 (en) * 2016-07-20 2016-08-04 Shu-Hung Lin Housing technology for CSP LEDs
CN106374025A (en) * 2016-11-02 2017-02-01 深圳市兆驰节能照明股份有限公司 Cylindrical CSP light source and manufacturing device and manufacturing method thereof
CN106449945A (en) * 2016-12-07 2017-02-22 湘能华磊光电股份有限公司 Mold injection method for manufacturing CSP chip
CN108400218A (en) * 2018-01-22 2018-08-14 东莞中之光电股份有限公司 A kind of LED encapsulation method based on CSP patterns

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